drivers/net/wireless/ath/ath9k/hw-ops.h

   1 /*
   2  * Copyright (c) 2010 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #ifndef ATH9K_HW_OPS_H
  18 #define ATH9K_HW_OPS_H
  19
  20 #include "hw.h"
  21
  22 /* Hardware core and driver accessible callbacks */
  23
  24 static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
  25                                                int restore,
  26                                                int power_off)
  27 {
  28         ath9k_hw_ops(ah)->config_pci_powersave(ah, restore, power_off);
  29 }
  30
  31 static inline void ath9k_hw_rxena(struct ath_hw *ah)
  32 {
  33         ath9k_hw_ops(ah)->rx_enable(ah);
  34 }
  35
  36 static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
  37                                           u32 link)
  38 {
  39         ath9k_hw_ops(ah)->set_desc_link(ds, link);
  40 }
  41
  42 static inline void ath9k_hw_get_desc_link(struct ath_hw *ah, void *ds,
  43                                           u32 **link)
  44 {
  45         ath9k_hw_ops(ah)->get_desc_link(ds, link);
  46 }
  47 static inline bool ath9k_hw_calibrate(struct ath_hw *ah,
  48                                       struct ath9k_channel *chan,
  49                                       u8 rxchainmask,
  50                                       bool longcal)
  51 {
  52         return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
  53 }
  54
  55 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
  56 {
  57         return ath9k_hw_ops(ah)->get_isr(ah, masked);
  58 }
  59
  60 static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen,
  61                                   bool is_firstseg, bool is_lastseg,
  62                                   const void *ds0, dma_addr_t buf_addr,
  63                                   unsigned int qcu)
  64 {
  65         ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg,
  66                                       ds0, buf_addr, qcu);
  67 }
  68
  69 static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
  70                                       struct ath_tx_status *ts)
  71 {
  72         return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
  73 }
  74
  75 static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
  76                                           u32 pktLen, enum ath9k_pkt_type type,
  77                                           u32 txPower, u32 keyIx,
  78                                           enum ath9k_key_type keyType,
  79                                           u32 flags)
  80 {
  81         ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
  82                                       keyType, flags);
  83 }
  84
  85 static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
  86                                         void *lastds,
  87                                         u32 durUpdateEn, u32 rtsctsRate,
  88                                         u32 rtsctsDuration,
  89                                         struct ath9k_11n_rate_series series[],
  90                                         u32 nseries, u32 flags)
  91 {
  92         ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
  93                                             rtsctsRate, rtsctsDuration, series,
  94                                             nseries, flags);
  95 }
  96
  97 static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
  98                                         u32 aggrLen)
  99 {
 100         ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
 101 }
 102
 103 static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
 104                                                u32 numDelims)
 105 {
 106         ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
 107 }
 108
 109 static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
 110 {
 111         ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
 112 }
 113
 114 static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
 115 {
 116         ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
 117 }
 118
 119 static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
 120 {
 121         ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val);
 122 }
 123
 124 static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
 125                 struct ath_hw_antcomb_conf *antconf)
 126 {
 127         ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
 128 }
 129
 130 static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
 131                 struct ath_hw_antcomb_conf *antconf)
 132 {
 133         ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
 134 }
 135
 136 /* Private hardware call ops */
 137
 138 /* PHY ops */
 139
 140 static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
 141                                        struct ath9k_channel *chan)
 142 {
 143         return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
 144 }
 145
 146 static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
 147                                                struct ath9k_channel *chan)
 148 {
 149         ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
 150 }
 151
 152 static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
 153 {
 154         if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks)
 155                 return 0;
 156
 157         return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah);
 158 }
 159
 160 static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
 161 {
 162         if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks)
 163                 return;
 164
 165         ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah);
 166 }
 167
 168 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
 169                                         struct ath9k_channel *chan,
 170                                         u16 modesIndex)
 171 {
 172         if (!ath9k_hw_private_ops(ah)->set_rf_regs)
 173                 return true;
 174
 175         return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
 176 }
 177
 178 static inline void ath9k_hw_init_bb(struct ath_hw *ah,
 179                                     struct ath9k_channel *chan)
 180 {
 181         return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
 182 }
 183
 184 static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
 185                                              struct ath9k_channel *chan)
 186 {
 187         return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
 188 }
 189
 190 static inline int ath9k_hw_process_ini(struct ath_hw *ah,
 191                                         struct ath9k_channel *chan)
 192 {
 193         return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
 194 }
 195
 196 static inline void ath9k_olc_init(struct ath_hw *ah)
 197 {
 198         if (!ath9k_hw_private_ops(ah)->olc_init)
 199                 return;
 200
 201         return ath9k_hw_private_ops(ah)->olc_init(ah);
 202 }
 203
 204 static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
 205                                        struct ath9k_channel *chan)
 206 {
 207         return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
 208 }
 209
 210 static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
 211 {
 212         return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
 213 }
 214
 215 static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
 216                                             struct ath9k_channel *chan)
 217 {
 218         return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
 219 }
 220
 221 static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
 222 {
 223         return ath9k_hw_private_ops(ah)->rfbus_req(ah);
 224 }
 225
 226 static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
 227 {
 228         return ath9k_hw_private_ops(ah)->rfbus_done(ah);
 229 }
 230
 231 static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
 232 {
 233         if (!ath9k_hw_private_ops(ah)->restore_chainmask)
 234                 return;
 235
 236         return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
 237 }
 238
 239 static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
 240 {
 241         return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
 242 }
 243
 244 static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
 245                                         enum ath9k_ani_cmd cmd, int param)
 246 {
 247         return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
 248 }
 249
 250 static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
 251                                      int16_t nfarray[NUM_NF_READINGS])
 252 {
 253         ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
 254 }
 255
 256 static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
 257                                      struct ath9k_channel *chan)
 258 {
 259         return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
 260 }
 261
 262 static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
 263                                               struct ath9k_cal_list *currCal)
 264 {
 265         ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
 266 }
 267
 268 #endif /* ATH9K_HW_OPS_H */