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sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / net / wireless / rtlwifi / rtl8192se / trx.c
blob5cf442373d46e63717949a7c4bb8d06e9aaa7848
1 /******************************************************************************
2 *
3 * Copyright(c) 2009-2010 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30 #include "../wifi.h"
31 #include "../pci.h"
32 #include "../base.h"
33 #include "reg.h"
34 #include "def.h"
35 #include "phy.h"
36 #include "fw.h"
37 #include "trx.h"
38 #include "led.h"
39
40 static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
41 {
42 __le16 fc = rtl_get_fc(skb);
43
44 if (unlikely(ieee80211_is_beacon(fc)))
45 return QSLT_BEACON;
46 if (ieee80211_is_mgmt(fc))
47 return QSLT_MGNT;
48 if (ieee80211_is_nullfunc(fc))
49 return QSLT_HIGH;
50
51 return skb->priority;
52 }
53
54 static int _rtl92se_rate_mapping(bool isht, u8 desc_rate, bool first_ampdu)
55 {
56 int rate_idx = 0;
57
58 if (first_ampdu) {
59 if (false == isht) {
60 switch (desc_rate) {
61 case DESC92S_RATE1M:
62 rate_idx = 0;
63 break;
64 case DESC92S_RATE2M:
65 rate_idx = 1;
66 break;
67 case DESC92S_RATE5_5M:
68 rate_idx = 2;
69 break;
70 case DESC92S_RATE11M:
71 rate_idx = 3;
72 break;
73 case DESC92S_RATE6M:
74 rate_idx = 4;
75 break;
76 case DESC92S_RATE9M:
77 rate_idx = 5;
78 break;
79 case DESC92S_RATE12M:
80 rate_idx = 6;
81 break;
82 case DESC92S_RATE18M:
83 rate_idx = 7;
84 break;
85 case DESC92S_RATE24M:
86 rate_idx = 8;
87 break;
88 case DESC92S_RATE36M:
89 rate_idx = 9;
90 break;
91 case DESC92S_RATE48M:
92 rate_idx = 10;
93 break;
94 case DESC92S_RATE54M:
95 rate_idx = 11;
96 break;
97 default:
98 rate_idx = 0;
99 break;
100 }
101 } else {
102 rate_idx = 11;
103 }
104
105 return rate_idx;
106 }
107
108 switch (desc_rate) {
109 case DESC92S_RATE1M:
110 rate_idx = 0;
111 break;
112 case DESC92S_RATE2M:
113 rate_idx = 1;
114 break;
115 case DESC92S_RATE5_5M:
116 rate_idx = 2;
117 break;
118 case DESC92S_RATE11M:
119 rate_idx = 3;
120 break;
121 case DESC92S_RATE6M:
122 rate_idx = 4;
123 break;
124 case DESC92S_RATE9M:
125 rate_idx = 5;
126 break;
127 case DESC92S_RATE12M:
128 rate_idx = 6;
129 break;
130 case DESC92S_RATE18M:
131 rate_idx = 7;
132 break;
133 case DESC92S_RATE24M:
134 rate_idx = 8;
135 break;
136 case DESC92S_RATE36M:
137 rate_idx = 9;
138 break;
139 case DESC92S_RATE48M:
140 rate_idx = 10;
141 break;
142 case DESC92S_RATE54M:
143 rate_idx = 11;
144 break;
145 default:
146 rate_idx = 11;
147 break;
148 }
149 return rate_idx;
150 }
151
152 static u8 _rtl92s_query_rxpwrpercentage(char antpower)
153 {
154 if ((antpower <= -100) || (antpower >= 20))
155 return 0;
156 else if (antpower >= 0)
157 return 100;
158 else
159 return 100 + antpower;
160 }
161
162 static u8 _rtl92s_evm_db_to_percentage(char value)
163 {
164 char ret_val;
165 ret_val = value;
166
167 if (ret_val >= 0)
168 ret_val = 0;
169
170 if (ret_val <= -33)
171 ret_val = -33;
172
173 ret_val = 0 - ret_val;
174 ret_val *= 3;
175
176 if (ret_val == 99)
177 ret_val = 100;
178
179 return ret_val;
180 }
181
182 static long _rtl92se_translate_todbm(struct ieee80211_hw *hw,
183 u8 signal_strength_index)
184 {
185 long signal_power;
186
187 signal_power = (long)((signal_strength_index + 1) >> 1);
188 signal_power -= 95;
189 return signal_power;
190 }
191
192 static long _rtl92se_signal_scale_mapping(struct ieee80211_hw *hw,
193 long currsig)
194 {
195 long retsig = 0;
196
197 /* Step 1. Scale mapping. */
198 if (currsig > 47)
199 retsig = 100;
200 else if (currsig > 14 && currsig <= 47)
201 retsig = 100 - ((47 - currsig) * 3) / 2;
202 else if (currsig > 2 && currsig <= 14)
203 retsig = 48 - ((14 - currsig) * 15) / 7;
204 else if (currsig >= 0)
205 retsig = currsig * 9 + 1;
206
207 return retsig;
208 }
209
210
211 static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
212 struct rtl_stats *pstats, u8 *pdesc,
213 struct rx_fwinfo *p_drvinfo,
214 bool packet_match_bssid,
215 bool packet_toself,
216 bool packet_beacon)
217 {
218 struct rtl_priv *rtlpriv = rtl_priv(hw);
219 struct phy_sts_cck_8192s_t *cck_buf;
220 s8 rx_pwr_all = 0, rx_pwr[4];
221 u8 rf_rx_num = 0, evm, pwdb_all;
222 u8 i, max_spatial_stream;
223 u32 rssi, total_rssi = 0;
224 bool in_powersavemode = false;
225 bool is_cck_rate;
226
227 is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
228 pstats->packet_matchbssid = packet_match_bssid;
229 pstats->packet_toself = packet_toself;
230 pstats->is_cck = is_cck_rate;
231 pstats->packet_beacon = packet_beacon;
232 pstats->is_cck = is_cck_rate;
233 pstats->rx_mimo_signalquality[0] = -1;
234 pstats->rx_mimo_signalquality[1] = -1;
235
236 if (is_cck_rate) {
237 u8 report, cck_highpwr;
238 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
239
240 if (!in_powersavemode)
241 cck_highpwr = (u8) rtl_get_bbreg(hw,
242 RFPGA0_XA_HSSIPARAMETER2,
243 0x200);
244 else
245 cck_highpwr = false;
246
247 if (!cck_highpwr) {
248 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
249 report = cck_buf->cck_agc_rpt & 0xc0;
250 report = report >> 6;
251 switch (report) {
252 case 0x3:
253 rx_pwr_all = -40 - (cck_agc_rpt & 0x3e);
254 break;
255 case 0x2:
256 rx_pwr_all = -20 - (cck_agc_rpt & 0x3e);
257 break;
258 case 0x1:
259 rx_pwr_all = -2 - (cck_agc_rpt & 0x3e);
260 break;
261 case 0x0:
262 rx_pwr_all = 14 - (cck_agc_rpt & 0x3e);
263 break;
264 }
265 } else {
266 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
267 report = p_drvinfo->cfosho[0] & 0x60;
268 report = report >> 5;
269 switch (report) {
270 case 0x3:
271 rx_pwr_all = -40 - ((cck_agc_rpt & 0x1f) << 1);
272 break;
273 case 0x2:
274 rx_pwr_all = -20 - ((cck_agc_rpt & 0x1f) << 1);
275 break;
276 case 0x1:
277 rx_pwr_all = -2 - ((cck_agc_rpt & 0x1f) << 1);
278 break;
279 case 0x0:
280 rx_pwr_all = 14 - ((cck_agc_rpt & 0x1f) << 1);
281 break;
282 }
283 }
284
285 pwdb_all = _rtl92s_query_rxpwrpercentage(rx_pwr_all);
286
287 /* CCK gain is smaller than OFDM/MCS gain, */
288 /* so we add gain diff by experiences, the val is 6 */
289 pwdb_all += 6;
290 if (pwdb_all > 100)
291 pwdb_all = 100;
292 /* modify the offset to make the same gain index with OFDM. */
293 if (pwdb_all > 34 && pwdb_all <= 42)
294 pwdb_all -= 2;
295 else if (pwdb_all > 26 && pwdb_all <= 34)
296 pwdb_all -= 6;
297 else if (pwdb_all > 14 && pwdb_all <= 26)
298 pwdb_all -= 8;
299 else if (pwdb_all > 4 && pwdb_all <= 14)
300 pwdb_all -= 4;
301
302 pstats->rx_pwdb_all = pwdb_all;
303 pstats->recvsignalpower = rx_pwr_all;
304
305 if (packet_match_bssid) {
306 u8 sq;
307 if (pstats->rx_pwdb_all > 40) {
308 sq = 100;
309 } else {
310 sq = cck_buf->sq_rpt;
311 if (sq > 64)
312 sq = 0;
313 else if (sq < 20)
314 sq = 100;
315 else
316 sq = ((64 - sq) * 100) / 44;
317 }
318
319 pstats->signalquality = sq;
320 pstats->rx_mimo_signalquality[0] = sq;
321 pstats->rx_mimo_signalquality[1] = -1;
322 }
323 } else {
324 rtlpriv->dm.rfpath_rxenable[0] =
325 rtlpriv->dm.rfpath_rxenable[1] = true;
326 for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
327 if (rtlpriv->dm.rfpath_rxenable[i])
328 rf_rx_num++;
329
330 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
331 0x3f) * 2) - 110;
332 rssi = _rtl92s_query_rxpwrpercentage(rx_pwr[i]);
333 total_rssi += rssi;
334 rtlpriv->stats.rx_snr_db[i] =
335 (long)(p_drvinfo->rxsnr[i] / 2);
336
337 if (packet_match_bssid)
338 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
339 }
340
341 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
342 pwdb_all = _rtl92s_query_rxpwrpercentage(rx_pwr_all);
343 pstats->rx_pwdb_all = pwdb_all;
344 pstats->rxpower = rx_pwr_all;
345 pstats->recvsignalpower = rx_pwr_all;
346
347 if (GET_RX_STATUS_DESC_RX_HT(pdesc) &&
348 GET_RX_STATUS_DESC_RX_MCS(pdesc) >= DESC92S_RATEMCS8 &&
349 GET_RX_STATUS_DESC_RX_MCS(pdesc) <= DESC92S_RATEMCS15)
350 max_spatial_stream = 2;
351 else
352 max_spatial_stream = 1;
353
354 for (i = 0; i < max_spatial_stream; i++) {
355 evm = _rtl92s_evm_db_to_percentage(p_drvinfo->rxevm[i]);
356
357 if (packet_match_bssid) {
358 if (i == 0)
359 pstats->signalquality = (u8)(evm &
360 0xff);
361 pstats->rx_mimo_signalquality[i] =
362 (u8) (evm & 0xff);
363 }
364 }
365 }
366
367 if (is_cck_rate)
368 pstats->signalstrength = (u8)(_rtl92se_signal_scale_mapping(hw,
369 pwdb_all));
370 else if (rf_rx_num != 0)
371 pstats->signalstrength = (u8) (_rtl92se_signal_scale_mapping(hw,
372 total_rssi /= rf_rx_num));
373 }
374
375 static void _rtl92se_process_ui_rssi(struct ieee80211_hw *hw,
376 struct rtl_stats *pstats)
377 {
378 struct rtl_priv *rtlpriv = rtl_priv(hw);
379 struct rtl_phy *rtlphy = &(rtlpriv->phy);
380 u8 rfpath;
381 u32 last_rssi, tmpval;
382
383 if (pstats->packet_toself || pstats->packet_beacon) {
384 rtlpriv->stats.rssi_calculate_cnt++;
385
386 if (rtlpriv->stats.ui_rssi.total_num++ >=
387 PHY_RSSI_SLID_WIN_MAX) {
388 rtlpriv->stats.ui_rssi.total_num =
389 PHY_RSSI_SLID_WIN_MAX;
390 last_rssi = rtlpriv->stats.ui_rssi.elements[
391 rtlpriv->stats.ui_rssi.index];
392 rtlpriv->stats.ui_rssi.total_val -= last_rssi;
393 }
394
395 rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
396 rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.index++]
397 = pstats->signalstrength;
398
399 if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
400 rtlpriv->stats.ui_rssi.index = 0;
401
402 tmpval = rtlpriv->stats.ui_rssi.total_val /
403 rtlpriv->stats.ui_rssi.total_num;
404 rtlpriv->stats.signal_strength = _rtl92se_translate_todbm(hw,
405 (u8) tmpval);
406 pstats->rssi = rtlpriv->stats.signal_strength;
407 }
408
409 if (!pstats->is_cck && pstats->packet_toself) {
410 for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
411 rfpath++) {
412 if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
413 rtlpriv->stats.rx_rssi_percentage[rfpath] =
414 pstats->rx_mimo_signalstrength[rfpath];
415
416 }
417
418 if (pstats->rx_mimo_signalstrength[rfpath] >
419 rtlpriv->stats.rx_rssi_percentage[rfpath]) {
420 rtlpriv->stats.rx_rssi_percentage[rfpath] =
421 ((rtlpriv->stats.rx_rssi_percentage[rfpath]
422 * (RX_SMOOTH_FACTOR - 1)) +
423 (pstats->rx_mimo_signalstrength[rfpath])) /
424 (RX_SMOOTH_FACTOR);
425
426 rtlpriv->stats.rx_rssi_percentage[rfpath] =
427 rtlpriv->stats.rx_rssi_percentage[rfpath]
428 + 1;
429 } else {
430 rtlpriv->stats.rx_rssi_percentage[rfpath] =
431 ((rtlpriv->stats.rx_rssi_percentage[rfpath]
432 * (RX_SMOOTH_FACTOR - 1)) +
433 (pstats->rx_mimo_signalstrength[rfpath])) /
434 (RX_SMOOTH_FACTOR);
435 }
436
437 }
438 }
439 }
440
441 static void _rtl92se_update_rxsignalstatistics(struct ieee80211_hw *hw,
442 struct rtl_stats *pstats)
443 {
444 struct rtl_priv *rtlpriv = rtl_priv(hw);
445 int weighting = 0;
446
447 if (rtlpriv->stats.recv_signal_power == 0)
448 rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
449
450 if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
451 weighting = 5;
452 else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
453 weighting = (-5);
454
455 rtlpriv->stats.recv_signal_power = (rtlpriv->stats.recv_signal_power * 5
456 + pstats->recvsignalpower +
457 weighting) / 6;
458 }
459
460 static void _rtl92se_process_pwdb(struct ieee80211_hw *hw,
461 struct rtl_stats *pstats)
462 {
463 struct rtl_priv *rtlpriv = rtl_priv(hw);
464 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
465 long undec_sm_pwdb = 0;
466
467 if (mac->opmode == NL80211_IFTYPE_ADHOC) {
468 return;
469 } else {
470 undec_sm_pwdb =
471 rtlpriv->dm.undecorated_smoothed_pwdb;
472 }
473
474 if (pstats->packet_toself || pstats->packet_beacon) {
475 if (undec_sm_pwdb < 0)
476 undec_sm_pwdb = pstats->rx_pwdb_all;
477
478 if (pstats->rx_pwdb_all > (u32) undec_sm_pwdb) {
479 undec_sm_pwdb =
480 (((undec_sm_pwdb) *
481 (RX_SMOOTH_FACTOR - 1)) +
482 (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
483
484 undec_sm_pwdb = undec_sm_pwdb + 1;
485 } else {
486 undec_sm_pwdb = (((undec_sm_pwdb) *
487 (RX_SMOOTH_FACTOR - 1)) + (pstats->rx_pwdb_all)) /
488 (RX_SMOOTH_FACTOR);
489 }
490
491 rtlpriv->dm.undecorated_smoothed_pwdb = undec_sm_pwdb;
492 _rtl92se_update_rxsignalstatistics(hw, pstats);
493 }
494 }
495
496 static void rtl_92s_process_streams(struct ieee80211_hw *hw,
497 struct rtl_stats *pstats)
498 {
499 struct rtl_priv *rtlpriv = rtl_priv(hw);
500 u32 stream;
501
502 for (stream = 0; stream < 2; stream++) {
503 if (pstats->rx_mimo_signalquality[stream] != -1) {
504 if (rtlpriv->stats.rx_evm_percentage[stream] == 0) {
505 rtlpriv->stats.rx_evm_percentage[stream] =
506 pstats->rx_mimo_signalquality[stream];
507 }
508
509 rtlpriv->stats.rx_evm_percentage[stream] =
510 ((rtlpriv->stats.rx_evm_percentage[stream] *
511 (RX_SMOOTH_FACTOR - 1)) +
512 (pstats->rx_mimo_signalquality[stream] *
513 1)) / (RX_SMOOTH_FACTOR);
514 }
515 }
516 }
517
518 static void _rtl92se_process_ui_link_quality(struct ieee80211_hw *hw,
519 struct rtl_stats *pstats)
520 {
521 struct rtl_priv *rtlpriv = rtl_priv(hw);
522 u32 last_evm = 0, tmpval;
523
524 if (pstats->signalquality != 0) {
525 if (pstats->packet_toself || pstats->packet_beacon) {
526
527 if (rtlpriv->stats.ui_link_quality.total_num++ >=
528 PHY_LINKQUALITY_SLID_WIN_MAX) {
529 rtlpriv->stats.ui_link_quality.total_num =
530 PHY_LINKQUALITY_SLID_WIN_MAX;
531 last_evm =
532 rtlpriv->stats.ui_link_quality.elements[
533 rtlpriv->stats.ui_link_quality.index];
534 rtlpriv->stats.ui_link_quality.total_val -=
535 last_evm;
536 }
537
538 rtlpriv->stats.ui_link_quality.total_val +=
539 pstats->signalquality;
540 rtlpriv->stats.ui_link_quality.elements[
541 rtlpriv->stats.ui_link_quality.index++] =
542 pstats->signalquality;
543
544 if (rtlpriv->stats.ui_link_quality.index >=
545 PHY_LINKQUALITY_SLID_WIN_MAX)
546 rtlpriv->stats.ui_link_quality.index = 0;
547
548 tmpval = rtlpriv->stats.ui_link_quality.total_val /
549 rtlpriv->stats.ui_link_quality.total_num;
550 rtlpriv->stats.signal_quality = tmpval;
551
552 rtlpriv->stats.last_sigstrength_inpercent = tmpval;
553
554 rtl_92s_process_streams(hw, pstats);
555
556 }
557 }
558 }
559
560 static void _rtl92se_process_phyinfo(struct ieee80211_hw *hw,
561 u8 *buffer,
562 struct rtl_stats *pcurrent_stats)
563 {
564
565 if (!pcurrent_stats->packet_matchbssid &&
566 !pcurrent_stats->packet_beacon)
567 return;
568
569 _rtl92se_process_ui_rssi(hw, pcurrent_stats);
570 _rtl92se_process_pwdb(hw, pcurrent_stats);
571 _rtl92se_process_ui_link_quality(hw, pcurrent_stats);
572 }
573
574 static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
575 struct sk_buff *skb, struct rtl_stats *pstats,
576 u8 *pdesc, struct rx_fwinfo *p_drvinfo)
577 {
578 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
579 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
580
581 struct ieee80211_hdr *hdr;
582 u8 *tmp_buf;
583 u8 *praddr;
584 u8 *psaddr;
585 __le16 fc;
586 u16 type, cfc;
587 bool packet_matchbssid, packet_toself, packet_beacon;
588
589 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
590
591 hdr = (struct ieee80211_hdr *)tmp_buf;
592 fc = hdr->frame_control;
593 cfc = le16_to_cpu(fc);
594 type = WLAN_FC_GET_TYPE(fc);
595 praddr = hdr->addr1;
596 psaddr = hdr->addr2;
597
598 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
599 (!compare_ether_addr(mac->bssid, (cfc & IEEE80211_FCTL_TODS) ?
600 hdr->addr1 : (cfc & IEEE80211_FCTL_FROMDS) ?
601 hdr->addr2 : hdr->addr3)) && (!pstats->hwerror) &&
602 (!pstats->crc) && (!pstats->icv));
603
604 packet_toself = packet_matchbssid &&
605 (!compare_ether_addr(praddr, rtlefuse->dev_addr));
606
607 if (ieee80211_is_beacon(fc))
608 packet_beacon = true;
609
610 _rtl92se_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
611 packet_matchbssid, packet_toself, packet_beacon);
612 _rtl92se_process_phyinfo(hw, tmp_buf, pstats);
613 }
614
615 bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
616 struct ieee80211_rx_status *rx_status, u8 *pdesc,
617 struct sk_buff *skb)
618 {
619 struct rx_fwinfo *p_drvinfo;
620 u32 phystatus = (u32)GET_RX_STATUS_DESC_PHY_STATUS(pdesc);
621
622 stats->length = (u16)GET_RX_STATUS_DESC_PKT_LEN(pdesc);
623 stats->rx_drvinfo_size = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE(pdesc) * 8;
624 stats->rx_bufshift = (u8)(GET_RX_STATUS_DESC_SHIFT(pdesc) & 0x03);
625 stats->icv = (u16)GET_RX_STATUS_DESC_ICV(pdesc);
626 stats->crc = (u16)GET_RX_STATUS_DESC_CRC32(pdesc);
627 stats->hwerror = (u16)(stats->crc | stats->icv);
628 stats->decrypted = !GET_RX_STATUS_DESC_SWDEC(pdesc);
629
630 stats->rate = (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc);
631 stats->shortpreamble = (u16)GET_RX_STATUS_DESC_SPLCP(pdesc);
632 stats->isampdu = (bool)(GET_RX_STATUS_DESC_PAGGR(pdesc) == 1);
633 stats->timestamp_low = GET_RX_STATUS_DESC_TSFL(pdesc);
634 stats->rx_is40Mhzpacket = (bool)GET_RX_STATUS_DESC_BW(pdesc);
635
636 if (stats->hwerror)
637 return false;
638
639 rx_status->freq = hw->conf.channel->center_freq;
640 rx_status->band = hw->conf.channel->band;
641
642 if (GET_RX_STATUS_DESC_CRC32(pdesc))
643 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
644
645 if (!GET_RX_STATUS_DESC_SWDEC(pdesc))
646 rx_status->flag |= RX_FLAG_DECRYPTED;
647
648 if (GET_RX_STATUS_DESC_BW(pdesc))
649 rx_status->flag |= RX_FLAG_40MHZ;
650
651 if (GET_RX_STATUS_DESC_RX_HT(pdesc))
652 rx_status->flag |= RX_FLAG_HT;
653
654 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
655
656 if (stats->decrypted)
657 rx_status->flag |= RX_FLAG_DECRYPTED;
658
659 rx_status->rate_idx = _rtl92se_rate_mapping((bool)
660 GET_RX_STATUS_DESC_RX_HT(pdesc),
661 (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc),
662 (bool)GET_RX_STATUS_DESC_PAGGR(pdesc));
663
664
665 rx_status->mactime = GET_RX_STATUS_DESC_TSFL(pdesc);
666 if (phystatus == true) {
667 p_drvinfo = (struct rx_fwinfo *)(skb->data +
668 stats->rx_bufshift);
669 _rtl92se_translate_rx_signal_stuff(hw, skb, stats, pdesc,
670 p_drvinfo);
671 }
672
673 /*rx_status->qual = stats->signal; */
674 rx_status->signal = stats->rssi + 10;
675 /*rx_status->noise = -stats->noise; */
676
677 return true;
678 }
679
680 void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
681 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
682 struct ieee80211_tx_info *info, struct sk_buff *skb,
683 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
684 {
685 struct rtl_priv *rtlpriv = rtl_priv(hw);
686 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
687 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
688 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
689 struct ieee80211_sta *sta = info->control.sta;
690 u8 *pdesc = (u8 *) pdesc_tx;
691 u16 seq_number;
692 __le16 fc = hdr->frame_control;
693 u8 reserved_macid = 0;
694 u8 fw_qsel = _rtl92se_map_hwqueue_to_fwqueue(skb, hw_queue);
695 bool firstseg = (!(hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG)));
696 bool lastseg = (!(hdr->frame_control &
697 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)));
698 dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
699 PCI_DMA_TODEVICE);
700 u8 bw_40 = 0;
701
702 if (mac->opmode == NL80211_IFTYPE_STATION) {
703 bw_40 = mac->bw_40;
704 } else if (mac->opmode == NL80211_IFTYPE_AP ||
705 mac->opmode == NL80211_IFTYPE_ADHOC) {
706 if (sta)
707 bw_40 = sta->ht_cap.cap &
708 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
709 }
710
711 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
712
713 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
714
715 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE_RTL8192S);
716
717 if (firstseg) {
718 if (rtlpriv->dm.useramask) {
719 /* set txdesc macId */
720 if (ptcb_desc->mac_id < 32) {
721 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
722 reserved_macid |= ptcb_desc->mac_id;
723 }
724 }
725 SET_TX_DESC_RSVD_MACID(pdesc, reserved_macid);
726
727 SET_TX_DESC_TXHT(pdesc, ((ptcb_desc->hw_rate >=
728 DESC92S_RATEMCS0) ? 1 : 0));
729
730 if (rtlhal->version == VERSION_8192S_ACUT) {
731 if (ptcb_desc->hw_rate == DESC92S_RATE1M ||
732 ptcb_desc->hw_rate == DESC92S_RATE2M ||
733 ptcb_desc->hw_rate == DESC92S_RATE5_5M ||
734 ptcb_desc->hw_rate == DESC92S_RATE11M) {
735 ptcb_desc->hw_rate = DESC92S_RATE12M;
736 }
737 }
738
739 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
740
741 if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
742 SET_TX_DESC_TX_SHORT(pdesc, 0);
743
744 /* Aggregation related */
745 if (info->flags & IEEE80211_TX_CTL_AMPDU)
746 SET_TX_DESC_AGG_ENABLE(pdesc, 1);
747
748 /* For AMPDU, we must insert SSN into TX_DESC */
749 SET_TX_DESC_SEQ(pdesc, seq_number);
750
751 /* Protection mode related */
752 /* For 92S, if RTS/CTS are set, HW will execute RTS. */
753 /* We choose only one protection mode to execute */
754 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
755 !ptcb_desc->cts_enable) ? 1 : 0));
756 SET_TX_DESC_CTS_ENABLE(pdesc, ((ptcb_desc->cts_enable) ?
757 1 : 0));
758 SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
759
760 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
761 SET_TX_DESC_RTS_BANDWIDTH(pdesc, 0);
762 SET_TX_DESC_RTS_SUB_CARRIER(pdesc, ptcb_desc->rts_sc);
763 SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <=
764 DESC92S_RATE54M) ?
765 (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
766 : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
767
768
769 /* Set Bandwidth and sub-channel settings. */
770 if (bw_40) {
771 if (ptcb_desc->packet_bw) {
772 SET_TX_DESC_TX_BANDWIDTH(pdesc, 1);
773 /* use duplicated mode */
774 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
775 } else {
776 SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
777 SET_TX_DESC_TX_SUB_CARRIER(pdesc,
778 mac->cur_40_prime_sc);
779 }
780 } else {
781 SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
782 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
783 }
784
785 /* 3 Fill necessary field in First Descriptor */
786 /*DWORD 0*/
787 SET_TX_DESC_LINIP(pdesc, 0);
788 SET_TX_DESC_OFFSET(pdesc, 32);
789 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
790
791 /*DWORD 1*/
792 SET_TX_DESC_RA_BRSR_ID(pdesc, ptcb_desc->ratr_index);
793
794 /* Fill security related */
795 if (info->control.hw_key) {
796 struct ieee80211_key_conf *keyconf;
797
798 keyconf = info->control.hw_key;
799 switch (keyconf->cipher) {
800 case WLAN_CIPHER_SUITE_WEP40:
801 case WLAN_CIPHER_SUITE_WEP104:
802 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
803 break;
804 case WLAN_CIPHER_SUITE_TKIP:
805 SET_TX_DESC_SEC_TYPE(pdesc, 0x2);
806 break;
807 case WLAN_CIPHER_SUITE_CCMP:
808 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
809 break;
810 default:
811 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
812 break;
813
814 }
815 }
816
817 /* Set Packet ID */
818 SET_TX_DESC_PACKET_ID(pdesc, 0);
819
820 /* We will assign magement queue to BK. */
821 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
822
823 /* Alwasy enable all rate fallback range */
824 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
825
826 /* Fix: I don't kown why hw use 6.5M to tx when set it */
827 SET_TX_DESC_USER_RATE(pdesc,
828 ptcb_desc->use_driver_rate ? 1 : 0);
829
830 /* Set NON_QOS bit. */
831 if (!ieee80211_is_data_qos(fc))
832 SET_TX_DESC_NON_QOS(pdesc, 1);
833
834 }
835
836 /* Fill fields that are required to be initialized
837 * in all of the descriptors */
838 /*DWORD 0 */
839 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
840 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
841
842 /* DWORD 7 */
843 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
844
845 /* DOWRD 8 */
846 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
847
848 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, ("\n"));
849 }
850
851 void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
852 bool firstseg, bool lastseg, struct sk_buff *skb)
853 {
854 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
855 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
856 struct rtl_tcb_desc *tcb_desc = (struct rtl_tcb_desc *)(skb->cb);
857
858 dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
859 PCI_DMA_TODEVICE);
860
861 /* Clear all status */
862 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_CMDDESC_SIZE_RTL8192S);
863
864 /* This bit indicate this packet is used for FW download. */
865 if (tcb_desc->cmd_or_init == DESC_PACKET_TYPE_INIT) {
866 /* For firmware downlaod we only need to set LINIP */
867 SET_TX_DESC_LINIP(pdesc, tcb_desc->last_inipkt);
868
869 /* 92SE must set as 1 for firmware download HW DMA error */
870 SET_TX_DESC_FIRST_SEG(pdesc, 1);
871 SET_TX_DESC_LAST_SEG(pdesc, 1);
872
873 /* 92SE need not to set TX packet size when firmware download */
874 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
875 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
876 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
877
878 SET_TX_DESC_OWN(pdesc, 1);
879 } else { /* H2C Command Desc format (Host TXCMD) */
880 /* 92SE must set as 1 for firmware download HW DMA error */
881 SET_TX_DESC_FIRST_SEG(pdesc, 1);
882 SET_TX_DESC_LAST_SEG(pdesc, 1);
883
884 SET_TX_DESC_OFFSET(pdesc, 0x20);
885
886 /* Buffer size + command header */
887 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
888 /* Fixed queue of H2C command */
889 SET_TX_DESC_QUEUE_SEL(pdesc, 0x13);
890
891 SET_BITS_TO_LE_4BYTE(skb->data, 24, 7, rtlhal->h2c_txcmd_seq);
892
893 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
894 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
895
896 SET_TX_DESC_OWN(pdesc, 1);
897
898 }
899 }
900
901 void rtl92se_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val)
902 {
903 if (istx == true) {
904 switch (desc_name) {
905 case HW_DESC_OWN:
906 SET_TX_DESC_OWN(pdesc, 1);
907 break;
908 case HW_DESC_TX_NEXTDESC_ADDR:
909 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
910 break;
911 default:
912 RT_ASSERT(false, ("ERR txdesc :%d not process\n",
913 desc_name));
914 break;
915 }
916 } else {
917 switch (desc_name) {
918 case HW_DESC_RXOWN:
919 SET_RX_STATUS_DESC_OWN(pdesc, 1);
920 break;
921 case HW_DESC_RXBUFF_ADDR:
922 SET_RX_STATUS__DESC_BUFF_ADDR(pdesc, *(u32 *) val);
923 break;
924 case HW_DESC_RXPKT_LEN:
925 SET_RX_STATUS_DESC_PKT_LEN(pdesc, *(u32 *) val);
926 break;
927 case HW_DESC_RXERO:
928 SET_RX_STATUS_DESC_EOR(pdesc, 1);
929 break;
930 default:
931 RT_ASSERT(false, ("ERR rxdesc :%d not process\n",
932 desc_name));
933 break;
934 }
935 }
936 }
937
938 u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
939 {
940 u32 ret = 0;
941
942 if (istx == true) {
943 switch (desc_name) {
944 case HW_DESC_OWN:
945 ret = GET_TX_DESC_OWN(desc);
946 break;
947 case HW_DESC_TXBUFF_ADDR:
948 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(desc);
949 break;
950 default:
951 RT_ASSERT(false, ("ERR txdesc :%d not process\n",
952 desc_name));
953 break;
954 }
955 } else {
956 switch (desc_name) {
957 case HW_DESC_OWN:
958 ret = GET_RX_STATUS_DESC_OWN(desc);
959 break;
960 case HW_DESC_RXPKT_LEN:
961 ret = GET_RX_STATUS_DESC_PKT_LEN(desc);
962 break;
963 default:
964 RT_ASSERT(false, ("ERR rxdesc :%d not process\n",
965 desc_name));
966 break;
967 }
968 }
969 return ret;
970 }
971
972 void rtl92se_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
973 {
974 struct rtl_priv *rtlpriv = rtl_priv(hw);
975 rtl_write_word(rtlpriv, TP_POLL, BIT(0) << (hw_queue));
976 }