sfc: Don't use enums as a bitmask.
[zen-stable.git] / drivers / usb / host / xhci.c
blob196e0181b2ed6e5f56c0a8ea2330a3399c8f739b
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
30 #include "xhci.h"
32 #define DRIVER_AUTHOR "Sarah Sharp"
33 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
35 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
36 static int link_quirk;
37 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
38 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
40 /* TODO: copied from ehci-hcd.c - can this be refactored? */
42 * handshake - spin reading hc until handshake completes or fails
43 * @ptr: address of hc register to be read
44 * @mask: bits to look at in result of read
45 * @done: value of those bits when handshake succeeds
46 * @usec: timeout in microseconds
48 * Returns negative errno, or zero on success
50 * Success happens when the "mask" bits have the specified value (hardware
51 * handshake done). There are two failure modes: "usec" have passed (major
52 * hardware flakeout), or the register reads as all-ones (hardware removed).
54 static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
55 u32 mask, u32 done, int usec)
57 u32 result;
59 do {
60 result = xhci_readl(xhci, ptr);
61 if (result == ~(u32)0) /* card removed */
62 return -ENODEV;
63 result &= mask;
64 if (result == done)
65 return 0;
66 udelay(1);
67 usec--;
68 } while (usec > 0);
69 return -ETIMEDOUT;
73 * Disable interrupts and begin the xHCI halting process.
75 void xhci_quiesce(struct xhci_hcd *xhci)
77 u32 halted;
78 u32 cmd;
79 u32 mask;
81 mask = ~(XHCI_IRQS);
82 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
83 if (!halted)
84 mask &= ~CMD_RUN;
86 cmd = xhci_readl(xhci, &xhci->op_regs->command);
87 cmd &= mask;
88 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92 * Force HC into halt state.
94 * Disable any IRQs and clear the run/stop bit.
95 * HC will complete any current and actively pipelined transactions, and
96 * should halt within 16 ms of the run/stop bit being cleared.
97 * Read HC Halted bit in the status register to see when the HC is finished.
99 int xhci_halt(struct xhci_hcd *xhci)
101 int ret;
102 xhci_dbg(xhci, "// Halt the HC\n");
103 xhci_quiesce(xhci);
105 ret = handshake(xhci, &xhci->op_regs->status,
106 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
107 if (!ret)
108 xhci->xhc_state |= XHCI_STATE_HALTED;
109 return ret;
113 * Set the run bit and wait for the host to be running.
115 static int xhci_start(struct xhci_hcd *xhci)
117 u32 temp;
118 int ret;
120 temp = xhci_readl(xhci, &xhci->op_regs->command);
121 temp |= (CMD_RUN);
122 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
123 temp);
124 xhci_writel(xhci, temp, &xhci->op_regs->command);
127 * Wait for the HCHalted Status bit to be 0 to indicate the host is
128 * running.
130 ret = handshake(xhci, &xhci->op_regs->status,
131 STS_HALT, 0, XHCI_MAX_HALT_USEC);
132 if (ret == -ETIMEDOUT)
133 xhci_err(xhci, "Host took too long to start, "
134 "waited %u microseconds.\n",
135 XHCI_MAX_HALT_USEC);
136 if (!ret)
137 xhci->xhc_state &= ~XHCI_STATE_HALTED;
138 return ret;
142 * Reset a halted HC.
144 * This resets pipelines, timers, counters, state machines, etc.
145 * Transactions will be terminated immediately, and operational registers
146 * will be set to their defaults.
148 int xhci_reset(struct xhci_hcd *xhci)
150 u32 command;
151 u32 state;
152 int ret;
154 state = xhci_readl(xhci, &xhci->op_regs->status);
155 if ((state & STS_HALT) == 0) {
156 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
157 return 0;
160 xhci_dbg(xhci, "// Reset the HC\n");
161 command = xhci_readl(xhci, &xhci->op_regs->command);
162 command |= CMD_RESET;
163 xhci_writel(xhci, command, &xhci->op_regs->command);
165 ret = handshake(xhci, &xhci->op_regs->command,
166 CMD_RESET, 0, 250 * 1000);
167 if (ret)
168 return ret;
170 xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
172 * xHCI cannot write to any doorbells or operational registers other
173 * than status until the "Controller Not Ready" flag is cleared.
175 return handshake(xhci, &xhci->op_regs->status, STS_CNR, 0, 250 * 1000);
179 * Free IRQs
180 * free all IRQs request
182 static void xhci_free_irq(struct xhci_hcd *xhci)
184 int i;
185 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
187 /* return if using legacy interrupt */
188 if (xhci_to_hcd(xhci)->irq >= 0)
189 return;
191 if (xhci->msix_entries) {
192 for (i = 0; i < xhci->msix_count; i++)
193 if (xhci->msix_entries[i].vector)
194 free_irq(xhci->msix_entries[i].vector,
195 xhci_to_hcd(xhci));
196 } else if (pdev->irq >= 0)
197 free_irq(pdev->irq, xhci_to_hcd(xhci));
199 return;
203 * Set up MSI
205 static int xhci_setup_msi(struct xhci_hcd *xhci)
207 int ret;
208 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
210 ret = pci_enable_msi(pdev);
211 if (ret) {
212 xhci_err(xhci, "failed to allocate MSI entry\n");
213 return ret;
216 ret = request_irq(pdev->irq, (irq_handler_t)xhci_msi_irq,
217 0, "xhci_hcd", xhci_to_hcd(xhci));
218 if (ret) {
219 xhci_err(xhci, "disable MSI interrupt\n");
220 pci_disable_msi(pdev);
223 return ret;
227 * Set up MSI-X
229 static int xhci_setup_msix(struct xhci_hcd *xhci)
231 int i, ret = 0;
232 struct usb_hcd *hcd = xhci_to_hcd(xhci);
233 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
236 * calculate number of msi-x vectors supported.
237 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
238 * with max number of interrupters based on the xhci HCSPARAMS1.
239 * - num_online_cpus: maximum msi-x vectors per CPUs core.
240 * Add additional 1 vector to ensure always available interrupt.
242 xhci->msix_count = min(num_online_cpus() + 1,
243 HCS_MAX_INTRS(xhci->hcs_params1));
245 xhci->msix_entries =
246 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
247 GFP_KERNEL);
248 if (!xhci->msix_entries) {
249 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
250 return -ENOMEM;
253 for (i = 0; i < xhci->msix_count; i++) {
254 xhci->msix_entries[i].entry = i;
255 xhci->msix_entries[i].vector = 0;
258 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
259 if (ret) {
260 xhci_err(xhci, "Failed to enable MSI-X\n");
261 goto free_entries;
264 for (i = 0; i < xhci->msix_count; i++) {
265 ret = request_irq(xhci->msix_entries[i].vector,
266 (irq_handler_t)xhci_msi_irq,
267 0, "xhci_hcd", xhci_to_hcd(xhci));
268 if (ret)
269 goto disable_msix;
272 hcd->msix_enabled = 1;
273 return ret;
275 disable_msix:
276 xhci_err(xhci, "disable MSI-X interrupt\n");
277 xhci_free_irq(xhci);
278 pci_disable_msix(pdev);
279 free_entries:
280 kfree(xhci->msix_entries);
281 xhci->msix_entries = NULL;
282 return ret;
285 /* Free any IRQs and disable MSI-X */
286 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
288 struct usb_hcd *hcd = xhci_to_hcd(xhci);
289 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
291 xhci_free_irq(xhci);
293 if (xhci->msix_entries) {
294 pci_disable_msix(pdev);
295 kfree(xhci->msix_entries);
296 xhci->msix_entries = NULL;
297 } else {
298 pci_disable_msi(pdev);
301 hcd->msix_enabled = 0;
302 return;
306 * Initialize memory for HCD and xHC (one-time init).
308 * Program the PAGESIZE register, initialize the device context array, create
309 * device contexts (?), set up a command ring segment (or two?), create event
310 * ring (one for now).
312 int xhci_init(struct usb_hcd *hcd)
314 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
315 int retval = 0;
317 xhci_dbg(xhci, "xhci_init\n");
318 spin_lock_init(&xhci->lock);
319 if (link_quirk) {
320 xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
321 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
322 } else {
323 xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
325 retval = xhci_mem_init(xhci, GFP_KERNEL);
326 xhci_dbg(xhci, "Finished xhci_init\n");
328 return retval;
331 /*-------------------------------------------------------------------------*/
334 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
335 static void xhci_event_ring_work(unsigned long arg)
337 unsigned long flags;
338 int temp;
339 u64 temp_64;
340 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
341 int i, j;
343 xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
345 spin_lock_irqsave(&xhci->lock, flags);
346 temp = xhci_readl(xhci, &xhci->op_regs->status);
347 xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
348 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
349 xhci_dbg(xhci, "HW died, polling stopped.\n");
350 spin_unlock_irqrestore(&xhci->lock, flags);
351 return;
354 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
355 xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
356 xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
357 xhci->error_bitmask = 0;
358 xhci_dbg(xhci, "Event ring:\n");
359 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
360 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
361 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
362 temp_64 &= ~ERST_PTR_MASK;
363 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
364 xhci_dbg(xhci, "Command ring:\n");
365 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
366 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
367 xhci_dbg_cmd_ptrs(xhci);
368 for (i = 0; i < MAX_HC_SLOTS; ++i) {
369 if (!xhci->devs[i])
370 continue;
371 for (j = 0; j < 31; ++j) {
372 xhci_dbg_ep_rings(xhci, i, j, &xhci->devs[i]->eps[j]);
375 spin_unlock_irqrestore(&xhci->lock, flags);
377 if (!xhci->zombie)
378 mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
379 else
380 xhci_dbg(xhci, "Quit polling the event ring.\n");
382 #endif
384 static int xhci_run_finished(struct xhci_hcd *xhci)
386 if (xhci_start(xhci)) {
387 xhci_halt(xhci);
388 return -ENODEV;
390 xhci->shared_hcd->state = HC_STATE_RUNNING;
392 if (xhci->quirks & XHCI_NEC_HOST)
393 xhci_ring_cmd_db(xhci);
395 xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
396 return 0;
400 * Start the HC after it was halted.
402 * This function is called by the USB core when the HC driver is added.
403 * Its opposite is xhci_stop().
405 * xhci_init() must be called once before this function can be called.
406 * Reset the HC, enable device slot contexts, program DCBAAP, and
407 * set command ring pointer and event ring pointer.
409 * Setup MSI-X vectors and enable interrupts.
411 int xhci_run(struct usb_hcd *hcd)
413 u32 temp;
414 u64 temp_64;
415 u32 ret;
416 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
417 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
419 /* Start the xHCI host controller running only after the USB 2.0 roothub
420 * is setup.
423 hcd->uses_new_polling = 1;
424 if (!usb_hcd_is_primary_hcd(hcd))
425 return xhci_run_finished(xhci);
427 xhci_dbg(xhci, "xhci_run\n");
428 /* unregister the legacy interrupt */
429 if (hcd->irq)
430 free_irq(hcd->irq, hcd);
431 hcd->irq = -1;
433 ret = xhci_setup_msix(xhci);
434 if (ret)
435 /* fall back to msi*/
436 ret = xhci_setup_msi(xhci);
438 if (ret) {
439 /* fall back to legacy interrupt*/
440 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
441 hcd->irq_descr, hcd);
442 if (ret) {
443 xhci_err(xhci, "request interrupt %d failed\n",
444 pdev->irq);
445 return ret;
447 hcd->irq = pdev->irq;
450 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
451 init_timer(&xhci->event_ring_timer);
452 xhci->event_ring_timer.data = (unsigned long) xhci;
453 xhci->event_ring_timer.function = xhci_event_ring_work;
454 /* Poll the event ring */
455 xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
456 xhci->zombie = 0;
457 xhci_dbg(xhci, "Setting event ring polling timer\n");
458 add_timer(&xhci->event_ring_timer);
459 #endif
461 xhci_dbg(xhci, "Command ring memory map follows:\n");
462 xhci_debug_ring(xhci, xhci->cmd_ring);
463 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
464 xhci_dbg_cmd_ptrs(xhci);
466 xhci_dbg(xhci, "ERST memory map follows:\n");
467 xhci_dbg_erst(xhci, &xhci->erst);
468 xhci_dbg(xhci, "Event ring:\n");
469 xhci_debug_ring(xhci, xhci->event_ring);
470 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
471 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
472 temp_64 &= ~ERST_PTR_MASK;
473 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
475 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
476 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
477 temp &= ~ER_IRQ_INTERVAL_MASK;
478 temp |= (u32) 160;
479 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
481 /* Set the HCD state before we enable the irqs */
482 temp = xhci_readl(xhci, &xhci->op_regs->command);
483 temp |= (CMD_EIE);
484 xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
485 temp);
486 xhci_writel(xhci, temp, &xhci->op_regs->command);
488 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
489 xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
490 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
491 xhci_writel(xhci, ER_IRQ_ENABLE(temp),
492 &xhci->ir_set->irq_pending);
493 xhci_print_ir_set(xhci, 0);
495 if (xhci->quirks & XHCI_NEC_HOST)
496 xhci_queue_vendor_command(xhci, 0, 0, 0,
497 TRB_TYPE(TRB_NEC_GET_FW));
499 xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
500 return 0;
503 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
505 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
507 spin_lock_irq(&xhci->lock);
508 xhci_halt(xhci);
510 /* The shared_hcd is going to be deallocated shortly (the USB core only
511 * calls this function when allocation fails in usb_add_hcd(), or
512 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
514 xhci->shared_hcd = NULL;
515 spin_unlock_irq(&xhci->lock);
519 * Stop xHCI driver.
521 * This function is called by the USB core when the HC driver is removed.
522 * Its opposite is xhci_run().
524 * Disable device contexts, disable IRQs, and quiesce the HC.
525 * Reset the HC, finish any completed transactions, and cleanup memory.
527 void xhci_stop(struct usb_hcd *hcd)
529 u32 temp;
530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
532 if (!usb_hcd_is_primary_hcd(hcd)) {
533 xhci_only_stop_hcd(xhci->shared_hcd);
534 return;
537 spin_lock_irq(&xhci->lock);
538 /* Make sure the xHC is halted for a USB3 roothub
539 * (xhci_stop() could be called as part of failed init).
541 xhci_halt(xhci);
542 xhci_reset(xhci);
543 spin_unlock_irq(&xhci->lock);
545 xhci_cleanup_msix(xhci);
547 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
548 /* Tell the event ring poll function not to reschedule */
549 xhci->zombie = 1;
550 del_timer_sync(&xhci->event_ring_timer);
551 #endif
553 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
554 temp = xhci_readl(xhci, &xhci->op_regs->status);
555 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
556 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
557 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
558 &xhci->ir_set->irq_pending);
559 xhci_print_ir_set(xhci, 0);
561 xhci_dbg(xhci, "cleaning up memory\n");
562 xhci_mem_cleanup(xhci);
563 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
564 xhci_readl(xhci, &xhci->op_regs->status));
568 * Shutdown HC (not bus-specific)
570 * This is called when the machine is rebooting or halting. We assume that the
571 * machine will be powered off, and the HC's internal state will be reset.
572 * Don't bother to free memory.
574 * This will only ever be called with the main usb_hcd (the USB3 roothub).
576 void xhci_shutdown(struct usb_hcd *hcd)
578 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
580 spin_lock_irq(&xhci->lock);
581 xhci_halt(xhci);
582 spin_unlock_irq(&xhci->lock);
584 xhci_cleanup_msix(xhci);
586 xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
587 xhci_readl(xhci, &xhci->op_regs->status));
590 #ifdef CONFIG_PM
591 static void xhci_save_registers(struct xhci_hcd *xhci)
593 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command);
594 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification);
595 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
596 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg);
597 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending);
598 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control);
599 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size);
600 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
601 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
604 static void xhci_restore_registers(struct xhci_hcd *xhci)
606 xhci_writel(xhci, xhci->s3.command, &xhci->op_regs->command);
607 xhci_writel(xhci, xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
608 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
609 xhci_writel(xhci, xhci->s3.config_reg, &xhci->op_regs->config_reg);
610 xhci_writel(xhci, xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
611 xhci_writel(xhci, xhci->s3.irq_control, &xhci->ir_set->irq_control);
612 xhci_writel(xhci, xhci->s3.erst_size, &xhci->ir_set->erst_size);
613 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
616 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
618 u64 val_64;
620 /* step 2: initialize command ring buffer */
621 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
622 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
623 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
624 xhci->cmd_ring->dequeue) &
625 (u64) ~CMD_RING_RSVD_BITS) |
626 xhci->cmd_ring->cycle_state;
627 xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
628 (long unsigned long) val_64);
629 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
633 * The whole command ring must be cleared to zero when we suspend the host.
635 * The host doesn't save the command ring pointer in the suspend well, so we
636 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
637 * aligned, because of the reserved bits in the command ring dequeue pointer
638 * register. Therefore, we can't just set the dequeue pointer back in the
639 * middle of the ring (TRBs are 16-byte aligned).
641 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
643 struct xhci_ring *ring;
644 struct xhci_segment *seg;
646 ring = xhci->cmd_ring;
647 seg = ring->deq_seg;
648 do {
649 memset(seg->trbs, 0, SEGMENT_SIZE);
650 seg = seg->next;
651 } while (seg != ring->deq_seg);
653 /* Reset the software enqueue and dequeue pointers */
654 ring->deq_seg = ring->first_seg;
655 ring->dequeue = ring->first_seg->trbs;
656 ring->enq_seg = ring->deq_seg;
657 ring->enqueue = ring->dequeue;
660 * Ring is now zeroed, so the HW should look for change of ownership
661 * when the cycle bit is set to 1.
663 ring->cycle_state = 1;
666 * Reset the hardware dequeue pointer.
667 * Yes, this will need to be re-written after resume, but we're paranoid
668 * and want to make sure the hardware doesn't access bogus memory
669 * because, say, the BIOS or an SMI started the host without changing
670 * the command ring pointers.
672 xhci_set_cmd_ring_deq(xhci);
676 * Stop HC (not bus-specific)
678 * This is called when the machine transition into S3/S4 mode.
681 int xhci_suspend(struct xhci_hcd *xhci)
683 int rc = 0;
684 struct usb_hcd *hcd = xhci_to_hcd(xhci);
685 u32 command;
686 int i;
688 spin_lock_irq(&xhci->lock);
689 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
690 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
691 /* step 1: stop endpoint */
692 /* skipped assuming that port suspend has done */
694 /* step 2: clear Run/Stop bit */
695 command = xhci_readl(xhci, &xhci->op_regs->command);
696 command &= ~CMD_RUN;
697 xhci_writel(xhci, command, &xhci->op_regs->command);
698 if (handshake(xhci, &xhci->op_regs->status,
699 STS_HALT, STS_HALT, 100*100)) {
700 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
701 spin_unlock_irq(&xhci->lock);
702 return -ETIMEDOUT;
704 xhci_clear_command_ring(xhci);
706 /* step 3: save registers */
707 xhci_save_registers(xhci);
709 /* step 4: set CSS flag */
710 command = xhci_readl(xhci, &xhci->op_regs->command);
711 command |= CMD_CSS;
712 xhci_writel(xhci, command, &xhci->op_regs->command);
713 if (handshake(xhci, &xhci->op_regs->status, STS_SAVE, 0, 10*100)) {
714 xhci_warn(xhci, "WARN: xHC CMD_CSS timeout\n");
715 spin_unlock_irq(&xhci->lock);
716 return -ETIMEDOUT;
718 spin_unlock_irq(&xhci->lock);
720 /* step 5: remove core well power */
721 /* synchronize irq when using MSI-X */
722 if (xhci->msix_entries) {
723 for (i = 0; i < xhci->msix_count; i++)
724 synchronize_irq(xhci->msix_entries[i].vector);
727 return rc;
731 * start xHC (not bus-specific)
733 * This is called when the machine transition from S3/S4 mode.
736 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
738 u32 command, temp = 0;
739 struct usb_hcd *hcd = xhci_to_hcd(xhci);
740 struct usb_hcd *secondary_hcd;
741 int retval;
743 /* Wait a bit if either of the roothubs need to settle from the
744 * transition into bus suspend.
746 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
747 time_before(jiffies,
748 xhci->bus_state[1].next_statechange))
749 msleep(100);
751 spin_lock_irq(&xhci->lock);
753 if (!hibernated) {
754 /* step 1: restore register */
755 xhci_restore_registers(xhci);
756 /* step 2: initialize command ring buffer */
757 xhci_set_cmd_ring_deq(xhci);
758 /* step 3: restore state and start state*/
759 /* step 3: set CRS flag */
760 command = xhci_readl(xhci, &xhci->op_regs->command);
761 command |= CMD_CRS;
762 xhci_writel(xhci, command, &xhci->op_regs->command);
763 if (handshake(xhci, &xhci->op_regs->status,
764 STS_RESTORE, 0, 10*100)) {
765 xhci_dbg(xhci, "WARN: xHC CMD_CSS timeout\n");
766 spin_unlock_irq(&xhci->lock);
767 return -ETIMEDOUT;
769 temp = xhci_readl(xhci, &xhci->op_regs->status);
772 /* If restore operation fails, re-initialize the HC during resume */
773 if ((temp & STS_SRE) || hibernated) {
774 usb_root_hub_lost_power(hcd->self.root_hub);
776 xhci_dbg(xhci, "Stop HCD\n");
777 xhci_halt(xhci);
778 xhci_reset(xhci);
779 spin_unlock_irq(&xhci->lock);
780 xhci_cleanup_msix(xhci);
782 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
783 /* Tell the event ring poll function not to reschedule */
784 xhci->zombie = 1;
785 del_timer_sync(&xhci->event_ring_timer);
786 #endif
788 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
789 temp = xhci_readl(xhci, &xhci->op_regs->status);
790 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
791 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
792 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
793 &xhci->ir_set->irq_pending);
794 xhci_print_ir_set(xhci, 0);
796 xhci_dbg(xhci, "cleaning up memory\n");
797 xhci_mem_cleanup(xhci);
798 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
799 xhci_readl(xhci, &xhci->op_regs->status));
801 /* USB core calls the PCI reinit and start functions twice:
802 * first with the primary HCD, and then with the secondary HCD.
803 * If we don't do the same, the host will never be started.
805 if (!usb_hcd_is_primary_hcd(hcd))
806 secondary_hcd = hcd;
807 else
808 secondary_hcd = xhci->shared_hcd;
810 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
811 retval = xhci_init(hcd->primary_hcd);
812 if (retval)
813 return retval;
814 xhci_dbg(xhci, "Start the primary HCD\n");
815 retval = xhci_run(hcd->primary_hcd);
816 if (retval)
817 goto failed_restart;
819 xhci_dbg(xhci, "Start the secondary HCD\n");
820 retval = xhci_run(secondary_hcd);
821 if (!retval) {
822 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
823 set_bit(HCD_FLAG_HW_ACCESSIBLE,
824 &xhci->shared_hcd->flags);
826 failed_restart:
827 hcd->state = HC_STATE_SUSPENDED;
828 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
829 return retval;
832 /* step 4: set Run/Stop bit */
833 command = xhci_readl(xhci, &xhci->op_regs->command);
834 command |= CMD_RUN;
835 xhci_writel(xhci, command, &xhci->op_regs->command);
836 handshake(xhci, &xhci->op_regs->status, STS_HALT,
837 0, 250 * 1000);
839 /* step 5: walk topology and initialize portsc,
840 * portpmsc and portli
842 /* this is done in bus_resume */
844 /* step 6: restart each of the previously
845 * Running endpoints by ringing their doorbells
848 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
849 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
851 spin_unlock_irq(&xhci->lock);
852 return 0;
854 #endif /* CONFIG_PM */
856 /*-------------------------------------------------------------------------*/
859 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
860 * HCDs. Find the index for an endpoint given its descriptor. Use the return
861 * value to right shift 1 for the bitmask.
863 * Index = (epnum * 2) + direction - 1,
864 * where direction = 0 for OUT, 1 for IN.
865 * For control endpoints, the IN index is used (OUT index is unused), so
866 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
868 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
870 unsigned int index;
871 if (usb_endpoint_xfer_control(desc))
872 index = (unsigned int) (usb_endpoint_num(desc)*2);
873 else
874 index = (unsigned int) (usb_endpoint_num(desc)*2) +
875 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
876 return index;
879 /* Find the flag for this endpoint (for use in the control context). Use the
880 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
881 * bit 1, etc.
883 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
885 return 1 << (xhci_get_endpoint_index(desc) + 1);
888 /* Find the flag for this endpoint (for use in the control context). Use the
889 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
890 * bit 1, etc.
892 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
894 return 1 << (ep_index + 1);
897 /* Compute the last valid endpoint context index. Basically, this is the
898 * endpoint index plus one. For slot contexts with more than valid endpoint,
899 * we find the most significant bit set in the added contexts flags.
900 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
901 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
903 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
905 return fls(added_ctxs) - 1;
908 /* Returns 1 if the arguments are OK;
909 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
911 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
912 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
913 const char *func) {
914 struct xhci_hcd *xhci;
915 struct xhci_virt_device *virt_dev;
917 if (!hcd || (check_ep && !ep) || !udev) {
918 printk(KERN_DEBUG "xHCI %s called with invalid args\n",
919 func);
920 return -EINVAL;
922 if (!udev->parent) {
923 printk(KERN_DEBUG "xHCI %s called for root hub\n",
924 func);
925 return 0;
928 if (check_virt_dev) {
929 xhci = hcd_to_xhci(hcd);
930 if (!udev->slot_id || !xhci->devs
931 || !xhci->devs[udev->slot_id]) {
932 printk(KERN_DEBUG "xHCI %s called with unaddressed "
933 "device\n", func);
934 return -EINVAL;
937 virt_dev = xhci->devs[udev->slot_id];
938 if (virt_dev->udev != udev) {
939 printk(KERN_DEBUG "xHCI %s called with udev and "
940 "virt_dev does not match\n", func);
941 return -EINVAL;
945 return 1;
948 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
949 struct usb_device *udev, struct xhci_command *command,
950 bool ctx_change, bool must_succeed);
953 * Full speed devices may have a max packet size greater than 8 bytes, but the
954 * USB core doesn't know that until it reads the first 8 bytes of the
955 * descriptor. If the usb_device's max packet size changes after that point,
956 * we need to issue an evaluate context command and wait on it.
958 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
959 unsigned int ep_index, struct urb *urb)
961 struct xhci_container_ctx *in_ctx;
962 struct xhci_container_ctx *out_ctx;
963 struct xhci_input_control_ctx *ctrl_ctx;
964 struct xhci_ep_ctx *ep_ctx;
965 int max_packet_size;
966 int hw_max_packet_size;
967 int ret = 0;
969 out_ctx = xhci->devs[slot_id]->out_ctx;
970 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
971 hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
972 max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
973 if (hw_max_packet_size != max_packet_size) {
974 xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
975 xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
976 max_packet_size);
977 xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
978 hw_max_packet_size);
979 xhci_dbg(xhci, "Issuing evaluate context command.\n");
981 /* Set up the modified control endpoint 0 */
982 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
983 xhci->devs[slot_id]->out_ctx, ep_index);
984 in_ctx = xhci->devs[slot_id]->in_ctx;
985 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
986 ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
987 ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
989 /* Set up the input context flags for the command */
990 /* FIXME: This won't work if a non-default control endpoint
991 * changes max packet sizes.
993 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
994 ctrl_ctx->add_flags = EP0_FLAG;
995 ctrl_ctx->drop_flags = 0;
997 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
998 xhci_dbg_ctx(xhci, in_ctx, ep_index);
999 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1000 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1002 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1003 true, false);
1005 /* Clean up the input context for later use by bandwidth
1006 * functions.
1008 ctrl_ctx->add_flags = SLOT_FLAG;
1010 return ret;
1014 * non-error returns are a promise to giveback() the urb later
1015 * we drop ownership so next owner (or urb unlink) can get it
1017 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1019 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1020 unsigned long flags;
1021 int ret = 0;
1022 unsigned int slot_id, ep_index;
1023 struct urb_priv *urb_priv;
1024 int size, i;
1026 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1027 true, true, __func__) <= 0)
1028 return -EINVAL;
1030 slot_id = urb->dev->slot_id;
1031 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1033 if (!HCD_HW_ACCESSIBLE(hcd)) {
1034 if (!in_interrupt())
1035 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1036 ret = -ESHUTDOWN;
1037 goto exit;
1040 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1041 size = urb->number_of_packets;
1042 else
1043 size = 1;
1045 urb_priv = kzalloc(sizeof(struct urb_priv) +
1046 size * sizeof(struct xhci_td *), mem_flags);
1047 if (!urb_priv)
1048 return -ENOMEM;
1050 for (i = 0; i < size; i++) {
1051 urb_priv->td[i] = kzalloc(sizeof(struct xhci_td), mem_flags);
1052 if (!urb_priv->td[i]) {
1053 urb_priv->length = i;
1054 xhci_urb_free_priv(xhci, urb_priv);
1055 return -ENOMEM;
1059 urb_priv->length = size;
1060 urb_priv->td_cnt = 0;
1061 urb->hcpriv = urb_priv;
1063 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1064 /* Check to see if the max packet size for the default control
1065 * endpoint changed during FS device enumeration
1067 if (urb->dev->speed == USB_SPEED_FULL) {
1068 ret = xhci_check_maxpacket(xhci, slot_id,
1069 ep_index, urb);
1070 if (ret < 0)
1071 return ret;
1074 /* We have a spinlock and interrupts disabled, so we must pass
1075 * atomic context to this function, which may allocate memory.
1077 spin_lock_irqsave(&xhci->lock, flags);
1078 if (xhci->xhc_state & XHCI_STATE_DYING)
1079 goto dying;
1080 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1081 slot_id, ep_index);
1082 spin_unlock_irqrestore(&xhci->lock, flags);
1083 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1084 spin_lock_irqsave(&xhci->lock, flags);
1085 if (xhci->xhc_state & XHCI_STATE_DYING)
1086 goto dying;
1087 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1088 EP_GETTING_STREAMS) {
1089 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1090 "is transitioning to using streams.\n");
1091 ret = -EINVAL;
1092 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1093 EP_GETTING_NO_STREAMS) {
1094 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1095 "is transitioning to "
1096 "not having streams.\n");
1097 ret = -EINVAL;
1098 } else {
1099 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1100 slot_id, ep_index);
1102 spin_unlock_irqrestore(&xhci->lock, flags);
1103 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1104 spin_lock_irqsave(&xhci->lock, flags);
1105 if (xhci->xhc_state & XHCI_STATE_DYING)
1106 goto dying;
1107 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1108 slot_id, ep_index);
1109 spin_unlock_irqrestore(&xhci->lock, flags);
1110 } else {
1111 spin_lock_irqsave(&xhci->lock, flags);
1112 if (xhci->xhc_state & XHCI_STATE_DYING)
1113 goto dying;
1114 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1115 slot_id, ep_index);
1116 spin_unlock_irqrestore(&xhci->lock, flags);
1118 exit:
1119 return ret;
1120 dying:
1121 xhci_urb_free_priv(xhci, urb_priv);
1122 urb->hcpriv = NULL;
1123 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1124 "non-responsive xHCI host.\n",
1125 urb->ep->desc.bEndpointAddress, urb);
1126 spin_unlock_irqrestore(&xhci->lock, flags);
1127 return -ESHUTDOWN;
1130 /* Get the right ring for the given URB.
1131 * If the endpoint supports streams, boundary check the URB's stream ID.
1132 * If the endpoint doesn't support streams, return the singular endpoint ring.
1134 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1135 struct urb *urb)
1137 unsigned int slot_id;
1138 unsigned int ep_index;
1139 unsigned int stream_id;
1140 struct xhci_virt_ep *ep;
1142 slot_id = urb->dev->slot_id;
1143 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1144 stream_id = urb->stream_id;
1145 ep = &xhci->devs[slot_id]->eps[ep_index];
1146 /* Common case: no streams */
1147 if (!(ep->ep_state & EP_HAS_STREAMS))
1148 return ep->ring;
1150 if (stream_id == 0) {
1151 xhci_warn(xhci,
1152 "WARN: Slot ID %u, ep index %u has streams, "
1153 "but URB has no stream ID.\n",
1154 slot_id, ep_index);
1155 return NULL;
1158 if (stream_id < ep->stream_info->num_streams)
1159 return ep->stream_info->stream_rings[stream_id];
1161 xhci_warn(xhci,
1162 "WARN: Slot ID %u, ep index %u has "
1163 "stream IDs 1 to %u allocated, "
1164 "but stream ID %u is requested.\n",
1165 slot_id, ep_index,
1166 ep->stream_info->num_streams - 1,
1167 stream_id);
1168 return NULL;
1172 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1173 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1174 * should pick up where it left off in the TD, unless a Set Transfer Ring
1175 * Dequeue Pointer is issued.
1177 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1178 * the ring. Since the ring is a contiguous structure, they can't be physically
1179 * removed. Instead, there are two options:
1181 * 1) If the HC is in the middle of processing the URB to be canceled, we
1182 * simply move the ring's dequeue pointer past those TRBs using the Set
1183 * Transfer Ring Dequeue Pointer command. This will be the common case,
1184 * when drivers timeout on the last submitted URB and attempt to cancel.
1186 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1187 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1188 * HC will need to invalidate the any TRBs it has cached after the stop
1189 * endpoint command, as noted in the xHCI 0.95 errata.
1191 * 3) The TD may have completed by the time the Stop Endpoint Command
1192 * completes, so software needs to handle that case too.
1194 * This function should protect against the TD enqueueing code ringing the
1195 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1196 * It also needs to account for multiple cancellations on happening at the same
1197 * time for the same endpoint.
1199 * Note that this function can be called in any context, or so says
1200 * usb_hcd_unlink_urb()
1202 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1204 unsigned long flags;
1205 int ret, i;
1206 u32 temp;
1207 struct xhci_hcd *xhci;
1208 struct urb_priv *urb_priv;
1209 struct xhci_td *td;
1210 unsigned int ep_index;
1211 struct xhci_ring *ep_ring;
1212 struct xhci_virt_ep *ep;
1214 xhci = hcd_to_xhci(hcd);
1215 spin_lock_irqsave(&xhci->lock, flags);
1216 /* Make sure the URB hasn't completed or been unlinked already */
1217 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1218 if (ret || !urb->hcpriv)
1219 goto done;
1220 temp = xhci_readl(xhci, &xhci->op_regs->status);
1221 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1222 xhci_dbg(xhci, "HW died, freeing TD.\n");
1223 urb_priv = urb->hcpriv;
1225 usb_hcd_unlink_urb_from_ep(hcd, urb);
1226 spin_unlock_irqrestore(&xhci->lock, flags);
1227 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1228 xhci_urb_free_priv(xhci, urb_priv);
1229 return ret;
1231 if (xhci->xhc_state & XHCI_STATE_DYING) {
1232 xhci_dbg(xhci, "Ep 0x%x: URB %p to be canceled on "
1233 "non-responsive xHCI host.\n",
1234 urb->ep->desc.bEndpointAddress, urb);
1235 /* Let the stop endpoint command watchdog timer (which set this
1236 * state) finish cleaning up the endpoint TD lists. We must
1237 * have caught it in the middle of dropping a lock and giving
1238 * back an URB.
1240 goto done;
1243 xhci_dbg(xhci, "Cancel URB %p\n", urb);
1244 xhci_dbg(xhci, "Event ring:\n");
1245 xhci_debug_ring(xhci, xhci->event_ring);
1246 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1247 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1248 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1249 if (!ep_ring) {
1250 ret = -EINVAL;
1251 goto done;
1254 xhci_dbg(xhci, "Endpoint ring:\n");
1255 xhci_debug_ring(xhci, ep_ring);
1257 urb_priv = urb->hcpriv;
1259 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1260 td = urb_priv->td[i];
1261 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1264 /* Queue a stop endpoint command, but only if this is
1265 * the first cancellation to be handled.
1267 if (!(ep->ep_state & EP_HALT_PENDING)) {
1268 ep->ep_state |= EP_HALT_PENDING;
1269 ep->stop_cmds_pending++;
1270 ep->stop_cmd_timer.expires = jiffies +
1271 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1272 add_timer(&ep->stop_cmd_timer);
1273 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1274 xhci_ring_cmd_db(xhci);
1276 done:
1277 spin_unlock_irqrestore(&xhci->lock, flags);
1278 return ret;
1281 /* Drop an endpoint from a new bandwidth configuration for this device.
1282 * Only one call to this function is allowed per endpoint before
1283 * check_bandwidth() or reset_bandwidth() must be called.
1284 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1285 * add the endpoint to the schedule with possibly new parameters denoted by a
1286 * different endpoint descriptor in usb_host_endpoint.
1287 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1288 * not allowed.
1290 * The USB core will not allow URBs to be queued to an endpoint that is being
1291 * disabled, so there's no need for mutual exclusion to protect
1292 * the xhci->devs[slot_id] structure.
1294 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1295 struct usb_host_endpoint *ep)
1297 struct xhci_hcd *xhci;
1298 struct xhci_container_ctx *in_ctx, *out_ctx;
1299 struct xhci_input_control_ctx *ctrl_ctx;
1300 struct xhci_slot_ctx *slot_ctx;
1301 unsigned int last_ctx;
1302 unsigned int ep_index;
1303 struct xhci_ep_ctx *ep_ctx;
1304 u32 drop_flag;
1305 u32 new_add_flags, new_drop_flags, new_slot_info;
1306 int ret;
1308 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1309 if (ret <= 0)
1310 return ret;
1311 xhci = hcd_to_xhci(hcd);
1312 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1314 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1315 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1316 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1317 __func__, drop_flag);
1318 return 0;
1321 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1322 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1323 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1324 ep_index = xhci_get_endpoint_index(&ep->desc);
1325 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1326 /* If the HC already knows the endpoint is disabled,
1327 * or the HCD has noted it is disabled, ignore this request
1329 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
1330 ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
1331 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1332 __func__, ep);
1333 return 0;
1336 ctrl_ctx->drop_flags |= drop_flag;
1337 new_drop_flags = ctrl_ctx->drop_flags;
1339 ctrl_ctx->add_flags &= ~drop_flag;
1340 new_add_flags = ctrl_ctx->add_flags;
1342 last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
1343 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1344 /* Update the last valid endpoint context, if we deleted the last one */
1345 if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
1346 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1347 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1349 new_slot_info = slot_ctx->dev_info;
1351 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1353 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1354 (unsigned int) ep->desc.bEndpointAddress,
1355 udev->slot_id,
1356 (unsigned int) new_drop_flags,
1357 (unsigned int) new_add_flags,
1358 (unsigned int) new_slot_info);
1359 return 0;
1362 /* Add an endpoint to a new possible bandwidth configuration for this device.
1363 * Only one call to this function is allowed per endpoint before
1364 * check_bandwidth() or reset_bandwidth() must be called.
1365 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1366 * add the endpoint to the schedule with possibly new parameters denoted by a
1367 * different endpoint descriptor in usb_host_endpoint.
1368 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1369 * not allowed.
1371 * The USB core will not allow URBs to be queued to an endpoint until the
1372 * configuration or alt setting is installed in the device, so there's no need
1373 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1375 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1376 struct usb_host_endpoint *ep)
1378 struct xhci_hcd *xhci;
1379 struct xhci_container_ctx *in_ctx, *out_ctx;
1380 unsigned int ep_index;
1381 struct xhci_ep_ctx *ep_ctx;
1382 struct xhci_slot_ctx *slot_ctx;
1383 struct xhci_input_control_ctx *ctrl_ctx;
1384 u32 added_ctxs;
1385 unsigned int last_ctx;
1386 u32 new_add_flags, new_drop_flags, new_slot_info;
1387 int ret = 0;
1389 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1390 if (ret <= 0) {
1391 /* So we won't queue a reset ep command for a root hub */
1392 ep->hcpriv = NULL;
1393 return ret;
1395 xhci = hcd_to_xhci(hcd);
1397 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1398 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1399 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1400 /* FIXME when we have to issue an evaluate endpoint command to
1401 * deal with ep0 max packet size changing once we get the
1402 * descriptors
1404 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1405 __func__, added_ctxs);
1406 return 0;
1409 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1410 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1411 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1412 ep_index = xhci_get_endpoint_index(&ep->desc);
1413 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1414 /* If the HCD has already noted the endpoint is enabled,
1415 * ignore this request.
1417 if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
1418 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1419 __func__, ep);
1420 return 0;
1424 * Configuration and alternate setting changes must be done in
1425 * process context, not interrupt context (or so documenation
1426 * for usb_set_interface() and usb_set_configuration() claim).
1428 if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
1429 udev, ep, GFP_NOIO) < 0) {
1430 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1431 __func__, ep->desc.bEndpointAddress);
1432 return -ENOMEM;
1435 ctrl_ctx->add_flags |= added_ctxs;
1436 new_add_flags = ctrl_ctx->add_flags;
1438 /* If xhci_endpoint_disable() was called for this endpoint, but the
1439 * xHC hasn't been notified yet through the check_bandwidth() call,
1440 * this re-adds a new state for the endpoint from the new endpoint
1441 * descriptors. We must drop and re-add this endpoint, so we leave the
1442 * drop flags alone.
1444 new_drop_flags = ctrl_ctx->drop_flags;
1446 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1447 /* Update the last valid endpoint context, if we just added one past */
1448 if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
1449 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1450 slot_ctx->dev_info |= LAST_CTX(last_ctx);
1452 new_slot_info = slot_ctx->dev_info;
1454 /* Store the usb_device pointer for later use */
1455 ep->hcpriv = udev;
1457 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1458 (unsigned int) ep->desc.bEndpointAddress,
1459 udev->slot_id,
1460 (unsigned int) new_drop_flags,
1461 (unsigned int) new_add_flags,
1462 (unsigned int) new_slot_info);
1463 return 0;
1466 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1468 struct xhci_input_control_ctx *ctrl_ctx;
1469 struct xhci_ep_ctx *ep_ctx;
1470 struct xhci_slot_ctx *slot_ctx;
1471 int i;
1473 /* When a device's add flag and drop flag are zero, any subsequent
1474 * configure endpoint command will leave that endpoint's state
1475 * untouched. Make sure we don't leave any old state in the input
1476 * endpoint contexts.
1478 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1479 ctrl_ctx->drop_flags = 0;
1480 ctrl_ctx->add_flags = 0;
1481 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1482 slot_ctx->dev_info &= ~LAST_CTX_MASK;
1483 /* Endpoint 0 is always valid */
1484 slot_ctx->dev_info |= LAST_CTX(1);
1485 for (i = 1; i < 31; ++i) {
1486 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1487 ep_ctx->ep_info = 0;
1488 ep_ctx->ep_info2 = 0;
1489 ep_ctx->deq = 0;
1490 ep_ctx->tx_info = 0;
1494 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1495 struct usb_device *udev, int *cmd_status)
1497 int ret;
1499 switch (*cmd_status) {
1500 case COMP_ENOMEM:
1501 dev_warn(&udev->dev, "Not enough host controller resources "
1502 "for new device state.\n");
1503 ret = -ENOMEM;
1504 /* FIXME: can we allocate more resources for the HC? */
1505 break;
1506 case COMP_BW_ERR:
1507 dev_warn(&udev->dev, "Not enough bandwidth "
1508 "for new device state.\n");
1509 ret = -ENOSPC;
1510 /* FIXME: can we go back to the old state? */
1511 break;
1512 case COMP_TRB_ERR:
1513 /* the HCD set up something wrong */
1514 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1515 "add flag = 1, "
1516 "and endpoint is not disabled.\n");
1517 ret = -EINVAL;
1518 break;
1519 case COMP_SUCCESS:
1520 dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
1521 ret = 0;
1522 break;
1523 default:
1524 xhci_err(xhci, "ERROR: unexpected command completion "
1525 "code 0x%x.\n", *cmd_status);
1526 ret = -EINVAL;
1527 break;
1529 return ret;
1532 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1533 struct usb_device *udev, int *cmd_status)
1535 int ret;
1536 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1538 switch (*cmd_status) {
1539 case COMP_EINVAL:
1540 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1541 "context command.\n");
1542 ret = -EINVAL;
1543 break;
1544 case COMP_EBADSLT:
1545 dev_warn(&udev->dev, "WARN: slot not enabled for"
1546 "evaluate context command.\n");
1547 case COMP_CTX_STATE:
1548 dev_warn(&udev->dev, "WARN: invalid context state for "
1549 "evaluate context command.\n");
1550 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1551 ret = -EINVAL;
1552 break;
1553 case COMP_SUCCESS:
1554 dev_dbg(&udev->dev, "Successful evaluate context command\n");
1555 ret = 0;
1556 break;
1557 default:
1558 xhci_err(xhci, "ERROR: unexpected command completion "
1559 "code 0x%x.\n", *cmd_status);
1560 ret = -EINVAL;
1561 break;
1563 return ret;
1566 /* Issue a configure endpoint command or evaluate context command
1567 * and wait for it to finish.
1569 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1570 struct usb_device *udev,
1571 struct xhci_command *command,
1572 bool ctx_change, bool must_succeed)
1574 int ret;
1575 int timeleft;
1576 unsigned long flags;
1577 struct xhci_container_ctx *in_ctx;
1578 struct completion *cmd_completion;
1579 int *cmd_status;
1580 struct xhci_virt_device *virt_dev;
1582 spin_lock_irqsave(&xhci->lock, flags);
1583 virt_dev = xhci->devs[udev->slot_id];
1584 if (command) {
1585 in_ctx = command->in_ctx;
1586 cmd_completion = command->completion;
1587 cmd_status = &command->status;
1588 command->command_trb = xhci->cmd_ring->enqueue;
1590 /* Enqueue pointer can be left pointing to the link TRB,
1591 * we must handle that
1593 if ((command->command_trb->link.control & TRB_TYPE_BITMASK)
1594 == TRB_TYPE(TRB_LINK))
1595 command->command_trb =
1596 xhci->cmd_ring->enq_seg->next->trbs;
1598 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
1599 } else {
1600 in_ctx = virt_dev->in_ctx;
1601 cmd_completion = &virt_dev->cmd_completion;
1602 cmd_status = &virt_dev->cmd_status;
1604 init_completion(cmd_completion);
1606 if (!ctx_change)
1607 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
1608 udev->slot_id, must_succeed);
1609 else
1610 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
1611 udev->slot_id);
1612 if (ret < 0) {
1613 if (command)
1614 list_del(&command->cmd_list);
1615 spin_unlock_irqrestore(&xhci->lock, flags);
1616 xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
1617 return -ENOMEM;
1619 xhci_ring_cmd_db(xhci);
1620 spin_unlock_irqrestore(&xhci->lock, flags);
1622 /* Wait for the configure endpoint command to complete */
1623 timeleft = wait_for_completion_interruptible_timeout(
1624 cmd_completion,
1625 USB_CTRL_SET_TIMEOUT);
1626 if (timeleft <= 0) {
1627 xhci_warn(xhci, "%s while waiting for %s command\n",
1628 timeleft == 0 ? "Timeout" : "Signal",
1629 ctx_change == 0 ?
1630 "configure endpoint" :
1631 "evaluate context");
1632 /* FIXME cancel the configure endpoint command */
1633 return -ETIME;
1636 if (!ctx_change)
1637 return xhci_configure_endpoint_result(xhci, udev, cmd_status);
1638 return xhci_evaluate_context_result(xhci, udev, cmd_status);
1641 /* Called after one or more calls to xhci_add_endpoint() or
1642 * xhci_drop_endpoint(). If this call fails, the USB core is expected
1643 * to call xhci_reset_bandwidth().
1645 * Since we are in the middle of changing either configuration or
1646 * installing a new alt setting, the USB core won't allow URBs to be
1647 * enqueued for any endpoint on the old config or interface. Nothing
1648 * else should be touching the xhci->devs[slot_id] structure, so we
1649 * don't need to take the xhci->lock for manipulating that.
1651 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1653 int i;
1654 int ret = 0;
1655 struct xhci_hcd *xhci;
1656 struct xhci_virt_device *virt_dev;
1657 struct xhci_input_control_ctx *ctrl_ctx;
1658 struct xhci_slot_ctx *slot_ctx;
1660 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1661 if (ret <= 0)
1662 return ret;
1663 xhci = hcd_to_xhci(hcd);
1665 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1666 virt_dev = xhci->devs[udev->slot_id];
1668 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
1669 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1670 ctrl_ctx->add_flags |= SLOT_FLAG;
1671 ctrl_ctx->add_flags &= ~EP0_FLAG;
1672 ctrl_ctx->drop_flags &= ~SLOT_FLAG;
1673 ctrl_ctx->drop_flags &= ~EP0_FLAG;
1674 xhci_dbg(xhci, "New Input Control Context:\n");
1675 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1676 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
1677 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1679 ret = xhci_configure_endpoint(xhci, udev, NULL,
1680 false, false);
1681 if (ret) {
1682 /* Callee should call reset_bandwidth() */
1683 return ret;
1686 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
1687 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
1688 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
1690 xhci_zero_in_ctx(xhci, virt_dev);
1691 /* Install new rings and free or cache any old rings */
1692 for (i = 1; i < 31; ++i) {
1693 if (!virt_dev->eps[i].new_ring)
1694 continue;
1695 /* Only cache or free the old ring if it exists.
1696 * It may not if this is the first add of an endpoint.
1698 if (virt_dev->eps[i].ring) {
1699 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
1701 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
1702 virt_dev->eps[i].new_ring = NULL;
1705 return ret;
1708 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1710 struct xhci_hcd *xhci;
1711 struct xhci_virt_device *virt_dev;
1712 int i, ret;
1714 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
1715 if (ret <= 0)
1716 return;
1717 xhci = hcd_to_xhci(hcd);
1719 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1720 virt_dev = xhci->devs[udev->slot_id];
1721 /* Free any rings allocated for added endpoints */
1722 for (i = 0; i < 31; ++i) {
1723 if (virt_dev->eps[i].new_ring) {
1724 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
1725 virt_dev->eps[i].new_ring = NULL;
1728 xhci_zero_in_ctx(xhci, virt_dev);
1731 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
1732 struct xhci_container_ctx *in_ctx,
1733 struct xhci_container_ctx *out_ctx,
1734 u32 add_flags, u32 drop_flags)
1736 struct xhci_input_control_ctx *ctrl_ctx;
1737 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1738 ctrl_ctx->add_flags = add_flags;
1739 ctrl_ctx->drop_flags = drop_flags;
1740 xhci_slot_copy(xhci, in_ctx, out_ctx);
1741 ctrl_ctx->add_flags |= SLOT_FLAG;
1743 xhci_dbg(xhci, "Input Context:\n");
1744 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
1747 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
1748 unsigned int slot_id, unsigned int ep_index,
1749 struct xhci_dequeue_state *deq_state)
1751 struct xhci_container_ctx *in_ctx;
1752 struct xhci_ep_ctx *ep_ctx;
1753 u32 added_ctxs;
1754 dma_addr_t addr;
1756 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1757 xhci->devs[slot_id]->out_ctx, ep_index);
1758 in_ctx = xhci->devs[slot_id]->in_ctx;
1759 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1760 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
1761 deq_state->new_deq_ptr);
1762 if (addr == 0) {
1763 xhci_warn(xhci, "WARN Cannot submit config ep after "
1764 "reset ep command\n");
1765 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
1766 deq_state->new_deq_seg,
1767 deq_state->new_deq_ptr);
1768 return;
1770 ep_ctx->deq = addr | deq_state->new_cycle_state;
1772 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
1773 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
1774 xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
1777 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
1778 struct usb_device *udev, unsigned int ep_index)
1780 struct xhci_dequeue_state deq_state;
1781 struct xhci_virt_ep *ep;
1783 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1784 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1785 /* We need to move the HW's dequeue pointer past this TD,
1786 * or it will attempt to resend it on the next doorbell ring.
1788 xhci_find_new_dequeue_state(xhci, udev->slot_id,
1789 ep_index, ep->stopped_stream, ep->stopped_td,
1790 &deq_state);
1792 /* HW with the reset endpoint quirk will use the saved dequeue state to
1793 * issue a configure endpoint command later.
1795 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
1796 xhci_dbg(xhci, "Queueing new dequeue state\n");
1797 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
1798 ep_index, ep->stopped_stream, &deq_state);
1799 } else {
1800 /* Better hope no one uses the input context between now and the
1801 * reset endpoint completion!
1802 * XXX: No idea how this hardware will react when stream rings
1803 * are enabled.
1805 xhci_dbg(xhci, "Setting up input context for "
1806 "configure endpoint command\n");
1807 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
1808 ep_index, &deq_state);
1812 /* Deal with stalled endpoints. The core should have sent the control message
1813 * to clear the halt condition. However, we need to make the xHCI hardware
1814 * reset its sequence number, since a device will expect a sequence number of
1815 * zero after the halt condition is cleared.
1816 * Context: in_interrupt
1818 void xhci_endpoint_reset(struct usb_hcd *hcd,
1819 struct usb_host_endpoint *ep)
1821 struct xhci_hcd *xhci;
1822 struct usb_device *udev;
1823 unsigned int ep_index;
1824 unsigned long flags;
1825 int ret;
1826 struct xhci_virt_ep *virt_ep;
1828 xhci = hcd_to_xhci(hcd);
1829 udev = (struct usb_device *) ep->hcpriv;
1830 /* Called with a root hub endpoint (or an endpoint that wasn't added
1831 * with xhci_add_endpoint()
1833 if (!ep->hcpriv)
1834 return;
1835 ep_index = xhci_get_endpoint_index(&ep->desc);
1836 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
1837 if (!virt_ep->stopped_td) {
1838 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
1839 ep->desc.bEndpointAddress);
1840 return;
1842 if (usb_endpoint_xfer_control(&ep->desc)) {
1843 xhci_dbg(xhci, "Control endpoint stall already handled.\n");
1844 return;
1847 xhci_dbg(xhci, "Queueing reset endpoint command\n");
1848 spin_lock_irqsave(&xhci->lock, flags);
1849 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
1851 * Can't change the ring dequeue pointer until it's transitioned to the
1852 * stopped state, which is only upon a successful reset endpoint
1853 * command. Better hope that last command worked!
1855 if (!ret) {
1856 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
1857 kfree(virt_ep->stopped_td);
1858 xhci_ring_cmd_db(xhci);
1860 virt_ep->stopped_td = NULL;
1861 virt_ep->stopped_trb = NULL;
1862 virt_ep->stopped_stream = 0;
1863 spin_unlock_irqrestore(&xhci->lock, flags);
1865 if (ret)
1866 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
1869 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
1870 struct usb_device *udev, struct usb_host_endpoint *ep,
1871 unsigned int slot_id)
1873 int ret;
1874 unsigned int ep_index;
1875 unsigned int ep_state;
1877 if (!ep)
1878 return -EINVAL;
1879 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
1880 if (ret <= 0)
1881 return -EINVAL;
1882 if (ep->ss_ep_comp.bmAttributes == 0) {
1883 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
1884 " descriptor for ep 0x%x does not support streams\n",
1885 ep->desc.bEndpointAddress);
1886 return -EINVAL;
1889 ep_index = xhci_get_endpoint_index(&ep->desc);
1890 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1891 if (ep_state & EP_HAS_STREAMS ||
1892 ep_state & EP_GETTING_STREAMS) {
1893 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
1894 "already has streams set up.\n",
1895 ep->desc.bEndpointAddress);
1896 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
1897 "dynamic stream context array reallocation.\n");
1898 return -EINVAL;
1900 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
1901 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
1902 "endpoint 0x%x; URBs are pending.\n",
1903 ep->desc.bEndpointAddress);
1904 return -EINVAL;
1906 return 0;
1909 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
1910 unsigned int *num_streams, unsigned int *num_stream_ctxs)
1912 unsigned int max_streams;
1914 /* The stream context array size must be a power of two */
1915 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
1917 * Find out how many primary stream array entries the host controller
1918 * supports. Later we may use secondary stream arrays (similar to 2nd
1919 * level page entries), but that's an optional feature for xHCI host
1920 * controllers. xHCs must support at least 4 stream IDs.
1922 max_streams = HCC_MAX_PSA(xhci->hcc_params);
1923 if (*num_stream_ctxs > max_streams) {
1924 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
1925 max_streams);
1926 *num_stream_ctxs = max_streams;
1927 *num_streams = max_streams;
1931 /* Returns an error code if one of the endpoint already has streams.
1932 * This does not change any data structures, it only checks and gathers
1933 * information.
1935 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
1936 struct usb_device *udev,
1937 struct usb_host_endpoint **eps, unsigned int num_eps,
1938 unsigned int *num_streams, u32 *changed_ep_bitmask)
1940 unsigned int max_streams;
1941 unsigned int endpoint_flag;
1942 int i;
1943 int ret;
1945 for (i = 0; i < num_eps; i++) {
1946 ret = xhci_check_streams_endpoint(xhci, udev,
1947 eps[i], udev->slot_id);
1948 if (ret < 0)
1949 return ret;
1951 max_streams = USB_SS_MAX_STREAMS(
1952 eps[i]->ss_ep_comp.bmAttributes);
1953 if (max_streams < (*num_streams - 1)) {
1954 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
1955 eps[i]->desc.bEndpointAddress,
1956 max_streams);
1957 *num_streams = max_streams+1;
1960 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
1961 if (*changed_ep_bitmask & endpoint_flag)
1962 return -EINVAL;
1963 *changed_ep_bitmask |= endpoint_flag;
1965 return 0;
1968 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
1969 struct usb_device *udev,
1970 struct usb_host_endpoint **eps, unsigned int num_eps)
1972 u32 changed_ep_bitmask = 0;
1973 unsigned int slot_id;
1974 unsigned int ep_index;
1975 unsigned int ep_state;
1976 int i;
1978 slot_id = udev->slot_id;
1979 if (!xhci->devs[slot_id])
1980 return 0;
1982 for (i = 0; i < num_eps; i++) {
1983 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
1984 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
1985 /* Are streams already being freed for the endpoint? */
1986 if (ep_state & EP_GETTING_NO_STREAMS) {
1987 xhci_warn(xhci, "WARN Can't disable streams for "
1988 "endpoint 0x%x\n, "
1989 "streams are being disabled already.",
1990 eps[i]->desc.bEndpointAddress);
1991 return 0;
1993 /* Are there actually any streams to free? */
1994 if (!(ep_state & EP_HAS_STREAMS) &&
1995 !(ep_state & EP_GETTING_STREAMS)) {
1996 xhci_warn(xhci, "WARN Can't disable streams for "
1997 "endpoint 0x%x\n, "
1998 "streams are already disabled!",
1999 eps[i]->desc.bEndpointAddress);
2000 xhci_warn(xhci, "WARN xhci_free_streams() called "
2001 "with non-streams endpoint\n");
2002 return 0;
2004 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
2006 return changed_ep_bitmask;
2010 * The USB device drivers use this function (though the HCD interface in USB
2011 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
2012 * coordinate mass storage command queueing across multiple endpoints (basically
2013 * a stream ID == a task ID).
2015 * Setting up streams involves allocating the same size stream context array
2016 * for each endpoint and issuing a configure endpoint command for all endpoints.
2018 * Don't allow the call to succeed if one endpoint only supports one stream
2019 * (which means it doesn't support streams at all).
2021 * Drivers may get less stream IDs than they asked for, if the host controller
2022 * hardware or endpoints claim they can't support the number of requested
2023 * stream IDs.
2025 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
2026 struct usb_host_endpoint **eps, unsigned int num_eps,
2027 unsigned int num_streams, gfp_t mem_flags)
2029 int i, ret;
2030 struct xhci_hcd *xhci;
2031 struct xhci_virt_device *vdev;
2032 struct xhci_command *config_cmd;
2033 unsigned int ep_index;
2034 unsigned int num_stream_ctxs;
2035 unsigned long flags;
2036 u32 changed_ep_bitmask = 0;
2038 if (!eps)
2039 return -EINVAL;
2041 /* Add one to the number of streams requested to account for
2042 * stream 0 that is reserved for xHCI usage.
2044 num_streams += 1;
2045 xhci = hcd_to_xhci(hcd);
2046 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
2047 num_streams);
2049 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2050 if (!config_cmd) {
2051 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2052 return -ENOMEM;
2055 /* Check to make sure all endpoints are not already configured for
2056 * streams. While we're at it, find the maximum number of streams that
2057 * all the endpoints will support and check for duplicate endpoints.
2059 spin_lock_irqsave(&xhci->lock, flags);
2060 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
2061 num_eps, &num_streams, &changed_ep_bitmask);
2062 if (ret < 0) {
2063 xhci_free_command(xhci, config_cmd);
2064 spin_unlock_irqrestore(&xhci->lock, flags);
2065 return ret;
2067 if (num_streams <= 1) {
2068 xhci_warn(xhci, "WARN: endpoints can't handle "
2069 "more than one stream.\n");
2070 xhci_free_command(xhci, config_cmd);
2071 spin_unlock_irqrestore(&xhci->lock, flags);
2072 return -EINVAL;
2074 vdev = xhci->devs[udev->slot_id];
2075 /* Mark each endpoint as being in transition, so
2076 * xhci_urb_enqueue() will reject all URBs.
2078 for (i = 0; i < num_eps; i++) {
2079 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2080 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
2082 spin_unlock_irqrestore(&xhci->lock, flags);
2084 /* Setup internal data structures and allocate HW data structures for
2085 * streams (but don't install the HW structures in the input context
2086 * until we're sure all memory allocation succeeded).
2088 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
2089 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
2090 num_stream_ctxs, num_streams);
2092 for (i = 0; i < num_eps; i++) {
2093 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2094 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
2095 num_stream_ctxs,
2096 num_streams, mem_flags);
2097 if (!vdev->eps[ep_index].stream_info)
2098 goto cleanup;
2099 /* Set maxPstreams in endpoint context and update deq ptr to
2100 * point to stream context array. FIXME
2104 /* Set up the input context for a configure endpoint command. */
2105 for (i = 0; i < num_eps; i++) {
2106 struct xhci_ep_ctx *ep_ctx;
2108 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2109 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
2111 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
2112 vdev->out_ctx, ep_index);
2113 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
2114 vdev->eps[ep_index].stream_info);
2116 /* Tell the HW to drop its old copy of the endpoint context info
2117 * and add the updated copy from the input context.
2119 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
2120 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2122 /* Issue and wait for the configure endpoint command */
2123 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
2124 false, false);
2126 /* xHC rejected the configure endpoint command for some reason, so we
2127 * leave the old ring intact and free our internal streams data
2128 * structure.
2130 if (ret < 0)
2131 goto cleanup;
2133 spin_lock_irqsave(&xhci->lock, flags);
2134 for (i = 0; i < num_eps; i++) {
2135 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2136 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2137 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
2138 udev->slot_id, ep_index);
2139 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
2141 xhci_free_command(xhci, config_cmd);
2142 spin_unlock_irqrestore(&xhci->lock, flags);
2144 /* Subtract 1 for stream 0, which drivers can't use */
2145 return num_streams - 1;
2147 cleanup:
2148 /* If it didn't work, free the streams! */
2149 for (i = 0; i < num_eps; i++) {
2150 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2151 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2152 vdev->eps[ep_index].stream_info = NULL;
2153 /* FIXME Unset maxPstreams in endpoint context and
2154 * update deq ptr to point to normal string ring.
2156 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
2157 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2158 xhci_endpoint_zero(xhci, vdev, eps[i]);
2160 xhci_free_command(xhci, config_cmd);
2161 return -ENOMEM;
2164 /* Transition the endpoint from using streams to being a "normal" endpoint
2165 * without streams.
2167 * Modify the endpoint context state, submit a configure endpoint command,
2168 * and free all endpoint rings for streams if that completes successfully.
2170 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
2171 struct usb_host_endpoint **eps, unsigned int num_eps,
2172 gfp_t mem_flags)
2174 int i, ret;
2175 struct xhci_hcd *xhci;
2176 struct xhci_virt_device *vdev;
2177 struct xhci_command *command;
2178 unsigned int ep_index;
2179 unsigned long flags;
2180 u32 changed_ep_bitmask;
2182 xhci = hcd_to_xhci(hcd);
2183 vdev = xhci->devs[udev->slot_id];
2185 /* Set up a configure endpoint command to remove the streams rings */
2186 spin_lock_irqsave(&xhci->lock, flags);
2187 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
2188 udev, eps, num_eps);
2189 if (changed_ep_bitmask == 0) {
2190 spin_unlock_irqrestore(&xhci->lock, flags);
2191 return -EINVAL;
2194 /* Use the xhci_command structure from the first endpoint. We may have
2195 * allocated too many, but the driver may call xhci_free_streams() for
2196 * each endpoint it grouped into one call to xhci_alloc_streams().
2198 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
2199 command = vdev->eps[ep_index].stream_info->free_streams_command;
2200 for (i = 0; i < num_eps; i++) {
2201 struct xhci_ep_ctx *ep_ctx;
2203 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2204 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
2205 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
2206 EP_GETTING_NO_STREAMS;
2208 xhci_endpoint_copy(xhci, command->in_ctx,
2209 vdev->out_ctx, ep_index);
2210 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
2211 &vdev->eps[ep_index]);
2213 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
2214 vdev->out_ctx, changed_ep_bitmask, changed_ep_bitmask);
2215 spin_unlock_irqrestore(&xhci->lock, flags);
2217 /* Issue and wait for the configure endpoint command,
2218 * which must succeed.
2220 ret = xhci_configure_endpoint(xhci, udev, command,
2221 false, true);
2223 /* xHC rejected the configure endpoint command for some reason, so we
2224 * leave the streams rings intact.
2226 if (ret < 0)
2227 return ret;
2229 spin_lock_irqsave(&xhci->lock, flags);
2230 for (i = 0; i < num_eps; i++) {
2231 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
2232 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
2233 vdev->eps[ep_index].stream_info = NULL;
2234 /* FIXME Unset maxPstreams in endpoint context and
2235 * update deq ptr to point to normal string ring.
2237 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
2238 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
2240 spin_unlock_irqrestore(&xhci->lock, flags);
2242 return 0;
2246 * This submits a Reset Device Command, which will set the device state to 0,
2247 * set the device address to 0, and disable all the endpoints except the default
2248 * control endpoint. The USB core should come back and call
2249 * xhci_address_device(), and then re-set up the configuration. If this is
2250 * called because of a usb_reset_and_verify_device(), then the old alternate
2251 * settings will be re-installed through the normal bandwidth allocation
2252 * functions.
2254 * Wait for the Reset Device command to finish. Remove all structures
2255 * associated with the endpoints that were disabled. Clear the input device
2256 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
2258 * If the virt_dev to be reset does not exist or does not match the udev,
2259 * it means the device is lost, possibly due to the xHC restore error and
2260 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
2261 * re-allocate the device.
2263 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
2265 int ret, i;
2266 unsigned long flags;
2267 struct xhci_hcd *xhci;
2268 unsigned int slot_id;
2269 struct xhci_virt_device *virt_dev;
2270 struct xhci_command *reset_device_cmd;
2271 int timeleft;
2272 int last_freed_endpoint;
2274 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
2275 if (ret <= 0)
2276 return ret;
2277 xhci = hcd_to_xhci(hcd);
2278 slot_id = udev->slot_id;
2279 virt_dev = xhci->devs[slot_id];
2280 if (!virt_dev) {
2281 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2282 "not exist. Re-allocate the device\n", slot_id);
2283 ret = xhci_alloc_dev(hcd, udev);
2284 if (ret == 1)
2285 return 0;
2286 else
2287 return -EINVAL;
2290 if (virt_dev->udev != udev) {
2291 /* If the virt_dev and the udev does not match, this virt_dev
2292 * may belong to another udev.
2293 * Re-allocate the device.
2295 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
2296 "not match the udev. Re-allocate the device\n",
2297 slot_id);
2298 ret = xhci_alloc_dev(hcd, udev);
2299 if (ret == 1)
2300 return 0;
2301 else
2302 return -EINVAL;
2305 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
2306 /* Allocate the command structure that holds the struct completion.
2307 * Assume we're in process context, since the normal device reset
2308 * process has to wait for the device anyway. Storage devices are
2309 * reset as part of error handling, so use GFP_NOIO instead of
2310 * GFP_KERNEL.
2312 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
2313 if (!reset_device_cmd) {
2314 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
2315 return -ENOMEM;
2318 /* Attempt to submit the Reset Device command to the command ring */
2319 spin_lock_irqsave(&xhci->lock, flags);
2320 reset_device_cmd->command_trb = xhci->cmd_ring->enqueue;
2322 /* Enqueue pointer can be left pointing to the link TRB,
2323 * we must handle that
2325 if ((reset_device_cmd->command_trb->link.control & TRB_TYPE_BITMASK)
2326 == TRB_TYPE(TRB_LINK))
2327 reset_device_cmd->command_trb =
2328 xhci->cmd_ring->enq_seg->next->trbs;
2330 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
2331 ret = xhci_queue_reset_device(xhci, slot_id);
2332 if (ret) {
2333 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2334 list_del(&reset_device_cmd->cmd_list);
2335 spin_unlock_irqrestore(&xhci->lock, flags);
2336 goto command_cleanup;
2338 xhci_ring_cmd_db(xhci);
2339 spin_unlock_irqrestore(&xhci->lock, flags);
2341 /* Wait for the Reset Device command to finish */
2342 timeleft = wait_for_completion_interruptible_timeout(
2343 reset_device_cmd->completion,
2344 USB_CTRL_SET_TIMEOUT);
2345 if (timeleft <= 0) {
2346 xhci_warn(xhci, "%s while waiting for reset device command\n",
2347 timeleft == 0 ? "Timeout" : "Signal");
2348 spin_lock_irqsave(&xhci->lock, flags);
2349 /* The timeout might have raced with the event ring handler, so
2350 * only delete from the list if the item isn't poisoned.
2352 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
2353 list_del(&reset_device_cmd->cmd_list);
2354 spin_unlock_irqrestore(&xhci->lock, flags);
2355 ret = -ETIME;
2356 goto command_cleanup;
2359 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
2360 * unless we tried to reset a slot ID that wasn't enabled,
2361 * or the device wasn't in the addressed or configured state.
2363 ret = reset_device_cmd->status;
2364 switch (ret) {
2365 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
2366 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
2367 xhci_info(xhci, "Can't reset device (slot ID %u) in %s state\n",
2368 slot_id,
2369 xhci_get_slot_state(xhci, virt_dev->out_ctx));
2370 xhci_info(xhci, "Not freeing device rings.\n");
2371 /* Don't treat this as an error. May change my mind later. */
2372 ret = 0;
2373 goto command_cleanup;
2374 case COMP_SUCCESS:
2375 xhci_dbg(xhci, "Successful reset device command.\n");
2376 break;
2377 default:
2378 if (xhci_is_vendor_info_code(xhci, ret))
2379 break;
2380 xhci_warn(xhci, "Unknown completion code %u for "
2381 "reset device command.\n", ret);
2382 ret = -EINVAL;
2383 goto command_cleanup;
2386 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
2387 last_freed_endpoint = 1;
2388 for (i = 1; i < 31; ++i) {
2389 if (!virt_dev->eps[i].ring)
2390 continue;
2391 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2392 last_freed_endpoint = i;
2394 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
2395 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
2396 ret = 0;
2398 command_cleanup:
2399 xhci_free_command(xhci, reset_device_cmd);
2400 return ret;
2404 * At this point, the struct usb_device is about to go away, the device has
2405 * disconnected, and all traffic has been stopped and the endpoints have been
2406 * disabled. Free any HC data structures associated with that device.
2408 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
2410 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2411 struct xhci_virt_device *virt_dev;
2412 unsigned long flags;
2413 u32 state;
2414 int i, ret;
2416 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2417 if (ret <= 0)
2418 return;
2420 virt_dev = xhci->devs[udev->slot_id];
2422 /* Stop any wayward timer functions (which may grab the lock) */
2423 for (i = 0; i < 31; ++i) {
2424 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
2425 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
2428 spin_lock_irqsave(&xhci->lock, flags);
2429 /* Don't disable the slot if the host controller is dead. */
2430 state = xhci_readl(xhci, &xhci->op_regs->status);
2431 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING)) {
2432 xhci_free_virt_device(xhci, udev->slot_id);
2433 spin_unlock_irqrestore(&xhci->lock, flags);
2434 return;
2437 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
2438 spin_unlock_irqrestore(&xhci->lock, flags);
2439 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2440 return;
2442 xhci_ring_cmd_db(xhci);
2443 spin_unlock_irqrestore(&xhci->lock, flags);
2445 * Event command completion handler will free any data structures
2446 * associated with the slot. XXX Can free sleep?
2451 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
2452 * timed out, or allocating memory failed. Returns 1 on success.
2454 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
2456 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2457 unsigned long flags;
2458 int timeleft;
2459 int ret;
2461 spin_lock_irqsave(&xhci->lock, flags);
2462 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
2463 if (ret) {
2464 spin_unlock_irqrestore(&xhci->lock, flags);
2465 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2466 return 0;
2468 xhci_ring_cmd_db(xhci);
2469 spin_unlock_irqrestore(&xhci->lock, flags);
2471 /* XXX: how much time for xHC slot assignment? */
2472 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2473 USB_CTRL_SET_TIMEOUT);
2474 if (timeleft <= 0) {
2475 xhci_warn(xhci, "%s while waiting for a slot\n",
2476 timeleft == 0 ? "Timeout" : "Signal");
2477 /* FIXME cancel the enable slot request */
2478 return 0;
2481 if (!xhci->slot_id) {
2482 xhci_err(xhci, "Error while assigning device slot ID\n");
2483 return 0;
2485 /* xhci_alloc_virt_device() does not touch rings; no need to lock.
2486 * Use GFP_NOIO, since this function can be called from
2487 * xhci_discover_or_reset_device(), which may be called as part of
2488 * mass storage driver error handling.
2490 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
2491 /* Disable slot, if we can do it without mem alloc */
2492 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
2493 spin_lock_irqsave(&xhci->lock, flags);
2494 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
2495 xhci_ring_cmd_db(xhci);
2496 spin_unlock_irqrestore(&xhci->lock, flags);
2497 return 0;
2499 udev->slot_id = xhci->slot_id;
2500 /* Is this a LS or FS device under a HS hub? */
2501 /* Hub or peripherial? */
2502 return 1;
2506 * Issue an Address Device command (which will issue a SetAddress request to
2507 * the device).
2508 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
2509 * we should only issue and wait on one address command at the same time.
2511 * We add one to the device address issued by the hardware because the USB core
2512 * uses address 1 for the root hubs (even though they're not really devices).
2514 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
2516 unsigned long flags;
2517 int timeleft;
2518 struct xhci_virt_device *virt_dev;
2519 int ret = 0;
2520 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2521 struct xhci_slot_ctx *slot_ctx;
2522 struct xhci_input_control_ctx *ctrl_ctx;
2523 u64 temp_64;
2525 if (!udev->slot_id) {
2526 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
2527 return -EINVAL;
2530 virt_dev = xhci->devs[udev->slot_id];
2532 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2534 * If this is the first Set Address since device plug-in or
2535 * virt_device realloaction after a resume with an xHCI power loss,
2536 * then set up the slot context.
2538 if (!slot_ctx->dev_info)
2539 xhci_setup_addressable_virt_dev(xhci, udev);
2540 /* Otherwise, update the control endpoint ring enqueue pointer. */
2541 else
2542 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
2543 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2544 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2546 spin_lock_irqsave(&xhci->lock, flags);
2547 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
2548 udev->slot_id);
2549 if (ret) {
2550 spin_unlock_irqrestore(&xhci->lock, flags);
2551 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
2552 return ret;
2554 xhci_ring_cmd_db(xhci);
2555 spin_unlock_irqrestore(&xhci->lock, flags);
2557 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
2558 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
2559 USB_CTRL_SET_TIMEOUT);
2560 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
2561 * the SetAddress() "recovery interval" required by USB and aborting the
2562 * command on a timeout.
2564 if (timeleft <= 0) {
2565 xhci_warn(xhci, "%s while waiting for a slot\n",
2566 timeleft == 0 ? "Timeout" : "Signal");
2567 /* FIXME cancel the address device command */
2568 return -ETIME;
2571 switch (virt_dev->cmd_status) {
2572 case COMP_CTX_STATE:
2573 case COMP_EBADSLT:
2574 xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
2575 udev->slot_id);
2576 ret = -EINVAL;
2577 break;
2578 case COMP_TX_ERR:
2579 dev_warn(&udev->dev, "Device not responding to set address.\n");
2580 ret = -EPROTO;
2581 break;
2582 case COMP_SUCCESS:
2583 xhci_dbg(xhci, "Successful Address Device command\n");
2584 break;
2585 default:
2586 xhci_err(xhci, "ERROR: unexpected command completion "
2587 "code 0x%x.\n", virt_dev->cmd_status);
2588 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2589 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2590 ret = -EINVAL;
2591 break;
2593 if (ret) {
2594 return ret;
2596 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
2597 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
2598 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
2599 udev->slot_id,
2600 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
2601 (unsigned long long)
2602 xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
2603 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
2604 (unsigned long long)virt_dev->out_ctx->dma);
2605 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
2606 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
2607 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
2608 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
2610 * USB core uses address 1 for the roothubs, so we add one to the
2611 * address given back to us by the HC.
2613 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
2614 /* Use kernel assigned address for devices; store xHC assigned
2615 * address locally. */
2616 virt_dev->address = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
2617 /* Zero the input context control for later use */
2618 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2619 ctrl_ctx->add_flags = 0;
2620 ctrl_ctx->drop_flags = 0;
2622 xhci_dbg(xhci, "Internal device address = %d\n", virt_dev->address);
2624 return 0;
2627 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
2628 * internal data structures for the device.
2630 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
2631 struct usb_tt *tt, gfp_t mem_flags)
2633 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2634 struct xhci_virt_device *vdev;
2635 struct xhci_command *config_cmd;
2636 struct xhci_input_control_ctx *ctrl_ctx;
2637 struct xhci_slot_ctx *slot_ctx;
2638 unsigned long flags;
2639 unsigned think_time;
2640 int ret;
2642 /* Ignore root hubs */
2643 if (!hdev->parent)
2644 return 0;
2646 vdev = xhci->devs[hdev->slot_id];
2647 if (!vdev) {
2648 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
2649 return -EINVAL;
2651 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
2652 if (!config_cmd) {
2653 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
2654 return -ENOMEM;
2657 spin_lock_irqsave(&xhci->lock, flags);
2658 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
2659 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
2660 ctrl_ctx->add_flags |= SLOT_FLAG;
2661 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
2662 slot_ctx->dev_info |= DEV_HUB;
2663 if (tt->multi)
2664 slot_ctx->dev_info |= DEV_MTT;
2665 if (xhci->hci_version > 0x95) {
2666 xhci_dbg(xhci, "xHCI version %x needs hub "
2667 "TT think time and number of ports\n",
2668 (unsigned int) xhci->hci_version);
2669 slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
2670 /* Set TT think time - convert from ns to FS bit times.
2671 * 0 = 8 FS bit times, 1 = 16 FS bit times,
2672 * 2 = 24 FS bit times, 3 = 32 FS bit times.
2674 think_time = tt->think_time;
2675 if (think_time != 0)
2676 think_time = (think_time / 666) - 1;
2677 slot_ctx->tt_info |= TT_THINK_TIME(think_time);
2678 } else {
2679 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
2680 "TT think time or number of ports\n",
2681 (unsigned int) xhci->hci_version);
2683 slot_ctx->dev_state = 0;
2684 spin_unlock_irqrestore(&xhci->lock, flags);
2686 xhci_dbg(xhci, "Set up %s for hub device.\n",
2687 (xhci->hci_version > 0x95) ?
2688 "configure endpoint" : "evaluate context");
2689 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
2690 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
2692 /* Issue and wait for the configure endpoint or
2693 * evaluate context command.
2695 if (xhci->hci_version > 0x95)
2696 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2697 false, false);
2698 else
2699 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
2700 true, false);
2702 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
2703 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
2705 xhci_free_command(xhci, config_cmd);
2706 return ret;
2709 int xhci_get_frame(struct usb_hcd *hcd)
2711 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
2712 /* EHCI mods by the periodic size. Why? */
2713 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
2716 MODULE_DESCRIPTION(DRIVER_DESC);
2717 MODULE_AUTHOR(DRIVER_AUTHOR);
2718 MODULE_LICENSE("GPL");
2720 static int __init xhci_hcd_init(void)
2722 #ifdef CONFIG_PCI
2723 int retval = 0;
2725 retval = xhci_register_pci();
2727 if (retval < 0) {
2728 printk(KERN_DEBUG "Problem registering PCI driver.");
2729 return retval;
2731 #endif
2733 * Check the compiler generated sizes of structures that must be laid
2734 * out in specific ways for hardware access.
2736 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2737 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
2738 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
2739 /* xhci_device_control has eight fields, and also
2740 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
2742 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
2743 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
2744 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
2745 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
2746 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
2747 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
2748 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
2749 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
2750 return 0;
2752 module_init(xhci_hcd_init);
2754 static void __exit xhci_hcd_cleanup(void)
2756 #ifdef CONFIG_PCI
2757 xhci_unregister_pci();
2758 #endif
2760 module_exit(xhci_hcd_cleanup);