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Merge 3.1-rc1 into usb-linus
[zen-stable.git] / drivers / staging / rtl8712 / rtl8712_xmit.c
blob88a15049bc2a78e5215859a9cbe86898e105afe1
1 /******************************************************************************
2 * rtl8712_xmit.c
3 *
4 * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
5 * Linux device driver for RTL8192SU
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * Modifications for inclusion into the Linux staging tree are
21 * Copyright(c) 2010 Larry Finger. All rights reserved.
22 *
23 * Contact information:
24 * WLAN FAE <wlanfae@realtek.com>
25 * Larry Finger <Larry.Finger@lwfinger.net>
26 *
27 ******************************************************************************/
28
29 #define _RTL8712_XMIT_C_
30
31 #include "osdep_service.h"
32 #include "drv_types.h"
33 #include "rtl871x_byteorder.h"
34 #include "wifi.h"
35 #include "osdep_intf.h"
36 #include "usb_ops.h"
37
38 static void dump_xframe(struct _adapter *padapter,
39 struct xmit_frame *pxmitframe);
40
41 sint _r8712_init_hw_txqueue(struct hw_txqueue *phw_txqueue, u8 ac_tag)
42 {
43 phw_txqueue->ac_tag = ac_tag;
44 switch (ac_tag) {
45 case BE_QUEUE_INX:
46 phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ;
47 break;
48 case BK_QUEUE_INX:
49 phw_txqueue->ff_hwaddr = RTL8712_DMA_BKQ;
50 break;
51 case VI_QUEUE_INX:
52 phw_txqueue->ff_hwaddr = RTL8712_DMA_VIQ;
53 break;
54 case VO_QUEUE_INX:
55 phw_txqueue->ff_hwaddr = RTL8712_DMA_VOQ;
56 break;
57 case BMC_QUEUE_INX:
58 phw_txqueue->ff_hwaddr = RTL8712_DMA_BEQ;
59 break;
60 }
61 return _SUCCESS;
62 }
63
64 int r8712_txframes_sta_ac_pending(struct _adapter *padapter,
65 struct pkt_attrib *pattrib)
66 {
67 struct sta_info *psta;
68 struct tx_servq *ptxservq;
69 int priority = pattrib->priority;
70
71 psta = pattrib->psta;
72 switch (priority) {
73 case 1:
74 case 2:
75 ptxservq = &(psta->sta_xmitpriv.bk_q);
76 break;
77 case 4:
78 case 5:
79 ptxservq = &(psta->sta_xmitpriv.vi_q);
80 break;
81 case 6:
82 case 7:
83 ptxservq = &(psta->sta_xmitpriv.vo_q);
84 break;
85 case 0:
86 case 3:
87 default:
88 ptxservq = &(psta->sta_xmitpriv.be_q);
89 break;
90 }
91 return ptxservq->qcnt;
92 }
93
94 static u32 get_ff_hwaddr(struct xmit_frame *pxmitframe)
95 {
96 u32 addr = 0;
97 struct pkt_attrib *pattrib = &pxmitframe->attrib;
98 struct _adapter *padapter = pxmitframe->padapter;
99 struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
100
101 if (pxmitframe->frame_tag == TXAGG_FRAMETAG)
102 addr = RTL8712_DMA_H2CCMD;
103 else if (pxmitframe->frame_tag == MGNT_FRAMETAG)
104 addr = RTL8712_DMA_MGTQ;
105 else if (pdvobj->nr_endpoint == 6) {
106 switch (pattrib->priority) {
107 case 0:
108 case 3:
109 addr = RTL8712_DMA_BEQ;
110 break;
111 case 1:
112 case 2:
113 addr = RTL8712_DMA_BKQ;
114 break;
115 case 4:
116 case 5:
117 addr = RTL8712_DMA_VIQ;
118 break;
119 case 6:
120 case 7:
121 addr = RTL8712_DMA_VOQ;
122 break;
123 case 0x10:
124 case 0x11:
125 case 0x12:
126 case 0x13:
127 addr = RTL8712_DMA_H2CCMD;
128 break;
129 default:
130 addr = RTL8712_DMA_BEQ;
131 break;
132 }
133 } else if (pdvobj->nr_endpoint == 4) {
134 switch (pattrib->qsel) {
135 case 0:
136 case 3:
137 case 1:
138 case 2:
139 addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/
140 break;
141 case 4:
142 case 5:
143 case 6:
144 case 7:
145 addr = RTL8712_DMA_VOQ;/*RTL8712_EP_HI;*/
146 break;
147 case 0x10:
148 case 0x11:
149 case 0x12:
150 case 0x13:
151 addr = RTL8712_DMA_H2CCMD;
152 break;
153 default:
154 addr = RTL8712_DMA_BEQ;/*RTL8712_EP_LO;*/
155 break;
156 }
157 }
158 return addr;
159 }
160
161 static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv,
162 struct hw_xmit *phwxmit,
163 struct tx_servq *ptxservq,
164 struct __queue *pframe_queue)
165 {
166 struct list_head *xmitframe_plist, *xmitframe_phead;
167 struct xmit_frame *pxmitframe = NULL;
168
169 xmitframe_phead = get_list_head(pframe_queue);
170 xmitframe_plist = get_next(xmitframe_phead);
171 if ((end_of_queue_search(xmitframe_phead, xmitframe_plist)) == false) {
172 pxmitframe = LIST_CONTAINOR(xmitframe_plist,
173 struct xmit_frame, list);
174 list_delete(&pxmitframe->list);
175 ptxservq->qcnt--;
176 phwxmit->txcmdcnt++;
177 }
178 return pxmitframe;
179 }
180
181 static struct xmit_frame *dequeue_xframe_ex(struct xmit_priv *pxmitpriv,
182 struct hw_xmit *phwxmit_i, sint entry)
183 {
184 unsigned long irqL0;
185 struct list_head *sta_plist, *sta_phead;
186 struct hw_xmit *phwxmit;
187 struct tx_servq *ptxservq = NULL;
188 struct __queue *pframe_queue = NULL;
189 struct xmit_frame *pxmitframe = NULL;
190 int i, inx[4];
191 int j, tmp, acirp_cnt[4];
192
193 /*entry indx: 0->vo, 1->vi, 2->be, 3->bk.*/
194 inx[0] = 0; acirp_cnt[0] = pxmitpriv->voq_cnt;
195 inx[1] = 1; acirp_cnt[1] = pxmitpriv->viq_cnt;
196 inx[2] = 2; acirp_cnt[2] = pxmitpriv->beq_cnt;
197 inx[3] = 3; acirp_cnt[3] = pxmitpriv->bkq_cnt;
198 for (i = 0; i < 4; i++) {
199 for (j = i + 1; j < 4; j++) {
200 if (acirp_cnt[j] < acirp_cnt[i]) {
201 tmp = acirp_cnt[i];
202 acirp_cnt[i] = acirp_cnt[j];
203 acirp_cnt[j] = tmp;
204 tmp = inx[i];
205 inx[i] = inx[j];
206 inx[j] = tmp;
207 }
208 }
209 }
210 spin_lock_irqsave(&pxmitpriv->lock, irqL0);
211 for (i = 0; i < entry; i++) {
212 phwxmit = phwxmit_i + inx[i];
213 sta_phead = get_list_head(phwxmit->sta_queue);
214 sta_plist = get_next(sta_phead);
215 while ((end_of_queue_search(sta_phead, sta_plist)) == false) {
216 ptxservq = LIST_CONTAINOR(sta_plist, struct tx_servq,
217 tx_pending);
218 pframe_queue = &ptxservq->sta_pending;
219 pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit,
220 ptxservq, pframe_queue);
221 if (pxmitframe) {
222 phwxmit->accnt--;
223 goto exit_dequeue_xframe_ex;
224 }
225 sta_plist = get_next(sta_plist);
226 /*Remove sta node when there are no pending packets.*/
227 if (_queue_empty(pframe_queue)) {
228 /*must be done after get_next and before break*/
229 list_delete(&ptxservq->tx_pending);
230 }
231 }
232 }
233 exit_dequeue_xframe_ex:
234 spin_unlock_irqrestore(&pxmitpriv->lock, irqL0);
235 return pxmitframe;
236 }
237
238 void r8712_do_queue_select(struct _adapter *padapter,
239 struct pkt_attrib *pattrib)
240 {
241 u8 qsel = 0;
242 struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
243
244 if (pdvobj->nr_endpoint == 6)
245 qsel = pattrib->priority;
246 else if (pdvobj->nr_endpoint == 4)
247 qsel = pattrib->priority;
248 pattrib->qsel = qsel;
249 }
250
251 static void update_txdesc(struct xmit_frame *pxmitframe, uint *pmem, int sz)
252 {
253 uint qsel;
254 struct _adapter *padapter = pxmitframe->padapter;
255 struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
256 struct qos_priv *pqospriv = &pmlmepriv->qospriv;
257 struct security_priv *psecuritypriv = &padapter->securitypriv;
258 struct pkt_attrib *pattrib = &pxmitframe->attrib;
259 struct tx_desc *ptxdesc = (struct tx_desc *)pmem;
260 struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
261 u8 blnSetTxDescOffset;
262 sint bmcst = IS_MCAST(pattrib->ra);
263 struct ht_priv *phtpriv = &pmlmepriv->htpriv;
264 struct tx_desc txdesc_mp;
265
266 memcpy(&txdesc_mp, ptxdesc, sizeof(struct tx_desc));
267 memset(ptxdesc, 0, sizeof(struct tx_desc));
268 /* offset 0 */
269 ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff);
270 if (pdvobj->ishighspeed) {
271 if (((sz + TXDESC_SIZE) % 512) == 0)
272 blnSetTxDescOffset = 1;
273 else
274 blnSetTxDescOffset = 0;
275 } else {
276 if (((sz + TXDESC_SIZE) % 64) == 0)
277 blnSetTxDescOffset = 1;
278 else
279 blnSetTxDescOffset = 0;
280 }
281 if (blnSetTxDescOffset) {
282 /* 32 bytes for TX Desc + 8 bytes pending */
283 ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ + 8) <<
284 OFFSET_SHT) & 0x00ff0000);
285 } else {
286 /* default = 32 bytes for TX Desc */
287 ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ) <<
288 OFFSET_SHT) & 0x00ff0000);
289 }
290 ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG);
291 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
292 /* offset 4 */
293 ptxdesc->txdw1 |= cpu_to_le32((pattrib->mac_id)&0x1f);
294 qsel = (uint)(pattrib->qsel & 0x0000001f);
295 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
296 if (!pqospriv->qos_option)
297 ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/*Non-QoS*/
298 if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
299 switch (pattrib->encrypt) { /*SEC_TYPE*/
300 case _WEP40_:
301 case _WEP104_:
302 ptxdesc->txdw1 |= cpu_to_le32((0x01 << 22) &
303 0x00c00000);
304 /*KEY_ID when WEP is used;*/
305 ptxdesc->txdw1 |= cpu_to_le32((psecuritypriv->
306 PrivacyKeyIndex << 17) &
307 0x00060000);
308 break;
309 case _TKIP_:
310 case _TKIP_WTMIC_:
311 ptxdesc->txdw1 |= cpu_to_le32((0x02 << 22) &
312 0x00c00000);
313 break;
314 case _AES_:
315 ptxdesc->txdw1 |= cpu_to_le32((0x03 << 22) &
316 0x00c00000);
317 break;
318 case _NO_PRIVACY_:
319 default:
320 break;
321 }
322 }
323 /*offset 8*/
324 if (bmcst)
325 ptxdesc->txdw2 |= cpu_to_le32(BMC);
326
327 /*offset 12*/
328 /* f/w will increase the seqnum by itself, driver pass the
329 * correct priority to fw
330 * fw will check the correct priority for increasing the
331 * seqnum per tid. about usb using 4-endpoint, qsel points out
332 * the correct mapping between AC&Endpoint,
333 * the purpose is that correct mapping lets the MAC release
334 * the AC Queue list correctly. */
335 ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) &
336 0x0fff0000);
337 if ((pattrib->ether_type != 0x888e) &&
338 (pattrib->ether_type != 0x0806) &&
339 (pattrib->dhcp_pkt != 1)) {
340 /*Not EAP & ARP type data packet*/
341 if (phtpriv->ht_option == 1) { /*B/G/N Mode*/
342 if (phtpriv->ampdu_enable != true)
343 ptxdesc->txdw2 |= cpu_to_le32(BK);
344 }
345 } else {
346 /* EAP data packet and ARP packet.
347 * Use the 1M data rate to send the EAP/ARP packet.
348 * This will maybe make the handshake smooth.
349 */
350 /*driver uses data rate*/
351 ptxdesc->txdw4 = cpu_to_le32(0x80000000);
352 ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/*1M*/
353 }
354 if (pattrib->pctrl == 1) { /* mp tx packets */
355 struct tx_desc *ptxdesc_mp;
356 ptxdesc_mp = &txdesc_mp;
357 /* offset 8 */
358 ptxdesc->txdw2 = cpu_to_le32(ptxdesc_mp->txdw2);
359 if (bmcst)
360 ptxdesc->txdw2 |= cpu_to_le32(BMC);
361 ptxdesc->txdw2 |= cpu_to_le32(BK);
362 /* offset 16 */
363 ptxdesc->txdw4 = cpu_to_le32(ptxdesc_mp->txdw4);
364 /* offset 20 */
365 ptxdesc->txdw5 = cpu_to_le32(ptxdesc_mp->txdw5);
366 pattrib->pctrl = 0;/* reset to zero; */
367 }
368 } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
369 /* offset 4 */
370 ptxdesc->txdw1 |= (0x05) & 0x1f;/*CAM_ID(MAC_ID), default=5;*/
371 qsel = (uint)(pattrib->qsel & 0x0000001f);
372 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
373 ptxdesc->txdw1 |= cpu_to_le32(BIT(16));/* Non-QoS */
374 /* offset 8 */
375 if (bmcst)
376 ptxdesc->txdw2 |= cpu_to_le32(BMC);
377 /* offset 12 */
378 /* f/w will increase the seqnum by itself, driver pass the
379 * correct priority to fw
380 * fw will check the correct priority for increasing the seqnum
381 * per tid. about usb using 4-endpoint, qsel points out the
382 * correct mapping between AC&Endpoint,
383 * the purpose is that correct mapping let the MAC releases
384 * the AC Queue list correctly. */
385 ptxdesc->txdw3 = cpu_to_le32((pattrib->priority << SEQ_SHT) &
386 0x0fff0000);
387 /* offset 16 */
388 ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/
389 /* offset 20 */
390 ptxdesc->txdw5 = cpu_to_le32(0x001f8000);/* gtest 1M */
391 } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG) {
392 /* offset 4 */
393 qsel = 0x13;
394 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
395 } else {
396 /* offset 4 */
397 qsel = (uint)(pattrib->priority&0x0000001f);
398 ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00);
399 /*offset 8*/
400 /*offset 12*/
401 ptxdesc->txdw3 = cpu_to_le32((pattrib->seqnum << SEQ_SHT) &
402 0x0fff0000);
403 /*offset 16*/
404 ptxdesc->txdw4 = cpu_to_le32(0x80002040);/*gtest*/
405 /*offset 20*/
406 ptxdesc->txdw5 = cpu_to_le32(0x001f9600);/*gtest*/
407 }
408 }
409
410 int r8712_xmitframe_complete(struct _adapter *padapter,
411 struct xmit_priv *pxmitpriv,
412 struct xmit_buf *pxmitbuf)
413 {
414 struct hw_xmit *phwxmits;
415 sint hwentry;
416 struct xmit_frame *pxmitframe = NULL;
417 int res = _SUCCESS, xcnt = 0;
418
419 phwxmits = pxmitpriv->hwxmits;
420 hwentry = pxmitpriv->hwxmit_entry;
421 if (pxmitbuf == NULL) {
422 pxmitbuf = r8712_alloc_xmitbuf(pxmitpriv);
423 if (!pxmitbuf)
424 return false;
425 }
426 do {
427 pxmitframe = dequeue_xframe_ex(pxmitpriv, phwxmits, hwentry);
428 if (pxmitframe) {
429 pxmitframe->pxmitbuf = pxmitbuf;
430 pxmitframe->pxmit_urb[0] = pxmitbuf->pxmit_urb[0];
431 pxmitframe->buf_addr = pxmitbuf->pbuf;
432 if (pxmitframe->frame_tag == DATA_FRAMETAG) {
433 if (pxmitframe->attrib.priority <= 15)
434 res = r8712_xmitframe_coalesce(padapter,
435 pxmitframe->pkt, pxmitframe);
436 /* always return ndis_packet after
437 * r8712_xmitframe_coalesce */
438 r8712_xmit_complete(padapter, pxmitframe);
439 }
440 if (res == _SUCCESS)
441 dump_xframe(padapter, pxmitframe);
442 else
443 r8712_free_xmitframe_ex(pxmitpriv, pxmitframe);
444 xcnt++;
445 } else {
446 r8712_free_xmitbuf(pxmitpriv, pxmitbuf);
447 return false;
448 }
449 break;
450 } while (0);
451 return true;
452 }
453
454 static void dump_xframe(struct _adapter *padapter,
455 struct xmit_frame *pxmitframe)
456 {
457 int t, sz, w_sz;
458 u8 *mem_addr;
459 u32 ff_hwaddr;
460 struct pkt_attrib *pattrib = &pxmitframe->attrib;
461 struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
462 struct security_priv *psecuritypriv = &padapter->securitypriv;
463
464 if (pxmitframe->attrib.ether_type != 0x0806) {
465 if (pxmitframe->attrib.ether_type != 0x888e)
466 r8712_issue_addbareq_cmd(padapter, pattrib->priority);
467 }
468 mem_addr = pxmitframe->buf_addr;
469 for (t = 0; t < pattrib->nr_frags; t++) {
470 if (t != (pattrib->nr_frags - 1)) {
471 sz = pxmitpriv->frag_len;
472 sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 :
473 pattrib->icv_len);
474 pxmitframe->last[t] = 0;
475 } else {
476 sz = pattrib->last_txcmdsz;
477 pxmitframe->last[t] = 1;
478 }
479 update_txdesc(pxmitframe, (uint *)mem_addr, sz);
480 w_sz = sz + TXDESC_SIZE;
481 pxmitframe->mem_addr = mem_addr;
482 pxmitframe->bpending[t] = false;
483 ff_hwaddr = get_ff_hwaddr(pxmitframe);
484 r8712_write_port(padapter, ff_hwaddr, w_sz,
485 (unsigned char *)pxmitframe);
486 mem_addr += w_sz;
487 mem_addr = (u8 *)RND4(((addr_t)(mem_addr)));
488 }
489 }
490
491 int r8712_xmit_direct(struct _adapter *padapter, struct xmit_frame *pxmitframe)
492 {
493 int res = _SUCCESS;
494
495 res = r8712_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe);
496 pxmitframe->pkt = NULL;
497 if (res == _SUCCESS)
498 dump_xframe(padapter, pxmitframe);
499 return res;
500 }
501
502 int r8712_xmit_enqueue(struct _adapter *padapter, struct xmit_frame *pxmitframe)
503 {
504 if (r8712_xmit_classifier(padapter, pxmitframe) == _FAIL) {
505 pxmitframe->pkt = NULL;
506 return _FAIL;
507 }
508 return _SUCCESS;
509 }