2 * linux/drivers/video/omap2/dss/dpi.c
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
7 * Some code and ideas taken from drivers/video/omap/ driver
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
23 #define DSS_SUBSYS_NAME "DPI"
25 #include <linux/kernel.h>
26 #include <linux/delay.h>
27 #include <linux/err.h>
28 #include <linux/errno.h>
29 #include <linux/platform_device.h>
30 #include <linux/regulator/consumer.h>
32 #include <video/omapdss.h>
38 struct regulator
*vdds_dsi_reg
;
39 struct platform_device
*dsidev
;
42 static struct platform_device
*dpi_get_dsidev(enum omap_dss_clk_source clk
)
46 dsi_module
= clk
== OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC
? 0 : 1;
48 return dsi_get_dsidev_from_id(dsi_module
);
51 static bool dpi_use_dsi_pll(struct omap_dss_device
*dssdev
)
53 if (dssdev
->clocks
.dispc
.dispc_fclk_src
==
54 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC
||
55 dssdev
->clocks
.dispc
.dispc_fclk_src
==
56 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC
||
57 dssdev
->clocks
.dispc
.channel
.lcd_clk_src
==
58 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC
||
59 dssdev
->clocks
.dispc
.channel
.lcd_clk_src
==
60 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC
)
66 static int dpi_set_dsi_clk(struct omap_dss_device
*dssdev
, bool is_tft
,
67 unsigned long pck_req
, unsigned long *fck
, int *lck_div
,
70 struct dsi_clock_info dsi_cinfo
;
71 struct dispc_clock_info dispc_cinfo
;
74 r
= dsi_pll_calc_clock_div_pck(dpi
.dsidev
, is_tft
, pck_req
,
75 &dsi_cinfo
, &dispc_cinfo
);
79 r
= dsi_pll_set_clock_div(dpi
.dsidev
, &dsi_cinfo
);
83 dss_select_dispc_clk_source(dssdev
->clocks
.dispc
.dispc_fclk_src
);
85 r
= dispc_set_clock_div(dssdev
->manager
->id
, &dispc_cinfo
);
89 *fck
= dsi_cinfo
.dsi_pll_hsdiv_dispc_clk
;
90 *lck_div
= dispc_cinfo
.lck_div
;
91 *pck_div
= dispc_cinfo
.pck_div
;
96 static int dpi_set_dispc_clk(struct omap_dss_device
*dssdev
, bool is_tft
,
97 unsigned long pck_req
, unsigned long *fck
, int *lck_div
,
100 struct dss_clock_info dss_cinfo
;
101 struct dispc_clock_info dispc_cinfo
;
104 r
= dss_calc_clock_div(is_tft
, pck_req
, &dss_cinfo
, &dispc_cinfo
);
108 r
= dss_set_clock_div(&dss_cinfo
);
112 r
= dispc_set_clock_div(dssdev
->manager
->id
, &dispc_cinfo
);
116 *fck
= dss_cinfo
.fck
;
117 *lck_div
= dispc_cinfo
.lck_div
;
118 *pck_div
= dispc_cinfo
.pck_div
;
123 static int dpi_set_mode(struct omap_dss_device
*dssdev
)
125 struct omap_video_timings
*t
= &dssdev
->panel
.timings
;
126 int lck_div
= 0, pck_div
= 0;
127 unsigned long fck
= 0;
132 dispc_set_pol_freq(dssdev
->manager
->id
, dssdev
->panel
.config
,
133 dssdev
->panel
.acbi
, dssdev
->panel
.acb
);
135 is_tft
= (dssdev
->panel
.config
& OMAP_DSS_LCD_TFT
) != 0;
137 if (dpi_use_dsi_pll(dssdev
))
138 r
= dpi_set_dsi_clk(dssdev
, is_tft
, t
->pixel_clock
* 1000,
139 &fck
, &lck_div
, &pck_div
);
141 r
= dpi_set_dispc_clk(dssdev
, is_tft
, t
->pixel_clock
* 1000,
142 &fck
, &lck_div
, &pck_div
);
146 pck
= fck
/ lck_div
/ pck_div
/ 1000;
148 if (pck
!= t
->pixel_clock
) {
149 DSSWARN("Could not find exact pixel clock. "
150 "Requested %d kHz, got %lu kHz\n",
151 t
->pixel_clock
, pck
);
153 t
->pixel_clock
= pck
;
156 dispc_set_lcd_timings(dssdev
->manager
->id
, t
);
161 static void dpi_basic_init(struct omap_dss_device
*dssdev
)
165 is_tft
= (dssdev
->panel
.config
& OMAP_DSS_LCD_TFT
) != 0;
167 dispc_set_parallel_interface_mode(dssdev
->manager
->id
,
168 OMAP_DSS_PARALLELMODE_BYPASS
);
169 dispc_set_lcd_display_type(dssdev
->manager
->id
, is_tft
?
170 OMAP_DSS_LCD_DISPLAY_TFT
: OMAP_DSS_LCD_DISPLAY_STN
);
171 dispc_set_tft_data_lines(dssdev
->manager
->id
,
172 dssdev
->phy
.dpi
.data_lines
);
175 int omapdss_dpi_display_enable(struct omap_dss_device
*dssdev
)
179 r
= omap_dss_start_device(dssdev
);
181 DSSERR("failed to start device\n");
185 if (cpu_is_omap34xx()) {
186 r
= regulator_enable(dpi
.vdds_dsi_reg
);
191 r
= dss_runtime_get();
195 r
= dispc_runtime_get();
199 dpi_basic_init(dssdev
);
201 if (dpi_use_dsi_pll(dssdev
)) {
202 r
= dsi_runtime_get(dpi
.dsidev
);
206 r
= dsi_pll_init(dpi
.dsidev
, 0, 1);
208 goto err_dsi_pll_init
;
211 r
= dpi_set_mode(dssdev
);
217 dssdev
->manager
->enable(dssdev
->manager
);
222 if (dpi_use_dsi_pll(dssdev
))
223 dsi_pll_uninit(dpi
.dsidev
, true);
225 if (dpi_use_dsi_pll(dssdev
))
226 dsi_runtime_put(dpi
.dsidev
);
232 if (cpu_is_omap34xx())
233 regulator_disable(dpi
.vdds_dsi_reg
);
235 omap_dss_stop_device(dssdev
);
239 EXPORT_SYMBOL(omapdss_dpi_display_enable
);
241 void omapdss_dpi_display_disable(struct omap_dss_device
*dssdev
)
243 dssdev
->manager
->disable(dssdev
->manager
);
245 if (dpi_use_dsi_pll(dssdev
)) {
246 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK
);
247 dsi_pll_uninit(dpi
.dsidev
, true);
248 dsi_runtime_put(dpi
.dsidev
);
254 if (cpu_is_omap34xx())
255 regulator_disable(dpi
.vdds_dsi_reg
);
257 omap_dss_stop_device(dssdev
);
259 EXPORT_SYMBOL(omapdss_dpi_display_disable
);
261 void dpi_set_timings(struct omap_dss_device
*dssdev
,
262 struct omap_video_timings
*timings
)
266 DSSDBG("dpi_set_timings\n");
267 dssdev
->panel
.timings
= *timings
;
268 if (dssdev
->state
== OMAP_DSS_DISPLAY_ACTIVE
) {
269 r
= dss_runtime_get();
273 r
= dispc_runtime_get();
279 dpi_set_mode(dssdev
);
280 dispc_go(dssdev
->manager
->id
);
286 EXPORT_SYMBOL(dpi_set_timings
);
288 int dpi_check_timings(struct omap_dss_device
*dssdev
,
289 struct omap_video_timings
*timings
)
293 int lck_div
, pck_div
;
296 struct dispc_clock_info dispc_cinfo
;
298 if (!dispc_lcd_timings_ok(timings
))
301 if (timings
->pixel_clock
== 0)
304 is_tft
= (dssdev
->panel
.config
& OMAP_DSS_LCD_TFT
) != 0;
306 if (dpi_use_dsi_pll(dssdev
)) {
307 struct dsi_clock_info dsi_cinfo
;
308 r
= dsi_pll_calc_clock_div_pck(dpi
.dsidev
, is_tft
,
309 timings
->pixel_clock
* 1000,
310 &dsi_cinfo
, &dispc_cinfo
);
315 fck
= dsi_cinfo
.dsi_pll_hsdiv_dispc_clk
;
317 struct dss_clock_info dss_cinfo
;
318 r
= dss_calc_clock_div(is_tft
, timings
->pixel_clock
* 1000,
319 &dss_cinfo
, &dispc_cinfo
);
327 lck_div
= dispc_cinfo
.lck_div
;
328 pck_div
= dispc_cinfo
.pck_div
;
330 pck
= fck
/ lck_div
/ pck_div
/ 1000;
332 timings
->pixel_clock
= pck
;
336 EXPORT_SYMBOL(dpi_check_timings
);
338 int dpi_init_display(struct omap_dss_device
*dssdev
)
340 DSSDBG("init_display\n");
342 if (cpu_is_omap34xx() && dpi
.vdds_dsi_reg
== NULL
) {
343 struct regulator
*vdds_dsi
;
345 vdds_dsi
= dss_get_vdds_dsi();
347 if (IS_ERR(vdds_dsi
)) {
348 DSSERR("can't get VDDS_DSI regulator\n");
349 return PTR_ERR(vdds_dsi
);
352 dpi
.vdds_dsi_reg
= vdds_dsi
;
355 if (dpi_use_dsi_pll(dssdev
)) {
356 enum omap_dss_clk_source dispc_fclk_src
=
357 dssdev
->clocks
.dispc
.dispc_fclk_src
;
358 dpi
.dsidev
= dpi_get_dsidev(dispc_fclk_src
);