arch/arm/mach-davinci/include/mach/gpio.h

   1 /*
   2  * TI DaVinci GPIO Support
   3  *
   4  * Copyright (c) 2006 David Brownell
   5  * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #ifndef __DAVINCI_GPIO_H
  14 #define __DAVINCI_GPIO_H
  15
  16 #include <linux/io.h>
  17 #include <linux/spinlock.h>
  18
  19 #include <asm-generic/gpio.h>
  20
  21 #include <mach/irqs.h>
  22 #include <mach/common.h>
  23
  24 #define DAVINCI_GPIO_BASE 0x01C67000
  25
  26 enum davinci_gpio_type {
  27         GPIO_TYPE_DAVINCI = 0,
  28         GPIO_TYPE_TNETV107X,
  29 };
  30
  31 /*
  32  * basic gpio routines
  33  *
  34  * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  35  * initializing banks together) rather than boot loaders; kexec() won't
  36  * go through boot loaders.
  37  *
  38  * the gpio clock will be turned on when gpios are used, and you may also
  39  * need to pay attention to PINMUX registers to be sure those pins are
  40  * used as gpios, not with other peripherals.
  41  *
  42  * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
  43  * and maybe for later updates, code may write GPIO(N).  These may be
  44  * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
  45  * may not support all the GPIOs in that range.
  46  *
  47  * GPIOs can also be on external chips, numbered after the ones built-in
  48  * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
  49  */
  50 #define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
  51
  52 /* Convert GPIO signal to GPIO pin number */
  53 #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
  54
  55 struct davinci_gpio_controller {
  56         struct gpio_chip        chip;
  57         int                     irq_base;
  58         spinlock_t              lock;
  59         void __iomem            *regs;
  60         void __iomem            *set_data;
  61         void __iomem            *clr_data;
  62         void __iomem            *in_data;
  63 };
  64
  65 /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  66  * with constant parameters; or in outlined code they execute at runtime.
  67  *
  68  * You'd access the controller directly when reading or writing more than
  69  * one gpio value at a time, and to support wired logic where the value
  70  * being driven by the cpu need not match the value read back.
  71  *
  72  * These are NOT part of the cross-platform GPIO interface
  73  */
  74 static inline struct davinci_gpio_controller *
  75 __gpio_to_controller(unsigned gpio)
  76 {
  77         struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
  78         int index = gpio / 32;
  79
  80         if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
  81                 return NULL;
  82
  83         return ctlrs + index;
  84 }
  85
  86 static inline u32 __gpio_mask(unsigned gpio)
  87 {
  88         return 1 << (gpio % 32);
  89 }
  90
  91 /*
  92  * The get/set/clear functions will inline when called with constant
  93  * parameters referencing built-in GPIOs, for low-overhead bitbanging.
  94  *
  95  * gpio_set_value() will inline only on traditional Davinci style controllers
  96  * with distinct set/clear registers.
  97  *
  98  * Otherwise, calls with variable parameters or referencing external
  99  * GPIOs (e.g. on GPIO expander chips) use outlined functions.
 100  */
 101 static inline void gpio_set_value(unsigned gpio, int value)
 102 {
 103         if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
 104                 struct davinci_gpio_controller *ctlr;
 105                 u32                             mask;
 106
 107                 ctlr = __gpio_to_controller(gpio);
 108
 109                 if (ctlr->set_data != ctlr->clr_data) {
 110                         mask = __gpio_mask(gpio);
 111                         if (value)
 112                                 __raw_writel(mask, ctlr->set_data);
 113                         else
 114                                 __raw_writel(mask, ctlr->clr_data);
 115                         return;
 116                 }
 117         }
 118
 119         __gpio_set_value(gpio, value);
 120 }
 121
 122 /* Returns zero or nonzero; works for gpios configured as inputs OR
 123  * as outputs, at least for built-in GPIOs.
 124  *
 125  * NOTE: for built-in GPIOs, changes in reported values are synchronized
 126  * to the GPIO clock.  This is easily seen after calling gpio_set_value()
 127  * and then immediately gpio_get_value(), where the gpio_get_value() will
 128  * return the old value until the GPIO clock ticks and the new value gets
 129  * latched.
 130  */
 131 static inline int gpio_get_value(unsigned gpio)
 132 {
 133         struct davinci_gpio_controller *ctlr;
 134
 135         if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
 136                 return __gpio_get_value(gpio);
 137
 138         ctlr = __gpio_to_controller(gpio);
 139         return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
 140 }
 141
 142 static inline int gpio_cansleep(unsigned gpio)
 143 {
 144         if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
 145                 return 0;
 146         else
 147                 return __gpio_cansleep(gpio);
 148 }
 149
 150 static inline int gpio_to_irq(unsigned gpio)
 151 {
 152         return __gpio_to_irq(gpio);
 153 }
 154
 155 static inline int irq_to_gpio(unsigned irq)
 156 {
 157         /* don't support the reverse mapping */
 158         return -ENOSYS;
 159 }
 160
 161 #endif                          /* __DAVINCI_GPIO_H */