| blob | da863894d498fc8e537d177cdc6ccb546beb7b2a |
1 /*
2 * IRQ definitions for TCC8xxx
3 *
4 * Copyright (C) 2008-2009 Telechips
5 * Copyright (C) 2009 Hans J. Koch <hjk@linutronix.de>
6 *
7 * Licensed under the terms of the GPL v2.
8 *
9 */
11 #ifndef __ASM_ARCH_TCC_IRQS_H
12 #define __ASM_ARCH_TCC_IRQS_H
14 #define NR_IRQS 64
16 /* PIC0 interrupts */
17 #define INT_ADMA1 0
18 #define INT_BDMA 1
19 #define INT_ADMA0 2
20 #define INT_GDMA1 3
21 #define INT_I2S0RX 4
22 #define INT_I2S0TX 5
23 #define INT_TC 6
24 #define INT_UART0 7
25 #define INT_USBD 8
26 #define INT_SPI0TX 9
27 #define INT_UDMA 10
28 #define INT_LIRQ 11
29 #define INT_GDMA2 12
30 #define INT_GDMA0 13
31 #define INT_TC32 14
32 #define INT_LCD 15
33 #define INT_ADC 16
34 #define INT_I2C 17
35 #define INT_RTCP 18
36 #define INT_RTCA 19
37 #define INT_NFC 20
38 #define INT_SD0 21
39 #define INT_GSB0 22
40 #define INT_PK 23
41 #define INT_USBH0 24
42 #define INT_USBH1 25
43 #define INT_G2D 26
44 #define INT_ECC 27
45 #define INT_SPI0RX 28
46 #define INT_UART1 29
47 #define INT_MSCL 30
48 #define INT_GSB1 31
49 /* PIC1 interrupts */
50 #define INT_E0 32
51 #define INT_E1 33
52 #define INT_E2 34
53 #define INT_E3 35
54 #define INT_E4 36
55 #define INT_E5 37
56 #define INT_E6 38
57 #define INT_E7 39
58 #define INT_UART2 40
59 #define INT_UART3 41
60 #define INT_SPI1TX 42
61 #define INT_SPI1RX 43
62 #define INT_GSB2 44
63 #define INT_SPDIF 45
64 #define INT_CDIF 46
65 #define INT_VBON 47
66 #define INT_VBOFF 48
67 #define INT_SD1 49
68 #define INT_UART4 50
69 #define INT_GDMA3 51
70 #define INT_I2S1RX 52
71 #define INT_I2S1TX 53
72 #define INT_CAN0 54
73 #define INT_CAN1 55
74 #define INT_GSB3 56
75 #define INT_KRST 57
76 #define INT_UNUSED 58
77 #define INT_SD0D3 59
78 #define INT_SD1D3 60
79 #define INT_GPS0 61
80 #define INT_GPS1 62
81 #define INT_GPS2 63