2 * Apple Peripheral System Controller (PSC)
4 * The PSC is used on the AV Macs to control IO functions not handled
5 * by the VIAs (Ethernet, DSP, SCC).
9 * Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
10 * persisant interrupt conditions in those registers and I have no idea what
11 * they are. Granted it doesn't affect since we're not enabling any interrupts
12 * on those levels at the moment, but it would be nice to know. I have a feeling
13 * they aren't actually interrupt lines but data lines (to the DSP?)
16 #include <linux/types.h>
17 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
22 #include <asm/traps.h>
23 #include <asm/bootinfo.h>
24 #include <asm/macintosh.h>
25 #include <asm/macints.h>
26 #include <asm/mac_psc.h>
33 irqreturn_t
psc_irq(int, void *);
36 * Debugging dump, used in various places to see what's going on.
39 static void psc_debug_dump(void)
43 if (!psc_present
) return;
44 for (i
= 0x30 ; i
< 0x70 ; i
+= 0x10) {
45 printk("PSC #%d: IFR = 0x%02X IER = 0x%02X\n",
47 (int) psc_read_byte(pIFRbase
+ i
),
48 (int) psc_read_byte(pIERbase
+ i
));
53 * Try to kill all DMA channels on the PSC. Not sure how this his
54 * supposed to work; this is code lifted from macmace.c and then
55 * expanded to cover what I think are the other 7 channels.
58 static void psc_dma_die_die_die(void)
62 printk("Killing all PSC DMA channels...");
63 for (i
= 0 ; i
< 9 ; i
++) {
64 psc_write_word(PSC_CTL_BASE
+ (i
<< 4), 0x8800);
65 psc_write_word(PSC_CTL_BASE
+ (i
<< 4), 0x1000);
66 psc_write_word(PSC_CMD_BASE
+ (i
<< 5), 0x1100);
67 psc_write_word(PSC_CMD_BASE
+ (i
<< 5) + 0x10, 0x1100);
73 * Initialize the PSC. For now this just involves shutting down all
74 * interrupt sources using the IERs.
77 void __init
psc_init(void)
81 if (macintosh_config
->ident
!= MAC_MODEL_C660
82 && macintosh_config
->ident
!= MAC_MODEL_Q840
)
90 * The PSC is always at the same spot, but using psc
91 * keeps things consistent with the psc_xxxx functions.
94 psc
= (void *) PSC_BASE
;
97 printk("PSC detected at %p\n", psc
);
99 psc_dma_die_die_die();
105 * Mask and clear all possible interrupts
108 for (i
= 0x30 ; i
< 0x70 ; i
+= 0x10) {
109 psc_write_byte(pIERbase
+ i
, 0x0F);
110 psc_write_byte(pIFRbase
+ i
, 0x0F);
115 * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
118 void __init
psc_register_interrupts(void)
120 if (request_irq(IRQ_AUTO_3
, psc_irq
, 0, "psc3", (void *) 0x30))
121 pr_err("Couldn't register psc%d interrupt\n", 3);
122 if (request_irq(IRQ_AUTO_4
, psc_irq
, 0, "psc4", (void *) 0x40))
123 pr_err("Couldn't register psc%d interrupt\n", 4);
124 if (request_irq(IRQ_AUTO_5
, psc_irq
, 0, "psc5", (void *) 0x50))
125 pr_err("Couldn't register psc%d interrupt\n", 5);
126 if (request_irq(IRQ_AUTO_6
, psc_irq
, 0, "psc6", (void *) 0x60))
127 pr_err("Couldn't register psc%d interrupt\n", 6);
131 * PSC interrupt handler. It's a lot like the VIA interrupt handler.
134 irqreturn_t
psc_irq(int irq
, void *dev_id
)
136 int pIFR
= pIFRbase
+ ((int) dev_id
);
137 int pIER
= pIERbase
+ ((int) dev_id
);
139 unsigned char irq_bit
, events
;
142 printk("psc_irq: irq %d pIFR = 0x%02X pIER = 0x%02X\n",
143 irq
, (int) psc_read_byte(pIFR
), (int) psc_read_byte(pIER
));
146 events
= psc_read_byte(pIFR
) & psc_read_byte(pIER
) & 0xF;
153 if (events
& irq_bit
) {
154 psc_write_byte(pIFR
, irq_bit
);
155 m68k_handle_int(irq_num
);
159 } while (events
>= irq_bit
);
163 void psc_irq_enable(int irq
) {
164 int irq_src
= IRQ_SRC(irq
);
165 int irq_idx
= IRQ_IDX(irq
);
166 int pIER
= pIERbase
+ (irq_src
<< 4);
169 printk("psc_irq_enable(%d)\n", irq
);
171 psc_write_byte(pIER
, (1 << irq_idx
) | 0x80);
174 void psc_irq_disable(int irq
) {
175 int irq_src
= IRQ_SRC(irq
);
176 int irq_idx
= IRQ_IDX(irq
);
177 int pIER
= pIERbase
+ (irq_src
<< 4);
180 printk("psc_irq_disable(%d)\n", irq
);
182 psc_write_byte(pIER
, 1 << irq_idx
);
185 void psc_irq_clear(int irq
) {
186 int irq_src
= IRQ_SRC(irq
);
187 int irq_idx
= IRQ_IDX(irq
);
188 int pIFR
= pIERbase
+ (irq_src
<< 4);
190 psc_write_byte(pIFR
, 1 << irq_idx
);
193 int psc_irq_pending(int irq
)
195 int irq_src
= IRQ_SRC(irq
);
196 int irq_idx
= IRQ_IDX(irq
);
197 int pIFR
= pIERbase
+ (irq_src
<< 4);
199 return psc_read_byte(pIFR
) & (1 << irq_idx
);