Staging: hv: mousevsc: Cleanup alloc_input_device()
[zen-stable.git] / arch / mips / pmc-sierra / yosemite / py-console.c
blob434d7b1a8c6a7abf4c492a14b975111a21b1a4ab
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 2001, 2002, 2004 Ralf Baechle
7 */
8 #include <linux/init.h>
9 #include <linux/console.h>
10 #include <linux/kdev_t.h>
11 #include <linux/major.h>
12 #include <linux/termios.h>
13 #include <linux/sched.h>
14 #include <linux/tty.h>
16 #include <linux/serial.h>
17 #include <linux/serial_core.h>
18 #include <asm/serial.h>
19 #include <asm/io.h>
21 /* SUPERIO uart register map */
22 struct yo_uartregs {
23 union {
24 volatile u8 rbr; /* read only, DLAB == 0 */
25 volatile u8 thr; /* write only, DLAB == 0 */
26 volatile u8 dll; /* DLAB == 1 */
27 } u1;
28 union {
29 volatile u8 ier; /* DLAB == 0 */
30 volatile u8 dlm; /* DLAB == 1 */
31 } u2;
32 union {
33 volatile u8 iir; /* read only */
34 volatile u8 fcr; /* write only */
35 } u3;
36 volatile u8 iu_lcr;
37 volatile u8 iu_mcr;
38 volatile u8 iu_lsr;
39 volatile u8 iu_msr;
40 volatile u8 iu_scr;
41 } yo_uregs_t;
43 #define iu_rbr u1.rbr
44 #define iu_thr u1.thr
45 #define iu_dll u1.dll
46 #define iu_ier u2.ier
47 #define iu_dlm u2.dlm
48 #define iu_iir u3.iir
49 #define iu_fcr u3.fcr
51 #define ssnop() __asm__ __volatile__("sll $0, $0, 1\n");
52 #define ssnop_4() do { ssnop(); ssnop(); ssnop(); ssnop(); } while (0)
54 #define IO_BASE_64 0x9000000000000000ULL
56 static unsigned char readb_outer_space(unsigned long long phys)
58 unsigned long long vaddr = IO_BASE_64 | phys;
59 unsigned char res;
60 unsigned int sr;
62 sr = read_c0_status();
63 write_c0_status((sr | ST0_KX) & ~ ST0_IE);
64 ssnop_4();
66 __asm__ __volatile__ (
67 " .set mips3 \n"
68 " .set push \n"
69 " .set noreorder \n"
70 " .set nomacro \n"
71 " ld %0, %1 \n"
72 " .set pop \n"
73 " lbu %0, (%0) \n"
74 " .set mips0 \n"
75 : "=r" (res)
76 : "R" (vaddr));
78 write_c0_status(sr);
79 ssnop_4();
81 return res;
84 static void writeb_outer_space(unsigned long long phys, unsigned char c)
86 unsigned long long vaddr = IO_BASE_64 | phys;
87 unsigned long tmp;
88 unsigned int sr;
90 sr = read_c0_status();
91 write_c0_status((sr | ST0_KX) & ~ ST0_IE);
92 ssnop_4();
94 __asm__ __volatile__ (
95 " .set mips3 \n"
96 " .set push \n"
97 " .set noreorder \n"
98 " .set nomacro \n"
99 " ld %0, %1 \n"
100 " .set pop \n"
101 " sb %2, (%0) \n"
102 " .set mips0 \n"
103 : "=&r" (tmp)
104 : "R" (vaddr), "r" (c));
106 write_c0_status(sr);
107 ssnop_4();
110 void prom_putchar(char c)
112 unsigned long lsr = 0xfd000008ULL + offsetof(struct yo_uartregs, iu_lsr);
113 unsigned long thr = 0xfd000008ULL + offsetof(struct yo_uartregs, iu_thr);
115 while ((readb_outer_space(lsr) & 0x20) == 0);
116 writeb_outer_space(thr, c);