crypto/async_tx/async_memcpy.c

   1 /*
   2  * copy offload engine support
   3  *
   4  * Copyright © 2006, Intel Corporation.
   5  *
   6  *      Dan Williams <dan.j.williams@intel.com>
   7  *
   8  *      with architecture considerations by:
   9  *      Neil Brown <neilb@suse.de>
  10  *      Jeff Garzik <jeff@garzik.org>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms and conditions of the GNU General Public License,
  14  * version 2, as published by the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along with
  22  * this program; if not, write to the Free Software Foundation, Inc.,
  23  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24  *
  25  */
  26 #include <linux/kernel.h>
  27 #include <linux/highmem.h>
  28 #include <linux/mm.h>
  29 #include <linux/dma-mapping.h>
  30 #include <linux/async_tx.h>
  31
  32 /**
  33  * async_memcpy - attempt to copy memory with a dma engine.
  34  * @dest: destination page
  35  * @src: src page
  36  * @dest_offset: offset into 'dest' to start transaction
  37  * @src_offset: offset into 'src' to start transaction
  38  * @len: length in bytes
  39  * @submit: submission / completion modifiers
  40  *
  41  * honored flags: ASYNC_TX_ACK
  42  */
  43 struct dma_async_tx_descriptor *
  44 async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset,
  45              unsigned int src_offset, size_t len,
  46              struct async_submit_ctl *submit)
  47 {
  48         struct dma_chan *chan = async_tx_find_channel(submit, DMA_MEMCPY,
  49                                                       &dest, 1, &src, 1, len);
  50         struct dma_device *device = chan ? chan->device : NULL;
  51         struct dma_async_tx_descriptor *tx = NULL;
  52
  53         if (device && is_dma_copy_aligned(device, src_offset, dest_offset, len)) {
  54                 dma_addr_t dma_dest, dma_src;
  55                 unsigned long dma_prep_flags = 0;
  56
  57                 if (submit->cb_fn)
  58                         dma_prep_flags |= DMA_PREP_INTERRUPT;
  59                 if (submit->flags & ASYNC_TX_FENCE)
  60                         dma_prep_flags |= DMA_PREP_FENCE;
  61                 dma_dest = dma_map_page(device->dev, dest, dest_offset, len,
  62                                         DMA_FROM_DEVICE);
  63
  64                 dma_src = dma_map_page(device->dev, src, src_offset, len,
  65                                        DMA_TO_DEVICE);
  66
  67                 tx = device->device_prep_dma_memcpy(chan, dma_dest, dma_src,
  68                                                     len, dma_prep_flags);
  69         }
  70
  71         if (tx) {
  72                 pr_debug("%s: (async) len: %zu\n", __func__, len);
  73                 async_tx_submit(chan, tx, submit);
  74         } else {
  75                 void *dest_buf, *src_buf;
  76                 pr_debug("%s: (sync) len: %zu\n", __func__, len);
  77
  78                 /* wait for any prerequisite operations */
  79                 async_tx_quiesce(&submit->depend_tx);
  80
  81                 dest_buf = kmap_atomic(dest, KM_USER0) + dest_offset;
  82                 src_buf = kmap_atomic(src, KM_USER1) + src_offset;
  83
  84                 memcpy(dest_buf, src_buf, len);
  85
  86                 kunmap_atomic(src_buf, KM_USER1);
  87                 kunmap_atomic(dest_buf, KM_USER0);
  88
  89                 async_tx_sync_epilog(submit);
  90         }
  91
  92         return tx;
  93 }
  94 EXPORT_SYMBOL_GPL(async_memcpy);
  95
  96 MODULE_AUTHOR("Intel Corporation");
  97 MODULE_DESCRIPTION("asynchronous memcpy api");
  98 MODULE_LICENSE("GPL");