arch/arm/mach-at91/irq.c

   1 /*
   2  * linux/arch/arm/mach-at91/irq.c
   3  *
   4  *  Copyright (C) 2004 SAN People
   5  *  Copyright (C) 2004 ATMEL
   6  *  Copyright (C) Rick Bronson
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  */
  22
  23 #include <linux/init.h>
  24 #include <linux/module.h>
  25 #include <linux/mm.h>
  26 #include <linux/types.h>
  27
  28 #include <mach/hardware.h>
  29 #include <asm/irq.h>
  30 #include <asm/setup.h>
  31
  32 #include <asm/mach/arch.h>
  33 #include <asm/mach/irq.h>
  34 #include <asm/mach/map.h>
  35
  36
  37 static void at91_aic_mask_irq(unsigned int irq)
  38 {
  39         /* Disable interrupt on AIC */
  40         at91_sys_write(AT91_AIC_IDCR, 1 << irq);
  41 }
  42
  43 static void at91_aic_unmask_irq(unsigned int irq)
  44 {
  45         /* Enable interrupt on AIC */
  46         at91_sys_write(AT91_AIC_IECR, 1 << irq);
  47 }
  48
  49 unsigned int at91_extern_irq;
  50
  51 #define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
  52
  53 static int at91_aic_set_type(unsigned irq, unsigned type)
  54 {
  55         unsigned int smr, srctype;
  56
  57         switch (type) {
  58         case IRQ_TYPE_LEVEL_HIGH:
  59                 srctype = AT91_AIC_SRCTYPE_HIGH;
  60                 break;
  61         case IRQ_TYPE_EDGE_RISING:
  62                 srctype = AT91_AIC_SRCTYPE_RISING;
  63                 break;
  64         case IRQ_TYPE_LEVEL_LOW:
  65                 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))         /* only supported on external interrupts */
  66                         srctype = AT91_AIC_SRCTYPE_LOW;
  67                 else
  68                         return -EINVAL;
  69                 break;
  70         case IRQ_TYPE_EDGE_FALLING:
  71                 if ((irq == AT91_ID_FIQ) || is_extern_irq(irq))         /* only supported on external interrupts */
  72                         srctype = AT91_AIC_SRCTYPE_FALLING;
  73                 else
  74                         return -EINVAL;
  75                 break;
  76         default:
  77                 return -EINVAL;
  78         }
  79
  80         smr = at91_sys_read(AT91_AIC_SMR(irq)) & ~AT91_AIC_SRCTYPE;
  81         at91_sys_write(AT91_AIC_SMR(irq), smr | srctype);
  82         return 0;
  83 }
  84
  85 #ifdef CONFIG_PM
  86
  87 static u32 wakeups;
  88 static u32 backups;
  89
  90 static int at91_aic_set_wake(unsigned irq, unsigned value)
  91 {
  92         if (unlikely(irq >= 32))
  93                 return -EINVAL;
  94
  95         if (value)
  96                 wakeups |= (1 << irq);
  97         else
  98                 wakeups &= ~(1 << irq);
  99
 100         return 0;
 101 }
 102
 103 void at91_irq_suspend(void)
 104 {
 105         backups = at91_sys_read(AT91_AIC_IMR);
 106         at91_sys_write(AT91_AIC_IDCR, backups);
 107         at91_sys_write(AT91_AIC_IECR, wakeups);
 108 }
 109
 110 void at91_irq_resume(void)
 111 {
 112         at91_sys_write(AT91_AIC_IDCR, wakeups);
 113         at91_sys_write(AT91_AIC_IECR, backups);
 114 }
 115
 116 #else
 117 #define at91_aic_set_wake       NULL
 118 #endif
 119
 120 static struct irq_chip at91_aic_chip = {
 121         .name           = "AIC",
 122         .ack            = at91_aic_mask_irq,
 123         .mask           = at91_aic_mask_irq,
 124         .unmask         = at91_aic_unmask_irq,
 125         .set_type       = at91_aic_set_type,
 126         .set_wake       = at91_aic_set_wake,
 127 };
 128
 129 /*
 130  * Initialize the AIC interrupt controller.
 131  */
 132 void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
 133 {
 134         unsigned int i;
 135
 136         /*
 137          * The IVR is used by macro get_irqnr_and_base to read and verify.
 138          * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
 139          */
 140         for (i = 0; i < NR_AIC_IRQS; i++) {
 141                 /* Put irq number in Source Vector Register: */
 142                 at91_sys_write(AT91_AIC_SVR(i), i);
 143                 /* Active Low interrupt, with the specified priority */
 144                 at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
 145
 146                 set_irq_chip(i, &at91_aic_chip);
 147                 set_irq_handler(i, handle_level_irq);
 148                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 149
 150                 /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
 151                 if (i < 8)
 152                         at91_sys_write(AT91_AIC_EOICR, 0);
 153         }
 154
 155         /*
 156          * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
 157          * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
 158          */
 159         at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
 160
 161         /* No debugging in AIC: Debug (Protect) Control Register */
 162         at91_sys_write(AT91_AIC_DCR, 0);
 163
 164         /* Disable and clear all interrupts initially */
 165         at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
 166         at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
 167 }