2 * linux/arch/arm/mach-omap1/mcbsp.c
4 * Copyright (C) 2008 Instituto Nokia de Tecnologia
5 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Multichannel mode not supported.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
18 #include <linux/platform_device.h>
23 #include <mach/mcbsp.h>
24 #include <mach/dsp_common.h>
26 #define DPS_RSTCT2_PER_EN (1 << 0)
27 #define DSP_RSTCT2_WD_PER_EN (1 << 1)
29 struct mcbsp_internal_clk
{
35 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
36 static void omap_mcbsp_clk_init(struct mcbsp_internal_clk
*mclk
)
38 const char *clk_names
[] = { "dsp_ck", "api_ck", "dspxor_ck" };
41 mclk
->n_childs
= ARRAY_SIZE(clk_names
);
42 mclk
->childs
= kzalloc(mclk
->n_childs
* sizeof(struct clk
*),
45 for (i
= 0; i
< mclk
->n_childs
; i
++) {
46 /* We fake a platform device to get correct device id */
47 struct platform_device pdev
;
49 pdev
.dev
.bus
= &platform_bus_type
;
50 pdev
.id
= mclk
->clk
.id
;
51 mclk
->childs
[i
] = clk_get(&pdev
.dev
, clk_names
[i
]);
52 if (IS_ERR(mclk
->childs
[i
]))
53 printk(KERN_ERR
"Could not get clock %s (%d).\n",
54 clk_names
[i
], mclk
->clk
.id
);
58 static int omap_mcbsp_clk_enable(struct clk
*clk
)
60 struct mcbsp_internal_clk
*mclk
= container_of(clk
,
61 struct mcbsp_internal_clk
, clk
);
64 for (i
= 0; i
< mclk
->n_childs
; i
++)
65 clk_enable(mclk
->childs
[i
]);
69 static void omap_mcbsp_clk_disable(struct clk
*clk
)
71 struct mcbsp_internal_clk
*mclk
= container_of(clk
,
72 struct mcbsp_internal_clk
, clk
);
75 for (i
= 0; i
< mclk
->n_childs
; i
++)
76 clk_disable(mclk
->childs
[i
]);
79 static struct mcbsp_internal_clk omap_mcbsp_clks
[] = {
84 .enable
= omap_mcbsp_clk_enable
,
85 .disable
= omap_mcbsp_clk_disable
,
92 .enable
= omap_mcbsp_clk_enable
,
93 .disable
= omap_mcbsp_clk_disable
,
98 #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks)
100 #define omap_mcbsp_clks_size 0
101 static struct mcbsp_internal_clk __initdata
*omap_mcbsp_clks
;
102 static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk
*mclk
)
106 static int omap1_mcbsp_check(unsigned int id
)
108 /* REVISIT: Check correctly for number of registered McBSPs */
109 if (cpu_is_omap730()) {
110 if (id
> OMAP_MAX_MCBSP_COUNT
- 2) {
111 printk(KERN_ERR
"OMAP-McBSP: McBSP%d doesn't exist\n",
118 if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
119 if (id
> OMAP_MAX_MCBSP_COUNT
- 1) {
120 printk(KERN_ERR
"OMAP-McBSP: McBSP%d doesn't exist\n",
130 static void omap1_mcbsp_request(unsigned int id
)
133 * On 1510, 1610 and 1710, McBSP1 and McBSP3
134 * are DSP public peripherals.
136 if (id
== OMAP_MCBSP1
|| id
== OMAP_MCBSP3
) {
137 omap_dsp_request_mem();
139 * DSP external peripheral reset
140 * FIXME: This should be moved to dsp code
142 __raw_writew(__raw_readw(DSP_RSTCT2
) | DPS_RSTCT2_PER_EN
|
143 DSP_RSTCT2_WD_PER_EN
, DSP_RSTCT2
);
147 static void omap1_mcbsp_free(unsigned int id
)
149 if (id
== OMAP_MCBSP1
|| id
== OMAP_MCBSP3
)
150 omap_dsp_release_mem();
153 static struct omap_mcbsp_ops omap1_mcbsp_ops
= {
154 .check
= omap1_mcbsp_check
,
155 .request
= omap1_mcbsp_request
,
156 .free
= omap1_mcbsp_free
,
159 #ifdef CONFIG_ARCH_OMAP730
160 static struct omap_mcbsp_platform_data omap730_mcbsp_pdata
[] = {
162 .phys_base
= OMAP730_MCBSP1_BASE
,
163 .virt_base
= io_p2v(OMAP730_MCBSP1_BASE
),
164 .dma_rx_sync
= OMAP_DMA_MCBSP1_RX
,
165 .dma_tx_sync
= OMAP_DMA_MCBSP1_TX
,
166 .rx_irq
= INT_730_McBSP1RX
,
167 .tx_irq
= INT_730_McBSP1TX
,
168 .ops
= &omap1_mcbsp_ops
,
171 .phys_base
= OMAP730_MCBSP2_BASE
,
172 .virt_base
= io_p2v(OMAP730_MCBSP2_BASE
),
173 .dma_rx_sync
= OMAP_DMA_MCBSP3_RX
,
174 .dma_tx_sync
= OMAP_DMA_MCBSP3_TX
,
175 .rx_irq
= INT_730_McBSP2RX
,
176 .tx_irq
= INT_730_McBSP2TX
,
177 .ops
= &omap1_mcbsp_ops
,
180 #define OMAP730_MCBSP_PDATA_SZ ARRAY_SIZE(omap730_mcbsp_pdata)
182 #define omap730_mcbsp_pdata NULL
183 #define OMAP730_MCBSP_PDATA_SZ 0
186 #ifdef CONFIG_ARCH_OMAP15XX
187 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata
[] = {
189 .phys_base
= OMAP1510_MCBSP1_BASE
,
190 .virt_base
= OMAP1510_MCBSP1_BASE
,
191 .dma_rx_sync
= OMAP_DMA_MCBSP1_RX
,
192 .dma_tx_sync
= OMAP_DMA_MCBSP1_TX
,
193 .rx_irq
= INT_McBSP1RX
,
194 .tx_irq
= INT_McBSP1TX
,
195 .ops
= &omap1_mcbsp_ops
,
196 .clk_name
= "mcbsp_clk",
199 .phys_base
= OMAP1510_MCBSP2_BASE
,
200 .virt_base
= io_p2v(OMAP1510_MCBSP2_BASE
),
201 .dma_rx_sync
= OMAP_DMA_MCBSP2_RX
,
202 .dma_tx_sync
= OMAP_DMA_MCBSP2_TX
,
203 .rx_irq
= INT_1510_SPI_RX
,
204 .tx_irq
= INT_1510_SPI_TX
,
205 .ops
= &omap1_mcbsp_ops
,
208 .phys_base
= OMAP1510_MCBSP3_BASE
,
209 .virt_base
= OMAP1510_MCBSP3_BASE
,
210 .dma_rx_sync
= OMAP_DMA_MCBSP3_RX
,
211 .dma_tx_sync
= OMAP_DMA_MCBSP3_TX
,
212 .rx_irq
= INT_McBSP3RX
,
213 .tx_irq
= INT_McBSP3TX
,
214 .ops
= &omap1_mcbsp_ops
,
215 .clk_name
= "mcbsp_clk",
218 #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
220 #define omap15xx_mcbsp_pdata NULL
221 #define OMAP15XX_MCBSP_PDATA_SZ 0
224 #ifdef CONFIG_ARCH_OMAP16XX
225 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata
[] = {
227 .phys_base
= OMAP1610_MCBSP1_BASE
,
228 .virt_base
= OMAP1610_MCBSP1_BASE
,
229 .dma_rx_sync
= OMAP_DMA_MCBSP1_RX
,
230 .dma_tx_sync
= OMAP_DMA_MCBSP1_TX
,
231 .rx_irq
= INT_McBSP1RX
,
232 .tx_irq
= INT_McBSP1TX
,
233 .ops
= &omap1_mcbsp_ops
,
234 .clk_name
= "mcbsp_clk",
237 .phys_base
= OMAP1610_MCBSP2_BASE
,
238 .virt_base
= io_p2v(OMAP1610_MCBSP2_BASE
),
239 .dma_rx_sync
= OMAP_DMA_MCBSP2_RX
,
240 .dma_tx_sync
= OMAP_DMA_MCBSP2_TX
,
241 .rx_irq
= INT_1610_McBSP2_RX
,
242 .tx_irq
= INT_1610_McBSP2_TX
,
243 .ops
= &omap1_mcbsp_ops
,
246 .phys_base
= OMAP1610_MCBSP3_BASE
,
247 .virt_base
= OMAP1610_MCBSP3_BASE
,
248 .dma_rx_sync
= OMAP_DMA_MCBSP3_RX
,
249 .dma_tx_sync
= OMAP_DMA_MCBSP3_TX
,
250 .rx_irq
= INT_McBSP3RX
,
251 .tx_irq
= INT_McBSP3TX
,
252 .ops
= &omap1_mcbsp_ops
,
253 .clk_name
= "mcbsp_clk",
256 #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
258 #define omap16xx_mcbsp_pdata NULL
259 #define OMAP16XX_MCBSP_PDATA_SZ 0
262 int __init
omap1_mcbsp_init(void)
266 for (i
= 0; i
< omap_mcbsp_clks_size
; i
++) {
267 if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
268 omap_mcbsp_clk_init(&omap_mcbsp_clks
[i
]);
269 clk_register(&omap_mcbsp_clks
[i
].clk
);
273 if (cpu_is_omap730())
274 omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata
,
275 OMAP730_MCBSP_PDATA_SZ
);
277 if (cpu_is_omap15xx())
278 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata
,
279 OMAP15XX_MCBSP_PDATA_SZ
);
281 if (cpu_is_omap16xx())
282 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata
,
283 OMAP16XX_MCBSP_PDATA_SZ
);
285 return omap_mcbsp_init();
288 arch_initcall(omap1_mcbsp_init
);