2 * File: arch/blackfin/oprofile/op_model_bf533.c
4 * Author: Anton Blanchard <anton@au.ibm.com>
10 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
11 * Copyright 2004-2006 Analog Devices Inc.
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 #include <linux/oprofile.h>
32 #include <linux/init.h>
33 #include <linux/smp.h>
34 #include <linux/interrupt.h>
35 #include <linux/ptrace.h>
36 #include <linux/irq.h>
38 #include <asm/system.h>
39 #include <asm/processor.h>
40 #include <asm/blackfin.h>
42 #include "op_blackfin.h"
44 #define PM_ENABLE 0x01;
45 #define PM_CTL1_ENABLE 0x18
46 #define PM_CTL0_ENABLE 0xC000
47 #define COUNT_EDGE_ONLY 0x3000000
49 static int oprofile_running
;
51 static unsigned curr_pfctl
, curr_count
[2];
53 static int bfin533_reg_setup(struct op_counter_config
*ctr
)
55 unsigned int pfctl
= ctr_read();
56 unsigned int count
[2];
58 /* set Blackfin perf monitor regs with ctr */
60 pfctl
|= (PM_CTL0_ENABLE
| ((char)ctr
[0].event
<< 5));
61 count
[0] = 0xFFFFFFFF - ctr
[0].count
;
62 curr_count
[0] = count
[0];
65 pfctl
|= (PM_CTL1_ENABLE
| ((char)ctr
[1].event
<< 16));
66 count
[1] = 0xFFFFFFFF - ctr
[1].count
;
67 curr_count
[1] = count
[1];
70 pr_debug("ctr[0].enabled=%d,ctr[1].enabled=%d,ctr[0].event<<5=0x%x,ctr[1].event<<16=0x%x\n", ctr
[0].enabled
, ctr
[1].enabled
, ctr
[0].event
<< 5, ctr
[1].event
<< 16);
71 pfctl
|= COUNT_EDGE_ONLY
;
74 pr_debug("write 0x%x to pfctl\n", pfctl
);
81 static int bfin533_start(struct op_counter_config
*ctr
)
83 unsigned int pfctl
= ctr_read();
91 pr_debug("start oprofile counter \n");
96 static void bfin533_stop(void)
102 /* freeze counters */
105 oprofile_running
= 0;
106 pr_debug("stop oprofile counter \n");
109 static int get_kernel(void)
111 int ipend
, is_kernel
;
113 ipend
= bfin_read_IPEND();
116 is_kernel
= ((ipend
& 0x8000) != 0);
121 int pm_overflow_handler(int irq
, struct pt_regs
*regs
)
125 unsigned int pc
, pfctl
;
126 unsigned int count
[2];
128 pr_debug("get interrupt in %s\n", __func__
);
129 if (oprofile_running
== 0) {
130 pr_debug("error: entering interrupt when oprofile is stopped.\n\r");
134 is_kernel
= get_kernel();
135 cpu
= smp_processor_id();
139 /* read the two event counter regs */
142 /* if the counter overflows, add sample to oprofile buffer */
143 for (i
= 0; i
< 2; ++i
) {
144 if (oprofile_running
) {
145 oprofile_add_sample(regs
, i
);
149 /* reset the perfmon counter */
150 ctr_write(curr_pfctl
);
151 count_write(curr_count
);
155 struct op_bfin533_model op_model_bfin533
= {
156 .reg_setup
= bfin533_reg_setup
,
157 .start
= bfin533_start
,
158 .stop
= bfin533_stop
,
160 .name
= "blackfin/bf533"