include/asm-sparc64/ide.h

   1 /*
   2  * ide.h: Ultra/PCI specific IDE glue.
   3  *
   4  * Copyright (C) 1997  David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998  Eddie C. Dost   (ecd@skynet.be)
   6  */
   7
   8 #ifndef _SPARC64_IDE_H
   9 #define _SPARC64_IDE_H
  10
  11 #ifdef __KERNEL__
  12
  13 #include <asm/pgalloc.h>
  14 #include <asm/io.h>
  15 #include <asm/spitfire.h>
  16 #include <asm/cacheflush.h>
  17 #include <asm/page.h>
  18
  19 #ifndef MAX_HWIFS
  20 # ifdef CONFIG_BLK_DEV_IDEPCI
  21 #define MAX_HWIFS       10
  22 # else
  23 #define MAX_HWIFS       2
  24 # endif
  25 #endif
  26
  27 #define __ide_insl(data_reg, buffer, wcount) \
  28         __ide_insw(data_reg, buffer, (wcount)<<1)
  29 #define __ide_outsl(data_reg, buffer, wcount) \
  30         __ide_outsw(data_reg, buffer, (wcount)<<1)
  31
  32 /* On sparc64, I/O ports and MMIO registers are accessed identically.  */
  33 #define __ide_mm_insw   __ide_insw
  34 #define __ide_mm_insl   __ide_insl
  35 #define __ide_mm_outsw  __ide_outsw
  36 #define __ide_mm_outsl  __ide_outsl
  37
  38 static inline unsigned int inw_be(void __iomem *addr)
  39 {
  40         unsigned int ret;
  41
  42         __asm__ __volatile__("lduha [%1] %2, %0"
  43                              : "=r" (ret)
  44                              : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
  45
  46         return ret;
  47 }
  48
  49 static inline void __ide_insw(void __iomem *port, void *dst, u32 count)
  50 {
  51 #ifdef DCACHE_ALIASING_POSSIBLE
  52         unsigned long end = (unsigned long)dst + (count << 1);
  53 #endif
  54         u16 *ps = dst;
  55         u32 *pi;
  56
  57         if(((u64)ps) & 0x2) {
  58                 *ps++ = inw_be(port);
  59                 count--;
  60         }
  61         pi = (u32 *)ps;
  62         while(count >= 2) {
  63                 u32 w;
  64
  65                 w  = inw_be(port) << 16;
  66                 w |= inw_be(port);
  67                 *pi++ = w;
  68                 count -= 2;
  69         }
  70         ps = (u16 *)pi;
  71         if(count)
  72                 *ps++ = inw_be(port);
  73
  74 #ifdef DCACHE_ALIASING_POSSIBLE
  75         __flush_dcache_range((unsigned long)dst, end);
  76 #endif
  77 }
  78
  79 static inline void outw_be(unsigned short w, void __iomem *addr)
  80 {
  81         __asm__ __volatile__("stha %0, [%1] %2"
  82                              : /* no outputs */
  83                              : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
  84 }
  85
  86 static inline void __ide_outsw(void __iomem *port, void *src, u32 count)
  87 {
  88 #ifdef DCACHE_ALIASING_POSSIBLE
  89         unsigned long end = (unsigned long)src + (count << 1);
  90 #endif
  91         const u16 *ps = src;
  92         const u32 *pi;
  93
  94         if(((u64)src) & 0x2) {
  95                 outw_be(*ps++, port);
  96                 count--;
  97         }
  98         pi = (const u32 *)ps;
  99         while(count >= 2) {
 100                 u32 w;
 101
 102                 w = *pi++;
 103                 outw_be((w >> 16), port);
 104                 outw_be(w, port);
 105                 count -= 2;
 106         }
 107         ps = (const u16 *)pi;
 108         if(count)
 109                 outw_be(*ps, port);
 110
 111 #ifdef DCACHE_ALIASING_POSSIBLE
 112         __flush_dcache_range((unsigned long)src, end);
 113 #endif
 114 }
 115
 116 #endif /* __KERNEL__ */
 117
 118 #endif /* _SPARC64_IDE_H */