4 * Copyright by Michał Mirosław, 2008-2009
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/delay.h>
14 #include "cb710-mmc.h"
16 static const u8 cb710_clock_divider_log2
[8] = {
17 /* 1, 2, 4, 8, 16, 32, 128, 512 */
18 0, 1, 2, 3, 4, 5, 7, 9
20 #define CB710_MAX_DIVIDER_IDX \
21 (ARRAY_SIZE(cb710_clock_divider_log2) - 1)
23 static const u8 cb710_src_freq_mhz
[16] = {
24 33, 10, 20, 25, 30, 35, 40, 45,
25 50, 55, 60, 65, 70, 75, 80, 85
28 static void cb710_mmc_set_clock(struct mmc_host
*mmc
, int hz
)
30 struct cb710_slot
*slot
= cb710_mmc_to_slot(mmc
);
31 struct pci_dev
*pdev
= cb710_slot_to_chip(slot
)->pdev
;
36 /* this is magic, unverifiable for me, unless I get
37 * MMC card with cables connected to bus signals */
38 pci_read_config_dword(pdev
, 0x48, &src_freq_idx
);
39 src_freq_idx
= (src_freq_idx
>> 16) & 0xF;
40 src_hz
= cb710_src_freq_mhz
[src_freq_idx
] * 1000000;
42 for (divider_idx
= 0; divider_idx
< CB710_MAX_DIVIDER_IDX
; ++divider_idx
) {
43 if (hz
>= src_hz
>> cb710_clock_divider_log2
[divider_idx
])
50 cb710_pci_update_config_reg(pdev
, 0x40, ~0xF0000000, divider_idx
<< 28);
52 dev_dbg(cb710_slot_dev(slot
),
53 "clock set to %d Hz, wanted %d Hz; flag = %d\n",
54 src_hz
>> cb710_clock_divider_log2
[divider_idx
& 7],
55 hz
, (divider_idx
& 8) != 0);
58 static void __cb710_mmc_enable_irq(struct cb710_slot
*slot
,
59 unsigned short enable
, unsigned short mask
)
62 * - it gets set later if any interrupt sources are enabled */
63 mask
|= CB710_MMC_IE_IRQ_ENABLE
;
65 /* look like interrupt is fired whenever
66 * WORD[0x0C] & WORD[0x10] != 0;
67 * -> bit 15 port 0x0C seems to be global interrupt enable
70 enable
= (cb710_read_port_16(slot
, CB710_MMC_IRQ_ENABLE_PORT
)
74 enable
|= CB710_MMC_IE_IRQ_ENABLE
;
76 cb710_write_port_16(slot
, CB710_MMC_IRQ_ENABLE_PORT
, enable
);
79 static void cb710_mmc_enable_irq(struct cb710_slot
*slot
,
80 unsigned short enable
, unsigned short mask
)
82 struct cb710_mmc_reader
*reader
= mmc_priv(cb710_slot_to_mmc(slot
));
85 spin_lock_irqsave(&reader
->irq_lock
, flags
);
86 /* this is the only thing irq_lock protects */
87 __cb710_mmc_enable_irq(slot
, enable
, mask
);
88 spin_unlock_irqrestore(&reader
->irq_lock
, flags
);
91 static void cb710_mmc_reset_events(struct cb710_slot
*slot
)
93 cb710_write_port_8(slot
, CB710_MMC_STATUS0_PORT
, 0xFF);
94 cb710_write_port_8(slot
, CB710_MMC_STATUS1_PORT
, 0xFF);
95 cb710_write_port_8(slot
, CB710_MMC_STATUS2_PORT
, 0xFF);
98 static int cb710_mmc_is_card_inserted(struct cb710_slot
*slot
)
100 return cb710_read_port_8(slot
, CB710_MMC_STATUS3_PORT
)
101 & CB710_MMC_S3_CARD_DETECTED
;
104 static void cb710_mmc_enable_4bit_data(struct cb710_slot
*slot
, int enable
)
106 dev_dbg(cb710_slot_dev(slot
), "configuring %d-data-line%s mode\n",
107 enable
? 4 : 1, enable
? "s" : "");
109 cb710_modify_port_8(slot
, CB710_MMC_CONFIG1_PORT
,
110 CB710_MMC_C1_4BIT_DATA_BUS
, 0);
112 cb710_modify_port_8(slot
, CB710_MMC_CONFIG1_PORT
,
113 0, CB710_MMC_C1_4BIT_DATA_BUS
);
116 static int cb710_check_event(struct cb710_slot
*slot
, u8 what
)
120 status
= cb710_read_port_16(slot
, CB710_MMC_STATUS_PORT
);
122 if (status
& CB710_MMC_S0_FIFO_UNDERFLOW
) {
123 /* it is just a guess, so log it */
124 dev_dbg(cb710_slot_dev(slot
),
125 "CHECK : ignoring bit 6 in status %04X\n", status
);
126 cb710_write_port_8(slot
, CB710_MMC_STATUS0_PORT
,
127 CB710_MMC_S0_FIFO_UNDERFLOW
);
128 status
&= ~CB710_MMC_S0_FIFO_UNDERFLOW
;
131 if (status
& CB710_MMC_STATUS_ERROR_EVENTS
) {
132 dev_dbg(cb710_slot_dev(slot
),
133 "CHECK : returning EIO on status %04X\n", status
);
134 cb710_write_port_8(slot
, CB710_MMC_STATUS0_PORT
, status
& 0xFF);
135 cb710_write_port_8(slot
, CB710_MMC_STATUS1_PORT
,
140 /* 'what' is a bit in MMC_STATUS1 */
141 if ((status
>> 8) & what
) {
142 cb710_write_port_8(slot
, CB710_MMC_STATUS1_PORT
, what
);
149 static int cb710_wait_for_event(struct cb710_slot
*slot
, u8 what
)
152 unsigned limit
= 2000000; /* FIXME: real timeout */
154 #ifdef CONFIG_CB710_DEBUG
156 e
= cb710_read_port_32(slot
, CB710_MMC_STATUS_PORT
);
159 while (!(err
= cb710_check_event(slot
, what
))) {
161 cb710_dump_regs(cb710_slot_to_chip(slot
),
162 CB710_DUMP_REGS_MMC
);
169 #ifdef CONFIG_CB710_DEBUG
170 x
= cb710_read_port_32(slot
, CB710_MMC_STATUS_PORT
);
172 limit
= 2000000 - limit
;
174 dev_dbg(cb710_slot_dev(slot
),
175 "WAIT10: waited %d loops, what %d, entry val %08X, exit val %08X\n",
178 return err
< 0 ? err
: 0;
182 static int cb710_wait_while_busy(struct cb710_slot
*slot
, uint8_t mask
)
184 unsigned limit
= 500000; /* FIXME: real timeout */
187 #ifdef CONFIG_CB710_DEBUG
189 e
= cb710_read_port_32(slot
, CB710_MMC_STATUS_PORT
);
192 while (cb710_read_port_8(slot
, CB710_MMC_STATUS2_PORT
) & mask
) {
194 cb710_dump_regs(cb710_slot_to_chip(slot
),
195 CB710_DUMP_REGS_MMC
);
202 #ifdef CONFIG_CB710_DEBUG
203 x
= cb710_read_port_32(slot
, CB710_MMC_STATUS_PORT
);
205 limit
= 500000 - limit
;
207 dev_dbg(cb710_slot_dev(slot
),
208 "WAIT12: waited %d loops, mask %02X, entry val %08X, exit val %08X\n",
214 static void cb710_mmc_set_transfer_size(struct cb710_slot
*slot
,
215 size_t count
, size_t blocksize
)
217 cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
);
218 cb710_write_port_32(slot
, CB710_MMC_TRANSFER_SIZE_PORT
,
219 ((count
- 1) << 16)|(blocksize
- 1));
221 dev_vdbg(cb710_slot_dev(slot
), "set up for %zu block%s of %zu bytes\n",
222 count
, count
== 1 ? "" : "s", blocksize
);
225 static void cb710_mmc_fifo_hack(struct cb710_slot
*slot
)
227 /* without this, received data is prepended with 8-bytes of zeroes */
231 r1
= cb710_read_port_32(slot
, CB710_MMC_DATA_PORT
);
232 r2
= cb710_read_port_32(slot
, CB710_MMC_DATA_PORT
);
233 if (cb710_read_port_8(slot
, CB710_MMC_STATUS0_PORT
)
234 & CB710_MMC_S0_FIFO_UNDERFLOW
) {
235 cb710_write_port_8(slot
, CB710_MMC_STATUS0_PORT
,
236 CB710_MMC_S0_FIFO_UNDERFLOW
);
240 dev_dbg(cb710_slot_dev(slot
),
241 "FIFO-read-hack: expected STATUS0 bit was %s\n",
242 ok
? "set." : "NOT SET!");
243 dev_dbg(cb710_slot_dev(slot
),
244 "FIFO-read-hack: dwords ignored: %08X %08X - %s\n",
245 r1
, r2
, (r1
|r2
) ? "BAD (NOT ZERO)!" : "ok");
248 static int cb710_mmc_receive_pio(struct cb710_slot
*slot
,
249 struct sg_mapping_iter
*miter
, size_t dw_count
)
251 if (!(cb710_read_port_8(slot
, CB710_MMC_STATUS2_PORT
) & CB710_MMC_S2_FIFO_READY
)) {
252 int err
= cb710_wait_for_event(slot
,
253 CB710_MMC_S1_PIO_TRANSFER_DONE
);
258 cb710_sg_dwiter_write_from_io(miter
,
259 slot
->iobase
+ CB710_MMC_DATA_PORT
, dw_count
);
264 static bool cb710_is_transfer_size_supported(struct mmc_data
*data
)
266 return !(data
->blksz
& 15 && (data
->blocks
!= 1 || data
->blksz
!= 8));
269 static int cb710_mmc_receive(struct cb710_slot
*slot
, struct mmc_data
*data
)
271 struct sg_mapping_iter miter
;
272 size_t len
, blocks
= data
->blocks
;
275 /* TODO: I don't know how/if the hardware handles non-16B-boundary blocks
276 * except single 8B block */
277 if (unlikely(data
->blksz
& 15 && (data
->blocks
!= 1 || data
->blksz
!= 8)))
280 sg_miter_start(&miter
, data
->sg
, data
->sg_len
, SG_MITER_TO_SG
);
282 cb710_modify_port_8(slot
, CB710_MMC_CONFIG2_PORT
,
283 15, CB710_MMC_C2_READ_PIO_SIZE_MASK
);
285 cb710_mmc_fifo_hack(slot
);
287 while (blocks
-- > 0) {
291 err
= cb710_mmc_receive_pio(slot
, &miter
, 4);
300 cb710_modify_port_8(slot
, CB710_MMC_CONFIG2_PORT
,
301 len
- 1, CB710_MMC_C2_READ_PIO_SIZE_MASK
);
303 len
= (len
>= 8) ? 4 : 2;
304 err
= cb710_mmc_receive_pio(slot
, &miter
, len
);
309 sg_miter_stop(&miter
);
313 static int cb710_mmc_send(struct cb710_slot
*slot
, struct mmc_data
*data
)
315 struct sg_mapping_iter miter
;
316 size_t len
, blocks
= data
->blocks
;
319 /* TODO: I don't know how/if the hardware handles multiple
320 * non-16B-boundary blocks */
321 if (unlikely(data
->blocks
> 1 && data
->blksz
& 15))
324 sg_miter_start(&miter
, data
->sg
, data
->sg_len
, SG_MITER_FROM_SG
);
326 cb710_modify_port_8(slot
, CB710_MMC_CONFIG2_PORT
,
327 0, CB710_MMC_C2_READ_PIO_SIZE_MASK
);
329 while (blocks
-- > 0) {
330 len
= (data
->blksz
+ 15) >> 4;
332 if (!(cb710_read_port_8(slot
, CB710_MMC_STATUS2_PORT
)
333 & CB710_MMC_S2_FIFO_EMPTY
)) {
334 err
= cb710_wait_for_event(slot
,
335 CB710_MMC_S1_PIO_TRANSFER_DONE
);
339 cb710_sg_dwiter_read_to_io(&miter
,
340 slot
->iobase
+ CB710_MMC_DATA_PORT
, 4);
344 sg_miter_stop(&miter
);
348 static u16
cb710_encode_cmd_flags(struct cb710_mmc_reader
*reader
,
349 struct mmc_command
*cmd
)
351 unsigned int flags
= cmd
->flags
;
354 /* Windows driver returned 0 for commands for which no response
355 * is expected. It happened that there were only two such commands
356 * used: MMC_GO_IDLE_STATE and MMC_GO_INACTIVE_STATE so it might
357 * as well be a bug in that driver.
359 * Original driver set bit 14 for MMC/SD application
360 * commands. There's no difference 'on the wire' and
361 * it apparently works without it anyway.
364 switch (flags
& MMC_CMD_MASK
) {
365 case MMC_CMD_AC
: cb_flags
= CB710_MMC_CMD_AC
; break;
366 case MMC_CMD_ADTC
: cb_flags
= CB710_MMC_CMD_ADTC
; break;
367 case MMC_CMD_BC
: cb_flags
= CB710_MMC_CMD_BC
; break;
368 case MMC_CMD_BCR
: cb_flags
= CB710_MMC_CMD_BCR
; break;
371 if (flags
& MMC_RSP_BUSY
)
372 cb_flags
|= CB710_MMC_RSP_BUSY
;
374 cb_flags
|= cmd
->opcode
<< CB710_MMC_CMD_CODE_SHIFT
;
376 if (cmd
->data
&& (cmd
->data
->flags
& MMC_DATA_READ
))
377 cb_flags
|= CB710_MMC_DATA_READ
;
379 if (flags
& MMC_RSP_PRESENT
) {
380 /* Windows driver set 01 at bits 4,3 except for
381 * MMC_SET_BLOCKLEN where it set 10. Maybe the
382 * hardware can do something special about this
383 * command? The original driver looks buggy/incomplete
384 * anyway so we ignore this for now.
386 * I assume that 00 here means no response is expected.
388 cb_flags
|= CB710_MMC_RSP_PRESENT
;
390 if (flags
& MMC_RSP_136
)
391 cb_flags
|= CB710_MMC_RSP_136
;
392 if (!(flags
& MMC_RSP_CRC
))
393 cb_flags
|= CB710_MMC_RSP_NO_CRC
;
399 static void cb710_receive_response(struct cb710_slot
*slot
,
400 struct mmc_command
*cmd
)
402 unsigned rsp_opcode
, wanted_opcode
;
404 /* Looks like final byte with CRC is always stripped (same as SDHCI) */
405 if (cmd
->flags
& MMC_RSP_136
) {
408 resp
[0] = cb710_read_port_32(slot
, CB710_MMC_RESPONSE3_PORT
);
409 resp
[1] = cb710_read_port_32(slot
, CB710_MMC_RESPONSE2_PORT
);
410 resp
[2] = cb710_read_port_32(slot
, CB710_MMC_RESPONSE1_PORT
);
411 resp
[3] = cb710_read_port_32(slot
, CB710_MMC_RESPONSE0_PORT
);
412 rsp_opcode
= resp
[0] >> 24;
414 cmd
->resp
[0] = (resp
[0] << 8)|(resp
[1] >> 24);
415 cmd
->resp
[1] = (resp
[1] << 8)|(resp
[2] >> 24);
416 cmd
->resp
[2] = (resp
[2] << 8)|(resp
[3] >> 24);
417 cmd
->resp
[3] = (resp
[3] << 8);
419 rsp_opcode
= cb710_read_port_32(slot
, CB710_MMC_RESPONSE1_PORT
) & 0x3F;
420 cmd
->resp
[0] = cb710_read_port_32(slot
, CB710_MMC_RESPONSE0_PORT
);
423 wanted_opcode
= (cmd
->flags
& MMC_RSP_OPCODE
) ? cmd
->opcode
: 0x3F;
424 if (rsp_opcode
!= wanted_opcode
)
425 cmd
->error
= -EILSEQ
;
428 static int cb710_mmc_transfer_data(struct cb710_slot
*slot
,
429 struct mmc_data
*data
)
433 if (data
->flags
& MMC_DATA_READ
)
434 error
= cb710_mmc_receive(slot
, data
);
436 error
= cb710_mmc_send(slot
, data
);
438 to
= cb710_wait_for_event(slot
, CB710_MMC_S1_DATA_TRANSFER_DONE
);
443 data
->bytes_xfered
= data
->blksz
* data
->blocks
;
447 static int cb710_mmc_command(struct mmc_host
*mmc
, struct mmc_command
*cmd
)
449 struct cb710_slot
*slot
= cb710_mmc_to_slot(mmc
);
450 struct cb710_mmc_reader
*reader
= mmc_priv(mmc
);
451 struct mmc_data
*data
= cmd
->data
;
453 u16 cb_cmd
= cb710_encode_cmd_flags(reader
, cmd
);
454 dev_dbg(cb710_slot_dev(slot
), "cmd request: 0x%04X\n", cb_cmd
);
457 if (!cb710_is_transfer_size_supported(data
)) {
458 data
->error
= -EINVAL
;
461 cb710_mmc_set_transfer_size(slot
, data
->blocks
, data
->blksz
);
464 cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
|CB710_MMC_S2_BUSY_10
);
465 cb710_write_port_16(slot
, CB710_MMC_CMD_TYPE_PORT
, cb_cmd
);
466 cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
);
467 cb710_write_port_32(slot
, CB710_MMC_CMD_PARAM_PORT
, cmd
->arg
);
468 cb710_mmc_reset_events(slot
);
469 cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
);
470 cb710_modify_port_8(slot
, CB710_MMC_CONFIG0_PORT
, 0x01, 0);
472 cmd
->error
= cb710_wait_for_event(slot
, CB710_MMC_S1_COMMAND_SENT
);
476 if (cmd
->flags
& MMC_RSP_PRESENT
) {
477 cb710_receive_response(slot
, cmd
);
483 data
->error
= cb710_mmc_transfer_data(slot
, data
);
487 static void cb710_mmc_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
489 struct cb710_slot
*slot
= cb710_mmc_to_slot(mmc
);
490 struct cb710_mmc_reader
*reader
= mmc_priv(mmc
);
492 WARN_ON(reader
->mrq
!= NULL
);
495 cb710_mmc_enable_irq(slot
, CB710_MMC_IE_TEST_MASK
, 0);
497 if (cb710_mmc_is_card_inserted(slot
)) {
498 if (!cb710_mmc_command(mmc
, mrq
->cmd
) && mrq
->stop
)
499 cb710_mmc_command(mmc
, mrq
->stop
);
502 mrq
->cmd
->error
= -ENOMEDIUM
;
505 tasklet_schedule(&reader
->finish_req_tasklet
);
508 static int cb710_mmc_powerup(struct cb710_slot
*slot
)
510 #ifdef CONFIG_CB710_DEBUG
511 struct cb710_chip
*chip
= cb710_slot_to_chip(slot
);
515 /* a lot of magic; see comment in cb710_mmc_set_clock() */
516 dev_dbg(cb710_slot_dev(slot
), "bus powerup\n");
517 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
518 err
= cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
);
521 cb710_modify_port_8(slot
, CB710_MMC_CONFIG1_PORT
, 0x80, 0);
522 cb710_modify_port_8(slot
, CB710_MMC_CONFIG3_PORT
, 0x80, 0);
523 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
525 dev_dbg(cb710_slot_dev(slot
), "after delay 1\n");
526 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
527 err
= cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
);
530 cb710_modify_port_8(slot
, CB710_MMC_CONFIG1_PORT
, 0x09, 0);
531 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
533 dev_dbg(cb710_slot_dev(slot
), "after delay 2\n");
534 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
535 err
= cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
);
538 cb710_modify_port_8(slot
, CB710_MMC_CONFIG1_PORT
, 0, 0x08);
539 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
541 dev_dbg(cb710_slot_dev(slot
), "after delay 3\n");
542 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
543 cb710_modify_port_8(slot
, CB710_MMC_CONFIG0_PORT
, 0x06, 0);
544 cb710_modify_port_8(slot
, CB710_MMC_CONFIG1_PORT
, 0x70, 0);
545 cb710_modify_port_8(slot
, CB710_MMC_CONFIG2_PORT
, 0x80, 0);
546 cb710_modify_port_8(slot
, CB710_MMC_CONFIG3_PORT
, 0x03, 0);
547 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
548 err
= cb710_wait_while_busy(slot
, CB710_MMC_S2_BUSY_20
);
551 /* This port behaves weird: quick byte reads of 0x08,0x09 return
552 * 0xFF,0x00 after writing 0xFFFF to 0x08; it works correctly when
553 * read/written from userspace... What am I missing here?
554 * (it doesn't depend on write-to-read delay) */
555 cb710_write_port_16(slot
, CB710_MMC_CONFIGB_PORT
, 0xFFFF);
556 cb710_modify_port_8(slot
, CB710_MMC_CONFIG0_PORT
, 0x06, 0);
557 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
558 dev_dbg(cb710_slot_dev(slot
), "bus powerup finished\n");
560 return cb710_check_event(slot
, 0);
563 static void cb710_mmc_powerdown(struct cb710_slot
*slot
)
565 cb710_modify_port_8(slot
, CB710_MMC_CONFIG1_PORT
, 0, 0x81);
566 cb710_modify_port_8(slot
, CB710_MMC_CONFIG3_PORT
, 0, 0x80);
569 static void cb710_mmc_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
571 struct cb710_slot
*slot
= cb710_mmc_to_slot(mmc
);
572 struct cb710_mmc_reader
*reader
= mmc_priv(mmc
);
575 cb710_mmc_set_clock(mmc
, ios
->clock
);
577 if (!cb710_mmc_is_card_inserted(slot
)) {
578 dev_dbg(cb710_slot_dev(slot
),
579 "no card inserted - ignoring bus powerup request\n");
580 ios
->power_mode
= MMC_POWER_OFF
;
583 if (ios
->power_mode
!= reader
->last_power_mode
)
584 switch (ios
->power_mode
) {
586 err
= cb710_mmc_powerup(slot
);
588 dev_warn(cb710_slot_dev(slot
),
589 "powerup failed (%d)- retrying\n", err
);
590 cb710_mmc_powerdown(slot
);
592 err
= cb710_mmc_powerup(slot
);
594 dev_warn(cb710_slot_dev(slot
),
595 "powerup retry failed (%d) - expect errors\n",
598 reader
->last_power_mode
= MMC_POWER_ON
;
601 cb710_mmc_powerdown(slot
);
602 reader
->last_power_mode
= MMC_POWER_OFF
;
609 cb710_mmc_enable_4bit_data(slot
, ios
->bus_width
!= MMC_BUS_WIDTH_1
);
611 cb710_mmc_enable_irq(slot
, CB710_MMC_IE_TEST_MASK
, 0);
614 static int cb710_mmc_get_ro(struct mmc_host
*mmc
)
616 struct cb710_slot
*slot
= cb710_mmc_to_slot(mmc
);
618 return cb710_read_port_8(slot
, CB710_MMC_STATUS3_PORT
)
619 & CB710_MMC_S3_WRITE_PROTECTED
;
622 static int cb710_mmc_irq_handler(struct cb710_slot
*slot
)
624 struct mmc_host
*mmc
= cb710_slot_to_mmc(slot
);
625 struct cb710_mmc_reader
*reader
= mmc_priv(mmc
);
626 u32 status
, config1
, config2
, irqen
;
628 status
= cb710_read_port_32(slot
, CB710_MMC_STATUS_PORT
);
629 irqen
= cb710_read_port_32(slot
, CB710_MMC_IRQ_ENABLE_PORT
);
630 config2
= cb710_read_port_32(slot
, CB710_MMC_CONFIGB_PORT
);
631 config1
= cb710_read_port_32(slot
, CB710_MMC_CONFIG_PORT
);
633 dev_dbg(cb710_slot_dev(slot
), "interrupt; status: %08X, "
634 "ie: %08X, c2: %08X, c1: %08X\n",
635 status
, irqen
, config2
, config1
);
637 if (status
& (CB710_MMC_S1_CARD_CHANGED
<< 8)) {
639 cb710_write_port_8(slot
, CB710_MMC_STATUS1_PORT
,
640 CB710_MMC_S1_CARD_CHANGED
);
641 if ((irqen
& CB710_MMC_IE_CISTATUS_MASK
)
642 == CB710_MMC_IE_CISTATUS_MASK
)
643 mmc_detect_change(mmc
, HZ
/5);
645 dev_dbg(cb710_slot_dev(slot
), "unknown interrupt (test)\n");
646 spin_lock(&reader
->irq_lock
);
647 __cb710_mmc_enable_irq(slot
, 0, CB710_MMC_IE_TEST_MASK
);
648 spin_unlock(&reader
->irq_lock
);
654 static void cb710_mmc_finish_request_tasklet(unsigned long data
)
656 struct mmc_host
*mmc
= (void *)data
;
657 struct cb710_mmc_reader
*reader
= mmc_priv(mmc
);
658 struct mmc_request
*mrq
= reader
->mrq
;
661 mmc_request_done(mmc
, mrq
);
664 static const struct mmc_host_ops cb710_mmc_host
= {
665 .request
= cb710_mmc_request
,
666 .set_ios
= cb710_mmc_set_ios
,
667 .get_ro
= cb710_mmc_get_ro
672 static int cb710_mmc_suspend(struct platform_device
*pdev
, pm_message_t state
)
674 struct cb710_slot
*slot
= cb710_pdev_to_slot(pdev
);
675 struct mmc_host
*mmc
= cb710_slot_to_mmc(slot
);
678 err
= mmc_suspend_host(mmc
);
682 cb710_mmc_enable_irq(slot
, 0, ~0);
686 static int cb710_mmc_resume(struct platform_device
*pdev
)
688 struct cb710_slot
*slot
= cb710_pdev_to_slot(pdev
);
689 struct mmc_host
*mmc
= cb710_slot_to_mmc(slot
);
691 cb710_mmc_enable_irq(slot
, 0, ~0);
693 return mmc_resume_host(mmc
);
696 #endif /* CONFIG_PM */
698 static int __devinit
cb710_mmc_init(struct platform_device
*pdev
)
700 struct cb710_slot
*slot
= cb710_pdev_to_slot(pdev
);
701 struct cb710_chip
*chip
= cb710_slot_to_chip(slot
);
702 struct mmc_host
*mmc
;
703 struct cb710_mmc_reader
*reader
;
707 mmc
= mmc_alloc_host(sizeof(*reader
), cb710_slot_dev(slot
));
711 dev_set_drvdata(&pdev
->dev
, mmc
);
713 /* harmless (maybe) magic */
714 pci_read_config_dword(chip
->pdev
, 0x48, &val
);
715 val
= cb710_src_freq_mhz
[(val
>> 16) & 0xF];
716 dev_dbg(cb710_slot_dev(slot
), "source frequency: %dMHz\n", val
);
719 mmc
->ops
= &cb710_mmc_host
;
721 mmc
->f_min
= val
>> cb710_clock_divider_log2
[CB710_MAX_DIVIDER_IDX
];
722 mmc
->ocr_avail
= MMC_VDD_32_33
|MMC_VDD_33_34
;
723 mmc
->caps
= MMC_CAP_4_BIT_DATA
;
725 reader
= mmc_priv(mmc
);
727 tasklet_init(&reader
->finish_req_tasklet
,
728 cb710_mmc_finish_request_tasklet
, (unsigned long)mmc
);
729 spin_lock_init(&reader
->irq_lock
);
730 cb710_dump_regs(chip
, CB710_DUMP_REGS_MMC
);
732 cb710_mmc_enable_irq(slot
, 0, ~0);
733 cb710_set_irq_handler(slot
, cb710_mmc_irq_handler
);
735 err
= mmc_add_host(mmc
);
739 dev_dbg(cb710_slot_dev(slot
), "mmc_hostname is %s\n",
742 cb710_mmc_enable_irq(slot
, CB710_MMC_IE_CARD_INSERTION_STATUS
, 0);
747 dev_dbg(cb710_slot_dev(slot
), "mmc_add_host() failed: %d\n", err
);
753 static int __devexit
cb710_mmc_exit(struct platform_device
*pdev
)
755 struct cb710_slot
*slot
= cb710_pdev_to_slot(pdev
);
756 struct mmc_host
*mmc
= cb710_slot_to_mmc(slot
);
757 struct cb710_mmc_reader
*reader
= mmc_priv(mmc
);
759 cb710_mmc_enable_irq(slot
, 0, CB710_MMC_IE_CARD_INSERTION_STATUS
);
761 mmc_remove_host(mmc
);
763 /* IRQs should be disabled now, but let's stay on the safe side */
764 cb710_mmc_enable_irq(slot
, 0, ~0);
765 cb710_set_irq_handler(slot
, NULL
);
767 /* clear config ports - just in case */
768 cb710_write_port_32(slot
, CB710_MMC_CONFIG_PORT
, 0);
769 cb710_write_port_16(slot
, CB710_MMC_CONFIGB_PORT
, 0);
771 tasklet_kill(&reader
->finish_req_tasklet
);
777 static struct platform_driver cb710_mmc_driver
= {
778 .driver
.name
= "cb710-mmc",
779 .probe
= cb710_mmc_init
,
780 .remove
= __devexit_p(cb710_mmc_exit
),
782 .suspend
= cb710_mmc_suspend
,
783 .resume
= cb710_mmc_resume
,
787 static int __init
cb710_mmc_init_module(void)
789 return platform_driver_register(&cb710_mmc_driver
);
792 static void __exit
cb710_mmc_cleanup_module(void)
794 platform_driver_unregister(&cb710_mmc_driver
);
797 module_init(cb710_mmc_init_module
);
798 module_exit(cb710_mmc_cleanup_module
);
800 MODULE_AUTHOR("Michał Mirosław <mirq-linux@rere.qmqm.pl>");
801 MODULE_DESCRIPTION("ENE CB710 memory card reader driver - MMC/SD part");
802 MODULE_LICENSE("GPL");
803 MODULE_ALIAS("platform:cb710-mmc");