1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/pci.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
21 #include <linux/mmc/host.h>
23 #include <asm/scatterlist.h>
32 #define PCI_SDHCI_IFPIO 0x00
33 #define PCI_SDHCI_IFDMA 0x01
34 #define PCI_SDHCI_IFVENDOR 0x02
36 #define PCI_SLOT_INFO 0x40 /* 8 bits */
37 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
38 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
42 struct sdhci_pci_chip
;
43 struct sdhci_pci_slot
;
45 struct sdhci_pci_fixes
{
48 int (*probe
)(struct sdhci_pci_chip
*);
50 int (*probe_slot
)(struct sdhci_pci_slot
*);
51 void (*remove_slot
)(struct sdhci_pci_slot
*, int);
53 int (*suspend
)(struct sdhci_pci_chip
*,
55 int (*resume
)(struct sdhci_pci_chip
*);
58 struct sdhci_pci_slot
{
59 struct sdhci_pci_chip
*chip
;
60 struct sdhci_host
*host
;
65 struct sdhci_pci_chip
{
69 const struct sdhci_pci_fixes
*fixes
;
71 int num_slots
; /* Slots on controller */
72 struct sdhci_pci_slot
*slots
[MAX_SLOTS
]; /* Pointers to host slots */
76 /*****************************************************************************\
78 * Hardware specific quirk handling *
80 \*****************************************************************************/
82 static int ricoh_probe(struct sdhci_pci_chip
*chip
)
84 if (chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SAMSUNG
||
85 chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SONY
)
86 chip
->quirks
|= SDHCI_QUIRK_NO_CARD_NO_RESET
;
91 static const struct sdhci_pci_fixes sdhci_ricoh
= {
93 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
94 SDHCI_QUIRK_FORCE_DMA
|
95 SDHCI_QUIRK_CLOCK_BEFORE_RESET
,
98 static const struct sdhci_pci_fixes sdhci_ene_712
= {
99 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
100 SDHCI_QUIRK_BROKEN_DMA
,
103 static const struct sdhci_pci_fixes sdhci_ene_714
= {
104 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
105 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
|
106 SDHCI_QUIRK_BROKEN_DMA
,
109 static const struct sdhci_pci_fixes sdhci_cafe
= {
110 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
|
111 SDHCI_QUIRK_NO_BUSY_IRQ
|
112 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
,
115 static int jmicron_pmos(struct sdhci_pci_chip
*chip
, int on
)
120 ret
= pci_read_config_byte(chip
->pdev
, 0xAE, &scratch
);
125 * Turn PMOS on [bit 0], set over current detection to 2.4 V
126 * [bit 1:2] and enable over current debouncing [bit 6].
133 ret
= pci_write_config_byte(chip
->pdev
, 0xAE, scratch
);
140 static int jmicron_probe(struct sdhci_pci_chip
*chip
)
144 if (chip
->pdev
->revision
== 0) {
145 chip
->quirks
|= SDHCI_QUIRK_32BIT_DMA_ADDR
|
146 SDHCI_QUIRK_32BIT_DMA_SIZE
|
147 SDHCI_QUIRK_32BIT_ADMA_SIZE
|
148 SDHCI_QUIRK_RESET_AFTER_REQUEST
|
149 SDHCI_QUIRK_BROKEN_SMALL_PIO
;
153 * JMicron chips can have two interfaces to the same hardware
154 * in order to work around limitations in Microsoft's driver.
155 * We need to make sure we only bind to one of them.
157 * This code assumes two things:
159 * 1. The PCI code adds subfunctions in order.
161 * 2. The MMC interface has a lower subfunction number
162 * than the SD interface.
164 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_SD
) {
165 struct pci_dev
*sd_dev
;
168 while ((sd_dev
= pci_get_device(PCI_VENDOR_ID_JMICRON
,
169 PCI_DEVICE_ID_JMICRON_JMB38X_MMC
, sd_dev
)) != NULL
) {
170 if ((PCI_SLOT(chip
->pdev
->devfn
) ==
171 PCI_SLOT(sd_dev
->devfn
)) &&
172 (chip
->pdev
->bus
== sd_dev
->bus
))
178 dev_info(&chip
->pdev
->dev
, "Refusing to bind to "
179 "secondary interface.\n");
185 * JMicron chips need a bit of a nudge to enable the power
188 ret
= jmicron_pmos(chip
, 1);
190 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
197 static void jmicron_enable_mmc(struct sdhci_host
*host
, int on
)
201 scratch
= readb(host
->ioaddr
+ 0xC0);
208 writeb(scratch
, host
->ioaddr
+ 0xC0);
211 static int jmicron_probe_slot(struct sdhci_pci_slot
*slot
)
213 if (slot
->chip
->pdev
->revision
== 0) {
216 version
= readl(slot
->host
->ioaddr
+ SDHCI_HOST_VERSION
);
217 version
= (version
& SDHCI_VENDOR_VER_MASK
) >>
218 SDHCI_VENDOR_VER_SHIFT
;
221 * Older versions of the chip have lots of nasty glitches
222 * in the ADMA engine. It's best just to avoid it
226 slot
->host
->quirks
|= SDHCI_QUIRK_BROKEN_ADMA
;
230 * The secondary interface requires a bit set to get the
233 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
)
234 jmicron_enable_mmc(slot
->host
, 1);
239 static void jmicron_remove_slot(struct sdhci_pci_slot
*slot
, int dead
)
244 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
)
245 jmicron_enable_mmc(slot
->host
, 0);
248 static int jmicron_suspend(struct sdhci_pci_chip
*chip
, pm_message_t state
)
252 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
) {
253 for (i
= 0;i
< chip
->num_slots
;i
++)
254 jmicron_enable_mmc(chip
->slots
[i
]->host
, 0);
260 static int jmicron_resume(struct sdhci_pci_chip
*chip
)
264 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
) {
265 for (i
= 0;i
< chip
->num_slots
;i
++)
266 jmicron_enable_mmc(chip
->slots
[i
]->host
, 1);
269 ret
= jmicron_pmos(chip
, 1);
271 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
278 static const struct sdhci_pci_fixes sdhci_jmicron
= {
279 .probe
= jmicron_probe
,
281 .probe_slot
= jmicron_probe_slot
,
282 .remove_slot
= jmicron_remove_slot
,
284 .suspend
= jmicron_suspend
,
285 .resume
= jmicron_resume
,
288 /* SysKonnect CardBus2SDIO extra registers */
289 #define SYSKT_CTRL 0x200
290 #define SYSKT_RDFIFO_STAT 0x204
291 #define SYSKT_WRFIFO_STAT 0x208
292 #define SYSKT_POWER_DATA 0x20c
293 #define SYSKT_POWER_330 0xef
294 #define SYSKT_POWER_300 0xf8
295 #define SYSKT_POWER_184 0xcc
296 #define SYSKT_POWER_CMD 0x20d
297 #define SYSKT_POWER_START (1 << 7)
298 #define SYSKT_POWER_STATUS 0x20e
299 #define SYSKT_POWER_STATUS_OK (1 << 0)
300 #define SYSKT_BOARD_REV 0x210
301 #define SYSKT_CHIP_REV 0x211
302 #define SYSKT_CONF_DATA 0x212
303 #define SYSKT_CONF_DATA_1V8 (1 << 2)
304 #define SYSKT_CONF_DATA_2V5 (1 << 1)
305 #define SYSKT_CONF_DATA_3V3 (1 << 0)
307 static int syskt_probe(struct sdhci_pci_chip
*chip
)
309 if ((chip
->pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
310 chip
->pdev
->class &= ~0x0000FF;
311 chip
->pdev
->class |= PCI_SDHCI_IFDMA
;
316 static int syskt_probe_slot(struct sdhci_pci_slot
*slot
)
320 u8 board_rev
= readb(slot
->host
->ioaddr
+ SYSKT_BOARD_REV
);
321 u8 chip_rev
= readb(slot
->host
->ioaddr
+ SYSKT_CHIP_REV
);
322 dev_info(&slot
->chip
->pdev
->dev
, "SysKonnect CardBus2SDIO, "
323 "board rev %d.%d, chip rev %d.%d\n",
324 board_rev
>> 4, board_rev
& 0xf,
325 chip_rev
>> 4, chip_rev
& 0xf);
326 if (chip_rev
>= 0x20)
327 slot
->host
->quirks
|= SDHCI_QUIRK_FORCE_DMA
;
329 writeb(SYSKT_POWER_330
, slot
->host
->ioaddr
+ SYSKT_POWER_DATA
);
330 writeb(SYSKT_POWER_START
, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
332 tm
= 10; /* Wait max 1 ms */
334 ps
= readw(slot
->host
->ioaddr
+ SYSKT_POWER_STATUS
);
335 if (ps
& SYSKT_POWER_STATUS_OK
)
340 dev_err(&slot
->chip
->pdev
->dev
,
341 "power regulator never stabilized");
342 writeb(0, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
349 static const struct sdhci_pci_fixes sdhci_syskt
= {
350 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
,
351 .probe
= syskt_probe
,
352 .probe_slot
= syskt_probe_slot
,
355 static int via_probe(struct sdhci_pci_chip
*chip
)
357 if (chip
->pdev
->revision
== 0x10)
358 chip
->quirks
|= SDHCI_QUIRK_DELAY_AFTER_POWER
;
363 static const struct sdhci_pci_fixes sdhci_via
= {
367 static const struct pci_device_id pci_ids
[] __devinitdata
= {
369 .vendor
= PCI_VENDOR_ID_RICOH
,
370 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
371 .subvendor
= PCI_ANY_ID
,
372 .subdevice
= PCI_ANY_ID
,
373 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh
,
377 .vendor
= PCI_VENDOR_ID_ENE
,
378 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
379 .subvendor
= PCI_ANY_ID
,
380 .subdevice
= PCI_ANY_ID
,
381 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
385 .vendor
= PCI_VENDOR_ID_ENE
,
386 .device
= PCI_DEVICE_ID_ENE_CB712_SD_2
,
387 .subvendor
= PCI_ANY_ID
,
388 .subdevice
= PCI_ANY_ID
,
389 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
393 .vendor
= PCI_VENDOR_ID_ENE
,
394 .device
= PCI_DEVICE_ID_ENE_CB714_SD
,
395 .subvendor
= PCI_ANY_ID
,
396 .subdevice
= PCI_ANY_ID
,
397 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
401 .vendor
= PCI_VENDOR_ID_ENE
,
402 .device
= PCI_DEVICE_ID_ENE_CB714_SD_2
,
403 .subvendor
= PCI_ANY_ID
,
404 .subdevice
= PCI_ANY_ID
,
405 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
409 .vendor
= PCI_VENDOR_ID_MARVELL
,
410 .device
= PCI_DEVICE_ID_MARVELL_88ALP01_SD
,
411 .subvendor
= PCI_ANY_ID
,
412 .subdevice
= PCI_ANY_ID
,
413 .driver_data
= (kernel_ulong_t
)&sdhci_cafe
,
417 .vendor
= PCI_VENDOR_ID_JMICRON
,
418 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_SD
,
419 .subvendor
= PCI_ANY_ID
,
420 .subdevice
= PCI_ANY_ID
,
421 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
425 .vendor
= PCI_VENDOR_ID_JMICRON
,
426 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
,
427 .subvendor
= PCI_ANY_ID
,
428 .subdevice
= PCI_ANY_ID
,
429 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
433 .vendor
= PCI_VENDOR_ID_SYSKONNECT
,
435 .subvendor
= PCI_ANY_ID
,
436 .subdevice
= PCI_ANY_ID
,
437 .driver_data
= (kernel_ulong_t
)&sdhci_syskt
,
441 .vendor
= PCI_VENDOR_ID_VIA
,
443 .subvendor
= PCI_ANY_ID
,
444 .subdevice
= PCI_ANY_ID
,
445 .driver_data
= (kernel_ulong_t
)&sdhci_via
,
448 { /* Generic SD host controller */
449 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
452 { /* end: all zeroes */ },
455 MODULE_DEVICE_TABLE(pci
, pci_ids
);
457 /*****************************************************************************\
459 * SDHCI core callbacks *
461 \*****************************************************************************/
463 static int sdhci_pci_enable_dma(struct sdhci_host
*host
)
465 struct sdhci_pci_slot
*slot
;
466 struct pci_dev
*pdev
;
469 slot
= sdhci_priv(host
);
470 pdev
= slot
->chip
->pdev
;
472 if (((pdev
->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI
<< 8)) &&
473 ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
) &&
474 (host
->flags
& SDHCI_USE_SDMA
)) {
475 dev_warn(&pdev
->dev
, "Will use DMA mode even though HW "
476 "doesn't fully claim to support it.\n");
479 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
483 pci_set_master(pdev
);
488 static struct sdhci_ops sdhci_pci_ops
= {
489 .enable_dma
= sdhci_pci_enable_dma
,
492 /*****************************************************************************\
496 \*****************************************************************************/
500 static int sdhci_pci_suspend (struct pci_dev
*pdev
, pm_message_t state
)
502 struct sdhci_pci_chip
*chip
;
503 struct sdhci_pci_slot
*slot
;
504 mmc_pm_flag_t pm_flags
= 0;
507 chip
= pci_get_drvdata(pdev
);
511 for (i
= 0;i
< chip
->num_slots
;i
++) {
512 slot
= chip
->slots
[i
];
516 ret
= sdhci_suspend_host(slot
->host
, state
);
520 sdhci_resume_host(chip
->slots
[i
]->host
);
524 pm_flags
|= slot
->host
->mmc
->pm_flags
;
527 if (chip
->fixes
&& chip
->fixes
->suspend
) {
528 ret
= chip
->fixes
->suspend(chip
, state
);
530 for (i
= chip
->num_slots
- 1;i
>= 0;i
--)
531 sdhci_resume_host(chip
->slots
[i
]->host
);
536 pci_save_state(pdev
);
537 if (pm_flags
& MMC_PM_KEEP_POWER
) {
538 if (pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
539 pci_enable_wake(pdev
, PCI_D3hot
, 1);
540 pci_set_power_state(pdev
, PCI_D3hot
);
542 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
543 pci_disable_device(pdev
);
544 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
550 static int sdhci_pci_resume (struct pci_dev
*pdev
)
552 struct sdhci_pci_chip
*chip
;
553 struct sdhci_pci_slot
*slot
;
556 chip
= pci_get_drvdata(pdev
);
560 pci_set_power_state(pdev
, PCI_D0
);
561 pci_restore_state(pdev
);
562 ret
= pci_enable_device(pdev
);
566 if (chip
->fixes
&& chip
->fixes
->resume
) {
567 ret
= chip
->fixes
->resume(chip
);
572 for (i
= 0;i
< chip
->num_slots
;i
++) {
573 slot
= chip
->slots
[i
];
577 ret
= sdhci_resume_host(slot
->host
);
585 #else /* CONFIG_PM */
587 #define sdhci_pci_suspend NULL
588 #define sdhci_pci_resume NULL
590 #endif /* CONFIG_PM */
592 /*****************************************************************************\
594 * Device probing/removal *
596 \*****************************************************************************/
598 static struct sdhci_pci_slot
* __devinit
sdhci_pci_probe_slot(
599 struct pci_dev
*pdev
, struct sdhci_pci_chip
*chip
, int bar
)
601 struct sdhci_pci_slot
*slot
;
602 struct sdhci_host
*host
;
604 resource_size_t addr
;
608 if (!(pci_resource_flags(pdev
, bar
) & IORESOURCE_MEM
)) {
609 dev_err(&pdev
->dev
, "BAR %d is not iomem. Aborting.\n", bar
);
610 return ERR_PTR(-ENODEV
);
613 if (pci_resource_len(pdev
, bar
) != 0x100) {
614 dev_err(&pdev
->dev
, "Invalid iomem size. You may "
615 "experience problems.\n");
618 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
619 dev_err(&pdev
->dev
, "Vendor specific interface. Aborting.\n");
620 return ERR_PTR(-ENODEV
);
623 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
624 dev_err(&pdev
->dev
, "Unknown interface. Aborting.\n");
625 return ERR_PTR(-ENODEV
);
628 host
= sdhci_alloc_host(&pdev
->dev
, sizeof(struct sdhci_pci_slot
));
630 dev_err(&pdev
->dev
, "cannot allocate host\n");
631 return ERR_CAST(host
);
634 slot
= sdhci_priv(host
);
640 host
->hw_name
= "PCI";
641 host
->ops
= &sdhci_pci_ops
;
642 host
->quirks
= chip
->quirks
;
644 host
->irq
= pdev
->irq
;
646 ret
= pci_request_region(pdev
, bar
, mmc_hostname(host
->mmc
));
648 dev_err(&pdev
->dev
, "cannot request region\n");
652 addr
= pci_resource_start(pdev
, bar
);
653 host
->ioaddr
= pci_ioremap_bar(pdev
, bar
);
655 dev_err(&pdev
->dev
, "failed to remap registers\n");
659 if (chip
->fixes
&& chip
->fixes
->probe_slot
) {
660 ret
= chip
->fixes
->probe_slot(slot
);
665 host
->mmc
->pm_caps
= MMC_PM_KEEP_POWER
| MMC_PM_WAKE_SDIO_IRQ
;
667 ret
= sdhci_add_host(host
);
674 if (chip
->fixes
&& chip
->fixes
->remove_slot
)
675 chip
->fixes
->remove_slot(slot
, 0);
678 iounmap(host
->ioaddr
);
681 pci_release_region(pdev
, bar
);
684 sdhci_free_host(host
);
689 static void sdhci_pci_remove_slot(struct sdhci_pci_slot
*slot
)
695 scratch
= readl(slot
->host
->ioaddr
+ SDHCI_INT_STATUS
);
696 if (scratch
== (u32
)-1)
699 sdhci_remove_host(slot
->host
, dead
);
701 if (slot
->chip
->fixes
&& slot
->chip
->fixes
->remove_slot
)
702 slot
->chip
->fixes
->remove_slot(slot
, dead
);
704 pci_release_region(slot
->chip
->pdev
, slot
->pci_bar
);
706 sdhci_free_host(slot
->host
);
709 static int __devinit
sdhci_pci_probe(struct pci_dev
*pdev
,
710 const struct pci_device_id
*ent
)
712 struct sdhci_pci_chip
*chip
;
713 struct sdhci_pci_slot
*slot
;
715 u8 slots
, rev
, first_bar
;
718 BUG_ON(pdev
== NULL
);
721 pci_read_config_byte(pdev
, PCI_CLASS_REVISION
, &rev
);
723 dev_info(&pdev
->dev
, "SDHCI controller found [%04x:%04x] (rev %x)\n",
724 (int)pdev
->vendor
, (int)pdev
->device
, (int)rev
);
726 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
730 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
731 dev_dbg(&pdev
->dev
, "found %d slot(s)\n", slots
);
735 BUG_ON(slots
> MAX_SLOTS
);
737 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
741 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
744 dev_err(&pdev
->dev
, "Invalid first BAR. Aborting.\n");
748 ret
= pci_enable_device(pdev
);
752 chip
= kzalloc(sizeof(struct sdhci_pci_chip
), GFP_KERNEL
);
759 chip
->fixes
= (const struct sdhci_pci_fixes
*)ent
->driver_data
;
761 chip
->quirks
= chip
->fixes
->quirks
;
762 chip
->num_slots
= slots
;
764 pci_set_drvdata(pdev
, chip
);
766 if (chip
->fixes
&& chip
->fixes
->probe
) {
767 ret
= chip
->fixes
->probe(chip
);
772 for (i
= 0;i
< slots
;i
++) {
773 slot
= sdhci_pci_probe_slot(pdev
, chip
, first_bar
+ i
);
776 sdhci_pci_remove_slot(chip
->slots
[i
]);
781 chip
->slots
[i
] = slot
;
787 pci_set_drvdata(pdev
, NULL
);
791 pci_disable_device(pdev
);
795 static void __devexit
sdhci_pci_remove(struct pci_dev
*pdev
)
798 struct sdhci_pci_chip
*chip
;
800 chip
= pci_get_drvdata(pdev
);
803 for (i
= 0;i
< chip
->num_slots
; i
++)
804 sdhci_pci_remove_slot(chip
->slots
[i
]);
806 pci_set_drvdata(pdev
, NULL
);
810 pci_disable_device(pdev
);
813 static struct pci_driver sdhci_driver
= {
816 .probe
= sdhci_pci_probe
,
817 .remove
= __devexit_p(sdhci_pci_remove
),
818 .suspend
= sdhci_pci_suspend
,
819 .resume
= sdhci_pci_resume
,
822 /*****************************************************************************\
826 \*****************************************************************************/
828 static int __init
sdhci_drv_init(void)
830 return pci_register_driver(&sdhci_driver
);
833 static void __exit
sdhci_drv_exit(void)
835 pci_unregister_driver(&sdhci_driver
);
838 module_init(sdhci_drv_init
);
839 module_exit(sdhci_drv_exit
);
841 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
842 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
843 MODULE_LICENSE("GPL");