arch/powerpc/platforms/85xx/mpc85xx_ads.c

   1 /*
   2  * MPC85xx setup and early boot code plus other random bits.
   3  *
   4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5  *
   6  * Copyright 2005 Freescale Semiconductor Inc.
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  */
  13
  14 #include <linux/stddef.h>
  15 #include <linux/kernel.h>
  16 #include <linux/pci.h>
  17 #include <linux/kdev_t.h>
  18 #include <linux/delay.h>
  19 #include <linux/seq_file.h>
  20 #include <linux/of_platform.h>
  21
  22 #include <asm/system.h>
  23 #include <asm/time.h>
  24 #include <asm/machdep.h>
  25 #include <asm/pci-bridge.h>
  26 #include <asm/mpic.h>
  27 #include <mm/mmu_decl.h>
  28 #include <asm/udbg.h>
  29
  30 #include <sysdev/fsl_soc.h>
  31 #include <sysdev/fsl_pci.h>
  32
  33 #ifdef CONFIG_CPM2
  34 #include <asm/cpm2.h>
  35 #include <sysdev/cpm2_pic.h>
  36 #endif
  37
  38 #ifdef CONFIG_PCI
  39 static int mpc85xx_exclude_device(struct pci_controller *hose,
  40                                    u_char bus, u_char devfn)
  41 {
  42         if (bus == 0 && PCI_SLOT(devfn) == 0)
  43                 return PCIBIOS_DEVICE_NOT_FOUND;
  44         else
  45                 return PCIBIOS_SUCCESSFUL;
  46 }
  47 #endif /* CONFIG_PCI */
  48
  49 #ifdef CONFIG_CPM2
  50
  51 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
  52 {
  53         struct irq_chip *chip = irq_desc_get_chip(desc);
  54         int cascade_irq;
  55
  56         while ((cascade_irq = cpm2_get_irq()) >= 0)
  57                 generic_handle_irq(cascade_irq);
  58
  59         chip->irq_eoi(&desc->irq_data);
  60 }
  61
  62 #endif /* CONFIG_CPM2 */
  63
  64 static void __init mpc85xx_ads_pic_init(void)
  65 {
  66         struct mpic *mpic;
  67         struct resource r;
  68         struct device_node *np = NULL;
  69 #ifdef CONFIG_CPM2
  70         int irq;
  71 #endif
  72
  73         np = of_find_node_by_type(np, "open-pic");
  74         if (!np) {
  75                 printk(KERN_ERR "Could not find open-pic node\n");
  76                 return;
  77         }
  78
  79         if (of_address_to_resource(np, 0, &r)) {
  80                 printk(KERN_ERR "Could not map mpic register space\n");
  81                 of_node_put(np);
  82                 return;
  83         }
  84
  85         mpic = mpic_alloc(np, r.start,
  86                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  87                         0, 256, " OpenPIC  ");
  88         BUG_ON(mpic == NULL);
  89         of_node_put(np);
  90
  91         mpic_init(mpic);
  92
  93 #ifdef CONFIG_CPM2
  94         /* Setup CPM2 PIC */
  95         np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
  96         if (np == NULL) {
  97                 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  98                 return;
  99         }
 100         irq = irq_of_parse_and_map(np, 0);
 101
 102         cpm2_pic_init(np);
 103         of_node_put(np);
 104         irq_set_chained_handler(irq, cpm2_cascade);
 105 #endif
 106 }
 107
 108 /*
 109  * Setup the architecture
 110  */
 111 #ifdef CONFIG_CPM2
 112 struct cpm_pin {
 113         int port, pin, flags;
 114 };
 115
 116 static const struct cpm_pin mpc8560_ads_pins[] = {
 117         /* SCC1 */
 118         {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 119         {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 120         {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 121
 122         /* SCC2 */
 123         {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 124         {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 125         {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 126         {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 127         {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 128
 129         /* FCC2 */
 130         {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 131         {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 132         {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 133         {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 134         {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 135         {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 136         {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 137         {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 138         {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 139         {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 140         {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 141         {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
 142         {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 143         {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 144         {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
 145         {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
 146
 147         /* FCC3 */
 148         {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 149         {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 150         {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 151         {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 152         {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 153         {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 154         {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 155         {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 156         {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 157         {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 158         {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 159         {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 160         {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
 161         {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
 162         {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
 163         {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
 164 };
 165
 166 static void __init init_ioports(void)
 167 {
 168         int i;
 169
 170         for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
 171                 const struct cpm_pin *pin = &mpc8560_ads_pins[i];
 172                 cpm2_set_pin(pin->port, pin->pin, pin->flags);
 173         }
 174
 175         cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
 176         cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
 177         cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
 178         cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
 179         cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
 180         cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
 181         cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
 182         cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
 183 }
 184 #endif
 185
 186 static void __init mpc85xx_ads_setup_arch(void)
 187 {
 188 #ifdef CONFIG_PCI
 189         struct device_node *np;
 190 #endif
 191
 192         if (ppc_md.progress)
 193                 ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
 194
 195 #ifdef CONFIG_CPM2
 196         cpm2_reset();
 197         init_ioports();
 198 #endif
 199
 200 #ifdef CONFIG_PCI
 201         for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
 202                 fsl_add_bridge(np, 1);
 203
 204         ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 205 #endif
 206 }
 207
 208 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
 209 {
 210         uint pvid, svid, phid1;
 211
 212         pvid = mfspr(SPRN_PVR);
 213         svid = mfspr(SPRN_SVR);
 214
 215         seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
 216         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 217         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 218
 219         /* Display cpu Pll setting */
 220         phid1 = mfspr(SPRN_HID1);
 221         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 222 }
 223
 224 static struct of_device_id __initdata of_bus_ids[] = {
 225         { .name = "soc", },
 226         { .type = "soc", },
 227         { .name = "cpm", },
 228         { .name = "localbus", },
 229         { .compatible = "simple-bus", },
 230         { .compatible = "gianfar", },
 231         {},
 232 };
 233
 234 static int __init declare_of_platform_devices(void)
 235 {
 236         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 237
 238         return 0;
 239 }
 240 machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
 241
 242 /*
 243  * Called very early, device-tree isn't unflattened
 244  */
 245 static int __init mpc85xx_ads_probe(void)
 246 {
 247         unsigned long root = of_get_flat_dt_root();
 248
 249         return of_flat_dt_is_compatible(root, "MPC85xxADS");
 250 }
 251
 252 define_machine(mpc85xx_ads) {
 253         .name                   = "MPC85xx ADS",
 254         .probe                  = mpc85xx_ads_probe,
 255         .setup_arch             = mpc85xx_ads_setup_arch,
 256         .init_IRQ               = mpc85xx_ads_pic_init,
 257         .show_cpuinfo           = mpc85xx_ads_show_cpuinfo,
 258         .get_irq                = mpic_get_irq,
 259         .restart                = fsl_rstcr_restart,
 260         .calibrate_decr         = generic_calibrate_decr,
 261         .progress               = udbg_progress,
 262 };