arch/powerpc/platforms/85xx/stx_gp3.c

   1 /*
   2  * Based on MPC8560 ADS and arch/ppc stx_gp3 ports
   3  *
   4  * Maintained by Kumar Gala (see MAINTAINERS for contact information)
   5  *
   6  * Copyright 2008 Freescale Semiconductor Inc.
   7  *
   8  * Dan Malek <dan@embeddededge.com>
   9  * Copyright 2004 Embedded Edge, LLC
  10  *
  11  * Copied from mpc8560_ads.c
  12  * Copyright 2002, 2003 Motorola Inc.
  13  *
  14  * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
  15  * Copyright 2004-2005 MontaVista Software, Inc.
  16  *
  17  * This program is free software; you can redistribute  it and/or modify it
  18  * under  the terms of  the GNU General  Public License as published by the
  19  * Free Software Foundation;  either version 2 of the  License, or (at your
  20  * option) any later version.
  21  */
  22
  23 #include <linux/stddef.h>
  24 #include <linux/kernel.h>
  25 #include <linux/pci.h>
  26 #include <linux/kdev_t.h>
  27 #include <linux/delay.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/of_platform.h>
  30
  31 #include <asm/system.h>
  32 #include <asm/time.h>
  33 #include <asm/machdep.h>
  34 #include <asm/pci-bridge.h>
  35 #include <asm/mpic.h>
  36 #include <asm/prom.h>
  37 #include <mm/mmu_decl.h>
  38 #include <asm/udbg.h>
  39
  40 #include <sysdev/fsl_soc.h>
  41 #include <sysdev/fsl_pci.h>
  42
  43 #ifdef CONFIG_CPM2
  44 #include <asm/cpm2.h>
  45 #include <sysdev/cpm2_pic.h>
  46
  47 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
  48 {
  49         struct irq_chip *chip = irq_desc_get_chip(desc);
  50         int cascade_irq;
  51
  52         while ((cascade_irq = cpm2_get_irq()) >= 0)
  53                 generic_handle_irq(cascade_irq);
  54
  55         chip->irq_eoi(&desc->irq_data);
  56 }
  57 #endif /* CONFIG_CPM2 */
  58
  59 static void __init stx_gp3_pic_init(void)
  60 {
  61         struct mpic *mpic;
  62         struct resource r;
  63         struct device_node *np;
  64 #ifdef CONFIG_CPM2
  65         int irq;
  66 #endif
  67
  68         np = of_find_node_by_type(NULL, "open-pic");
  69         if (!np) {
  70                 printk(KERN_ERR "Could not find open-pic node\n");
  71                 return;
  72         }
  73
  74         if (of_address_to_resource(np, 0, &r)) {
  75                 printk(KERN_ERR "Could not map mpic register space\n");
  76                 of_node_put(np);
  77                 return;
  78         }
  79
  80         mpic = mpic_alloc(np, r.start,
  81                         MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  82                         0, 256, " OpenPIC  ");
  83         BUG_ON(mpic == NULL);
  84         of_node_put(np);
  85
  86         mpic_init(mpic);
  87
  88 #ifdef CONFIG_CPM2
  89         /* Setup CPM2 PIC */
  90         np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
  91         if (np == NULL) {
  92                 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  93                 return;
  94         }
  95         irq = irq_of_parse_and_map(np, 0);
  96
  97         if (irq == NO_IRQ) {
  98                 of_node_put(np);
  99                 printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
 100                 return;
 101         }
 102
 103         cpm2_pic_init(np);
 104         of_node_put(np);
 105         irq_set_chained_handler(irq, cpm2_cascade);
 106 #endif
 107 }
 108
 109 /*
 110  * Setup the architecture
 111  */
 112 static void __init stx_gp3_setup_arch(void)
 113 {
 114 #ifdef CONFIG_PCI
 115         struct device_node *np;
 116 #endif
 117
 118         if (ppc_md.progress)
 119                 ppc_md.progress("stx_gp3_setup_arch()", 0);
 120
 121 #ifdef CONFIG_CPM2
 122         cpm2_reset();
 123 #endif
 124
 125 #ifdef CONFIG_PCI
 126         for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
 127                 fsl_add_bridge(np, 1);
 128 #endif
 129 }
 130
 131 static void stx_gp3_show_cpuinfo(struct seq_file *m)
 132 {
 133         uint pvid, svid, phid1;
 134
 135         pvid = mfspr(SPRN_PVR);
 136         svid = mfspr(SPRN_SVR);
 137
 138         seq_printf(m, "Vendor\t\t: RPC Electronics STx\n");
 139         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 140         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 141
 142         /* Display cpu Pll setting */
 143         phid1 = mfspr(SPRN_HID1);
 144         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 145 }
 146
 147 static struct of_device_id __initdata of_bus_ids[] = {
 148         { .compatible = "simple-bus", },
 149         { .compatible = "gianfar", },
 150         {},
 151 };
 152
 153 static int __init declare_of_platform_devices(void)
 154 {
 155         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 156
 157         return 0;
 158 }
 159 machine_device_initcall(stx_gp3, declare_of_platform_devices);
 160
 161 /*
 162  * Called very early, device-tree isn't unflattened
 163  */
 164 static int __init stx_gp3_probe(void)
 165 {
 166         unsigned long root = of_get_flat_dt_root();
 167
 168         return of_flat_dt_is_compatible(root, "stx,gp3-8560");
 169 }
 170
 171 define_machine(stx_gp3) {
 172         .name                   = "STX GP3",
 173         .probe                  = stx_gp3_probe,
 174         .setup_arch             = stx_gp3_setup_arch,
 175         .init_IRQ               = stx_gp3_pic_init,
 176         .show_cpuinfo           = stx_gp3_show_cpuinfo,
 177         .get_irq                = mpic_get_irq,
 178         .restart                = fsl_rstcr_restart,
 179         .calibrate_decr         = generic_calibrate_decr,
 180         .progress               = udbg_progress,
 181 };