staging: brcm80211: removed unneeded call to brcms_b_tx_fifo_suspended
[zen-stable.git] / drivers / staging / brcm80211 / brcmsmac / main.c
blob175d85ea429136ae673ee130dfb4599e666ae060
1 /*
2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/pci_ids.h>
18 #include <linux/if_ether.h>
19 #include <net/mac80211.h>
20 #include <brcm_hw_ids.h>
21 #include <aiutils.h>
22 #include <chipcommon.h>
23 #include "rate.h"
24 #include "scb.h"
25 #include "phy/phy_hal.h"
26 #include "channel.h"
27 #include "antsel.h"
28 #include "stf.h"
29 #include "ampdu.h"
30 #include "mac80211_if.h"
31 #include "ucode_loader.h"
32 #include "main.h"
35 * Indication for txflowcontrol that all priority bits in
36 * TXQ_STOP_FOR_PRIOFC_MASK are to be considered.
38 #define ALLPRIO -1
41 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
43 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
45 /* watchdog timer, in unit of ms */
46 #define TIMER_INTERVAL_WATCHDOG 1000
47 /* radio monitor timer, in unit of ms */
48 #define TIMER_INTERVAL_RADIOCHK 800
50 /* Max MPC timeout, in unit of watchdog */
51 #ifndef BRCMS_MPC_MAX_DELAYCNT
52 #define BRCMS_MPC_MAX_DELAYCNT 10
53 #endif
55 /* Min MPC timeout, in unit of watchdog */
56 #define BRCMS_MPC_MIN_DELAYCNT 1
57 #define BRCMS_MPC_THRESHOLD 3 /* MPC count threshold level */
59 /* beacon interval, in unit of 1024TU */
60 #define BEACON_INTERVAL_DEFAULT 100
61 /* DTIM interval, in unit of beacon interval */
62 #define DTIM_INTERVAL_DEFAULT 3
64 /* Scale down delays to accommodate QT slow speed */
65 /* beacon interval, in unit of 1024TU */
66 #define BEACON_INTERVAL_DEF_QT 20
67 /* DTIM interval, in unit of beacon interval */
68 #define DTIM_INTERVAL_DEF_QT 1
70 #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */
72 /* n-mode support capability */
73 /* 2x2 includes both 1x1 & 2x2 devices
74 * reserved #define 2 for future when we want to separate 1x1 & 2x2 and
75 * control it independently
77 #define WL_11N_2x2 1
78 #define WL_11N_3x3 3
79 #define WL_11N_4x4 4
81 /* define 11n feature disable flags */
82 #define WLFEATURE_DISABLE_11N 0x00000001
83 #define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002
84 #define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004
85 #define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008
86 #define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010
87 #define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020
88 #define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040
89 #define WLFEATURE_DISABLE_11N_GF 0x00000080
91 #define EDCF_ACI_MASK 0x60
92 #define EDCF_ACI_SHIFT 5
93 #define EDCF_ECWMIN_MASK 0x0f
94 #define EDCF_ECWMAX_SHIFT 4
95 #define EDCF_AIFSN_MASK 0x0f
96 #define EDCF_AIFSN_MAX 15
97 #define EDCF_ECWMAX_MASK 0xf0
99 #define EDCF_AC_BE_TXOP_STA 0x0000
100 #define EDCF_AC_BK_TXOP_STA 0x0000
101 #define EDCF_AC_VO_ACI_STA 0x62
102 #define EDCF_AC_VO_ECW_STA 0x32
103 #define EDCF_AC_VI_ACI_STA 0x42
104 #define EDCF_AC_VI_ECW_STA 0x43
105 #define EDCF_AC_BK_ECW_STA 0xA4
106 #define EDCF_AC_VI_TXOP_STA 0x005e
107 #define EDCF_AC_VO_TXOP_STA 0x002f
108 #define EDCF_AC_BE_ACI_STA 0x03
109 #define EDCF_AC_BE_ECW_STA 0xA4
110 #define EDCF_AC_BK_ACI_STA 0x27
111 #define EDCF_AC_VO_TXOP_AP 0x002f
113 #define EDCF_TXOP2USEC(txop) ((txop) << 5)
114 #define EDCF_ECW2CW(exp) ((1 << (exp)) - 1)
116 #define APHY_SYMBOL_TIME 4
117 #define APHY_PREAMBLE_TIME 16
118 #define APHY_SIGNAL_TIME 4
119 #define APHY_SIFS_TIME 16
120 #define APHY_SERVICE_NBITS 16
121 #define APHY_TAIL_NBITS 6
122 #define BPHY_SIFS_TIME 10
123 #define BPHY_PLCP_SHORT_TIME 96
125 #define PREN_PREAMBLE 24
126 #define PREN_MM_EXT 12
127 #define PREN_PREAMBLE_EXT 4
129 #define DOT11_MAC_HDR_LEN 24
130 #define DOT11_ACK_LEN 10
131 #define DOT11_BA_LEN 4
132 #define DOT11_OFDM_SIGNAL_EXTENSION 6
133 #define DOT11_MIN_FRAG_LEN 256
134 #define DOT11_RTS_LEN 16
135 #define DOT11_CTS_LEN 10
136 #define DOT11_BA_BITMAP_LEN 128
137 #define DOT11_MIN_BEACON_PERIOD 1
138 #define DOT11_MAX_BEACON_PERIOD 0xFFFF
139 #define DOT11_MAXNUMFRAGS 16
140 #define DOT11_MAX_FRAG_LEN 2346
142 #define BPHY_PLCP_TIME 192
143 #define RIFS_11N_TIME 2
145 #define WME_VER 1
146 #define WME_SUBTYPE_PARAM_IE 1
147 #define WME_TYPE 2
148 #define WME_OUI "\x00\x50\xf2"
150 #define AC_BE 0
151 #define AC_BK 1
152 #define AC_VI 2
153 #define AC_VO 3
155 #define BCN_TMPL_LEN 512 /* length of the BCN template area */
157 /* brcms_bss_info flag bit values */
158 #define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */
160 /* Flags used in brcms_c_txq_info.stopped */
161 /* per prio flow control bits */
162 #define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF
163 /* stop txq enqueue for packet drain */
164 #define TXQ_STOP_FOR_PKT_DRAIN 0x00000100
165 /* stop txq enqueue for ampdu flow control */
166 #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200
168 #define BRCMS_HWRXOFF 38 /* chip rx buffer offset */
170 /* Find basic rate for a given rate */
171 static u8 brcms_basic_rate(struct brcms_c_info *wlc, u32 rspec)
173 if (is_mcs_rate(rspec))
174 return wlc->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK]
175 .leg_ofdm];
176 return wlc->band->basic_rate[rspec & RSPEC_RATE_MASK];
179 static u16 frametype(u32 rspec, u8 mimoframe)
181 if (is_mcs_rate(rspec))
182 return mimoframe;
183 return is_cck_rate(rspec) ? FT_CCK : FT_OFDM;
186 /* rfdisable delay timer 500 ms, runs of ALP clock */
187 #define RFDISABLE_DEFAULT 10000000
189 #define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */
191 /* precedences numbers for wlc queues. These are twice as may levels as
192 * 802.1D priorities.
193 * Odd numbers are used for HI priority traffic at same precedence levels
194 * These constants are used ONLY by wlc_prio2prec_map. Do not use them
195 * elsewhere.
197 #define _BRCMS_PREC_NONE 0 /* None = - */
198 #define _BRCMS_PREC_BK 2 /* BK - Background */
199 #define _BRCMS_PREC_BE 4 /* BE - Best-effort */
200 #define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */
201 #define _BRCMS_PREC_CL 8 /* CL - Controlled Load */
202 #define _BRCMS_PREC_VI 10 /* Vi - Video */
203 #define _BRCMS_PREC_VO 12 /* Vo - Voice */
204 #define _BRCMS_PREC_NC 14 /* NC - Network Control */
206 /* The BSS is generating beacons in HW */
207 #define BRCMS_BSSCFG_HW_BCN 0x20
209 #define SYNTHPU_DLY_APHY_US 3700 /* a phy synthpu_dly time in us */
210 #define SYNTHPU_DLY_BPHY_US 1050 /* b/g phy synthpu_dly time in us */
211 #define SYNTHPU_DLY_NPHY_US 2048 /* n phy REV3 synthpu_dly time in us */
212 #define SYNTHPU_DLY_LPPHY_US 300 /* lpphy synthpu_dly time in us */
214 #define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */
216 #define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */
218 /* Per-AC retry limit register definitions; uses defs.h bitfield macros */
219 #define EDCF_SHORT_S 0
220 #define EDCF_SFB_S 4
221 #define EDCF_LONG_S 8
222 #define EDCF_LFB_S 12
223 #define EDCF_SHORT_M BITFIELD_MASK(4)
224 #define EDCF_SFB_M BITFIELD_MASK(4)
225 #define EDCF_LONG_M BITFIELD_MASK(4)
226 #define EDCF_LFB_M BITFIELD_MASK(4)
228 #define RETRY_SHORT_DEF 7 /* Default Short retry Limit */
229 #define RETRY_SHORT_MAX 255 /* Maximum Short retry Limit */
230 #define RETRY_LONG_DEF 4 /* Default Long retry count */
231 #define RETRY_SHORT_FB 3 /* Short count for fallback rate */
232 #define RETRY_LONG_FB 2 /* Long count for fallback rate */
234 #define APHY_CWMIN 15
235 #define PHY_CWMAX 1023
237 #define EDCF_AIFSN_MIN 1
239 #define FRAGNUM_MASK 0xF
241 #define APHY_SLOT_TIME 9
242 #define BPHY_SLOT_TIME 20
244 #define WL_SPURAVOID_OFF 0
245 #define WL_SPURAVOID_ON1 1
246 #define WL_SPURAVOID_ON2 2
248 /* invalid core flags, use the saved coreflags */
249 #define BRCMS_USE_COREFLAGS 0xffffffff
251 /* values for PLCPHdr_override */
252 #define BRCMS_PLCP_AUTO -1
253 #define BRCMS_PLCP_SHORT 0
254 #define BRCMS_PLCP_LONG 1
256 /* values for g_protection_override and n_protection_override */
257 #define BRCMS_PROTECTION_AUTO -1
258 #define BRCMS_PROTECTION_OFF 0
259 #define BRCMS_PROTECTION_ON 1
260 #define BRCMS_PROTECTION_MMHDR_ONLY 2
261 #define BRCMS_PROTECTION_CTS_ONLY 3
263 /* values for g_protection_control and n_protection_control */
264 #define BRCMS_PROTECTION_CTL_OFF 0
265 #define BRCMS_PROTECTION_CTL_LOCAL 1
266 #define BRCMS_PROTECTION_CTL_OVERLAP 2
268 /* values for n_protection */
269 #define BRCMS_N_PROTECTION_OFF 0
270 #define BRCMS_N_PROTECTION_OPTIONAL 1
271 #define BRCMS_N_PROTECTION_20IN40 2
272 #define BRCMS_N_PROTECTION_MIXEDMODE 3
274 /* values for band specific 40MHz capabilities */
275 #define BRCMS_N_BW_20ALL 0
276 #define BRCMS_N_BW_40ALL 1
277 #define BRCMS_N_BW_20IN2G_40IN5G 2
279 /* bitflags for SGI support (sgi_rx iovar) */
280 #define BRCMS_N_SGI_20 0x01
281 #define BRCMS_N_SGI_40 0x02
283 /* defines used by the nrate iovar */
284 /* MSC in use,indicates b0-6 holds an mcs */
285 #define NRATE_MCS_INUSE 0x00000080
286 /* rate/mcs value */
287 #define NRATE_RATE_MASK 0x0000007f
288 /* stf mode mask: siso, cdd, stbc, sdm */
289 #define NRATE_STF_MASK 0x0000ff00
290 /* stf mode shift */
291 #define NRATE_STF_SHIFT 8
292 /* bit indicates override both rate & mode */
293 #define NRATE_OVERRIDE 0x80000000
294 /* bit indicate to override mcs only */
295 #define NRATE_OVERRIDE_MCS_ONLY 0x40000000
296 #define NRATE_SGI_MASK 0x00800000 /* sgi mode */
297 #define NRATE_SGI_SHIFT 23 /* sgi mode */
298 #define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */
299 #define NRATE_LDPC_SHIFT 22 /* ldpc shift */
301 #define NRATE_STF_SISO 0 /* stf mode SISO */
302 #define NRATE_STF_CDD 1 /* stf mode CDD */
303 #define NRATE_STF_STBC 2 /* stf mode STBC */
304 #define NRATE_STF_SDM 3 /* stf mode SDM */
306 #define MAX_DMA_SEGS 4
308 /* Max # of entries in Tx FIFO based on 4kb page size */
309 #define NTXD 256
310 /* Max # of entries in Rx FIFO based on 4kb page size */
311 #define NRXD 256
313 /* try to keep this # rbufs posted to the chip */
314 #define NRXBUFPOST 32
316 /* data msg txq hiwat mark */
317 #define BRCMS_DATAHIWAT 50
319 /* bounded rx loops */
320 #define RXBND 8 /* max # frames to process in brcms_c_recv() */
321 #define TXSBND 8 /* max # tx status to process in wlc_txstatus() */
324 * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL.
326 #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1)
329 * The following table lists the buffer memory allocated to xmt fifos in HW.
330 * the size is in units of 256bytes(one block), total size is HW dependent
331 * ucode has default fifo partition, sw can overwrite if necessary
333 * This is documented in twiki under the topic UcodeTxFifo. Please ensure
334 * the twiki is updated before making changes.
337 /* Starting corerev for the fifo size table */
338 #define XMTFIFOTBL_STARTREV 20
340 struct d11init {
341 __le16 addr;
342 __le16 size;
343 __le32 value;
346 /* currently the best mechanism for determining SIFS is the band in use */
347 static u16 get_sifs(struct brcms_band *band)
349 return band->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME :
350 BPHY_SIFS_TIME;
355 * Detect Card removed.
356 * Even checking an sbconfig register read will not false trigger when the core
357 * is in reset it breaks CF address mechanism. Accessing gphy phyversion will
358 * cause SB error if aphy is in reset on 4306B0-DB. Need a simple accessible
359 * reg with fixed 0/1 pattern (some platforms return all 0).
360 * If clocks are present, call the sb routine which will figure out if the
361 * device is removed.
363 static bool brcms_deviceremoved(struct brcms_c_info *wlc)
365 if (!wlc->hw->clk)
366 return ai_deviceremoved(wlc->hw->sih);
367 return (R_REG(&wlc->hw->regs->maccontrol) &
368 (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN;
371 /* sum the individual fifo tx pending packet counts */
372 static s16 brcms_txpktpendtot(struct brcms_c_info *wlc)
374 return wlc->core->txpktpend[0] + wlc->core->txpktpend[1] +
375 wlc->core->txpktpend[2] + wlc->core->txpktpend[3];
378 static bool brcms_is_mband_unlocked(struct brcms_c_info *wlc)
380 return wlc->pub->_nbands > 1 && !wlc->bandlocked;
383 static int brcms_chspec_bw(u16 chanspec)
385 if (CHSPEC_IS40(chanspec))
386 return BRCMS_40_MHZ;
387 if (CHSPEC_IS20(chanspec))
388 return BRCMS_20_MHZ;
390 return BRCMS_10_MHZ;
393 /* dup state between BMAC(struct brcms_hardware) and HIGH(struct brcms_c_info)
394 driver */
395 struct brcms_b_state {
396 u32 machwcap; /* mac hw capibility */
397 u32 preamble_ovr; /* preamble override */
400 struct edcf_acparam {
401 u8 ACI;
402 u8 ECW;
403 u16 TXOP;
404 } __packed;
406 const u8 prio2fifo[NUMPRIO] = {
407 TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */
408 TX_AC_BK_FIFO, /* 1 BK AC_BK Background */
409 TX_AC_BK_FIFO, /* 2 -- AC_BK Background */
410 TX_AC_BE_FIFO, /* 3 EE AC_BE Best Effort */
411 TX_AC_VI_FIFO, /* 4 CL AC_VI Video */
412 TX_AC_VI_FIFO, /* 5 VI AC_VI Video */
413 TX_AC_VO_FIFO, /* 6 VO AC_VO Voice */
414 TX_AC_VO_FIFO /* 7 NC AC_VO Voice */
417 /* debug/trace */
418 uint brcm_msg_level =
419 #if defined(BCMDBG)
420 LOG_ERROR_VAL;
421 #else
423 #endif /* BCMDBG */
425 /* TX FIFO number to WME/802.1E Access Category */
426 static const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE };
428 /* WME/802.1E Access Category to TX FIFO number */
429 static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 };
431 /* 802.1D Priority to precedence queue mapping */
432 const u8 wlc_prio2prec_map[] = {
433 _BRCMS_PREC_BE, /* 0 BE - Best-effort */
434 _BRCMS_PREC_BK, /* 1 BK - Background */
435 _BRCMS_PREC_NONE, /* 2 None = - */
436 _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */
437 _BRCMS_PREC_CL, /* 4 CL - Controlled Load */
438 _BRCMS_PREC_VI, /* 5 Vi - Video */
439 _BRCMS_PREC_VO, /* 6 Vo - Voice */
440 _BRCMS_PREC_NC, /* 7 NC - Network Control */
443 static const u16 xmtfifo_sz[][NFIFO] = {
444 /* corerev 20: 5120, 49152, 49152, 5376, 4352, 1280 */
445 {20, 192, 192, 21, 17, 5},
446 /* corerev 21: 2304, 14848, 5632, 3584, 3584, 1280 */
447 {9, 58, 22, 14, 14, 5},
448 /* corerev 22: 5120, 49152, 49152, 5376, 4352, 1280 */
449 {20, 192, 192, 21, 17, 5},
450 /* corerev 23: 5120, 49152, 49152, 5376, 4352, 1280 */
451 {20, 192, 192, 21, 17, 5},
452 /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */
453 {9, 58, 22, 14, 14, 5},
456 static const u8 acbitmap2maxprio[] = {
457 PRIO_8021D_BE, PRIO_8021D_BE, PRIO_8021D_BK, PRIO_8021D_BK,
458 PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI, PRIO_8021D_VI,
459 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO,
460 PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO, PRIO_8021D_VO
463 #ifdef BCMDBG
464 static const char * const fifo_names[] = {
465 "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" };
466 #else
467 static const char fifo_names[6][0];
468 #endif
470 #ifdef BCMDBG
471 /* pointer to most recently allocated wl/wlc */
472 static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL);
473 #endif
475 static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg)
477 if (cfg == NULL)
478 return;
480 kfree(cfg->current_bss);
481 kfree(cfg);
484 static void brcms_c_detach_mfree(struct brcms_c_info *wlc)
486 if (wlc == NULL)
487 return;
489 brcms_c_bsscfg_mfree(wlc->bsscfg);
490 kfree(wlc->pub);
491 kfree(wlc->modulecb);
492 kfree(wlc->default_bss);
493 kfree(wlc->protection);
494 kfree(wlc->stf);
495 kfree(wlc->bandstate[0]);
496 kfree(wlc->corestate->macstat_snapshot);
497 kfree(wlc->corestate);
498 kfree(wlc->hw->bandstate[0]);
499 kfree(wlc->hw);
501 /* free the wlc */
502 kfree(wlc);
503 wlc = NULL;
506 static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit)
508 struct brcms_bss_cfg *cfg;
510 cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC);
511 if (cfg == NULL)
512 goto fail;
514 cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
515 if (cfg->current_bss == NULL)
516 goto fail;
518 return cfg;
520 fail:
521 brcms_c_bsscfg_mfree(cfg);
522 return NULL;
525 static struct brcms_c_info *
526 brcms_c_attach_malloc(uint unit, uint *err, uint devid)
528 struct brcms_c_info *wlc;
530 wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC);
531 if (wlc == NULL) {
532 *err = 1002;
533 goto fail;
536 /* allocate struct brcms_c_pub state structure */
537 wlc->pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC);
538 if (wlc->pub == NULL) {
539 *err = 1003;
540 goto fail;
542 wlc->pub->wlc = wlc;
544 /* allocate struct brcms_hardware state structure */
546 wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC);
547 if (wlc->hw == NULL) {
548 *err = 1005;
549 goto fail;
551 wlc->hw->wlc = wlc;
553 wlc->hw->bandstate[0] =
554 kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC);
555 if (wlc->hw->bandstate[0] == NULL) {
556 *err = 1006;
557 goto fail;
558 } else {
559 int i;
561 for (i = 1; i < MAXBANDS; i++)
562 wlc->hw->bandstate[i] = (struct brcms_hw_band *)
563 ((unsigned long)wlc->hw->bandstate[0] +
564 (sizeof(struct brcms_hw_band) * i));
567 wlc->modulecb =
568 kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC);
569 if (wlc->modulecb == NULL) {
570 *err = 1009;
571 goto fail;
574 wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC);
575 if (wlc->default_bss == NULL) {
576 *err = 1010;
577 goto fail;
580 wlc->bsscfg = brcms_c_bsscfg_malloc(unit);
581 if (wlc->bsscfg == NULL) {
582 *err = 1011;
583 goto fail;
586 wlc->protection = kzalloc(sizeof(struct brcms_protection),
587 GFP_ATOMIC);
588 if (wlc->protection == NULL) {
589 *err = 1016;
590 goto fail;
593 wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC);
594 if (wlc->stf == NULL) {
595 *err = 1017;
596 goto fail;
599 wlc->bandstate[0] =
600 kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC);
601 if (wlc->bandstate[0] == NULL) {
602 *err = 1025;
603 goto fail;
604 } else {
605 int i;
607 for (i = 1; i < MAXBANDS; i++)
608 wlc->bandstate[i] = (struct brcms_band *)
609 ((unsigned long)wlc->bandstate[0]
610 + (sizeof(struct brcms_band)*i));
613 wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC);
614 if (wlc->corestate == NULL) {
615 *err = 1026;
616 goto fail;
619 wlc->corestate->macstat_snapshot =
620 kzalloc(sizeof(struct macstat), GFP_ATOMIC);
621 if (wlc->corestate->macstat_snapshot == NULL) {
622 *err = 1027;
623 goto fail;
626 return wlc;
628 fail:
629 brcms_c_detach_mfree(wlc);
630 return NULL;
634 * Update the slot timing for standard 11b/g (20us slots)
635 * or shortslot 11g (9us slots)
636 * The PSM needs to be suspended for this call.
638 static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw,
639 bool shortslot)
641 struct d11regs __iomem *regs;
643 regs = wlc_hw->regs;
645 if (shortslot) {
646 /* 11g short slot: 11a timing */
647 W_REG(&regs->ifs_slot, 0x0207); /* APHY_SLOT_TIME */
648 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME);
649 } else {
650 /* 11g long slot: 11b timing */
651 W_REG(&regs->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */
652 brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME);
656 static void brcms_c_write_inits(struct brcms_hardware *wlc_hw,
657 const struct d11init *inits)
659 int i;
660 u8 __iomem *base;
661 u8 __iomem *addr;
662 u16 size;
663 u32 value;
665 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
667 base = (u8 __iomem *)wlc_hw->regs;
669 for (i = 0; inits[i].addr != cpu_to_le16(0xffff); i++) {
670 size = le16_to_cpu(inits[i].size);
671 addr = base + le16_to_cpu(inits[i].addr);
672 value = le32_to_cpu(inits[i].value);
673 if (size == 2)
674 W_REG((u16 __iomem *)addr, value);
675 else if (size == 4)
676 W_REG((u32 __iomem *)addr, value);
677 else
678 break;
682 static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs)
684 u8 idx;
685 u16 addr[] = {
686 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
687 M_HOST_FLAGS5
690 for (idx = 0; idx < MHFMAX; idx++)
691 brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]);
694 static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw)
696 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
697 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
699 /* init microcode host flags */
700 brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs);
702 /* do band-specific ucode IHR, SHM, and SCR inits */
703 if (D11REV_IS(wlc_hw->corerev, 23)) {
704 if (BRCMS_ISNPHY(wlc_hw->band))
705 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16);
706 else
707 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
708 " %d\n", __func__, wlc_hw->unit,
709 wlc_hw->corerev);
710 } else {
711 if (D11REV_IS(wlc_hw->corerev, 24)) {
712 if (BRCMS_ISLCNPHY(wlc_hw->band))
713 brcms_c_write_inits(wlc_hw,
714 ucode->d11lcn0bsinitvals24);
715 else
716 wiphy_err(wiphy, "%s: wl%d: unsupported phy in"
717 " core rev %d\n", __func__,
718 wlc_hw->unit, wlc_hw->corerev);
719 } else {
720 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
721 __func__, wlc_hw->unit, wlc_hw->corerev);
726 static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk)
728 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk);
730 wlc_hw->phyclk = clk;
732 if (OFF == clk) { /* clear gmode bit, put phy into reset */
734 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC | SICF_GMODE),
735 (SICF_PRST | SICF_FGC));
736 udelay(1);
737 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_PRST);
738 udelay(1);
740 } else { /* take phy out of reset */
742 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_FGC), SICF_FGC);
743 udelay(1);
744 ai_core_cflags(wlc_hw->sih, (SICF_FGC), 0);
745 udelay(1);
750 /* switch to new band but leave it inactive */
751 static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit)
753 struct brcms_hardware *wlc_hw = wlc->hw;
754 u32 macintmask;
756 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
758 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
760 /* disable interrupts */
761 macintmask = brcms_intrsoff(wlc->wl);
763 /* radio off */
764 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
766 brcms_b_core_phy_clk(wlc_hw, OFF);
768 brcms_c_setxband(wlc_hw, bandunit);
770 return macintmask;
773 /* Process received frames */
775 * Return true if more frames need to be processed. false otherwise.
776 * Param 'bound' indicates max. # frames to process before break out.
778 static bool
779 brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound)
781 struct sk_buff *p;
782 struct sk_buff *head = NULL;
783 struct sk_buff *tail = NULL;
784 uint n = 0;
785 uint bound_limit = bound ? RXBND : -1;
787 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
788 /* gather received frames */
789 while ((p = dma_rx(wlc_hw->di[fifo]))) {
791 if (!tail)
792 head = tail = p;
793 else {
794 tail->prev = p;
795 tail = p;
798 /* !give others some time to run! */
799 if (++n >= bound_limit)
800 break;
803 /* post more rbufs */
804 dma_rxfill(wlc_hw->di[fifo]);
806 /* process each frame */
807 while ((p = head) != NULL) {
808 struct d11rxhdr_le *rxh_le;
809 struct d11rxhdr *rxh;
810 head = head->prev;
811 p->prev = NULL;
813 rxh_le = (struct d11rxhdr_le *)p->data;
814 rxh = (struct d11rxhdr *)p->data;
816 /* fixup rx header endianness */
817 rxh->RxFrameSize = le16_to_cpu(rxh_le->RxFrameSize);
818 rxh->PhyRxStatus_0 = le16_to_cpu(rxh_le->PhyRxStatus_0);
819 rxh->PhyRxStatus_1 = le16_to_cpu(rxh_le->PhyRxStatus_1);
820 rxh->PhyRxStatus_2 = le16_to_cpu(rxh_le->PhyRxStatus_2);
821 rxh->PhyRxStatus_3 = le16_to_cpu(rxh_le->PhyRxStatus_3);
822 rxh->PhyRxStatus_4 = le16_to_cpu(rxh_le->PhyRxStatus_4);
823 rxh->PhyRxStatus_5 = le16_to_cpu(rxh_le->PhyRxStatus_5);
824 rxh->RxStatus1 = le16_to_cpu(rxh_le->RxStatus1);
825 rxh->RxStatus2 = le16_to_cpu(rxh_le->RxStatus2);
826 rxh->RxTSFTime = le16_to_cpu(rxh_le->RxTSFTime);
827 rxh->RxChan = le16_to_cpu(rxh_le->RxChan);
829 brcms_c_recv(wlc_hw->wlc, p);
832 return n >= bound_limit;
835 /* process an individual struct tx_status */
836 static bool
837 brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs)
839 struct sk_buff *p;
840 uint queue;
841 struct d11txh *txh;
842 struct scb *scb = NULL;
843 bool free_pdu;
844 int tx_rts, tx_frame_count, tx_rts_count;
845 uint totlen, supr_status;
846 bool lastframe;
847 struct ieee80211_hdr *h;
848 u16 mcl;
849 struct ieee80211_tx_info *tx_info;
850 struct ieee80211_tx_rate *txrate;
851 int i;
853 /* discard intermediate indications for ucode with one legitimate case:
854 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
855 * but the subsequent tx of DATA failed. so it will start rts/cts
856 * from the beginning (resetting the rts transmission count)
858 if (!(txs->status & TX_STATUS_AMPDU)
859 && (txs->status & TX_STATUS_INTERMEDIATE)) {
860 wiphy_err(wlc->wiphy, "%s: INTERMEDIATE but not AMPDU\n",
861 __func__);
862 return false;
865 queue = txs->frameid & TXFID_QUEUE_MASK;
866 if (queue >= NFIFO) {
867 p = NULL;
868 goto fatal;
871 p = dma_getnexttxp(wlc->hw->di[queue], DMA_RANGE_TRANSMITTED);
872 if (p == NULL)
873 goto fatal;
875 txh = (struct d11txh *) (p->data);
876 mcl = le16_to_cpu(txh->MacTxControlLow);
878 if (txs->phyerr) {
879 if (brcm_msg_level & LOG_ERROR_VAL) {
880 wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n",
881 txs->phyerr, txh->MainRates);
882 brcms_c_print_txdesc(txh);
884 brcms_c_print_txstatus(txs);
887 if (txs->frameid != le16_to_cpu(txh->TxFrameID))
888 goto fatal;
889 tx_info = IEEE80211_SKB_CB(p);
890 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
892 if (tx_info->control.sta)
893 scb = &wlc->pri_scb;
895 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
896 brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs);
897 return false;
900 supr_status = txs->status & TX_STATUS_SUPR_MASK;
901 if (supr_status == TX_STATUS_SUPR_BADCH)
902 BCMMSG(wlc->wiphy,
903 "%s: Pkt tx suppressed, possibly channel %d\n",
904 __func__, CHSPEC_CHANNEL(wlc->default_bss->chanspec));
906 tx_rts = le16_to_cpu(txh->MacTxControlLow) & TXC_SENDRTS;
907 tx_frame_count =
908 (txs->status & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT;
909 tx_rts_count =
910 (txs->status & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT;
912 lastframe = !ieee80211_has_morefrags(h->frame_control);
914 if (!lastframe) {
915 wiphy_err(wlc->wiphy, "Not last frame!\n");
916 } else {
918 * Set information to be consumed by Minstrel ht.
920 * The "fallback limit" is the number of tx attempts a given
921 * MPDU is sent at the "primary" rate. Tx attempts beyond that
922 * limit are sent at the "secondary" rate.
923 * A 'short frame' does not exceed RTS treshold.
925 u16 sfbl, /* Short Frame Rate Fallback Limit */
926 lfbl, /* Long Frame Rate Fallback Limit */
927 fbl;
929 if (queue < AC_COUNT) {
930 sfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
931 EDCF_SFB);
932 lfbl = GFIELD(wlc->wme_retries[wme_fifo2ac[queue]],
933 EDCF_LFB);
934 } else {
935 sfbl = wlc->SFBL;
936 lfbl = wlc->LFBL;
939 txrate = tx_info->status.rates;
940 if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
941 fbl = lfbl;
942 else
943 fbl = sfbl;
945 ieee80211_tx_info_clear_status(tx_info);
947 if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) {
949 * rate selection requested a fallback rate
950 * and we used it
952 txrate[0].count = fbl;
953 txrate[1].count = tx_frame_count - fbl;
954 } else {
956 * rate selection did not request fallback rate, or
957 * we didn't need it
959 txrate[0].count = tx_frame_count;
961 * rc80211_minstrel.c:minstrel_tx_status() expects
962 * unused rates to be marked with idx = -1
964 txrate[1].idx = -1;
965 txrate[1].count = 0;
968 /* clear the rest of the rates */
969 for (i = 2; i < IEEE80211_TX_MAX_RATES; i++) {
970 txrate[i].idx = -1;
971 txrate[i].count = 0;
974 if (txs->status & TX_STATUS_ACK_RCV)
975 tx_info->flags |= IEEE80211_TX_STAT_ACK;
978 totlen = brcmu_pkttotlen(p);
979 free_pdu = true;
981 brcms_c_txfifo_complete(wlc, queue, 1);
983 if (lastframe) {
984 p->next = NULL;
985 p->prev = NULL;
986 /* remove PLCP & Broadcom tx descriptor header */
987 skb_pull(p, D11_PHY_HDR_LEN);
988 skb_pull(p, D11_TXH_LEN);
989 ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw, p);
990 } else {
991 wiphy_err(wlc->wiphy, "%s: Not last frame => not calling "
992 "tx_status\n", __func__);
995 return false;
997 fatal:
998 if (p)
999 brcmu_pkt_buf_free_skb(p);
1001 return true;
1005 static bool
1006 brcms_b_dotxstatus(struct brcms_hardware *wlc_hw, struct tx_status *txs)
1008 /* discard intermediate indications for ucode with one legitimate case:
1009 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange,
1010 * but the subsequent tx of DATA failed. so it will start rts/cts from
1011 * the beginning (resetting the rts transmission count)
1013 if (!(txs->status & TX_STATUS_AMPDU)
1014 && (txs->status & TX_STATUS_INTERMEDIATE))
1015 return false;
1017 return brcms_c_dotxstatus(wlc_hw->wlc, txs);
1020 /* process tx completion events in BMAC
1021 * Return true if more tx status need to be processed. false otherwise.
1023 static bool
1024 brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal)
1026 bool morepending = false;
1027 struct brcms_c_info *wlc = wlc_hw->wlc;
1028 struct d11regs __iomem *regs;
1029 struct tx_status txstatus, *txs;
1030 u32 s1, s2;
1031 uint n = 0;
1033 * Param 'max_tx_num' indicates max. # tx status to process before
1034 * break out.
1036 uint max_tx_num = bound ? TXSBND : -1;
1038 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
1040 txs = &txstatus;
1041 regs = wlc_hw->regs;
1042 while (!(*fatal)
1043 && (s1 = R_REG(&regs->frmtxstatus)) & TXS_V) {
1045 if (s1 == 0xffffffff) {
1046 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n",
1047 wlc_hw->unit, __func__);
1048 return morepending;
1051 s2 = R_REG(&regs->frmtxstatus2);
1053 txs->status = s1 & TXS_STATUS_MASK;
1054 txs->frameid = (s1 & TXS_FID_MASK) >> TXS_FID_SHIFT;
1055 txs->sequence = s2 & TXS_SEQ_MASK;
1056 txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT;
1057 txs->lasttxtime = 0;
1059 *fatal = brcms_b_dotxstatus(wlc_hw, txs);
1061 /* !give others some time to run! */
1062 if (++n >= max_tx_num)
1063 break;
1066 if (*fatal)
1067 return 0;
1069 if (n >= max_tx_num)
1070 morepending = true;
1072 if (!pktq_empty(&wlc->pkt_queue->q))
1073 brcms_c_send_q(wlc);
1075 return morepending;
1078 /* second-level interrupt processing
1079 * Return true if another dpc needs to be re-scheduled. false otherwise.
1080 * Param 'bounded' indicates if applicable loops should be bounded.
1082 bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded)
1084 u32 macintstatus;
1085 struct brcms_hardware *wlc_hw = wlc->hw;
1086 struct d11regs __iomem *regs = wlc_hw->regs;
1087 bool fatal = false;
1088 struct wiphy *wiphy = wlc->wiphy;
1090 if (brcms_deviceremoved(wlc)) {
1091 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
1092 __func__);
1093 brcms_down(wlc->wl);
1094 return false;
1097 /* grab and clear the saved software intstatus bits */
1098 macintstatus = wlc->macintstatus;
1099 wlc->macintstatus = 0;
1101 BCMMSG(wlc->wiphy, "wl%d: macintstatus 0x%x\n",
1102 wlc_hw->unit, macintstatus);
1104 WARN_ON(macintstatus & MI_PRQ); /* PRQ Interrupt in non-MBSS */
1106 /* tx status */
1107 if (macintstatus & MI_TFS) {
1108 if (brcms_b_txstatus(wlc->hw, bounded, &fatal))
1109 wlc->macintstatus |= MI_TFS;
1110 if (fatal) {
1111 wiphy_err(wiphy, "MI_TFS: fatal\n");
1112 goto fatal;
1116 if (macintstatus & (MI_TBTT | MI_DTIM_TBTT))
1117 brcms_c_tbtt(wlc);
1119 /* ATIM window end */
1120 if (macintstatus & MI_ATIMWINEND) {
1121 BCMMSG(wlc->wiphy, "end of ATIM window\n");
1122 OR_REG(&regs->maccommand, wlc->qvalid);
1123 wlc->qvalid = 0;
1127 * received data or control frame, MI_DMAINT is
1128 * indication of RX_FIFO interrupt
1130 if (macintstatus & MI_DMAINT)
1131 if (brcms_b_recv(wlc_hw, RX_FIFO, bounded))
1132 wlc->macintstatus |= MI_DMAINT;
1134 /* noise sample collected */
1135 if (macintstatus & MI_BG_NOISE)
1136 wlc_phy_noise_sample_intr(wlc_hw->band->pi);
1138 if (macintstatus & MI_GP0) {
1139 wiphy_err(wiphy, "wl%d: PSM microcode watchdog fired at %d "
1140 "(seconds). Resetting.\n", wlc_hw->unit, wlc_hw->now);
1142 printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
1143 __func__, wlc_hw->sih->chip,
1144 wlc_hw->sih->chiprev);
1145 /* big hammer */
1146 brcms_init(wlc->wl);
1149 /* gptimer timeout */
1150 if (macintstatus & MI_TO)
1151 W_REG(&regs->gptimer, 0);
1153 if (macintstatus & MI_RFDISABLE) {
1154 BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the"
1155 " RF Disable Input\n", wlc_hw->unit);
1156 brcms_rfkill_set_hw_state(wlc->wl);
1159 /* send any enq'd tx packets. Just makes sure to jump start tx */
1160 if (!pktq_empty(&wlc->pkt_queue->q))
1161 brcms_c_send_q(wlc);
1163 /* it isn't done and needs to be resched if macintstatus is non-zero */
1164 return wlc->macintstatus != 0;
1166 fatal:
1167 brcms_init(wlc->wl);
1168 return wlc->macintstatus != 0;
1171 static int brcms_b_state_get(struct brcms_hardware *wlc_hw,
1172 struct brcms_b_state *state)
1174 state->machwcap = wlc_hw->machwcap;
1176 return 0;
1179 /* set initial host flags value */
1180 static void
1181 brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init)
1183 struct brcms_hardware *wlc_hw = wlc->hw;
1185 memset(mhfs, 0, MHFMAX * sizeof(u16));
1187 mhfs[MHF2] |= mhf2_init;
1189 /* prohibit use of slowclock on multifunction boards */
1190 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
1191 mhfs[MHF1] |= MHF1_FORCEFASTCLK;
1193 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) {
1194 mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR;
1195 mhfs[MHF1] |= MHF1_IQSWAP_WAR;
1199 static struct dma64regs __iomem *
1200 dmareg(struct brcms_hardware *hw, uint direction, uint fifonum)
1202 if (direction == DMA_TX)
1203 return &(hw->regs->fifo64regs[fifonum].dmaxmt);
1204 return &(hw->regs->fifo64regs[fifonum].dmarcv);
1207 static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme)
1209 uint i;
1210 char name[8];
1212 * ucode host flag 2 needed for pio mode, independent of band and fifo
1214 u16 pio_mhf2 = 0;
1215 struct brcms_hardware *wlc_hw = wlc->hw;
1216 uint unit = wlc_hw->unit;
1217 struct wiphy *wiphy = wlc->wiphy;
1219 /* name and offsets for dma_attach */
1220 snprintf(name, sizeof(name), "wl%d", unit);
1222 if (wlc_hw->di[0] == NULL) { /* Init FIFOs */
1223 int dma_attach_err = 0;
1226 * FIFO 0
1227 * TX: TX_AC_BK_FIFO (TX AC Background data packets)
1228 * RX: RX_FIFO (RX data packets)
1230 wlc_hw->di[0] = dma_attach(name, wlc_hw->sih,
1231 (wme ? dmareg(wlc_hw, DMA_TX, 0) :
1232 NULL), dmareg(wlc_hw, DMA_RX, 0),
1233 (wme ? NTXD : 0), NRXD,
1234 RXBUFSZ, -1, NRXBUFPOST,
1235 BRCMS_HWRXOFF, &brcm_msg_level);
1236 dma_attach_err |= (NULL == wlc_hw->di[0]);
1239 * FIFO 1
1240 * TX: TX_AC_BE_FIFO (TX AC Best-Effort data packets)
1241 * (legacy) TX_DATA_FIFO (TX data packets)
1242 * RX: UNUSED
1244 wlc_hw->di[1] = dma_attach(name, wlc_hw->sih,
1245 dmareg(wlc_hw, DMA_TX, 1), NULL,
1246 NTXD, 0, 0, -1, 0, 0,
1247 &brcm_msg_level);
1248 dma_attach_err |= (NULL == wlc_hw->di[1]);
1251 * FIFO 2
1252 * TX: TX_AC_VI_FIFO (TX AC Video data packets)
1253 * RX: UNUSED
1255 wlc_hw->di[2] = dma_attach(name, wlc_hw->sih,
1256 dmareg(wlc_hw, DMA_TX, 2), NULL,
1257 NTXD, 0, 0, -1, 0, 0,
1258 &brcm_msg_level);
1259 dma_attach_err |= (NULL == wlc_hw->di[2]);
1261 * FIFO 3
1262 * TX: TX_AC_VO_FIFO (TX AC Voice data packets)
1263 * (legacy) TX_CTL_FIFO (TX control & mgmt packets)
1265 wlc_hw->di[3] = dma_attach(name, wlc_hw->sih,
1266 dmareg(wlc_hw, DMA_TX, 3),
1267 NULL, NTXD, 0, 0, -1,
1268 0, 0, &brcm_msg_level);
1269 dma_attach_err |= (NULL == wlc_hw->di[3]);
1270 /* Cleaner to leave this as if with AP defined */
1272 if (dma_attach_err) {
1273 wiphy_err(wiphy, "wl%d: wlc_attach: dma_attach failed"
1274 "\n", unit);
1275 return false;
1278 /* get pointer to dma engine tx flow control variable */
1279 for (i = 0; i < NFIFO; i++)
1280 if (wlc_hw->di[i])
1281 wlc_hw->txavail[i] =
1282 (uint *) dma_getvar(wlc_hw->di[i],
1283 "&txavail");
1286 /* initial ucode host flags */
1287 brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2);
1289 return true;
1292 static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw)
1294 uint j;
1296 for (j = 0; j < NFIFO; j++) {
1297 if (wlc_hw->di[j]) {
1298 dma_detach(wlc_hw->di[j]);
1299 wlc_hw->di[j] = NULL;
1305 * Initialize brcms_c_info default values ...
1306 * may get overrides later in this function
1307 * BMAC_NOTES, move low out and resolve the dangling ones
1309 static void brcms_b_info_init(struct brcms_hardware *wlc_hw)
1311 struct brcms_c_info *wlc = wlc_hw->wlc;
1313 /* set default sw macintmask value */
1314 wlc->defmacintmask = DEF_MACINTMASK;
1316 /* various 802.11g modes */
1317 wlc_hw->shortslot = false;
1319 wlc_hw->SFBL = RETRY_SHORT_FB;
1320 wlc_hw->LFBL = RETRY_LONG_FB;
1322 /* default mac retry limits */
1323 wlc_hw->SRL = RETRY_SHORT_DEF;
1324 wlc_hw->LRL = RETRY_LONG_DEF;
1325 wlc_hw->chanspec = ch20mhz_chspec(1);
1328 static void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw)
1330 /* delay before first read of ucode state */
1331 udelay(40);
1333 /* wait until ucode is no longer asleep */
1334 SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) ==
1335 DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly);
1338 /* control chip clock to save power, enable dynamic clock or force fast clock */
1339 static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode)
1341 if (wlc_hw->sih->cccaps & CC_CAP_PMU) {
1342 /* new chips with PMU, CCS_FORCEHT will distribute the HT clock
1343 * on backplane, but mac core will still run on ALP(not HT) when
1344 * it enters powersave mode, which means the FCA bit may not be
1345 * set. Should wakeup mac if driver wants it to run on HT.
1348 if (wlc_hw->clk) {
1349 if (mode == CLK_FAST) {
1350 OR_REG(&wlc_hw->regs->clk_ctl_st,
1351 CCS_FORCEHT);
1353 udelay(64);
1355 SPINWAIT(((R_REG
1356 (&wlc_hw->regs->
1357 clk_ctl_st) & CCS_HTAVAIL) == 0),
1358 PMU_MAX_TRANSITION_DLY);
1359 WARN_ON(!(R_REG
1360 (&wlc_hw->regs->
1361 clk_ctl_st) & CCS_HTAVAIL));
1362 } else {
1363 if ((wlc_hw->sih->pmurev == 0) &&
1364 (R_REG
1365 (&wlc_hw->regs->
1366 clk_ctl_st) & (CCS_FORCEHT | CCS_HTAREQ)))
1367 SPINWAIT(((R_REG
1368 (&wlc_hw->regs->
1369 clk_ctl_st) & CCS_HTAVAIL)
1370 == 0),
1371 PMU_MAX_TRANSITION_DLY);
1372 AND_REG(&wlc_hw->regs->clk_ctl_st,
1373 ~CCS_FORCEHT);
1376 wlc_hw->forcefastclk = (mode == CLK_FAST);
1377 } else {
1379 /* old chips w/o PMU, force HT through cc,
1380 * then use FCA to verify mac is running fast clock
1383 wlc_hw->forcefastclk = ai_clkctl_cc(wlc_hw->sih, mode);
1385 /* check fast clock is available (if core is not in reset) */
1386 if (wlc_hw->forcefastclk && wlc_hw->clk)
1387 WARN_ON(!(ai_core_sflags(wlc_hw->sih, 0, 0) &
1388 SISF_FCLKA));
1391 * keep the ucode wake bit on if forcefastclk is on since we
1392 * do not want ucode to put us back to slow clock when it dozes
1393 * for PM mode. Code below matches the wake override bit with
1394 * current forcefastclk state. Only setting bit in wake_override
1395 * instead of waking ucode immediately since old code had this
1396 * behavior. Older code set wlc->forcefastclk but only had the
1397 * wake happen if the wakup_ucode work (protected by an up
1398 * check) was executed just below.
1400 if (wlc_hw->forcefastclk)
1401 mboolset(wlc_hw->wake_override,
1402 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1403 else
1404 mboolclr(wlc_hw->wake_override,
1405 BRCMS_WAKE_OVERRIDE_FORCEFAST);
1409 /* set or clear ucode host flag bits
1410 * it has an optimization for no-change write
1411 * it only writes through shared memory when the core has clock;
1412 * pre-CLK changes should use wlc_write_mhf to get around the optimization
1415 * bands values are: BRCM_BAND_AUTO <--- Current band only
1416 * BRCM_BAND_5G <--- 5G band only
1417 * BRCM_BAND_2G <--- 2G band only
1418 * BRCM_BAND_ALL <--- All bands
1420 void
1421 brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val,
1422 int bands)
1424 u16 save;
1425 u16 addr[MHFMAX] = {
1426 M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4,
1427 M_HOST_FLAGS5
1429 struct brcms_hw_band *band;
1431 if ((val & ~mask) || idx >= MHFMAX)
1432 return; /* error condition */
1434 switch (bands) {
1435 /* Current band only or all bands,
1436 * then set the band to current band
1438 case BRCM_BAND_AUTO:
1439 case BRCM_BAND_ALL:
1440 band = wlc_hw->band;
1441 break;
1442 case BRCM_BAND_5G:
1443 band = wlc_hw->bandstate[BAND_5G_INDEX];
1444 break;
1445 case BRCM_BAND_2G:
1446 band = wlc_hw->bandstate[BAND_2G_INDEX];
1447 break;
1448 default:
1449 band = NULL; /* error condition */
1452 if (band) {
1453 save = band->mhfs[idx];
1454 band->mhfs[idx] = (band->mhfs[idx] & ~mask) | val;
1456 /* optimization: only write through if changed, and
1457 * changed band is the current band
1459 if (wlc_hw->clk && (band->mhfs[idx] != save)
1460 && (band == wlc_hw->band))
1461 brcms_b_write_shm(wlc_hw, addr[idx],
1462 (u16) band->mhfs[idx]);
1465 if (bands == BRCM_BAND_ALL) {
1466 wlc_hw->bandstate[0]->mhfs[idx] =
1467 (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val;
1468 wlc_hw->bandstate[1]->mhfs[idx] =
1469 (wlc_hw->bandstate[1]->mhfs[idx] & ~mask) | val;
1473 /* set the maccontrol register to desired reset state and
1474 * initialize the sw cache of the register
1476 static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw)
1478 /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */
1479 wlc_hw->maccontrol = 0;
1480 wlc_hw->suspended_fifos = 0;
1481 wlc_hw->wake_override = 0;
1482 wlc_hw->mute_override = 0;
1483 brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE);
1487 * write the software state of maccontrol and
1488 * overrides to the maccontrol register
1490 static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw)
1492 u32 maccontrol = wlc_hw->maccontrol;
1494 /* OR in the wake bit if overridden */
1495 if (wlc_hw->wake_override)
1496 maccontrol |= MCTL_WAKE;
1498 /* set AP and INFRA bits for mute if needed */
1499 if (wlc_hw->mute_override) {
1500 maccontrol &= ~(MCTL_AP);
1501 maccontrol |= MCTL_INFRA;
1504 W_REG(&wlc_hw->regs->maccontrol, maccontrol);
1507 /* set or clear maccontrol bits */
1508 void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val)
1510 u32 maccontrol;
1511 u32 new_maccontrol;
1513 if (val & ~mask)
1514 return; /* error condition */
1515 maccontrol = wlc_hw->maccontrol;
1516 new_maccontrol = (maccontrol & ~mask) | val;
1518 /* if the new maccontrol value is the same as the old, nothing to do */
1519 if (new_maccontrol == maccontrol)
1520 return;
1522 /* something changed, cache the new value */
1523 wlc_hw->maccontrol = new_maccontrol;
1525 /* write the new values with overrides applied */
1526 brcms_c_mctrl_write(wlc_hw);
1529 void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw,
1530 u32 override_bit)
1532 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) {
1533 mboolset(wlc_hw->wake_override, override_bit);
1534 return;
1537 mboolset(wlc_hw->wake_override, override_bit);
1539 brcms_c_mctrl_write(wlc_hw);
1540 brcms_b_wait_for_wake(wlc_hw);
1543 void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw,
1544 u32 override_bit)
1546 mboolclr(wlc_hw->wake_override, override_bit);
1548 if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE))
1549 return;
1551 brcms_c_mctrl_write(wlc_hw);
1554 /* When driver needs ucode to stop beaconing, it has to make sure that
1555 * MCTL_AP is clear and MCTL_INFRA is set
1556 * Mode MCTL_AP MCTL_INFRA
1557 * AP 1 1
1558 * STA 0 1 <--- This will ensure no beacons
1559 * IBSS 0 0
1561 static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw)
1563 wlc_hw->mute_override = 1;
1565 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1566 * override, then there is no change to write
1568 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1569 return;
1571 brcms_c_mctrl_write(wlc_hw);
1574 /* Clear the override on AP and INFRA bits */
1575 static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw)
1577 if (wlc_hw->mute_override == 0)
1578 return;
1580 wlc_hw->mute_override = 0;
1582 /* if maccontrol already has AP == 0 and INFRA == 1 without this
1583 * override, then there is no change to write
1585 if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA)
1586 return;
1588 brcms_c_mctrl_write(wlc_hw);
1592 * Write a MAC address to the given match reg offset in the RXE match engine.
1594 static void
1595 brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset,
1596 const u8 *addr)
1598 struct d11regs __iomem *regs;
1599 u16 mac_l;
1600 u16 mac_m;
1601 u16 mac_h;
1603 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n",
1604 wlc_hw->unit);
1606 regs = wlc_hw->regs;
1607 mac_l = addr[0] | (addr[1] << 8);
1608 mac_m = addr[2] | (addr[3] << 8);
1609 mac_h = addr[4] | (addr[5] << 8);
1611 /* enter the MAC addr into the RXE match registers */
1612 W_REG(&regs->rcm_ctl, RCM_INC_DATA | match_reg_offset);
1613 W_REG(&regs->rcm_mat_data, mac_l);
1614 W_REG(&regs->rcm_mat_data, mac_m);
1615 W_REG(&regs->rcm_mat_data, mac_h);
1619 void
1620 brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len,
1621 void *buf)
1623 struct d11regs __iomem *regs;
1624 u32 word;
1625 __le32 word_le;
1626 __be32 word_be;
1627 bool be_bit;
1628 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1630 regs = wlc_hw->regs;
1631 W_REG(&regs->tplatewrptr, offset);
1633 /* if MCTL_BIGEND bit set in mac control register,
1634 * the chip swaps data in fifo, as well as data in
1635 * template ram
1637 be_bit = (R_REG(&regs->maccontrol) & MCTL_BIGEND) != 0;
1639 while (len > 0) {
1640 memcpy(&word, buf, sizeof(u32));
1642 if (be_bit) {
1643 word_be = cpu_to_be32(word);
1644 word = *(u32 *)&word_be;
1645 } else {
1646 word_le = cpu_to_le32(word);
1647 word = *(u32 *)&word_le;
1650 W_REG(&regs->tplatewrdata, word);
1652 buf = (u8 *) buf + sizeof(u32);
1653 len -= sizeof(u32);
1657 static void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin)
1659 wlc_hw->band->CWmin = newmin;
1661 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMIN);
1662 (void)R_REG(&wlc_hw->regs->objaddr);
1663 W_REG(&wlc_hw->regs->objdata, newmin);
1666 static void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax)
1668 wlc_hw->band->CWmax = newmax;
1670 W_REG(&wlc_hw->regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_CWMAX);
1671 (void)R_REG(&wlc_hw->regs->objaddr);
1672 W_REG(&wlc_hw->regs->objdata, newmax);
1675 void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw)
1677 bool fastclk;
1679 /* request FAST clock if not on */
1680 fastclk = wlc_hw->forcefastclk;
1681 if (!fastclk)
1682 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
1684 wlc_phy_bw_state_set(wlc_hw->band->pi, bw);
1686 brcms_b_phy_reset(wlc_hw);
1687 wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi));
1689 /* restore the clk */
1690 if (!fastclk)
1691 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
1694 static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw)
1696 u16 v;
1697 struct brcms_c_info *wlc = wlc_hw->wlc;
1698 /* update SYNTHPU_DLY */
1700 if (BRCMS_ISLCNPHY(wlc->band))
1701 v = SYNTHPU_DLY_LPPHY_US;
1702 else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3)))
1703 v = SYNTHPU_DLY_NPHY_US;
1704 else
1705 v = SYNTHPU_DLY_BPHY_US;
1707 brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v);
1710 static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw)
1712 u16 phyctl;
1713 u16 phytxant = wlc_hw->bmac_phytxant;
1714 u16 mask = PHY_TXC_ANT_MASK;
1716 /* set the Probe Response frame phy control word */
1717 phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS);
1718 phyctl = (phyctl & ~mask) | phytxant;
1719 brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl);
1721 /* set the Response (ACK/CTS) frame phy control word */
1722 phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD);
1723 phyctl = (phyctl & ~mask) | phytxant;
1724 brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl);
1727 static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw,
1728 u8 rate)
1730 uint i;
1731 u8 plcp_rate = 0;
1732 struct plcp_signal_rate_lookup {
1733 u8 rate;
1734 u8 signal_rate;
1736 /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */
1737 const struct plcp_signal_rate_lookup rate_lookup[] = {
1738 {BRCM_RATE_6M, 0xB},
1739 {BRCM_RATE_9M, 0xF},
1740 {BRCM_RATE_12M, 0xA},
1741 {BRCM_RATE_18M, 0xE},
1742 {BRCM_RATE_24M, 0x9},
1743 {BRCM_RATE_36M, 0xD},
1744 {BRCM_RATE_48M, 0x8},
1745 {BRCM_RATE_54M, 0xC}
1748 for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) {
1749 if (rate == rate_lookup[i].rate) {
1750 plcp_rate = rate_lookup[i].signal_rate;
1751 break;
1755 /* Find the SHM pointer to the rate table entry by looking in the
1756 * Direct-map Table
1758 return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2));
1761 static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw)
1763 u8 rate;
1764 u8 rates[8] = {
1765 BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M,
1766 BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M
1768 u16 entry_ptr;
1769 u16 pctl1;
1770 uint i;
1772 if (!BRCMS_PHY_11N_CAP(wlc_hw->band))
1773 return;
1775 /* walk the phy rate table and update the entries */
1776 for (i = 0; i < ARRAY_SIZE(rates); i++) {
1777 rate = rates[i];
1779 entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate);
1781 /* read the SHM Rate Table entry OFDM PCTL1 values */
1782 pctl1 =
1783 brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS);
1785 /* modify the value */
1786 pctl1 &= ~PHY_TXC1_MODE_MASK;
1787 pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT);
1789 /* Update the SHM Rate Table entry OFDM PCTL1 values */
1790 brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS,
1791 pctl1);
1795 /* band-specific init */
1796 static void brcms_b_bsinit(struct brcms_c_info *wlc, u16 chanspec)
1798 struct brcms_hardware *wlc_hw = wlc->hw;
1800 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1801 wlc_hw->band->bandunit);
1803 brcms_c_ucode_bsinit(wlc_hw);
1805 wlc_phy_init(wlc_hw->band->pi, chanspec);
1807 brcms_c_ucode_txant_set(wlc_hw);
1810 * cwmin is band-specific, update hardware
1811 * with value for current band
1813 brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin);
1814 brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax);
1816 brcms_b_update_slot_timing(wlc_hw,
1817 wlc_hw->band->bandtype == BRCM_BAND_5G ?
1818 true : wlc_hw->shortslot);
1820 /* write phytype and phyvers */
1821 brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype);
1822 brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev);
1825 * initialize the txphyctl1 rate table since
1826 * shmem is shared between bands
1828 brcms_upd_ofdm_pctl1_table(wlc_hw);
1830 brcms_b_upd_synthpu(wlc_hw);
1833 /* Perform a soft reset of the PHY PLL */
1834 void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw)
1836 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1838 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1839 offsetof(struct chipcregs, chipcontrol_addr), ~0, 0);
1840 udelay(1);
1841 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1842 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1843 udelay(1);
1844 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1845 offsetof(struct chipcregs, chipcontrol_data), 0x4, 4);
1846 udelay(1);
1847 ai_corereg(wlc_hw->sih, SI_CC_IDX,
1848 offsetof(struct chipcregs, chipcontrol_data), 0x4, 0);
1849 udelay(1);
1852 /* light way to turn on phy clock without reset for NPHY only
1853 * refer to brcms_b_core_phy_clk for full version
1855 void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk)
1857 /* support(necessary for NPHY and HYPHY) only */
1858 if (!BRCMS_ISNPHY(wlc_hw->band))
1859 return;
1861 if (ON == clk)
1862 ai_core_cflags(wlc_hw->sih, SICF_FGC, SICF_FGC);
1863 else
1864 ai_core_cflags(wlc_hw->sih, SICF_FGC, 0);
1868 void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk)
1870 if (ON == clk)
1871 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE);
1872 else
1873 ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0);
1876 void brcms_b_phy_reset(struct brcms_hardware *wlc_hw)
1878 struct brcms_phy_pub *pih = wlc_hw->band->pi;
1879 u32 phy_bw_clkbits;
1880 bool phy_in_reset = false;
1882 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
1884 if (pih == NULL)
1885 return;
1887 phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi);
1889 /* Specific reset sequence required for NPHY rev 3 and 4 */
1890 if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) &&
1891 NREV_LE(wlc_hw->band->phyrev, 4)) {
1892 /* Set the PHY bandwidth */
1893 ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits);
1895 udelay(1);
1897 /* Perform a soft reset of the PHY PLL */
1898 brcms_b_core_phypll_reset(wlc_hw);
1900 /* reset the PHY */
1901 ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE),
1902 (SICF_PRST | SICF_PCLKE));
1903 phy_in_reset = true;
1904 } else {
1905 ai_core_cflags(wlc_hw->sih,
1906 (SICF_PRST | SICF_PCLKE | SICF_BWMASK),
1907 (SICF_PRST | SICF_PCLKE | phy_bw_clkbits));
1910 udelay(2);
1911 brcms_b_core_phy_clk(wlc_hw, ON);
1913 if (pih)
1914 wlc_phy_anacore(pih, ON);
1917 /* switch to and initialize new band */
1918 static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit,
1919 u16 chanspec) {
1920 struct brcms_c_info *wlc = wlc_hw->wlc;
1921 u32 macintmask;
1923 /* Enable the d11 core before accessing it */
1924 if (!ai_iscoreup(wlc_hw->sih)) {
1925 ai_core_reset(wlc_hw->sih, 0, 0);
1926 brcms_c_mctrl_reset(wlc_hw);
1929 macintmask = brcms_c_setband_inact(wlc, bandunit);
1931 if (!wlc_hw->up)
1932 return;
1934 brcms_b_core_phy_clk(wlc_hw, ON);
1936 /* band-specific initializations */
1937 brcms_b_bsinit(wlc, chanspec);
1940 * If there are any pending software interrupt bits,
1941 * then replace these with a harmless nonzero value
1942 * so brcms_c_dpc() will re-enable interrupts when done.
1944 if (wlc->macintstatus)
1945 wlc->macintstatus = MI_DMAINT;
1947 /* restore macintmask */
1948 brcms_intrsrestore(wlc->wl, macintmask);
1950 /* ucode should still be suspended.. */
1951 WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0);
1954 /* low-level band switch utility routine */
1955 void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit)
1957 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
1958 bandunit);
1960 wlc_hw->band = wlc_hw->bandstate[bandunit];
1963 * BMAC_NOTE:
1964 * until we eliminate need for wlc->band refs in low level code
1966 wlc_hw->wlc->band = wlc_hw->wlc->bandstate[bandunit];
1968 /* set gmode core flag */
1969 if (wlc_hw->sbclk && !wlc_hw->noreset)
1970 ai_core_cflags(wlc_hw->sih, SICF_GMODE,
1971 ((bandunit == 0) ? SICF_GMODE : 0));
1974 static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw)
1977 /* reject unsupported corerev */
1978 if (!CONF_HAS(D11CONF, wlc_hw->corerev)) {
1979 wiphy_err(wlc_hw->wlc->wiphy, "unsupported core rev %d\n",
1980 wlc_hw->corerev);
1981 return false;
1984 return true;
1987 /* Validate some board info parameters */
1988 static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw)
1990 uint boardrev = wlc_hw->boardrev;
1992 /* 4 bits each for board type, major, minor, and tiny version */
1993 uint brt = (boardrev & 0xf000) >> 12;
1994 uint b0 = (boardrev & 0xf00) >> 8;
1995 uint b1 = (boardrev & 0xf0) >> 4;
1996 uint b2 = boardrev & 0xf;
1998 /* voards from other vendors are always considered valid */
1999 if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM)
2000 return true;
2002 /* do some boardrev sanity checks when boardvendor is Broadcom */
2003 if (boardrev == 0)
2004 return false;
2006 if (boardrev <= 0xff)
2007 return true;
2009 if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9)
2010 || (b2 > 9))
2011 return false;
2013 return true;
2016 static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw)
2018 const char *varname = "macaddr";
2019 char *macaddr;
2021 /* If macaddr exists, use it (Sromrev4, CIS, ...). */
2022 macaddr = getvar(wlc_hw->vars, varname);
2023 if (macaddr != NULL)
2024 return macaddr;
2026 if (wlc_hw->_nbands > 1)
2027 varname = "et1macaddr";
2028 else
2029 varname = "il0macaddr";
2031 macaddr = getvar(wlc_hw->vars, varname);
2032 if (macaddr == NULL)
2033 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: wlc_get_macaddr: macaddr "
2034 "getvar(%s) not found\n", wlc_hw->unit, varname);
2036 return macaddr;
2039 /* power both the pll and external oscillator on/off */
2040 static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want)
2042 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want);
2045 * dont power down if plldown is false or
2046 * we must poll hw radio disable
2048 if (!want && wlc_hw->pllreq)
2049 return;
2051 if (wlc_hw->sih)
2052 ai_clkctl_xtal(wlc_hw->sih, XTAL | PLL, want);
2054 wlc_hw->sbclk = want;
2055 if (!wlc_hw->sbclk) {
2056 wlc_hw->clk = false;
2057 if (wlc_hw->band && wlc_hw->band->pi)
2058 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
2063 * Return true if radio is disabled, otherwise false.
2064 * hw radio disable signal is an external pin, users activate it asynchronously
2065 * this function could be called when driver is down and w/o clock
2066 * it operates on different registers depending on corerev and boardflag.
2068 static bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw)
2070 bool v, clk, xtal;
2071 u32 resetbits = 0, flags = 0;
2073 xtal = wlc_hw->sbclk;
2074 if (!xtal)
2075 brcms_b_xtal(wlc_hw, ON);
2077 /* may need to take core out of reset first */
2078 clk = wlc_hw->clk;
2079 if (!clk) {
2081 * mac no longer enables phyclk automatically when driver
2082 * accesses phyreg throughput mac. This can be skipped since
2083 * only mac reg is accessed below
2085 flags |= SICF_PCLKE;
2088 * AI chip doesn't restore bar0win2 on
2089 * hibernation/resume, need sw fixup
2091 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2092 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
2093 wlc_hw->regs = (struct d11regs __iomem *)
2094 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
2095 ai_core_reset(wlc_hw->sih, flags, resetbits);
2096 brcms_c_mctrl_reset(wlc_hw);
2099 v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0);
2101 /* put core back into reset */
2102 if (!clk)
2103 ai_core_disable(wlc_hw->sih, 0);
2105 if (!xtal)
2106 brcms_b_xtal(wlc_hw, OFF);
2108 return v;
2111 static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo)
2113 struct dma_pub *di = wlc_hw->di[fifo];
2114 return dma_rxreset(di);
2117 /* d11 core reset
2118 * ensure fask clock during reset
2119 * reset dma
2120 * reset d11(out of reset)
2121 * reset phy(out of reset)
2122 * clear software macintstatus for fresh new start
2123 * one testing hack wlc_hw->noreset will bypass the d11/phy reset
2125 void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags)
2127 struct d11regs __iomem *regs;
2128 uint i;
2129 bool fastclk;
2130 u32 resetbits = 0;
2132 if (flags == BRCMS_USE_COREFLAGS)
2133 flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0);
2135 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2137 regs = wlc_hw->regs;
2139 /* request FAST clock if not on */
2140 fastclk = wlc_hw->forcefastclk;
2141 if (!fastclk)
2142 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2144 /* reset the dma engines except first time thru */
2145 if (ai_iscoreup(wlc_hw->sih)) {
2146 for (i = 0; i < NFIFO; i++)
2147 if ((wlc_hw->di[i]) && (!dma_txreset(wlc_hw->di[i])))
2148 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: "
2149 "dma_txreset[%d]: cannot stop dma\n",
2150 wlc_hw->unit, __func__, i);
2152 if ((wlc_hw->di[RX_FIFO])
2153 && (!wlc_dma_rxreset(wlc_hw, RX_FIFO)))
2154 wiphy_err(wlc_hw->wlc->wiphy, "wl%d: %s: dma_rxreset"
2155 "[%d]: cannot stop dma\n",
2156 wlc_hw->unit, __func__, RX_FIFO);
2158 /* if noreset, just stop the psm and return */
2159 if (wlc_hw->noreset) {
2160 wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */
2161 brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0);
2162 return;
2166 * mac no longer enables phyclk automatically when driver accesses
2167 * phyreg throughput mac, AND phy_reset is skipped at early stage when
2168 * band->pi is invalid. need to enable PHY CLK
2170 flags |= SICF_PCLKE;
2173 * reset the core
2174 * In chips with PMU, the fastclk request goes through d11 core
2175 * reg 0x1e0, which is cleared by the core_reset. have to re-request it.
2177 * This adds some delay and we can optimize it by also requesting
2178 * fastclk through chipcommon during this period if necessary. But
2179 * that has to work coordinate with other driver like mips/arm since
2180 * they may touch chipcommon as well.
2182 wlc_hw->clk = false;
2183 ai_core_reset(wlc_hw->sih, flags, resetbits);
2184 wlc_hw->clk = true;
2185 if (wlc_hw->band && wlc_hw->band->pi)
2186 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true);
2188 brcms_c_mctrl_reset(wlc_hw);
2190 if (wlc_hw->sih->cccaps & CC_CAP_PMU)
2191 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
2193 brcms_b_phy_reset(wlc_hw);
2195 /* turn on PHY_PLL */
2196 brcms_b_core_phypll_ctl(wlc_hw, true);
2198 /* clear sw intstatus */
2199 wlc_hw->wlc->macintstatus = 0;
2201 /* restore the clk setting */
2202 if (!fastclk)
2203 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
2206 /* txfifo sizes needs to be modified(increased) since the newer cores
2207 * have more memory.
2209 static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw)
2211 struct d11regs __iomem *regs = wlc_hw->regs;
2212 u16 fifo_nu;
2213 u16 txfifo_startblk = TXFIFO_START_BLK, txfifo_endblk;
2214 u16 txfifo_def, txfifo_def1;
2215 u16 txfifo_cmd;
2217 /* tx fifos start at TXFIFO_START_BLK from the Base address */
2218 txfifo_startblk = TXFIFO_START_BLK;
2220 /* sequence of operations: reset fifo, set fifo size, reset fifo */
2221 for (fifo_nu = 0; fifo_nu < NFIFO; fifo_nu++) {
2223 txfifo_endblk = txfifo_startblk + wlc_hw->xmtfifo_sz[fifo_nu];
2224 txfifo_def = (txfifo_startblk & 0xff) |
2225 (((txfifo_endblk - 1) & 0xff) << TXFIFO_FIFOTOP_SHIFT);
2226 txfifo_def1 = ((txfifo_startblk >> 8) & 0x1) |
2227 ((((txfifo_endblk -
2228 1) >> 8) & 0x1) << TXFIFO_FIFOTOP_SHIFT);
2229 txfifo_cmd =
2230 TXFIFOCMD_RESET_MASK | (fifo_nu << TXFIFOCMD_FIFOSEL_SHIFT);
2232 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2233 W_REG(&regs->xmtfifodef, txfifo_def);
2234 W_REG(&regs->xmtfifodef1, txfifo_def1);
2236 W_REG(&regs->xmtfifocmd, txfifo_cmd);
2238 txfifo_startblk += wlc_hw->xmtfifo_sz[fifo_nu];
2241 * need to propagate to shm location to be in sync since ucode/hw won't
2242 * do this
2244 brcms_b_write_shm(wlc_hw, M_FIFOSIZE0,
2245 wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]);
2246 brcms_b_write_shm(wlc_hw, M_FIFOSIZE1,
2247 wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]);
2248 brcms_b_write_shm(wlc_hw, M_FIFOSIZE2,
2249 ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw->
2250 xmtfifo_sz[TX_AC_BK_FIFO]));
2251 brcms_b_write_shm(wlc_hw, M_FIFOSIZE3,
2252 ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw->
2253 xmtfifo_sz[TX_BCMC_FIFO]));
2256 /* This function is used for changing the tsf frac register
2257 * If spur avoidance mode is off, the mac freq will be 80/120/160Mhz
2258 * If spur avoidance mode is on1, the mac freq will be 82/123/164Mhz
2259 * If spur avoidance mode is on2, the mac freq will be 84/126/168Mhz
2260 * HTPHY Formula is 2^26/freq(MHz) e.g.
2261 * For spuron2 - 126MHz -> 2^26/126 = 532610.0
2262 * - 532610 = 0x82082 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x2082
2263 * For spuron: 123MHz -> 2^26/123 = 545600.5
2264 * - 545601 = 0x85341 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x5341
2265 * For spur off: 120MHz -> 2^26/120 = 559240.5
2266 * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889
2269 void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode)
2271 struct d11regs __iomem *regs = wlc_hw->regs;
2273 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
2274 (wlc_hw->sih->chip == BCM43225_CHIP_ID)) {
2275 if (spurmode == WL_SPURAVOID_ON2) { /* 126Mhz */
2276 W_REG(&regs->tsf_clk_frac_l, 0x2082);
2277 W_REG(&regs->tsf_clk_frac_h, 0x8);
2278 } else if (spurmode == WL_SPURAVOID_ON1) { /* 123Mhz */
2279 W_REG(&regs->tsf_clk_frac_l, 0x5341);
2280 W_REG(&regs->tsf_clk_frac_h, 0x8);
2281 } else { /* 120Mhz */
2282 W_REG(&regs->tsf_clk_frac_l, 0x8889);
2283 W_REG(&regs->tsf_clk_frac_h, 0x8);
2285 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2286 if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */
2287 W_REG(&regs->tsf_clk_frac_l, 0x7CE0);
2288 W_REG(&regs->tsf_clk_frac_h, 0xC);
2289 } else { /* 80Mhz */
2290 W_REG(&regs->tsf_clk_frac_l, 0xCCCD);
2291 W_REG(&regs->tsf_clk_frac_h, 0xC);
2296 /* Initialize GPIOs that are controlled by D11 core */
2297 static void brcms_c_gpio_init(struct brcms_c_info *wlc)
2299 struct brcms_hardware *wlc_hw = wlc->hw;
2300 struct d11regs __iomem *regs;
2301 u32 gc, gm;
2303 regs = wlc_hw->regs;
2305 /* use GPIO select 0 to get all gpio signals from the gpio out reg */
2306 brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0);
2309 * Common GPIO setup:
2310 * G0 = LED 0 = WLAN Activity
2311 * G1 = LED 1 = WLAN 2.4 GHz Radio State
2312 * G2 = LED 2 = WLAN 5 GHz Radio State
2313 * G4 = radio disable input (HI enabled, LO disabled)
2316 gc = gm = 0;
2318 /* Allocate GPIOs for mimo antenna diversity feature */
2319 if (wlc_hw->antsel_type == ANTSEL_2x3) {
2320 /* Enable antenna diversity, use 2x3 mode */
2321 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2322 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2323 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE,
2324 MHF3_ANTSEL_MODE, BRCM_BAND_ALL);
2326 /* init superswitch control */
2327 wlc_phy_antsel_init(wlc_hw->band->pi, false);
2329 } else if (wlc_hw->antsel_type == ANTSEL_2x4) {
2330 gm |= gc |= (BOARD_GPIO_12 | BOARD_GPIO_13);
2332 * The board itself is powered by these GPIOs
2333 * (when not sending pattern) so set them high
2335 OR_REG(&regs->psm_gpio_oe,
2336 (BOARD_GPIO_12 | BOARD_GPIO_13));
2337 OR_REG(&regs->psm_gpio_out,
2338 (BOARD_GPIO_12 | BOARD_GPIO_13));
2340 /* Enable antenna diversity, use 2x4 mode */
2341 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN,
2342 MHF3_ANTSEL_EN, BRCM_BAND_ALL);
2343 brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0,
2344 BRCM_BAND_ALL);
2346 /* Configure the desired clock to be 4Mhz */
2347 brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV,
2348 ANTSEL_CLKDIV_4MHZ);
2352 * gpio 9 controls the PA. ucode is responsible
2353 * for wiggling out and oe
2355 if (wlc_hw->boardflags & BFL_PACTRL)
2356 gm |= gc |= BOARD_GPIO_PACTRL;
2358 /* apply to gpiocontrol register */
2359 ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY);
2362 static void brcms_ucode_write(struct brcms_hardware *wlc_hw,
2363 const __le32 ucode[], const size_t nbytes)
2365 struct d11regs __iomem *regs = wlc_hw->regs;
2366 uint i;
2367 uint count;
2369 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2371 count = (nbytes / sizeof(u32));
2373 W_REG(&regs->objaddr, (OBJADDR_AUTO_INC | OBJADDR_UCM_SEL));
2374 (void)R_REG(&regs->objaddr);
2375 for (i = 0; i < count; i++)
2376 W_REG(&regs->objdata, le32_to_cpu(ucode[i]));
2380 static void brcms_ucode_download(struct brcms_hardware *wlc_hw)
2382 struct brcms_c_info *wlc;
2383 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
2385 wlc = wlc_hw->wlc;
2387 if (wlc_hw->ucode_loaded)
2388 return;
2390 if (D11REV_IS(wlc_hw->corerev, 23)) {
2391 if (BRCMS_ISNPHY(wlc_hw->band)) {
2392 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo,
2393 ucode->bcm43xx_16_mimosz);
2394 wlc_hw->ucode_loaded = true;
2395 } else
2396 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2397 "corerev %d\n",
2398 __func__, wlc_hw->unit, wlc_hw->corerev);
2399 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
2400 if (BRCMS_ISLCNPHY(wlc_hw->band)) {
2401 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn,
2402 ucode->bcm43xx_24_lcnsz);
2403 wlc_hw->ucode_loaded = true;
2404 } else {
2405 wiphy_err(wlc->wiphy, "%s: wl%d: unsupported phy in "
2406 "corerev %d\n",
2407 __func__, wlc_hw->unit, wlc_hw->corerev);
2412 void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant)
2414 /* update sw state */
2415 wlc_hw->bmac_phytxant = phytxant;
2417 /* push to ucode if up */
2418 if (!wlc_hw->up)
2419 return;
2420 brcms_c_ucode_txant_set(wlc_hw);
2424 u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw)
2426 return (u16) wlc_hw->wlc->stf->txant;
2429 void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type)
2431 wlc_hw->antsel_type = antsel_type;
2433 /* Update the antsel type for phy module to use */
2434 wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type);
2437 static void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw)
2439 bool fatal = false;
2440 uint unit;
2441 uint intstatus, idx;
2442 struct d11regs __iomem *regs = wlc_hw->regs;
2443 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2445 unit = wlc_hw->unit;
2447 for (idx = 0; idx < NFIFO; idx++) {
2448 /* read intstatus register and ignore any non-error bits */
2449 intstatus =
2450 R_REG(&regs->intctrlregs[idx].intstatus) & I_ERRORS;
2451 if (!intstatus)
2452 continue;
2454 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: intstatus%d 0x%x\n",
2455 unit, idx, intstatus);
2457 if (intstatus & I_RO) {
2458 wiphy_err(wiphy, "wl%d: fifo %d: receive fifo "
2459 "overflow\n", unit, idx);
2460 fatal = true;
2463 if (intstatus & I_PC) {
2464 wiphy_err(wiphy, "wl%d: fifo %d: descriptor error\n",
2465 unit, idx);
2466 fatal = true;
2469 if (intstatus & I_PD) {
2470 wiphy_err(wiphy, "wl%d: fifo %d: data error\n", unit,
2471 idx);
2472 fatal = true;
2475 if (intstatus & I_DE) {
2476 wiphy_err(wiphy, "wl%d: fifo %d: descriptor protocol "
2477 "error\n", unit, idx);
2478 fatal = true;
2481 if (intstatus & I_RU)
2482 wiphy_err(wiphy, "wl%d: fifo %d: receive descriptor "
2483 "underflow\n", idx, unit);
2485 if (intstatus & I_XU) {
2486 wiphy_err(wiphy, "wl%d: fifo %d: transmit fifo "
2487 "underflow\n", idx, unit);
2488 fatal = true;
2491 if (fatal) {
2492 brcms_c_fatal_error(wlc_hw->wlc); /* big hammer */
2493 break;
2494 } else
2495 W_REG(&regs->intctrlregs[idx].intstatus,
2496 intstatus);
2500 void brcms_c_intrson(struct brcms_c_info *wlc)
2502 struct brcms_hardware *wlc_hw = wlc->hw;
2503 wlc->macintmask = wlc->defmacintmask;
2504 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2508 * callback for siutils.c, which has only wlc handler, no wl they both check
2509 * up, not only because there is no need to off/restore d11 interrupt but also
2510 * because per-port code may require sync with valid interrupt.
2512 static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc)
2514 if (!wlc->hw->up)
2515 return 0;
2517 return brcms_intrsoff(wlc->wl);
2520 static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2522 if (!wlc->hw->up)
2523 return;
2525 brcms_intrsrestore(wlc->wl, macintmask);
2528 u32 brcms_c_intrsoff(struct brcms_c_info *wlc)
2530 struct brcms_hardware *wlc_hw = wlc->hw;
2531 u32 macintmask;
2533 if (!wlc_hw->clk)
2534 return 0;
2536 macintmask = wlc->macintmask; /* isr can still happen */
2538 W_REG(&wlc_hw->regs->macintmask, 0);
2539 (void)R_REG(&wlc_hw->regs->macintmask); /* sync readback */
2540 udelay(1); /* ensure int line is no longer driven */
2541 wlc->macintmask = 0;
2543 /* return previous macintmask; resolve race between us and our isr */
2544 return wlc->macintstatus ? 0 : macintmask;
2547 void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask)
2549 struct brcms_hardware *wlc_hw = wlc->hw;
2550 if (!wlc_hw->clk)
2551 return;
2553 wlc->macintmask = macintmask;
2554 W_REG(&wlc_hw->regs->macintmask, wlc->macintmask);
2557 static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw,
2558 uint tx_fifo)
2560 u8 fifo = 1 << tx_fifo;
2562 /* Two clients of this code, 11h Quiet period and scanning. */
2564 /* only suspend if not already suspended */
2565 if ((wlc_hw->suspended_fifos & fifo) == fifo)
2566 return;
2568 /* force the core awake only if not already */
2569 if (wlc_hw->suspended_fifos == 0)
2570 brcms_c_ucode_wake_override_set(wlc_hw,
2571 BRCMS_WAKE_OVERRIDE_TXFIFO);
2573 wlc_hw->suspended_fifos |= fifo;
2575 if (wlc_hw->di[tx_fifo]) {
2577 * Suspending AMPDU transmissions in the middle can cause
2578 * underflow which may result in mismatch between ucode and
2579 * driver so suspend the mac before suspending the FIFO
2581 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2582 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
2584 dma_txsuspend(wlc_hw->di[tx_fifo]);
2586 if (BRCMS_PHY_11N_CAP(wlc_hw->band))
2587 brcms_c_enable_mac(wlc_hw->wlc);
2591 static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw,
2592 uint tx_fifo)
2594 /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case
2595 * but need to be done here for PIO otherwise the watchdog will catch
2596 * the inconsistency and fire
2598 /* Two clients of this code, 11h Quiet period and scanning. */
2599 if (wlc_hw->di[tx_fifo])
2600 dma_txresume(wlc_hw->di[tx_fifo]);
2602 /* allow core to sleep again */
2603 if (wlc_hw->suspended_fifos == 0)
2604 return;
2605 else {
2606 wlc_hw->suspended_fifos &= ~(1 << tx_fifo);
2607 if (wlc_hw->suspended_fifos == 0)
2608 brcms_c_ucode_wake_override_clear(wlc_hw,
2609 BRCMS_WAKE_OVERRIDE_TXFIFO);
2613 static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, u32 flags)
2615 const u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0};
2617 if (on) {
2618 /* suspend tx fifos */
2619 brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO);
2620 brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO);
2621 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO);
2622 brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO);
2624 /* zero the address match register so we do not send ACKs */
2625 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2626 null_ether_addr);
2627 } else {
2628 /* resume tx fifos */
2629 brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO);
2630 brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO);
2631 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO);
2632 brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO);
2634 /* Restore address */
2635 brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET,
2636 wlc_hw->etheraddr);
2639 wlc_phy_mute_upd(wlc_hw->band->pi, on, flags);
2641 if (on)
2642 brcms_c_ucode_mute_override_set(wlc_hw);
2643 else
2644 brcms_c_ucode_mute_override_clear(wlc_hw);
2648 * Read and clear macintmask and macintstatus and intstatus registers.
2649 * This routine should be called with interrupts off
2650 * Return:
2651 * -1 if brcms_deviceremoved(wlc) evaluates to true;
2652 * 0 if the interrupt is not for us, or we are in some special cases;
2653 * device interrupt status bits otherwise.
2655 static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr)
2657 struct brcms_hardware *wlc_hw = wlc->hw;
2658 struct d11regs __iomem *regs = wlc_hw->regs;
2659 u32 macintstatus;
2661 /* macintstatus includes a DMA interrupt summary bit */
2662 macintstatus = R_REG(&regs->macintstatus);
2664 BCMMSG(wlc->wiphy, "wl%d: macintstatus: 0x%x\n", wlc_hw->unit,
2665 macintstatus);
2667 /* detect cardbus removed, in power down(suspend) and in reset */
2668 if (brcms_deviceremoved(wlc))
2669 return -1;
2671 /* brcms_deviceremoved() succeeds even when the core is still resetting,
2672 * handle that case here.
2674 if (macintstatus == 0xffffffff)
2675 return 0;
2677 /* defer unsolicited interrupts */
2678 macintstatus &= (in_isr ? wlc->macintmask : wlc->defmacintmask);
2680 /* if not for us */
2681 if (macintstatus == 0)
2682 return 0;
2684 /* interrupts are already turned off for CFE build
2685 * Caution: For CFE Turning off the interrupts again has some undesired
2686 * consequences
2688 /* turn off the interrupts */
2689 W_REG(&regs->macintmask, 0);
2690 (void)R_REG(&regs->macintmask); /* sync readback */
2691 wlc->macintmask = 0;
2693 /* clear device interrupts */
2694 W_REG(&regs->macintstatus, macintstatus);
2696 /* MI_DMAINT is indication of non-zero intstatus */
2697 if (macintstatus & MI_DMAINT)
2699 * only fifo interrupt enabled is I_RI in
2700 * RX_FIFO. If MI_DMAINT is set, assume it
2701 * is set and clear the interrupt.
2703 W_REG(&regs->intctrlregs[RX_FIFO].intstatus,
2704 DEF_RXINTMASK);
2706 return macintstatus;
2709 /* Update wlc->macintstatus and wlc->intstatus[]. */
2710 /* Return true if they are updated successfully. false otherwise */
2711 bool brcms_c_intrsupd(struct brcms_c_info *wlc)
2713 u32 macintstatus;
2715 /* read and clear macintstatus and intstatus registers */
2716 macintstatus = wlc_intstatus(wlc, false);
2718 /* device is removed */
2719 if (macintstatus == 0xffffffff)
2720 return false;
2722 /* update interrupt status in software */
2723 wlc->macintstatus |= macintstatus;
2725 return true;
2729 * First-level interrupt processing.
2730 * Return true if this was our interrupt, false otherwise.
2731 * *wantdpc will be set to true if further brcms_c_dpc() processing is required,
2732 * false otherwise.
2734 bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc)
2736 struct brcms_hardware *wlc_hw = wlc->hw;
2737 u32 macintstatus;
2739 *wantdpc = false;
2741 if (!wlc_hw->up || !wlc->macintmask)
2742 return false;
2744 /* read and clear macintstatus and intstatus registers */
2745 macintstatus = wlc_intstatus(wlc, true);
2747 if (macintstatus == 0xffffffff)
2748 wiphy_err(wlc->wiphy, "DEVICEREMOVED detected in the ISR code"
2749 " path\n");
2751 /* it is not for us */
2752 if (macintstatus == 0)
2753 return false;
2755 *wantdpc = true;
2757 /* save interrupt status bits */
2758 wlc->macintstatus = macintstatus;
2760 return true;
2764 void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc)
2766 struct brcms_hardware *wlc_hw = wlc->hw;
2767 struct d11regs __iomem *regs = wlc_hw->regs;
2768 u32 mc, mi;
2769 struct wiphy *wiphy = wlc->wiphy;
2771 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2772 wlc_hw->band->bandunit);
2775 * Track overlapping suspend requests
2777 wlc_hw->mac_suspend_depth++;
2778 if (wlc_hw->mac_suspend_depth > 1)
2779 return;
2781 /* force the core awake */
2782 brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2784 mc = R_REG(&regs->maccontrol);
2786 if (mc == 0xffffffff) {
2787 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2788 __func__);
2789 brcms_down(wlc->wl);
2790 return;
2792 WARN_ON(mc & MCTL_PSM_JMP_0);
2793 WARN_ON(!(mc & MCTL_PSM_RUN));
2794 WARN_ON(!(mc & MCTL_EN_MAC));
2796 mi = R_REG(&regs->macintstatus);
2797 if (mi == 0xffffffff) {
2798 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2799 __func__);
2800 brcms_down(wlc->wl);
2801 return;
2803 WARN_ON(mi & MI_MACSSPNDD);
2805 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0);
2807 SPINWAIT(!(R_REG(&regs->macintstatus) & MI_MACSSPNDD),
2808 BRCMS_MAX_MAC_SUSPEND);
2810 if (!(R_REG(&regs->macintstatus) & MI_MACSSPNDD)) {
2811 wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS"
2812 " and MI_MACSSPNDD is still not on.\n",
2813 wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND);
2814 wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, "
2815 "psm_brc 0x%04x\n", wlc_hw->unit,
2816 R_REG(&regs->psmdebug),
2817 R_REG(&regs->phydebug),
2818 R_REG(&regs->psm_brc));
2821 mc = R_REG(&regs->maccontrol);
2822 if (mc == 0xffffffff) {
2823 wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit,
2824 __func__);
2825 brcms_down(wlc->wl);
2826 return;
2828 WARN_ON(mc & MCTL_PSM_JMP_0);
2829 WARN_ON(!(mc & MCTL_PSM_RUN));
2830 WARN_ON(mc & MCTL_EN_MAC);
2833 void brcms_c_enable_mac(struct brcms_c_info *wlc)
2835 struct brcms_hardware *wlc_hw = wlc->hw;
2836 struct d11regs __iomem *regs = wlc_hw->regs;
2837 u32 mc, mi;
2839 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit,
2840 wlc->band->bandunit);
2843 * Track overlapping suspend requests
2845 wlc_hw->mac_suspend_depth--;
2846 if (wlc_hw->mac_suspend_depth > 0)
2847 return;
2849 mc = R_REG(&regs->maccontrol);
2850 WARN_ON(mc & MCTL_PSM_JMP_0);
2851 WARN_ON(mc & MCTL_EN_MAC);
2852 WARN_ON(!(mc & MCTL_PSM_RUN));
2854 brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC);
2855 W_REG(&regs->macintstatus, MI_MACSSPNDD);
2857 mc = R_REG(&regs->maccontrol);
2858 WARN_ON(mc & MCTL_PSM_JMP_0);
2859 WARN_ON(!(mc & MCTL_EN_MAC));
2860 WARN_ON(!(mc & MCTL_PSM_RUN));
2862 mi = R_REG(&regs->macintstatus);
2863 WARN_ON(mi & MI_MACSSPNDD);
2865 brcms_c_ucode_wake_override_clear(wlc_hw,
2866 BRCMS_WAKE_OVERRIDE_MACSUSPEND);
2869 void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode)
2871 wlc_hw->hw_stf_ss_opmode = stf_mode;
2873 if (wlc_hw->clk)
2874 brcms_upd_ofdm_pctl1_table(wlc_hw);
2877 static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw)
2879 struct d11regs __iomem *regs;
2880 u32 w, val;
2881 struct wiphy *wiphy = wlc_hw->wlc->wiphy;
2883 BCMMSG(wiphy, "wl%d\n", wlc_hw->unit);
2885 regs = wlc_hw->regs;
2887 /* Validate dchip register access */
2889 W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2890 (void)R_REG(&regs->objaddr);
2891 w = R_REG(&regs->objdata);
2893 /* Can we write and read back a 32bit register? */
2894 W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2895 (void)R_REG(&regs->objaddr);
2896 W_REG(&regs->objdata, (u32) 0xaa5555aa);
2898 W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2899 (void)R_REG(&regs->objaddr);
2900 val = R_REG(&regs->objdata);
2901 if (val != (u32) 0xaa5555aa) {
2902 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2903 "expected 0xaa5555aa\n", wlc_hw->unit, val);
2904 return false;
2907 W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2908 (void)R_REG(&regs->objaddr);
2909 W_REG(&regs->objdata, (u32) 0x55aaaa55);
2911 W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2912 (void)R_REG(&regs->objaddr);
2913 val = R_REG(&regs->objdata);
2914 if (val != (u32) 0x55aaaa55) {
2915 wiphy_err(wiphy, "wl%d: validate_chip_access: SHM = 0x%x, "
2916 "expected 0x55aaaa55\n", wlc_hw->unit, val);
2917 return false;
2920 W_REG(&regs->objaddr, OBJADDR_SHM_SEL | 0);
2921 (void)R_REG(&regs->objaddr);
2922 W_REG(&regs->objdata, w);
2924 /* clear CFPStart */
2925 W_REG(&regs->tsf_cfpstart, 0);
2927 w = R_REG(&regs->maccontrol);
2928 if ((w != (MCTL_IHR_EN | MCTL_WAKE)) &&
2929 (w != (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE))) {
2930 wiphy_err(wiphy, "wl%d: validate_chip_access: maccontrol = "
2931 "0x%x, expected 0x%x or 0x%x\n", wlc_hw->unit, w,
2932 (MCTL_IHR_EN | MCTL_WAKE),
2933 (MCTL_IHR_EN | MCTL_GMODE | MCTL_WAKE));
2934 return false;
2937 return true;
2940 #define PHYPLL_WAIT_US 100000
2942 void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on)
2944 struct d11regs __iomem *regs;
2945 u32 tmp;
2947 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
2949 tmp = 0;
2950 regs = wlc_hw->regs;
2952 if (on) {
2953 if ((wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
2954 OR_REG(&regs->clk_ctl_st,
2955 (CCS_ERSRC_REQ_HT | CCS_ERSRC_REQ_D11PLL |
2956 CCS_ERSRC_REQ_PHYPLL));
2957 SPINWAIT((R_REG(&regs->clk_ctl_st) &
2958 (CCS_ERSRC_AVAIL_HT)) != (CCS_ERSRC_AVAIL_HT),
2959 PHYPLL_WAIT_US);
2961 tmp = R_REG(&regs->clk_ctl_st);
2962 if ((tmp & (CCS_ERSRC_AVAIL_HT)) !=
2963 (CCS_ERSRC_AVAIL_HT))
2964 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on PHY"
2965 " PLL failed\n", __func__);
2966 } else {
2967 OR_REG(&regs->clk_ctl_st,
2968 (CCS_ERSRC_REQ_D11PLL | CCS_ERSRC_REQ_PHYPLL));
2969 SPINWAIT((R_REG(&regs->clk_ctl_st) &
2970 (CCS_ERSRC_AVAIL_D11PLL |
2971 CCS_ERSRC_AVAIL_PHYPLL)) !=
2972 (CCS_ERSRC_AVAIL_D11PLL |
2973 CCS_ERSRC_AVAIL_PHYPLL), PHYPLL_WAIT_US);
2975 tmp = R_REG(&regs->clk_ctl_st);
2976 if ((tmp &
2977 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2979 (CCS_ERSRC_AVAIL_D11PLL | CCS_ERSRC_AVAIL_PHYPLL))
2980 wiphy_err(wlc_hw->wlc->wiphy, "%s: turn on "
2981 "PHY PLL failed\n", __func__);
2983 } else {
2985 * Since the PLL may be shared, other cores can still
2986 * be requesting it; so we'll deassert the request but
2987 * not wait for status to comply.
2989 AND_REG(&regs->clk_ctl_st, ~CCS_ERSRC_REQ_PHYPLL);
2990 tmp = R_REG(&regs->clk_ctl_st);
2994 void brcms_c_coredisable(struct brcms_hardware *wlc_hw)
2996 bool dev_gone;
2998 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3000 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
3002 if (dev_gone)
3003 return;
3005 if (wlc_hw->noreset)
3006 return;
3008 /* radio off */
3009 wlc_phy_switch_radio(wlc_hw->band->pi, OFF);
3011 /* turn off analog core */
3012 wlc_phy_anacore(wlc_hw->band->pi, OFF);
3014 /* turn off PHYPLL to save power */
3015 brcms_b_core_phypll_ctl(wlc_hw, false);
3017 wlc_hw->clk = false;
3018 ai_core_disable(wlc_hw->sih, 0);
3019 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
3022 static void brcms_c_flushqueues(struct brcms_c_info *wlc)
3024 struct brcms_hardware *wlc_hw = wlc->hw;
3025 uint i;
3027 /* free any posted tx packets */
3028 for (i = 0; i < NFIFO; i++)
3029 if (wlc_hw->di[i]) {
3030 dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL);
3031 wlc->core->txpktpend[i] = 0;
3032 BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i);
3035 /* free any posted rx packets */
3036 dma_rxreclaim(wlc_hw->di[RX_FIFO]);
3039 static u16
3040 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel)
3042 struct d11regs __iomem *regs = wlc_hw->regs;
3043 u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
3044 u16 __iomem *objdata_hi = objdata_lo + 1;
3045 u16 v;
3047 W_REG(&regs->objaddr, sel | (offset >> 2));
3048 (void)R_REG(&regs->objaddr);
3049 if (offset & 2)
3050 v = R_REG(objdata_hi);
3051 else
3052 v = R_REG(objdata_lo);
3054 return v;
3057 static void
3058 brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v,
3059 u32 sel)
3061 struct d11regs __iomem *regs = wlc_hw->regs;
3062 u16 __iomem *objdata_lo = (u16 __iomem *)&regs->objdata;
3063 u16 __iomem *objdata_hi = objdata_lo + 1;
3065 W_REG(&regs->objaddr, sel | (offset >> 2));
3066 (void)R_REG(&regs->objaddr);
3067 if (offset & 2)
3068 W_REG(objdata_hi, v);
3069 else
3070 W_REG(objdata_lo, v);
3074 * Read a single u16 from shared memory.
3075 * SHM 'offset' needs to be an even address
3077 u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset)
3079 return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL);
3083 * Write a single u16 to shared memory.
3084 * SHM 'offset' needs to be an even address
3086 void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v)
3088 brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL);
3092 * Copy a buffer to shared memory of specified type .
3093 * SHM 'offset' needs to be an even address and
3094 * Buffer length 'len' must be an even number of bytes
3095 * 'sel' selects the type of memory
3097 void
3098 brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset,
3099 const void *buf, int len, u32 sel)
3101 u16 v;
3102 const u8 *p = (const u8 *)buf;
3103 int i;
3105 if (len <= 0 || (offset & 1) || (len & 1))
3106 return;
3108 for (i = 0; i < len; i += 2) {
3109 v = p[i] | (p[i + 1] << 8);
3110 brcms_b_write_objmem(wlc_hw, offset + i, v, sel);
3115 * Copy a piece of shared memory of specified type to a buffer .
3116 * SHM 'offset' needs to be an even address and
3117 * Buffer length 'len' must be an even number of bytes
3118 * 'sel' selects the type of memory
3120 void
3121 brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf,
3122 int len, u32 sel)
3124 u16 v;
3125 u8 *p = (u8 *) buf;
3126 int i;
3128 if (len <= 0 || (offset & 1) || (len & 1))
3129 return;
3131 for (i = 0; i < len; i += 2) {
3132 v = brcms_b_read_objmem(wlc_hw, offset + i, sel);
3133 p[i] = v & 0xFF;
3134 p[i + 1] = (v >> 8) & 0xFF;
3138 static void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf,
3139 uint *len)
3141 BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n",
3142 wlc_hw->vars_size);
3144 *buf = wlc_hw->vars;
3145 *len = wlc_hw->vars_size;
3148 static void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw,
3149 u16 SRL, u16 LRL)
3151 wlc_hw->SRL = SRL;
3152 wlc_hw->LRL = LRL;
3154 /* write retry limit to SCR, shouldn't need to suspend */
3155 if (wlc_hw->up) {
3156 W_REG(&wlc_hw->regs->objaddr,
3157 OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3158 (void)R_REG(&wlc_hw->regs->objaddr);
3159 W_REG(&wlc_hw->regs->objdata, wlc_hw->SRL);
3160 W_REG(&wlc_hw->regs->objaddr,
3161 OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3162 (void)R_REG(&wlc_hw->regs->objaddr);
3163 W_REG(&wlc_hw->regs->objdata, wlc_hw->LRL);
3167 static void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, u32 req_bit)
3169 if (set) {
3170 if (mboolisset(wlc_hw->pllreq, req_bit))
3171 return;
3173 mboolset(wlc_hw->pllreq, req_bit);
3175 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3176 if (!wlc_hw->sbclk)
3177 brcms_b_xtal(wlc_hw, ON);
3179 } else {
3180 if (!mboolisset(wlc_hw->pllreq, req_bit))
3181 return;
3183 mboolclr(wlc_hw->pllreq, req_bit);
3185 if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) {
3186 if (wlc_hw->sbclk)
3187 brcms_b_xtal(wlc_hw, OFF);
3192 static void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail)
3194 wlc_hw->antsel_avail = antsel_avail;
3198 * conditions under which the PM bit should be set in outgoing frames
3199 * and STAY_AWAKE is meaningful
3201 bool brcms_c_ps_allowed(struct brcms_c_info *wlc)
3203 struct brcms_bss_cfg *cfg = wlc->bsscfg;
3205 /* disallow PS when one of the following global conditions meets */
3206 if (!wlc->pub->associated)
3207 return false;
3209 /* disallow PS when one of these meets when not scanning */
3210 if (wlc->monitor)
3211 return false;
3213 if (cfg->associated) {
3215 * disallow PS when one of the following
3216 * bsscfg specific conditions meets
3218 if (!cfg->BSS)
3219 return false;
3221 return false;
3224 return true;
3227 static void brcms_b_reset(struct brcms_hardware *wlc_hw)
3229 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3231 /* reset the core */
3232 if (!brcms_deviceremoved(wlc_hw->wlc))
3233 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
3235 /* purge the dma rings */
3236 brcms_c_flushqueues(wlc_hw->wlc);
3239 void brcms_c_reset(struct brcms_c_info *wlc)
3241 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3243 /* slurp up hw mac counters before core reset */
3244 brcms_c_statsupd(wlc);
3246 /* reset our snapshot of macstat counters */
3247 memset((char *)wlc->core->macstat_snapshot, 0,
3248 sizeof(struct macstat));
3250 brcms_b_reset(wlc->hw);
3253 void brcms_c_fatal_error(struct brcms_c_info *wlc)
3255 wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n",
3256 wlc->pub->unit);
3257 brcms_init(wlc->wl);
3260 /* Return the channel the driver should initialize during brcms_c_init.
3261 * the channel may have to be changed from the currently configured channel
3262 * if other configurations are in conflict (bandlocked, 11n mode disabled,
3263 * invalid channel for current country, etc.)
3265 static u16 brcms_c_init_chanspec(struct brcms_c_info *wlc)
3267 u16 chanspec =
3268 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE |
3269 WL_CHANSPEC_BAND_2G;
3271 return chanspec;
3274 void brcms_c_init_scb(struct scb *scb)
3276 int i;
3278 memset(scb, 0, sizeof(struct scb));
3279 scb->flags = SCB_WMECAP | SCB_HTCAP;
3280 for (i = 0; i < NUMPRIO; i++) {
3281 scb->seqnum[i] = 0;
3282 scb->seqctl[i] = 0xFFFF;
3285 scb->seqctl_nonqos = 0xFFFF;
3286 scb->magic = SCB_MAGIC;
3289 /* d11 core init
3290 * reset PSM
3291 * download ucode/PCM
3292 * let ucode run to suspended
3293 * download ucode inits
3294 * config other core registers
3295 * init dma
3297 static void brcms_b_coreinit(struct brcms_c_info *wlc)
3299 struct brcms_hardware *wlc_hw = wlc->hw;
3300 struct d11regs __iomem *regs;
3301 u32 sflags;
3302 uint bcnint_us;
3303 uint i = 0;
3304 bool fifosz_fixup = false;
3305 int err = 0;
3306 u16 buf[NFIFO];
3307 struct wiphy *wiphy = wlc->wiphy;
3308 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode;
3310 regs = wlc_hw->regs;
3312 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
3314 /* reset PSM */
3315 brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE));
3317 brcms_ucode_download(wlc_hw);
3319 * FIFOSZ fixup. driver wants to controls the fifo allocation.
3321 fifosz_fixup = true;
3323 /* let the PSM run to the suspended state, set mode to BSS STA */
3324 W_REG(&regs->macintstatus, -1);
3325 brcms_b_mctrl(wlc_hw, ~0,
3326 (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE));
3328 /* wait for ucode to self-suspend after auto-init */
3329 SPINWAIT(((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0),
3330 1000 * 1000);
3331 if ((R_REG(&regs->macintstatus) & MI_MACSSPNDD) == 0)
3332 wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-"
3333 "suspend!\n", wlc_hw->unit);
3335 brcms_c_gpio_init(wlc);
3337 sflags = ai_core_sflags(wlc_hw->sih, 0, 0);
3339 if (D11REV_IS(wlc_hw->corerev, 23)) {
3340 if (BRCMS_ISNPHY(wlc_hw->band))
3341 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16);
3342 else
3343 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3344 " %d\n", __func__, wlc_hw->unit,
3345 wlc_hw->corerev);
3346 } else if (D11REV_IS(wlc_hw->corerev, 24)) {
3347 if (BRCMS_ISLCNPHY(wlc_hw->band))
3348 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24);
3349 else
3350 wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev"
3351 " %d\n", __func__, wlc_hw->unit,
3352 wlc_hw->corerev);
3353 } else {
3354 wiphy_err(wiphy, "%s: wl%d: unsupported corerev %d\n",
3355 __func__, wlc_hw->unit, wlc_hw->corerev);
3358 /* For old ucode, txfifo sizes needs to be modified(increased) */
3359 if (fifosz_fixup == true)
3360 brcms_b_corerev_fifofixup(wlc_hw);
3362 /* check txfifo allocations match between ucode and driver */
3363 buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0);
3364 if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) {
3365 i = TX_AC_BE_FIFO;
3366 err = -1;
3368 buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1);
3369 if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) {
3370 i = TX_AC_VI_FIFO;
3371 err = -1;
3373 buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2);
3374 buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff;
3375 buf[TX_AC_BK_FIFO] &= 0xff;
3376 if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) {
3377 i = TX_AC_BK_FIFO;
3378 err = -1;
3380 if (buf[TX_AC_VO_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO]) {
3381 i = TX_AC_VO_FIFO;
3382 err = -1;
3384 buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3);
3385 buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff;
3386 buf[TX_BCMC_FIFO] &= 0xff;
3387 if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) {
3388 i = TX_BCMC_FIFO;
3389 err = -1;
3391 if (buf[TX_ATIM_FIFO] != wlc_hw->xmtfifo_sz[TX_ATIM_FIFO]) {
3392 i = TX_ATIM_FIFO;
3393 err = -1;
3395 if (err != 0)
3396 wiphy_err(wiphy, "wlc_coreinit: txfifo mismatch: ucode size %d"
3397 " driver size %d index %d\n", buf[i],
3398 wlc_hw->xmtfifo_sz[i], i);
3400 /* make sure we can still talk to the mac */
3401 WARN_ON(R_REG(&regs->maccontrol) == 0xffffffff);
3403 /* band-specific inits done by wlc_bsinit() */
3405 /* Set up frame burst size and antenna swap threshold init values */
3406 brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST);
3407 brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT);
3409 /* enable one rx interrupt per received frame */
3410 W_REG(&regs->intrcvlazy[0], (1 << IRL_FC_SHIFT));
3412 /* set the station mode (BSS STA) */
3413 brcms_b_mctrl(wlc_hw,
3414 (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP),
3415 (MCTL_INFRA | MCTL_DISCARD_PMQ));
3417 /* set up Beacon interval */
3418 bcnint_us = 0x8000 << 10;
3419 W_REG(&regs->tsf_cfprep, (bcnint_us << CFPREP_CBI_SHIFT));
3420 W_REG(&regs->tsf_cfpstart, bcnint_us);
3421 W_REG(&regs->macintstatus, MI_GP1);
3423 /* write interrupt mask */
3424 W_REG(&regs->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK);
3426 /* allow the MAC to control the PHY clock (dynamic on/off) */
3427 brcms_b_macphyclk_set(wlc_hw, ON);
3429 /* program dynamic clock control fast powerup delay register */
3430 wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih);
3431 W_REG(&regs->scc_fastpwrup_dly, wlc->fastpwrup_dly);
3433 /* tell the ucode the corerev */
3434 brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev);
3436 /* tell the ucode MAC capabilities */
3437 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L,
3438 (u16) (wlc_hw->machwcap & 0xffff));
3439 brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H,
3440 (u16) ((wlc_hw->
3441 machwcap >> 16) & 0xffff));
3443 /* write retry limits to SCR, this done after PSM init */
3444 W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_SRC_LMT);
3445 (void)R_REG(&regs->objaddr);
3446 W_REG(&regs->objdata, wlc_hw->SRL);
3447 W_REG(&regs->objaddr, OBJADDR_SCR_SEL | S_DOT11_LRC_LMT);
3448 (void)R_REG(&regs->objaddr);
3449 W_REG(&regs->objdata, wlc_hw->LRL);
3451 /* write rate fallback retry limits */
3452 brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL);
3453 brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL);
3455 AND_REG(&regs->ifs_ctl, 0x0FFF);
3456 W_REG(&regs->ifs_aifsn, EDCF_AIFSN_MIN);
3458 /* init the tx dma engines */
3459 for (i = 0; i < NFIFO; i++) {
3460 if (wlc_hw->di[i])
3461 dma_txinit(wlc_hw->di[i]);
3464 /* init the rx dma engine(s) and post receive buffers */
3465 dma_rxinit(wlc_hw->di[RX_FIFO]);
3466 dma_rxfill(wlc_hw->di[RX_FIFO]);
3469 void
3470 static brcms_b_init(struct brcms_hardware *wlc_hw, u16 chanspec,
3471 bool mute) {
3472 u32 macintmask;
3473 bool fastclk;
3474 struct brcms_c_info *wlc = wlc_hw->wlc;
3476 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
3478 /* request FAST clock if not on */
3479 fastclk = wlc_hw->forcefastclk;
3480 if (!fastclk)
3481 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
3483 /* disable interrupts */
3484 macintmask = brcms_intrsoff(wlc->wl);
3486 /* set up the specified band and chanspec */
3487 brcms_c_setxband(wlc_hw, chspec_bandunit(chanspec));
3488 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3490 /* do one-time phy inits and calibration */
3491 wlc_phy_cal_init(wlc_hw->band->pi);
3493 /* core-specific initialization */
3494 brcms_b_coreinit(wlc);
3496 /* suspend the tx fifos and mute the phy for preism cac time */
3497 if (mute)
3498 brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM);
3500 /* band-specific inits */
3501 brcms_b_bsinit(wlc, chanspec);
3503 /* restore macintmask */
3504 brcms_intrsrestore(wlc->wl, macintmask);
3506 /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac
3507 * is suspended and brcms_c_enable_mac() will clear this override bit.
3509 mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND);
3512 * initialize mac_suspend_depth to 1 to match ucode
3513 * initial suspended state
3515 wlc_hw->mac_suspend_depth = 1;
3517 /* restore the clk */
3518 if (!fastclk)
3519 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
3522 static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc,
3523 u16 chanspec)
3525 /* Save our copy of the chanspec */
3526 wlc->chanspec = chanspec;
3528 /* Set the chanspec and power limits for this locale */
3529 brcms_c_channel_set_chanspec(wlc->cmi, chanspec, BRCMS_TXPWR_MAX);
3531 if (wlc->stf->ss_algosel_auto)
3532 brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel,
3533 chanspec);
3535 brcms_c_stf_ss_update(wlc, wlc->band);
3539 static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc,
3540 u16 chanspec)
3542 struct brcms_c_rateset default_rateset;
3543 uint parkband;
3544 uint i, band_order[2];
3546 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3548 * We might have been bandlocked during down and the chip
3549 * power-cycled (hibernate). Figure out the right band to park on
3551 if (wlc->bandlocked || wlc->pub->_nbands == 1) {
3552 /* updated in brcms_c_bandlock() */
3553 parkband = wlc->band->bandunit;
3554 band_order[0] = band_order[1] = parkband;
3555 } else {
3556 /* park on the band of the specified chanspec */
3557 parkband = chspec_bandunit(chanspec);
3559 /* order so that parkband initialize last */
3560 band_order[0] = parkband ^ 1;
3561 band_order[1] = parkband;
3564 /* make each band operational, software state init */
3565 for (i = 0; i < wlc->pub->_nbands; i++) {
3566 uint j = band_order[i];
3568 wlc->band = wlc->bandstate[j];
3570 brcms_default_rateset(wlc, &default_rateset);
3572 /* fill in hw_rate */
3573 brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset,
3574 false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
3575 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
3577 /* init basic rate lookup */
3578 brcms_c_rate_lookup_init(wlc, &default_rateset);
3581 /* sync up phy/radio chanspec */
3582 brcms_c_set_phy_chanspec(wlc, chanspec);
3586 * ucode, hwmac update
3587 * Channel dependent updates for ucode and hw
3589 static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc)
3591 /* enable or disable any active IBSSs depending on whether or not
3592 * we are on the home channel
3594 if (wlc->home_chanspec == wlc_phy_chanspec_get(wlc->band->pi)) {
3595 if (wlc->pub->associated) {
3597 * BMAC_NOTE: This is something that should be fixed
3598 * in ucode inits. I think that the ucode inits set
3599 * up the bcn templates and shm values with a bogus
3600 * beacon. This should not be done in the inits. If
3601 * ucode needs to set up a beacon for testing, the
3602 * test routines should write it down, not expect the
3603 * inits to populate a bogus beacon.
3605 if (BRCMS_PHY_11N_CAP(wlc->band))
3606 brcms_b_write_shm(wlc->hw,
3607 M_BCN_TXTSF_OFFSET, 0);
3609 } else {
3610 /* disable an active IBSS if we are not on the home channel */
3613 /* update the various promisc bits */
3614 brcms_c_mac_bcn_promisc(wlc);
3615 brcms_c_mac_promisc(wlc);
3618 /* band-specific init */
3619 static void brcms_c_bsinit(struct brcms_c_info *wlc)
3621 BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n",
3622 wlc->pub->unit, wlc->band->bandunit);
3624 /* write ucode ACK/CTS rate table */
3625 brcms_c_set_ratetable(wlc);
3627 /* update some band specific mac configuration */
3628 brcms_c_ucode_mac_upd(wlc);
3630 /* init antenna selection */
3631 brcms_c_antsel_init(wlc->asi);
3635 /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */
3636 static int
3637 brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM,
3638 bool writeToShm)
3640 int idle_busy_ratio_x_16 = 0;
3641 uint offset =
3642 isOFDM ? M_TX_IDLE_BUSY_RATIO_X_16_OFDM :
3643 M_TX_IDLE_BUSY_RATIO_X_16_CCK;
3644 if (duty_cycle > 100 || duty_cycle < 0) {
3645 wiphy_err(wlc->wiphy, "wl%d: duty cycle value off limit\n",
3646 wlc->pub->unit);
3647 return -EINVAL;
3649 if (duty_cycle)
3650 idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle;
3651 /* Only write to shared memory when wl is up */
3652 if (writeToShm)
3653 brcms_b_write_shm(wlc->hw, offset, (u16) idle_busy_ratio_x_16);
3655 if (isOFDM)
3656 wlc->tx_duty_cycle_ofdm = (u16) duty_cycle;
3657 else
3658 wlc->tx_duty_cycle_cck = (u16) duty_cycle;
3660 return 0;
3664 * Initialize the base precedence map for dequeueing
3665 * from txq based on WME settings
3667 static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc)
3669 wlc->tx_prec_map = BRCMS_PREC_BMP_ALL;
3670 memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16));
3672 wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK;
3673 wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE;
3674 wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI;
3675 wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO;
3678 static void
3679 brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc,
3680 struct brcms_txq_info *qi, bool on, int prio)
3682 /* transmit flowcontrol is not yet implemented */
3685 static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc)
3687 struct brcms_txq_info *qi;
3689 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) {
3690 if (qi->stopped) {
3691 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
3692 qi->stopped = 0;
3697 void brcms_c_init(struct brcms_c_info *wlc)
3699 struct d11regs __iomem *regs;
3700 u16 chanspec;
3701 bool mute = false;
3703 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
3705 regs = wlc->regs;
3708 * This will happen if a big-hammer was executed. In
3709 * that case, we want to go back to the channel that
3710 * we were on and not new channel
3712 if (wlc->pub->associated)
3713 chanspec = wlc->home_chanspec;
3714 else
3715 chanspec = brcms_c_init_chanspec(wlc);
3717 brcms_b_init(wlc->hw, chanspec, mute);
3719 /* update beacon listen interval */
3720 brcms_c_bcn_li_upd(wlc);
3722 /* write ethernet address to core */
3723 brcms_c_set_mac(wlc->bsscfg);
3724 brcms_c_set_bssid(wlc->bsscfg);
3726 /* Update tsf_cfprep if associated and up */
3727 if (wlc->pub->associated && wlc->bsscfg->up) {
3728 u32 bi;
3730 /* get beacon period and convert to uS */
3731 bi = wlc->bsscfg->current_bss->beacon_period << 10;
3733 * update since init path would reset
3734 * to default value
3736 W_REG(&regs->tsf_cfprep,
3737 (bi << CFPREP_CBI_SHIFT));
3739 /* Update maccontrol PM related bits */
3740 brcms_c_set_ps_ctrl(wlc);
3743 brcms_c_bandinit_ordered(wlc, chanspec);
3745 /* init probe response timeout */
3746 brcms_b_write_shm(wlc->hw, M_PRS_MAXTIME, wlc->prb_resp_timeout);
3748 /* init max burst txop (framebursting) */
3749 brcms_b_write_shm(wlc->hw, M_MBURST_TXOP,
3750 (wlc->
3751 _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP));
3753 /* initialize maximum allowed duty cycle */
3754 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true);
3755 brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true);
3758 * Update some shared memory locations related to
3759 * max AMPDU size allowed to received
3761 brcms_c_ampdu_shm_upd(wlc->ampdu);
3763 /* band-specific inits */
3764 brcms_c_bsinit(wlc);
3766 /* Enable EDCF mode (while the MAC is suspended) */
3767 OR_REG(&regs->ifs_ctl, IFS_USEEDCF);
3768 brcms_c_edcf_setparams(wlc, false);
3770 /* Init precedence maps for empty FIFOs */
3771 brcms_c_tx_prec_map_init(wlc);
3773 /* read the ucode version if we have not yet done so */
3774 if (wlc->ucode_rev == 0) {
3775 wlc->ucode_rev =
3776 brcms_b_read_shm(wlc->hw, M_BOM_REV_MAJOR) << NBITS(u16);
3777 wlc->ucode_rev |= brcms_b_read_shm(wlc->hw, M_BOM_REV_MINOR);
3780 /* ..now really unleash hell (allow the MAC out of suspend) */
3781 brcms_c_enable_mac(wlc);
3783 /* clear tx flow control */
3784 brcms_c_txflowcontrol_reset(wlc);
3786 /* enable the RF Disable Delay timer */
3787 W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT);
3789 /* initialize mpc delay */
3790 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
3793 * Initialize WME parameters; if they haven't been set by some other
3794 * mechanism (IOVar, etc) then read them from the hardware.
3796 if (GFIELD(wlc->wme_retries[0], EDCF_SHORT) == 0) {
3797 /* Uninitialized; read from HW */
3798 int ac;
3800 for (ac = 0; ac < AC_COUNT; ac++)
3801 wlc->wme_retries[ac] =
3802 brcms_b_read_shm(wlc->hw, M_AC_TXLMT_ADDR(ac));
3806 void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc)
3808 wlc->bcnmisc_monitor = promisc;
3809 brcms_c_mac_bcn_promisc(wlc);
3812 void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc)
3814 if (wlc->bcnmisc_monitor)
3815 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC);
3816 else
3817 brcms_b_mctrl(wlc->hw, MCTL_BCNS_PROMISC, 0);
3820 /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */
3821 void brcms_c_mac_promisc(struct brcms_c_info *wlc)
3823 u32 promisc_bits = 0;
3826 * promiscuous mode just sets MCTL_PROMISC
3827 * Note: APs get all BSS traffic without the need to set
3828 * the MCTL_PROMISC bit since all BSS data traffic is
3829 * directed at the AP
3831 if (wlc->pub->promisc)
3832 promisc_bits |= MCTL_PROMISC;
3834 /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL
3835 * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is
3836 * handled in brcms_c_mac_bcn_promisc()
3838 if (wlc->monitor)
3839 promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL;
3841 brcms_b_mctrl(wlc->hw, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits);
3844 /* push sw hps and wake state through hardware */
3845 void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc)
3847 u32 v1, v2;
3848 bool hps;
3849 bool awake_before;
3851 hps = brcms_c_ps_allowed(wlc);
3853 BCMMSG(wlc->wiphy, "wl%d: hps %d\n", wlc->pub->unit, hps);
3855 v1 = R_REG(&wlc->regs->maccontrol);
3856 v2 = MCTL_WAKE;
3857 if (hps)
3858 v2 |= MCTL_HPS;
3860 brcms_b_mctrl(wlc->hw, MCTL_WAKE | MCTL_HPS, v2);
3862 awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0));
3864 if (!awake_before)
3865 brcms_b_wait_for_wake(wlc->hw);
3870 * Write this BSS config's MAC address to core.
3871 * Updates RXE match engine.
3873 int brcms_c_set_mac(struct brcms_bss_cfg *bsscfg)
3875 int err = 0;
3876 struct brcms_c_info *wlc = bsscfg->wlc;
3878 /* enter the MAC addr into the RXE match registers */
3879 brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, bsscfg->cur_etheraddr);
3881 brcms_c_ampdu_macaddr_upd(wlc);
3883 return err;
3886 /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl).
3887 * Updates RXE match engine.
3889 void brcms_c_set_bssid(struct brcms_bss_cfg *bsscfg)
3891 /* we need to update BSSID in RXE match registers */
3892 brcms_c_set_addrmatch(bsscfg->wlc, RCM_BSSID_OFFSET, bsscfg->BSSID);
3895 static void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot)
3897 wlc_hw->shortslot = shortslot;
3899 if (wlc_hw->band->bandtype == BRCM_BAND_2G && wlc_hw->up) {
3900 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
3901 brcms_b_update_slot_timing(wlc_hw, shortslot);
3902 brcms_c_enable_mac(wlc_hw->wlc);
3907 * Suspend the the MAC and update the slot timing
3908 * for standard 11b/g (20us slots) or shortslot 11g (9us slots).
3910 void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot)
3912 /* use the override if it is set */
3913 if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO)
3914 shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON);
3916 if (wlc->shortslot == shortslot)
3917 return;
3919 wlc->shortslot = shortslot;
3921 brcms_b_set_shortslot(wlc->hw, shortslot);
3924 void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3926 if (wlc->home_chanspec != chanspec) {
3927 wlc->home_chanspec = chanspec;
3929 if (wlc->bsscfg->associated)
3930 wlc->bsscfg->current_bss->chanspec = chanspec;
3934 void
3935 brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, u16 chanspec,
3936 bool mute, struct txpwr_limits *txpwr)
3938 uint bandunit;
3940 BCMMSG(wlc_hw->wlc->wiphy, "wl%d: 0x%x\n", wlc_hw->unit, chanspec);
3942 wlc_hw->chanspec = chanspec;
3944 /* Switch bands if necessary */
3945 if (wlc_hw->_nbands > 1) {
3946 bandunit = chspec_bandunit(chanspec);
3947 if (wlc_hw->band->bandunit != bandunit) {
3948 /* brcms_b_setband disables other bandunit,
3949 * use light band switch if not up yet
3951 if (wlc_hw->up) {
3952 wlc_phy_chanspec_radio_set(wlc_hw->
3953 bandstate[bandunit]->
3954 pi, chanspec);
3955 brcms_b_setband(wlc_hw, bandunit, chanspec);
3956 } else {
3957 brcms_c_setxband(wlc_hw, bandunit);
3962 wlc_phy_initcal_enable(wlc_hw->band->pi, !mute);
3964 if (!wlc_hw->up) {
3965 if (wlc_hw->clk)
3966 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr,
3967 chanspec);
3968 wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec);
3969 } else {
3970 wlc_phy_chanspec_set(wlc_hw->band->pi, chanspec);
3971 wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec);
3973 /* Update muting of the channel */
3974 brcms_b_mute(wlc_hw, mute, 0);
3978 /* switch to and initialize new band */
3979 static void brcms_c_setband(struct brcms_c_info *wlc,
3980 uint bandunit)
3982 wlc->band = wlc->bandstate[bandunit];
3984 if (!wlc->pub->up)
3985 return;
3987 /* wait for at least one beacon before entering sleeping state */
3988 brcms_c_set_ps_ctrl(wlc);
3990 /* band-specific initializations */
3991 brcms_c_bsinit(wlc);
3994 void brcms_c_set_chanspec(struct brcms_c_info *wlc, u16 chanspec)
3996 uint bandunit;
3997 bool switchband = false;
3998 u16 old_chanspec = wlc->chanspec;
4000 if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) {
4001 wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n",
4002 wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec));
4003 return;
4006 /* Switch bands if necessary */
4007 if (wlc->pub->_nbands > 1) {
4008 bandunit = chspec_bandunit(chanspec);
4009 if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) {
4010 switchband = true;
4011 if (wlc->bandlocked) {
4012 wiphy_err(wlc->wiphy, "wl%d: %s: chspec %d "
4013 "band is locked!\n",
4014 wlc->pub->unit, __func__,
4015 CHSPEC_CHANNEL(chanspec));
4016 return;
4019 * should the setband call come after the
4020 * brcms_b_chanspec() ? if the setband updates
4021 * (brcms_c_bsinit) use low level calls to inspect and
4022 * set state, the state inspected may be from the wrong
4023 * band, or the following brcms_b_set_chanspec() may
4024 * undo the work.
4026 brcms_c_setband(wlc, bandunit);
4030 /* sync up phy/radio chanspec */
4031 brcms_c_set_phy_chanspec(wlc, chanspec);
4033 /* init antenna selection */
4034 if (brcms_chspec_bw(old_chanspec) != brcms_chspec_bw(chanspec)) {
4035 brcms_c_antsel_init(wlc->asi);
4037 /* Fix the hardware rateset based on bw.
4038 * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz
4040 brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset,
4041 wlc->band->mimo_cap_40 ? brcms_chspec_bw(chanspec) : 0);
4044 /* update some mac configuration since chanspec changed */
4045 brcms_c_ucode_mac_upd(wlc);
4048 u32 brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc,
4049 struct brcms_c_rateset *rs)
4051 u32 lowest_basic_rspec;
4052 uint i;
4054 /* Use the lowest basic rate */
4055 lowest_basic_rspec = rs->rates[0] & BRCMS_RATE_MASK;
4056 for (i = 0; i < rs->count; i++) {
4057 if (rs->rates[i] & BRCMS_RATE_FLAG) {
4058 lowest_basic_rspec = rs->rates[i] & BRCMS_RATE_MASK;
4059 break;
4064 * pick siso/cdd as default for OFDM (note no basic
4065 * rate MCSs are supported yet)
4067 if (is_ofdm_rate(lowest_basic_rspec))
4068 lowest_basic_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
4070 return lowest_basic_rspec;
4074 * This function changes the phytxctl for beacon based on current
4075 * beacon ratespec AND txant setting as per this table:
4076 * ratespec CCK ant = wlc->stf->txant
4077 * OFDM ant = 3
4079 void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc,
4080 u32 bcn_rspec)
4082 u16 phyctl;
4083 u16 phytxant = wlc->stf->phytxant;
4084 u16 mask = PHY_TXC_ANT_MASK;
4086 /* for non-siso rates or default setting, use the available chains */
4087 if (BRCMS_PHY_11N_CAP(wlc->band))
4088 phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec);
4090 phyctl = brcms_b_read_shm(wlc->hw, M_BCN_PCTLWD);
4091 phyctl = (phyctl & ~mask) | phytxant;
4092 brcms_b_write_shm(wlc->hw, M_BCN_PCTLWD, phyctl);
4096 * centralized protection config change function to simplify debugging, no
4097 * consistency checking this should be called only on changes to avoid overhead
4098 * in periodic function
4100 void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val)
4102 BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val);
4104 switch (idx) {
4105 case BRCMS_PROT_G_SPEC:
4106 wlc->protection->_g = (bool) val;
4107 break;
4108 case BRCMS_PROT_G_OVR:
4109 wlc->protection->g_override = (s8) val;
4110 break;
4111 case BRCMS_PROT_G_USER:
4112 wlc->protection->gmode_user = (u8) val;
4113 break;
4114 case BRCMS_PROT_OVERLAP:
4115 wlc->protection->overlap = (s8) val;
4116 break;
4117 case BRCMS_PROT_N_USER:
4118 wlc->protection->nmode_user = (s8) val;
4119 break;
4120 case BRCMS_PROT_N_CFG:
4121 wlc->protection->n_cfg = (s8) val;
4122 break;
4123 case BRCMS_PROT_N_CFG_OVR:
4124 wlc->protection->n_cfg_override = (s8) val;
4125 break;
4126 case BRCMS_PROT_N_NONGF:
4127 wlc->protection->nongf = (bool) val;
4128 break;
4129 case BRCMS_PROT_N_NONGF_OVR:
4130 wlc->protection->nongf_override = (s8) val;
4131 break;
4132 case BRCMS_PROT_N_PAM_OVR:
4133 wlc->protection->n_pam_override = (s8) val;
4134 break;
4135 case BRCMS_PROT_N_OBSS:
4136 wlc->protection->n_obss = (bool) val;
4137 break;
4139 default:
4140 break;
4145 static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val)
4147 if (wlc->pub->up) {
4148 brcms_c_update_beacon(wlc);
4149 brcms_c_update_probe_resp(wlc, true);
4153 static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val)
4155 wlc->stf->ldpc = val;
4157 if (wlc->pub->up) {
4158 brcms_c_update_beacon(wlc);
4159 brcms_c_update_probe_resp(wlc, true);
4160 wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false));
4164 void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci,
4165 const struct ieee80211_tx_queue_params *params,
4166 bool suspend)
4168 int i;
4169 struct shm_acparams acp_shm;
4170 u16 *shm_entry;
4172 /* Only apply params if the core is out of reset and has clocks */
4173 if (!wlc->clk) {
4174 wiphy_err(wlc->wiphy, "wl%d: %s : no-clock\n", wlc->pub->unit,
4175 __func__);
4176 return;
4179 memset((char *)&acp_shm, 0, sizeof(struct shm_acparams));
4180 /* fill in shm ac params struct */
4181 acp_shm.txop = params->txop;
4182 /* convert from units of 32us to us for ucode */
4183 wlc->edcf_txop[aci & 0x3] = acp_shm.txop =
4184 EDCF_TXOP2USEC(acp_shm.txop);
4185 acp_shm.aifs = (params->aifs & EDCF_AIFSN_MASK);
4187 if (aci == AC_VI && acp_shm.txop == 0
4188 && acp_shm.aifs < EDCF_AIFSN_MAX)
4189 acp_shm.aifs++;
4191 if (acp_shm.aifs < EDCF_AIFSN_MIN
4192 || acp_shm.aifs > EDCF_AIFSN_MAX) {
4193 wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad "
4194 "aifs %d\n", wlc->pub->unit, acp_shm.aifs);
4195 } else {
4196 acp_shm.cwmin = params->cw_min;
4197 acp_shm.cwmax = params->cw_max;
4198 acp_shm.cwcur = acp_shm.cwmin;
4199 acp_shm.bslots =
4200 R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur;
4201 acp_shm.reggap = acp_shm.bslots + acp_shm.aifs;
4202 /* Indicate the new params to the ucode */
4203 acp_shm.status = brcms_b_read_shm(wlc->hw, (M_EDCF_QINFO +
4204 wme_ac2fifo[aci] *
4205 M_EDCF_QLEN +
4206 M_EDCF_STATUS_OFF));
4207 acp_shm.status |= WME_STATUS_NEWAC;
4209 /* Fill in shm acparam table */
4210 shm_entry = (u16 *) &acp_shm;
4211 for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2)
4212 brcms_b_write_shm(wlc->hw,
4213 M_EDCF_QINFO +
4214 wme_ac2fifo[aci] * M_EDCF_QLEN + i,
4215 *shm_entry++);
4218 if (suspend)
4219 brcms_c_suspend_mac_and_wait(wlc);
4221 if (suspend)
4222 brcms_c_enable_mac(wlc);
4226 void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend)
4228 u16 aci;
4229 int i_ac;
4230 struct ieee80211_tx_queue_params txq_pars;
4231 static const struct edcf_acparam default_edcf_acparams[] = {
4232 {EDCF_AC_BE_ACI_STA, EDCF_AC_BE_ECW_STA, EDCF_AC_BE_TXOP_STA},
4233 {EDCF_AC_BK_ACI_STA, EDCF_AC_BK_ECW_STA, EDCF_AC_BK_TXOP_STA},
4234 {EDCF_AC_VI_ACI_STA, EDCF_AC_VI_ECW_STA, EDCF_AC_VI_TXOP_STA},
4235 {EDCF_AC_VO_ACI_STA, EDCF_AC_VO_ECW_STA, EDCF_AC_VO_TXOP_STA}
4236 }; /* ucode needs these parameters during its initialization */
4237 const struct edcf_acparam *edcf_acp = &default_edcf_acparams[0];
4239 for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) {
4240 /* find out which ac this set of params applies to */
4241 aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT;
4243 /* fill in shm ac params struct */
4244 txq_pars.txop = edcf_acp->TXOP;
4245 txq_pars.aifs = edcf_acp->ACI;
4247 /* CWmin = 2^(ECWmin) - 1 */
4248 txq_pars.cw_min = EDCF_ECW2CW(edcf_acp->ECW & EDCF_ECWMIN_MASK);
4249 /* CWmax = 2^(ECWmax) - 1 */
4250 txq_pars.cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK)
4251 >> EDCF_ECWMAX_SHIFT);
4252 brcms_c_wme_setparams(wlc, aci, &txq_pars, suspend);
4255 if (suspend)
4256 brcms_c_suspend_mac_and_wait(wlc);
4258 if (suspend)
4259 brcms_c_enable_mac(wlc);
4263 /* maintain LED behavior in down state */
4264 static void brcms_c_down_led_upd(struct brcms_c_info *wlc)
4267 * maintain LEDs while in down state, turn on sbclk if
4268 * not available yet. Turn on sbclk if necessary
4270 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_FLIP);
4271 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_FLIP);
4274 static void brcms_c_radio_monitor_start(struct brcms_c_info *wlc)
4276 /* Don't start the timer if HWRADIO feature is disabled */
4277 if (wlc->radio_monitor)
4278 return;
4280 wlc->radio_monitor = true;
4281 brcms_b_pllreq(wlc->hw, true, BRCMS_PLLREQ_RADIO_MON);
4282 brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK,
4283 true);
4286 void brcms_c_radio_disable(struct brcms_c_info *wlc)
4288 if (!wlc->pub->up) {
4289 brcms_c_down_led_upd(wlc);
4290 return;
4293 brcms_c_radio_monitor_start(wlc);
4294 brcms_down(wlc->wl);
4297 static void brcms_c_radio_enable(struct brcms_c_info *wlc)
4299 if (wlc->pub->up)
4300 return;
4302 if (brcms_deviceremoved(wlc))
4303 return;
4305 brcms_up(wlc->wl);
4308 bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc)
4310 if (!wlc->radio_monitor)
4311 return true;
4313 wlc->radio_monitor = false;
4314 brcms_b_pllreq(wlc->hw, false, BRCMS_PLLREQ_RADIO_MON);
4315 return brcms_del_timer(wlc->wl, wlc->radio_timer);
4318 /* read hwdisable state and propagate to wlc flag */
4319 static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc)
4321 if (wlc->pub->hw_off)
4322 return;
4324 if (brcms_b_radio_read_hwdisabled(wlc->hw))
4325 mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4326 else
4327 mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE);
4331 * centralized radio disable/enable function,
4332 * invoke radio enable/disable after updating hwradio status
4334 static void brcms_c_radio_upd(struct brcms_c_info *wlc)
4336 if (wlc->pub->radio_disabled)
4337 brcms_c_radio_disable(wlc);
4338 else
4339 brcms_c_radio_enable(wlc);
4342 /* update hwradio status and return it */
4343 bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc)
4345 brcms_c_radio_hwdisable_upd(wlc);
4347 return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ?
4348 true : false;
4351 /* periodical query hw radio button while driver is "down" */
4352 static void brcms_c_radio_timer(void *arg)
4354 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4356 if (brcms_deviceremoved(wlc)) {
4357 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4358 __func__);
4359 brcms_down(wlc->wl);
4360 return;
4363 /* cap mpc off count */
4364 if (wlc->mpc_offcnt < BRCMS_MPC_MAX_DELAYCNT)
4365 wlc->mpc_offcnt++;
4367 brcms_c_radio_hwdisable_upd(wlc);
4368 brcms_c_radio_upd(wlc);
4371 /* common low-level watchdog code */
4372 static void brcms_b_watchdog(void *arg)
4374 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4375 struct brcms_hardware *wlc_hw = wlc->hw;
4377 BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit);
4379 if (!wlc_hw->up)
4380 return;
4382 /* increment second count */
4383 wlc_hw->now++;
4385 /* Check for FIFO error interrupts */
4386 brcms_b_fifoerrors(wlc_hw);
4388 /* make sure RX dma has buffers */
4389 dma_rxfill(wlc->hw->di[RX_FIFO]);
4391 wlc_phy_watchdog(wlc_hw->band->pi);
4394 /* common watchdog code */
4395 static void brcms_c_watchdog(void *arg)
4397 struct brcms_c_info *wlc = (struct brcms_c_info *) arg;
4399 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
4401 if (!wlc->pub->up)
4402 return;
4404 if (brcms_deviceremoved(wlc)) {
4405 wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit,
4406 __func__);
4407 brcms_down(wlc->wl);
4408 return;
4411 /* increment second count */
4412 wlc->pub->now++;
4414 /* delay radio disable */
4415 if (wlc->mpc_delay_off) {
4416 if (--wlc->mpc_delay_off == 0) {
4417 mboolset(wlc->pub->radio_disabled,
4418 WL_RADIO_MPC_DISABLE);
4419 if (wlc->mpc && brcms_c_ismpc(wlc))
4420 wlc->mpc_offcnt = 0;
4424 /* mpc sync */
4425 brcms_c_radio_mpc_upd(wlc);
4426 /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */
4427 brcms_c_radio_hwdisable_upd(wlc);
4428 brcms_c_radio_upd(wlc);
4429 /* if radio is disable, driver may be down, quit here */
4430 if (wlc->pub->radio_disabled)
4431 return;
4433 brcms_b_watchdog(wlc);
4436 * occasionally sample mac stat counters to
4437 * detect 16-bit counter wrap
4439 if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0)
4440 brcms_c_statsupd(wlc);
4442 if (BRCMS_ISNPHY(wlc->band) &&
4443 ((wlc->pub->now - wlc->tempsense_lasttime) >=
4444 BRCMS_TEMPSENSE_PERIOD)) {
4445 wlc->tempsense_lasttime = wlc->pub->now;
4446 brcms_c_tempsense_upd(wlc);
4450 static void brcms_c_watchdog_by_timer(void *arg)
4452 brcms_c_watchdog(arg);
4455 bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit)
4457 wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer,
4458 wlc, "watchdog");
4459 if (!wlc->wdtimer) {
4460 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer "
4461 "failed\n", unit);
4462 goto fail;
4465 wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer,
4466 wlc, "radio");
4467 if (!wlc->radio_timer) {
4468 wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer "
4469 "failed\n", unit);
4470 goto fail;
4473 return true;
4475 fail:
4476 return false;
4480 * Initialize brcms_c_info default values ...
4481 * may get overrides later in this function
4483 void brcms_c_info_init(struct brcms_c_info *wlc, int unit)
4485 int i;
4487 /* Save our copy of the chanspec */
4488 wlc->chanspec = ch20mhz_chspec(1);
4490 /* various 802.11g modes */
4491 wlc->shortslot = false;
4492 wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO;
4494 brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO);
4495 brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false);
4497 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR,
4498 BRCMS_PROTECTION_AUTO);
4499 brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF);
4500 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR,
4501 BRCMS_PROTECTION_AUTO);
4502 brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false);
4503 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO);
4505 brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP,
4506 BRCMS_PROTECTION_CTL_OVERLAP);
4508 /* 802.11g draft 4.0 NonERP elt advertisement */
4509 wlc->include_legacy_erp = true;
4511 wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF;
4512 wlc->stf->txant = ANT_TX_DEF;
4514 wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT;
4516 wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN;
4517 for (i = 0; i < NFIFO; i++)
4518 wlc->fragthresh[i] = DOT11_DEFAULT_FRAG_LEN;
4519 wlc->RTSThresh = DOT11_DEFAULT_RTS_LEN;
4521 /* default rate fallback retry limits */
4522 wlc->SFBL = RETRY_SHORT_FB;
4523 wlc->LFBL = RETRY_LONG_FB;
4525 /* default mac retry limits */
4526 wlc->SRL = RETRY_SHORT_DEF;
4527 wlc->LRL = RETRY_LONG_DEF;
4529 /* WME QoS mode is Auto by default */
4530 wlc->pub->_ampdu = AMPDU_AGG_HOST;
4531 wlc->pub->bcmerror = 0;
4533 /* initialize mpc delay */
4534 wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
4537 static bool brcms_c_state_bmac_sync(struct brcms_c_info *wlc)
4539 struct brcms_b_state state_bmac = {0};
4541 if (brcms_b_state_get(wlc->hw, &state_bmac) != 0)
4542 return false;
4544 wlc->machwcap = state_bmac.machwcap;
4545 brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR,
4546 (s8) state_bmac.preamble_ovr);
4548 return true;
4551 static uint brcms_c_attach_module(struct brcms_c_info *wlc)
4553 uint err = 0;
4554 uint unit;
4555 unit = wlc->pub->unit;
4557 wlc->asi = brcms_c_antsel_attach(wlc);
4558 if (wlc->asi == NULL) {
4559 wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach "
4560 "failed\n", unit);
4561 err = 44;
4562 goto fail;
4565 wlc->ampdu = brcms_c_ampdu_attach(wlc);
4566 if (wlc->ampdu == NULL) {
4567 wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach "
4568 "failed\n", unit);
4569 err = 50;
4570 goto fail;
4573 if ((brcms_c_stf_attach(wlc) != 0)) {
4574 wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach "
4575 "failed\n", unit);
4576 err = 68;
4577 goto fail;
4579 fail:
4580 return err;
4583 struct brcms_pub *brcms_c_pub(struct brcms_c_info *wlc)
4585 return wlc->pub;
4588 /* low level attach
4589 * run backplane attach, init nvram
4590 * run phy attach
4591 * initialize software state for each core and band
4592 * put the whole chip in reset(driver down state), no clock
4594 static int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device,
4595 uint unit, bool piomode, void __iomem *regsva,
4596 struct pci_dev *btparam)
4598 struct brcms_hardware *wlc_hw;
4599 struct d11regs __iomem *regs;
4600 char *macaddr = NULL;
4601 char *vars;
4602 uint err = 0;
4603 uint j;
4604 bool wme = false;
4605 struct shared_phy_params sha_params;
4606 struct wiphy *wiphy = wlc->wiphy;
4607 char *var;
4608 unsigned long res;
4610 BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor,
4611 device);
4613 wme = true;
4615 wlc_hw = wlc->hw;
4616 wlc_hw->wlc = wlc;
4617 wlc_hw->unit = unit;
4618 wlc_hw->band = wlc_hw->bandstate[0];
4619 wlc_hw->_piomode = piomode;
4621 /* populate struct brcms_hardware with default values */
4622 brcms_b_info_init(wlc_hw);
4625 * Do the hardware portion of the attach. Also initialize software
4626 * state that depends on the particular hardware we are running.
4628 wlc_hw->sih = ai_attach(regsva, btparam,
4629 &wlc_hw->vars, &wlc_hw->vars_size);
4630 if (wlc_hw->sih == NULL) {
4631 wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n",
4632 unit);
4633 err = 11;
4634 goto fail;
4636 vars = wlc_hw->vars;
4639 * Get vendid/devid nvram overwrites, which could be different
4640 * than those the BIOS recognizes for devices on PCMCIA_BUS,
4641 * SDIO_BUS, and SROMless devices on PCI_BUS.
4643 var = getvar(vars, "vendid");
4644 if (var && !kstrtoul(var, 0, &res)) {
4645 vendor = (u16)res;
4646 wiphy_err(wiphy, "Overriding vendor id = 0x%x\n",
4647 vendor);
4649 var = getvar(vars, "devid");
4650 if (var && !kstrtoul(var, 0, &res)) {
4651 u16 devid = (u16)res;
4652 if (devid != 0xffff) {
4653 device = devid;
4654 wiphy_err(wiphy, "Overriding device id = 0x%x"
4655 "\n", device);
4659 /* verify again the device is supported */
4660 if (!brcms_c_chipmatch(vendor, device)) {
4661 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported "
4662 "vendor/device (0x%x/0x%x)\n",
4663 unit, vendor, device);
4664 err = 12;
4665 goto fail;
4668 wlc_hw->vendorid = vendor;
4669 wlc_hw->deviceid = device;
4671 /* set bar0 window to point at D11 core */
4672 wlc_hw->regs = (struct d11regs __iomem *)
4673 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
4674 wlc_hw->corerev = ai_corerev(wlc_hw->sih);
4676 regs = wlc_hw->regs;
4678 wlc->regs = wlc_hw->regs;
4680 /* validate chip, chiprev and corerev */
4681 if (!brcms_c_isgoodchip(wlc_hw)) {
4682 err = 13;
4683 goto fail;
4686 /* initialize power control registers */
4687 ai_clkctl_init(wlc_hw->sih);
4689 /* request fastclock and force fastclock for the rest of attach
4690 * bring the d11 core out of reset.
4691 * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk
4692 * is still false; But it will be called again inside wlc_corereset,
4693 * after d11 is out of reset.
4695 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
4696 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
4698 if (!brcms_b_validate_chip_access(wlc_hw)) {
4699 wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access "
4700 "failed\n", unit);
4701 err = 14;
4702 goto fail;
4705 /* get the board rev, used just below */
4706 j = getintvar(vars, "boardrev");
4707 /* promote srom boardrev of 0xFF to 1 */
4708 if (j == BOARDREV_PROMOTABLE)
4709 j = BOARDREV_PROMOTED;
4710 wlc_hw->boardrev = (u16) j;
4711 if (!brcms_c_validboardtype(wlc_hw)) {
4712 wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom "
4713 "board type (0x%x)" " or revision level (0x%x)\n",
4714 unit, wlc_hw->sih->boardtype, wlc_hw->boardrev);
4715 err = 15;
4716 goto fail;
4718 wlc_hw->sromrev = (u8) getintvar(vars, "sromrev");
4719 wlc_hw->boardflags = (u32) getintvar(vars, "boardflags");
4720 wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2");
4722 if (wlc_hw->boardflags & BFL_NOPLLDOWN)
4723 brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED);
4725 /* check device id(srom, nvram etc.) to set bands */
4726 if (wlc_hw->deviceid == BCM43224_D11N_ID ||
4727 wlc_hw->deviceid == BCM43224_D11N_ID_VEN1)
4728 /* Dualband boards */
4729 wlc_hw->_nbands = 2;
4730 else
4731 wlc_hw->_nbands = 1;
4733 if ((wlc_hw->sih->chip == BCM43225_CHIP_ID))
4734 wlc_hw->_nbands = 1;
4736 /* BMAC_NOTE: remove init of pub values when brcms_c_attach()
4737 * unconditionally does the init of these values
4739 wlc->vendorid = wlc_hw->vendorid;
4740 wlc->deviceid = wlc_hw->deviceid;
4741 wlc->pub->sih = wlc_hw->sih;
4742 wlc->pub->corerev = wlc_hw->corerev;
4743 wlc->pub->sromrev = wlc_hw->sromrev;
4744 wlc->pub->boardrev = wlc_hw->boardrev;
4745 wlc->pub->boardflags = wlc_hw->boardflags;
4746 wlc->pub->boardflags2 = wlc_hw->boardflags2;
4747 wlc->pub->_nbands = wlc_hw->_nbands;
4749 wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc);
4751 if (wlc_hw->physhim == NULL) {
4752 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach "
4753 "failed\n", unit);
4754 err = 25;
4755 goto fail;
4758 /* pass all the parameters to wlc_phy_shared_attach in one struct */
4759 sha_params.sih = wlc_hw->sih;
4760 sha_params.physhim = wlc_hw->physhim;
4761 sha_params.unit = unit;
4762 sha_params.corerev = wlc_hw->corerev;
4763 sha_params.vars = vars;
4764 sha_params.vid = wlc_hw->vendorid;
4765 sha_params.did = wlc_hw->deviceid;
4766 sha_params.chip = wlc_hw->sih->chip;
4767 sha_params.chiprev = wlc_hw->sih->chiprev;
4768 sha_params.chippkg = wlc_hw->sih->chippkg;
4769 sha_params.sromrev = wlc_hw->sromrev;
4770 sha_params.boardtype = wlc_hw->sih->boardtype;
4771 sha_params.boardrev = wlc_hw->boardrev;
4772 sha_params.boardvendor = wlc_hw->sih->boardvendor;
4773 sha_params.boardflags = wlc_hw->boardflags;
4774 sha_params.boardflags2 = wlc_hw->boardflags2;
4775 sha_params.buscorerev = wlc_hw->sih->buscorerev;
4777 /* alloc and save pointer to shared phy state area */
4778 wlc_hw->phy_sh = wlc_phy_shared_attach(&sha_params);
4779 if (!wlc_hw->phy_sh) {
4780 err = 16;
4781 goto fail;
4784 /* initialize software state for each core and band */
4785 for (j = 0; j < wlc_hw->_nbands; j++) {
4787 * band0 is always 2.4Ghz
4788 * band1, if present, is 5Ghz
4791 brcms_c_setxband(wlc_hw, j);
4793 wlc_hw->band->bandunit = j;
4794 wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4795 wlc->band->bandunit = j;
4796 wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G;
4797 wlc->core->coreidx = ai_coreidx(wlc_hw->sih);
4799 wlc_hw->machwcap = R_REG(&regs->machwcap);
4800 wlc_hw->machwcap_backup = wlc_hw->machwcap;
4802 /* init tx fifo size */
4803 wlc_hw->xmtfifo_sz =
4804 xmtfifo_sz[(wlc_hw->corerev - XMTFIFOTBL_STARTREV)];
4806 /* Get a phy for this band */
4807 wlc_hw->band->pi =
4808 wlc_phy_attach(wlc_hw->phy_sh, regs,
4809 wlc_hw->band->bandtype, vars,
4810 wlc->wiphy);
4811 if (wlc_hw->band->pi == NULL) {
4812 wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_"
4813 "attach failed\n", unit);
4814 err = 17;
4815 goto fail;
4818 wlc_phy_machwcap_set(wlc_hw->band->pi, wlc_hw->machwcap);
4820 wlc_phy_get_phyversion(wlc_hw->band->pi, &wlc_hw->band->phytype,
4821 &wlc_hw->band->phyrev,
4822 &wlc_hw->band->radioid,
4823 &wlc_hw->band->radiorev);
4824 wlc_hw->band->abgphy_encore =
4825 wlc_phy_get_encore(wlc_hw->band->pi);
4826 wlc->band->abgphy_encore = wlc_phy_get_encore(wlc_hw->band->pi);
4827 wlc_hw->band->core_flags =
4828 wlc_phy_get_coreflags(wlc_hw->band->pi);
4830 /* verify good phy_type & supported phy revision */
4831 if (BRCMS_ISNPHY(wlc_hw->band)) {
4832 if (NCONF_HAS(wlc_hw->band->phyrev))
4833 goto good_phy;
4834 else
4835 goto bad_phy;
4836 } else if (BRCMS_ISLCNPHY(wlc_hw->band)) {
4837 if (LCNCONF_HAS(wlc_hw->band->phyrev))
4838 goto good_phy;
4839 else
4840 goto bad_phy;
4841 } else {
4842 bad_phy:
4843 wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported "
4844 "phy type/rev (%d/%d)\n", unit,
4845 wlc_hw->band->phytype, wlc_hw->band->phyrev);
4846 err = 18;
4847 goto fail;
4850 good_phy:
4852 * BMAC_NOTE: wlc->band->pi should not be set below and should
4853 * be done in the high level attach. However we can not make
4854 * that change until all low level access is changed to
4855 * wlc_hw->band->pi. Instead do the wlc->band->pi init below,
4856 * keeping wlc_hw->band->pi as well for incremental update of
4857 * low level fns, and cut over low only init when all fns
4858 * updated.
4860 wlc->band->pi = wlc_hw->band->pi;
4861 wlc->band->phytype = wlc_hw->band->phytype;
4862 wlc->band->phyrev = wlc_hw->band->phyrev;
4863 wlc->band->radioid = wlc_hw->band->radioid;
4864 wlc->band->radiorev = wlc_hw->band->radiorev;
4866 /* default contention windows size limits */
4867 wlc_hw->band->CWmin = APHY_CWMIN;
4868 wlc_hw->band->CWmax = PHY_CWMAX;
4870 if (!brcms_b_attach_dmapio(wlc, j, wme)) {
4871 err = 19;
4872 goto fail;
4876 /* disable core to match driver "down" state */
4877 brcms_c_coredisable(wlc_hw);
4879 /* Match driver "down" state */
4880 ai_pci_down(wlc_hw->sih);
4882 /* register sb interrupt callback functions */
4883 ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff,
4884 (void *)brcms_c_wlintrsrestore, NULL, wlc);
4886 /* turn off pll and xtal to match driver "down" state */
4887 brcms_b_xtal(wlc_hw, OFF);
4889 /* *******************************************************************
4890 * The hardware is in the DOWN state at this point. D11 core
4891 * or cores are in reset with clocks off, and the board PLLs
4892 * are off if possible.
4894 * Beyond this point, wlc->sbclk == false and chip registers
4895 * should not be touched.
4896 *********************************************************************
4899 /* init etheraddr state variables */
4900 macaddr = brcms_c_get_macaddr(wlc_hw);
4901 if (macaddr == NULL) {
4902 wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n",
4903 unit);
4904 err = 21;
4905 goto fail;
4907 if (!mac_pton(macaddr, wlc_hw->etheraddr) ||
4908 is_broadcast_ether_addr(wlc_hw->etheraddr) ||
4909 is_zero_ether_addr(wlc_hw->etheraddr)) {
4910 wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n",
4911 unit, macaddr);
4912 err = 22;
4913 goto fail;
4916 BCMMSG(wlc->wiphy,
4917 "deviceid 0x%x nbands %d board 0x%x macaddr: %s\n",
4918 wlc_hw->deviceid, wlc_hw->_nbands,
4919 wlc_hw->sih->boardtype, macaddr);
4921 return err;
4923 fail:
4924 wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit,
4925 err);
4926 return err;
4929 static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc)
4931 uint unit;
4932 unit = wlc->pub->unit;
4934 if ((wlc->band->antgain == -1) && (wlc->pub->sromrev == 1)) {
4935 /* default antenna gain for srom rev 1 is 2 dBm (8 qdbm) */
4936 wlc->band->antgain = 8;
4937 } else if (wlc->band->antgain == -1) {
4938 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4939 " srom, using 2dB\n", unit, __func__);
4940 wlc->band->antgain = 8;
4941 } else {
4942 s8 gain, fract;
4943 /* Older sroms specified gain in whole dbm only. In order
4944 * be able to specify qdbm granularity and remain backward
4945 * compatible the whole dbms are now encoded in only
4946 * low 6 bits and remaining qdbms are encoded in the hi 2 bits.
4947 * 6 bit signed number ranges from -32 - 31.
4949 * Examples:
4950 * 0x1 = 1 db,
4951 * 0xc1 = 1.75 db (1 + 3 quarters),
4952 * 0x3f = -1 (-1 + 0 quarters),
4953 * 0x7f = -.75 (-1 + 1 quarters) = -3 qdbm.
4954 * 0xbf = -.50 (-1 + 2 quarters) = -2 qdbm.
4956 gain = wlc->band->antgain & 0x3f;
4957 gain <<= 2; /* Sign extend */
4958 gain >>= 2;
4959 fract = (wlc->band->antgain & 0xc0) >> 6;
4960 wlc->band->antgain = 4 * gain + fract;
4964 static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc)
4966 int aa;
4967 uint unit;
4968 char *vars;
4969 int bandtype;
4971 unit = wlc->pub->unit;
4972 vars = wlc->pub->vars;
4973 bandtype = wlc->band->bandtype;
4975 /* get antennas available */
4976 aa = (s8) getintvar(vars, bandtype == BRCM_BAND_5G ? "aa5g" : "aa2g");
4977 if (aa == 0)
4978 aa = (s8) getintvar(vars,
4979 bandtype == BRCM_BAND_5G ? "aa1" : "aa0");
4980 if ((aa < 1) || (aa > 15)) {
4981 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid antennas available in"
4982 " srom (0x%x), using 3\n", unit, __func__, aa);
4983 aa = 3;
4986 /* reset the defaults if we have a single antenna */
4987 if (aa == 1) {
4988 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_0;
4989 wlc->stf->txant = ANT_TX_FORCE_0;
4990 } else if (aa == 2) {
4991 wlc->stf->ant_rx_ovr = ANT_RX_DIV_FORCE_1;
4992 wlc->stf->txant = ANT_TX_FORCE_1;
4993 } else {
4996 /* Compute Antenna Gain */
4997 wlc->band->antgain =
4998 (s8) getintvar(vars, bandtype == BRCM_BAND_5G ? "ag1" : "ag0");
4999 brcms_c_attach_antgain_init(wlc);
5001 return true;
5004 static void brcms_c_bss_default_init(struct brcms_c_info *wlc)
5006 u16 chanspec;
5007 struct brcms_band *band;
5008 struct brcms_bss_info *bi = wlc->default_bss;
5010 /* init default and target BSS with some sane initial values */
5011 memset((char *)(bi), 0, sizeof(struct brcms_bss_info));
5012 bi->beacon_period = BEACON_INTERVAL_DEFAULT;
5014 /* fill the default channel as the first valid channel
5015 * starting from the 2G channels
5017 chanspec = ch20mhz_chspec(1);
5018 wlc->home_chanspec = bi->chanspec = chanspec;
5020 /* find the band of our default channel */
5021 band = wlc->band;
5022 if (wlc->pub->_nbands > 1 &&
5023 band->bandunit != chspec_bandunit(chanspec))
5024 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5026 /* init bss rates to the band specific default rate set */
5027 brcms_c_rateset_default(&bi->rateset, NULL, band->phytype,
5028 band->bandtype, false, BRCMS_RATE_MASK_FULL,
5029 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
5030 brcms_chspec_bw(chanspec), wlc->stf->txstreams);
5032 if (wlc->pub->_n_enab & SUPPORT_11N)
5033 bi->flags |= BRCMS_BSS_HT;
5036 static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc)
5038 struct brcms_txq_info *qi, *p;
5040 qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC);
5041 if (qi != NULL) {
5043 * Have enough room for control packets along with HI watermark
5044 * Also, add room to txq for total psq packets if all the SCBs
5045 * leave PS mode. The watermark for flowcontrol to OS packets
5046 * will remain the same
5048 brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT,
5049 2 * BRCMS_DATAHIWAT + PKTQ_LEN_DEFAULT);
5051 /* add this queue to the the global list */
5052 p = wlc->tx_queues;
5053 if (p == NULL) {
5054 wlc->tx_queues = qi;
5055 } else {
5056 while (p->next != NULL)
5057 p = p->next;
5058 p->next = qi;
5061 return qi;
5064 static void brcms_c_txq_free(struct brcms_c_info *wlc,
5065 struct brcms_txq_info *qi)
5067 struct brcms_txq_info *p;
5069 if (qi == NULL)
5070 return;
5072 /* remove the queue from the linked list */
5073 p = wlc->tx_queues;
5074 if (p == qi)
5075 wlc->tx_queues = p->next;
5076 else {
5077 while (p != NULL && p->next != qi)
5078 p = p->next;
5079 if (p != NULL)
5080 p->next = p->next->next;
5083 kfree(qi);
5086 static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap)
5088 uint i;
5089 struct brcms_band *band;
5091 for (i = 0; i < wlc->pub->_nbands; i++) {
5092 band = wlc->bandstate[i];
5093 if (band->bandtype == BRCM_BAND_5G) {
5094 if ((bwcap == BRCMS_N_BW_40ALL)
5095 || (bwcap == BRCMS_N_BW_20IN2G_40IN5G))
5096 band->mimo_cap_40 = true;
5097 else
5098 band->mimo_cap_40 = false;
5099 } else {
5100 if (bwcap == BRCMS_N_BW_40ALL)
5101 band->mimo_cap_40 = true;
5102 else
5103 band->mimo_cap_40 = false;
5109 * The common driver entry routine. Error codes should be unique
5111 struct brcms_c_info *
5112 brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit,
5113 bool piomode, void __iomem *regsva, struct pci_dev *btparam,
5114 uint *perr)
5116 struct brcms_c_info *wlc;
5117 uint err = 0;
5118 uint i, j;
5119 struct brcms_pub *pub;
5121 /* allocate struct brcms_c_info state and its substructures */
5122 wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device);
5123 if (wlc == NULL)
5124 goto fail;
5125 wlc->wiphy = wl->wiphy;
5126 pub = wlc->pub;
5128 #if defined(BCMDBG)
5129 wlc_info_dbg = wlc;
5130 #endif
5132 wlc->band = wlc->bandstate[0];
5133 wlc->core = wlc->corestate;
5134 wlc->wl = wl;
5135 pub->unit = unit;
5136 pub->_piomode = piomode;
5137 wlc->bandinit_pending = false;
5139 /* populate struct brcms_c_info with default values */
5140 brcms_c_info_init(wlc, unit);
5142 /* update sta/ap related parameters */
5143 brcms_c_ap_upd(wlc);
5146 * low level attach steps(all hw accesses go
5147 * inside, no more in rest of the attach)
5149 err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva,
5150 btparam);
5151 if (err)
5152 goto fail;
5155 * for some states, due to different info pointer(e,g, wlc, wlc_hw) or
5156 * master/slave split, HIGH driver(both monolithic and HIGH_ONLY) needs
5157 * to sync states FROM BMAC portion driver
5159 if (!brcms_c_state_bmac_sync(wlc)) {
5160 err = 20;
5161 goto fail;
5164 pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band);
5166 /* propagate *vars* from BMAC driver to high driver */
5167 brcms_b_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size);
5170 /* set maximum allowed duty cycle */
5171 wlc->tx_duty_cycle_ofdm =
5172 (u16) getintvar(pub->vars, "tx_duty_cycle_ofdm");
5173 wlc->tx_duty_cycle_cck =
5174 (u16) getintvar(pub->vars, "tx_duty_cycle_cck");
5176 brcms_c_stf_phy_chain_calc(wlc);
5178 /* txchain 1: txant 0, txchain 2: txant 1 */
5179 if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1))
5180 wlc->stf->txant = wlc->stf->hw_txchain - 1;
5182 /* push to BMAC driver */
5183 wlc_phy_stf_chain_init(wlc->band->pi, wlc->stf->hw_txchain,
5184 wlc->stf->hw_rxchain);
5186 /* pull up some info resulting from the low attach */
5187 for (i = 0; i < NFIFO; i++)
5188 wlc->core->txavail[i] = wlc->hw->txavail[i];
5190 memcpy(&wlc->perm_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5191 memcpy(&pub->cur_etheraddr, &wlc->hw->etheraddr, ETH_ALEN);
5193 for (j = 0; j < wlc->pub->_nbands; j++) {
5194 wlc->band = wlc->bandstate[j];
5196 if (!brcms_c_attach_stf_ant_init(wlc)) {
5197 err = 24;
5198 goto fail;
5201 /* default contention windows size limits */
5202 wlc->band->CWmin = APHY_CWMIN;
5203 wlc->band->CWmax = PHY_CWMAX;
5205 /* init gmode value */
5206 if (wlc->band->bandtype == BRCM_BAND_2G) {
5207 wlc->band->gmode = GMODE_AUTO;
5208 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER,
5209 wlc->band->gmode);
5212 /* init _n_enab supported mode */
5213 if (BRCMS_PHY_11N_CAP(wlc->band)) {
5214 pub->_n_enab = SUPPORT_11N;
5215 brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER,
5216 ((pub->_n_enab ==
5217 SUPPORT_11N) ? WL_11N_2x2 :
5218 WL_11N_3x3));
5221 /* init per-band default rateset, depend on band->gmode */
5222 brcms_default_rateset(wlc, &wlc->band->defrateset);
5224 /* fill in hw_rateset */
5225 brcms_c_rateset_filter(&wlc->band->defrateset,
5226 &wlc->band->hw_rateset, false,
5227 BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK,
5228 (bool) (wlc->pub->_n_enab & SUPPORT_11N));
5232 * update antenna config due to
5233 * wlc->stf->txant/txchain/ant_rx_ovr change
5235 brcms_c_stf_phy_txant_upd(wlc);
5237 /* attach each modules */
5238 err = brcms_c_attach_module(wlc);
5239 if (err != 0)
5240 goto fail;
5242 if (!brcms_c_timers_init(wlc, unit)) {
5243 wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit,
5244 __func__);
5245 err = 32;
5246 goto fail;
5249 /* depend on rateset, gmode */
5250 wlc->cmi = brcms_c_channel_mgr_attach(wlc);
5251 if (!wlc->cmi) {
5252 wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed"
5253 "\n", unit, __func__);
5254 err = 33;
5255 goto fail;
5258 /* init default when all parameters are ready, i.e. ->rateset */
5259 brcms_c_bss_default_init(wlc);
5262 * Complete the wlc default state initializations..
5265 /* allocate our initial queue */
5266 wlc->pkt_queue = brcms_c_txq_alloc(wlc);
5267 if (wlc->pkt_queue == NULL) {
5268 wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n",
5269 unit, __func__);
5270 err = 100;
5271 goto fail;
5274 wlc->bsscfg->wlc = wlc;
5276 wlc->mimoft = FT_HT;
5277 wlc->mimo_40txbw = AUTO;
5278 wlc->ofdm_40txbw = AUTO;
5279 wlc->cck_40txbw = AUTO;
5280 brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G);
5282 /* Set default values of SGI */
5283 if (BRCMS_SGI_CAP_PHY(wlc)) {
5284 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5285 BRCMS_N_SGI_40));
5286 } else if (BRCMS_ISSSLPNPHY(wlc->band)) {
5287 brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 |
5288 BRCMS_N_SGI_40));
5289 } else {
5290 brcms_c_ht_update_sgi_rx(wlc, 0);
5293 /* initialize radio_mpc_disable according to wlc->mpc */
5294 brcms_c_radio_mpc_upd(wlc);
5295 brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail);
5297 if (perr)
5298 *perr = 0;
5300 return wlc;
5302 fail:
5303 wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n",
5304 unit, __func__, err);
5305 if (wlc)
5306 brcms_c_detach(wlc);
5308 if (perr)
5309 *perr = err;
5310 return NULL;
5313 static void brcms_c_timers_deinit(struct brcms_c_info *wlc)
5315 /* free timer state */
5316 if (wlc->wdtimer) {
5317 brcms_free_timer(wlc->wl, wlc->wdtimer);
5318 wlc->wdtimer = NULL;
5320 if (wlc->radio_timer) {
5321 brcms_free_timer(wlc->wl, wlc->radio_timer);
5322 wlc->radio_timer = NULL;
5326 static void brcms_c_detach_module(struct brcms_c_info *wlc)
5328 if (wlc->asi) {
5329 brcms_c_antsel_detach(wlc->asi);
5330 wlc->asi = NULL;
5333 if (wlc->ampdu) {
5334 brcms_c_ampdu_detach(wlc->ampdu);
5335 wlc->ampdu = NULL;
5338 brcms_c_stf_detach(wlc);
5342 * low level detach
5344 static int brcms_b_detach(struct brcms_c_info *wlc)
5346 uint i;
5347 struct brcms_hw_band *band;
5348 struct brcms_hardware *wlc_hw = wlc->hw;
5349 int callbacks;
5351 callbacks = 0;
5353 if (wlc_hw->sih) {
5355 * detach interrupt sync mechanism since interrupt is disabled
5356 * and per-port interrupt object may has been freed. this must
5357 * be done before sb core switch
5359 ai_deregister_intr_callback(wlc_hw->sih);
5360 ai_pci_sleep(wlc_hw->sih);
5363 brcms_b_detach_dmapio(wlc_hw);
5365 band = wlc_hw->band;
5366 for (i = 0; i < wlc_hw->_nbands; i++) {
5367 if (band->pi) {
5368 /* Detach this band's phy */
5369 wlc_phy_detach(band->pi);
5370 band->pi = NULL;
5372 band = wlc_hw->bandstate[OTHERBANDUNIT(wlc)];
5375 /* Free shared phy state */
5376 kfree(wlc_hw->phy_sh);
5378 wlc_phy_shim_detach(wlc_hw->physhim);
5380 /* free vars */
5381 kfree(wlc_hw->vars);
5382 wlc_hw->vars = NULL;
5384 if (wlc_hw->sih) {
5385 ai_detach(wlc_hw->sih);
5386 wlc_hw->sih = NULL;
5389 return callbacks;
5394 * Return a count of the number of driver callbacks still pending.
5396 * General policy is that brcms_c_detach can only dealloc/free software states.
5397 * It can NOT touch hardware registers since the d11core may be in reset and
5398 * clock may not be available.
5399 * One exception is sb register access, which is possible if crystal is turned
5400 * on after "down" state, driver should avoid software timer with the exception
5401 * of radio_monitor.
5403 uint brcms_c_detach(struct brcms_c_info *wlc)
5405 uint callbacks = 0;
5407 if (wlc == NULL)
5408 return 0;
5410 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5412 callbacks += brcms_b_detach(wlc);
5414 /* delete software timers */
5415 if (!brcms_c_radio_monitor_stop(wlc))
5416 callbacks++;
5418 brcms_c_channel_mgr_detach(wlc->cmi);
5420 brcms_c_timers_deinit(wlc);
5422 brcms_c_detach_module(wlc);
5425 while (wlc->tx_queues != NULL)
5426 brcms_c_txq_free(wlc, wlc->tx_queues);
5428 brcms_c_detach_mfree(wlc);
5429 return callbacks;
5432 /* update state that depends on the current value of "ap" */
5433 void brcms_c_ap_upd(struct brcms_c_info *wlc)
5435 /* STA-BSS; short capable */
5436 wlc->PLCPHdr_override = BRCMS_PLCP_SHORT;
5438 /* fixup mpc */
5439 wlc->mpc = true;
5443 * return true if Minimum Power Consumption should
5444 * be entered, false otherwise
5446 bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc)
5448 return false;
5451 bool brcms_c_ismpc(struct brcms_c_info *wlc)
5453 return (wlc->mpc_delay_off == 0) && (brcms_c_is_non_delay_mpc(wlc));
5456 void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc)
5458 bool mpc_radio, radio_state;
5461 * Clear the WL_RADIO_MPC_DISABLE bit when mpc feature is disabled
5462 * in case the WL_RADIO_MPC_DISABLE bit was set. Stop the radio
5463 * monitor also when WL_RADIO_MPC_DISABLE is the only reason that
5464 * the radio is going down.
5466 if (!wlc->mpc) {
5467 if (!wlc->pub->radio_disabled)
5468 return;
5469 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5470 brcms_c_radio_upd(wlc);
5471 if (!wlc->pub->radio_disabled)
5472 brcms_c_radio_monitor_stop(wlc);
5473 return;
5477 * sync ismpc logic with WL_RADIO_MPC_DISABLE bit in
5478 * wlc->pub->radio_disabled to go ON, always call radio_upd
5479 * synchronously to go OFF, postpone radio_upd to later when
5480 * context is safe(e.g. watchdog)
5482 radio_state =
5483 (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF :
5484 ON);
5485 mpc_radio = (brcms_c_ismpc(wlc) == true) ? OFF : ON;
5487 if (radio_state == ON && mpc_radio == OFF)
5488 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5489 else if (radio_state == OFF && mpc_radio == ON) {
5490 mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE);
5491 brcms_c_radio_upd(wlc);
5492 if (wlc->mpc_offcnt < BRCMS_MPC_THRESHOLD)
5493 wlc->mpc_dlycnt = BRCMS_MPC_MAX_DELAYCNT;
5494 else
5495 wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT;
5498 * Below logic is meant to capture the transition from mpc off
5499 * to mpc on for reasons other than wlc->mpc_delay_off keeping
5500 * the mpc off. In that case reset wlc->mpc_delay_off to
5501 * wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off
5503 if ((wlc->prev_non_delay_mpc == false) &&
5504 (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off)
5505 wlc->mpc_delay_off = wlc->mpc_dlycnt;
5507 wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc);
5509 /* Initialize just the hardware when coming out of POR or S3/S5 system states */
5510 static void brcms_b_hw_up(struct brcms_hardware *wlc_hw)
5512 if (wlc_hw->wlc->pub->hw_up)
5513 return;
5515 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5518 * Enable pll and xtal, initialize the power control registers,
5519 * and force fastclock for the remainder of brcms_c_up().
5521 brcms_b_xtal(wlc_hw, ON);
5522 ai_clkctl_init(wlc_hw->sih);
5523 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5525 ai_pci_fixcfg(wlc_hw->sih);
5528 * AI chip doesn't restore bar0win2 on
5529 * hibernation/resume, need sw fixup
5531 if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) ||
5532 (wlc_hw->sih->chip == BCM43225_CHIP_ID))
5533 wlc_hw->regs = (struct d11regs __iomem *)
5534 ai_setcore(wlc_hw->sih, D11_CORE_ID, 0);
5537 * Inform phy that a POR reset has occurred so
5538 * it does a complete phy init
5540 wlc_phy_por_inform(wlc_hw->band->pi);
5542 wlc_hw->ucode_loaded = false;
5543 wlc_hw->wlc->pub->hw_up = true;
5545 if ((wlc_hw->boardflags & BFL_FEM)
5546 && (wlc_hw->sih->chip == BCM4313_CHIP_ID)) {
5547 if (!
5548 (wlc_hw->boardrev >= 0x1250
5549 && (wlc_hw->boardflags & BFL_FEM_BT)))
5550 ai_epa_4313war(wlc_hw->sih);
5554 static int brcms_b_up_prep(struct brcms_hardware *wlc_hw)
5556 uint coremask;
5558 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5561 * Enable pll and xtal, initialize the power control registers,
5562 * and force fastclock for the remainder of brcms_c_up().
5564 brcms_b_xtal(wlc_hw, ON);
5565 ai_clkctl_init(wlc_hw->sih);
5566 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5569 * Configure pci/pcmcia here instead of in brcms_c_attach()
5570 * to allow mfg hotswap: down, hotswap (chip power cycle), up.
5572 coremask = (1 << wlc_hw->wlc->core->coreidx);
5574 ai_pci_setup(wlc_hw->sih, coremask);
5577 * Need to read the hwradio status here to cover the case where the
5578 * system is loaded with the hw radio disabled. We do not want to
5579 * bring the driver up in this case.
5581 if (brcms_b_radio_read_hwdisabled(wlc_hw)) {
5582 /* put SB PCI in down state again */
5583 ai_pci_down(wlc_hw->sih);
5584 brcms_b_xtal(wlc_hw, OFF);
5585 return -ENOMEDIUM;
5588 ai_pci_up(wlc_hw->sih);
5590 /* reset the d11 core */
5591 brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS);
5593 return 0;
5596 static int brcms_b_up_finish(struct brcms_hardware *wlc_hw)
5598 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5600 wlc_hw->up = true;
5601 wlc_phy_hw_state_upd(wlc_hw->band->pi, true);
5603 /* FULLY enable dynamic power control and d11 core interrupt */
5604 brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC);
5605 brcms_intrson(wlc_hw->wlc->wl);
5606 return 0;
5610 * Write WME tunable parameters for retransmit/max rate
5611 * from wlc struct to ucode
5613 static void brcms_c_wme_retries_write(struct brcms_c_info *wlc)
5615 int ac;
5617 /* Need clock to do this */
5618 if (!wlc->clk)
5619 return;
5621 for (ac = 0; ac < AC_COUNT; ac++)
5622 brcms_b_write_shm(wlc->hw, M_AC_TXLMT_ADDR(ac),
5623 wlc->wme_retries[ac]);
5626 /* make interface operational */
5627 int brcms_c_up(struct brcms_c_info *wlc)
5629 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5631 /* HW is turned off so don't try to access it */
5632 if (wlc->pub->hw_off || brcms_deviceremoved(wlc))
5633 return -ENOMEDIUM;
5635 if (!wlc->pub->hw_up) {
5636 brcms_b_hw_up(wlc->hw);
5637 wlc->pub->hw_up = true;
5640 if ((wlc->pub->boardflags & BFL_FEM)
5641 && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) {
5642 if (wlc->pub->boardrev >= 0x1250
5643 && (wlc->pub->boardflags & BFL_FEM_BT))
5644 brcms_b_mhf(wlc->hw, MHF5, MHF5_4313_GPIOCTRL,
5645 MHF5_4313_GPIOCTRL, BRCM_BAND_ALL);
5646 else
5647 brcms_b_mhf(wlc->hw, MHF4, MHF4_EXTPA_ENABLE,
5648 MHF4_EXTPA_ENABLE, BRCM_BAND_ALL);
5652 * Need to read the hwradio status here to cover the case where the
5653 * system is loaded with the hw radio disabled. We do not want to bring
5654 * the driver up in this case. If radio is disabled, abort up, lower
5655 * power, start radio timer and return 0(for NDIS) don't call
5656 * radio_update to avoid looping brcms_c_up.
5658 * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only
5660 if (!wlc->pub->radio_disabled) {
5661 int status = brcms_b_up_prep(wlc->hw);
5662 if (status == -ENOMEDIUM) {
5663 if (!mboolisset
5664 (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) {
5665 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
5666 mboolset(wlc->pub->radio_disabled,
5667 WL_RADIO_HW_DISABLE);
5669 if (bsscfg->enable && bsscfg->BSS)
5670 wiphy_err(wlc->wiphy, "wl%d: up"
5671 ": rfdisable -> "
5672 "bsscfg_disable()\n",
5673 wlc->pub->unit);
5678 if (wlc->pub->radio_disabled) {
5679 brcms_c_radio_monitor_start(wlc);
5680 return 0;
5683 /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */
5684 wlc->clk = true;
5686 brcms_c_radio_monitor_stop(wlc);
5688 /* Set EDCF hostflags */
5689 brcms_b_mhf(wlc->hw, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL);
5691 brcms_init(wlc->wl);
5692 wlc->pub->up = true;
5694 if (wlc->bandinit_pending) {
5695 brcms_c_suspend_mac_and_wait(wlc);
5696 brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec);
5697 wlc->bandinit_pending = false;
5698 brcms_c_enable_mac(wlc);
5701 brcms_b_up_finish(wlc->hw);
5703 /* Program the TX wme params with the current settings */
5704 brcms_c_wme_retries_write(wlc);
5706 /* start one second watchdog timer */
5707 brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true);
5708 wlc->WDarmed = true;
5710 /* ensure antenna config is up to date */
5711 brcms_c_stf_phy_txant_upd(wlc);
5712 /* ensure LDPC config is in sync */
5713 brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc);
5715 return 0;
5718 static uint brcms_c_down_del_timer(struct brcms_c_info *wlc)
5720 uint callbacks = 0;
5722 return callbacks;
5725 static int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw)
5727 bool dev_gone;
5728 uint callbacks = 0;
5730 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5732 if (!wlc_hw->up)
5733 return callbacks;
5735 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5737 /* disable interrupts */
5738 if (dev_gone)
5739 wlc_hw->wlc->macintmask = 0;
5740 else {
5741 /* now disable interrupts */
5742 brcms_intrsoff(wlc_hw->wlc->wl);
5744 /* ensure we're running on the pll clock again */
5745 brcms_b_clkctl_clk(wlc_hw, CLK_FAST);
5747 /* down phy at the last of this stage */
5748 callbacks += wlc_phy_down(wlc_hw->band->pi);
5750 return callbacks;
5753 static int brcms_b_down_finish(struct brcms_hardware *wlc_hw)
5755 uint callbacks = 0;
5756 bool dev_gone;
5758 BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit);
5760 if (!wlc_hw->up)
5761 return callbacks;
5763 wlc_hw->up = false;
5764 wlc_phy_hw_state_upd(wlc_hw->band->pi, false);
5766 dev_gone = brcms_deviceremoved(wlc_hw->wlc);
5768 if (dev_gone) {
5769 wlc_hw->sbclk = false;
5770 wlc_hw->clk = false;
5771 wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false);
5773 /* reclaim any posted packets */
5774 brcms_c_flushqueues(wlc_hw->wlc);
5775 } else {
5777 /* Reset and disable the core */
5778 if (ai_iscoreup(wlc_hw->sih)) {
5779 if (R_REG(&wlc_hw->regs->maccontrol) &
5780 MCTL_EN_MAC)
5781 brcms_c_suspend_mac_and_wait(wlc_hw->wlc);
5782 callbacks += brcms_reset(wlc_hw->wlc->wl);
5783 brcms_c_coredisable(wlc_hw);
5786 /* turn off primary xtal and pll */
5787 if (!wlc_hw->noreset) {
5788 ai_pci_down(wlc_hw->sih);
5789 brcms_b_xtal(wlc_hw, OFF);
5793 return callbacks;
5797 * Mark the interface nonoperational, stop the software mechanisms,
5798 * disable the hardware, free any transient buffer state.
5799 * Return a count of the number of driver callbacks still pending.
5801 uint brcms_c_down(struct brcms_c_info *wlc)
5804 uint callbacks = 0;
5805 int i;
5806 bool dev_gone = false;
5807 struct brcms_txq_info *qi;
5809 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
5811 /* check if we are already in the going down path */
5812 if (wlc->going_down) {
5813 wiphy_err(wlc->wiphy, "wl%d: %s: Driver going down so return"
5814 "\n", wlc->pub->unit, __func__);
5815 return 0;
5817 if (!wlc->pub->up)
5818 return callbacks;
5820 /* in between, mpc could try to bring down again.. */
5821 wlc->going_down = true;
5823 callbacks += brcms_b_bmac_down_prep(wlc->hw);
5825 dev_gone = brcms_deviceremoved(wlc);
5827 /* Call any registered down handlers */
5828 for (i = 0; i < BRCMS_MAXMODULES; i++) {
5829 if (wlc->modulecb[i].down_fn)
5830 callbacks +=
5831 wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl);
5834 /* cancel the watchdog timer */
5835 if (wlc->WDarmed) {
5836 if (!brcms_del_timer(wlc->wl, wlc->wdtimer))
5837 callbacks++;
5838 wlc->WDarmed = false;
5840 /* cancel all other timers */
5841 callbacks += brcms_c_down_del_timer(wlc);
5843 wlc->pub->up = false;
5845 wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL);
5847 /* clear txq flow control */
5848 brcms_c_txflowcontrol_reset(wlc);
5850 /* flush tx queues */
5851 for (qi = wlc->tx_queues; qi != NULL; qi = qi->next)
5852 brcmu_pktq_flush(&qi->q, true, NULL, NULL);
5854 callbacks += brcms_b_down_finish(wlc->hw);
5856 /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */
5857 wlc->clk = false;
5859 wlc->going_down = false;
5860 return callbacks;
5863 /* Set the current gmode configuration */
5864 int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
5866 int ret = 0;
5867 uint i;
5868 struct brcms_c_rateset rs;
5869 /* Default to 54g Auto */
5870 /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */
5871 s8 shortslot = BRCMS_SHORTSLOT_AUTO;
5872 bool shortslot_restrict = false; /* Restrict association to stations
5873 * that support shortslot
5875 bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */
5876 /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */
5877 int preamble = BRCMS_PLCP_LONG;
5878 bool preamble_restrict = false; /* Restrict association to stations
5879 * that support short preambles
5881 struct brcms_band *band;
5883 /* if N-support is enabled, allow Gmode set as long as requested
5884 * Gmode is not GMODE_LEGACY_B
5886 if ((wlc->pub->_n_enab & SUPPORT_11N) && gmode == GMODE_LEGACY_B)
5887 return -ENOTSUPP;
5889 /* verify that we are dealing with 2G band and grab the band pointer */
5890 if (wlc->band->bandtype == BRCM_BAND_2G)
5891 band = wlc->band;
5892 else if ((wlc->pub->_nbands > 1) &&
5893 (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G))
5894 band = wlc->bandstate[OTHERBANDUNIT(wlc)];
5895 else
5896 return -EINVAL;
5898 /* Legacy or bust when no OFDM is supported by regulatory */
5899 if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) &
5900 BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B))
5901 return -EINVAL;
5903 /* update configuration value */
5904 if (config == true)
5905 brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
5907 /* Clear rateset override */
5908 memset(&rs, 0, sizeof(struct brcms_c_rateset));
5910 switch (gmode) {
5911 case GMODE_LEGACY_B:
5912 shortslot = BRCMS_SHORTSLOT_OFF;
5913 brcms_c_rateset_copy(&gphy_legacy_rates, &rs);
5915 break;
5917 case GMODE_LRS:
5918 break;
5920 case GMODE_AUTO:
5921 /* Accept defaults */
5922 break;
5924 case GMODE_ONLY:
5925 ofdm_basic = true;
5926 preamble = BRCMS_PLCP_SHORT;
5927 preamble_restrict = true;
5928 break;
5930 case GMODE_PERFORMANCE:
5931 shortslot = BRCMS_SHORTSLOT_ON;
5932 shortslot_restrict = true;
5933 ofdm_basic = true;
5934 preamble = BRCMS_PLCP_SHORT;
5935 preamble_restrict = true;
5936 break;
5938 default:
5939 /* Error */
5940 wiphy_err(wlc->wiphy, "wl%d: %s: invalid gmode %d\n",
5941 wlc->pub->unit, __func__, gmode);
5942 return -ENOTSUPP;
5945 band->gmode = gmode;
5947 wlc->shortslot_override = shortslot;
5949 /* Use the default 11g rateset */
5950 if (!rs.count)
5951 brcms_c_rateset_copy(&cck_ofdm_rates, &rs);
5953 if (ofdm_basic) {
5954 for (i = 0; i < rs.count; i++) {
5955 if (rs.rates[i] == BRCM_RATE_6M
5956 || rs.rates[i] == BRCM_RATE_12M
5957 || rs.rates[i] == BRCM_RATE_24M)
5958 rs.rates[i] |= BRCMS_RATE_FLAG;
5962 /* Set default bss rateset */
5963 wlc->default_bss->rateset.count = rs.count;
5964 memcpy(wlc->default_bss->rateset.rates, rs.rates,
5965 sizeof(wlc->default_bss->rateset.rates));
5967 return ret;
5970 static int brcms_c_nmode_validate(struct brcms_c_info *wlc, s32 nmode)
5972 int err = 0;
5974 switch (nmode) {
5976 case OFF:
5977 break;
5979 case AUTO:
5980 case WL_11N_2x2:
5981 case WL_11N_3x3:
5982 if (!(BRCMS_PHY_11N_CAP(wlc->band)))
5983 err = -EINVAL;
5984 break;
5986 default:
5987 err = -EINVAL;
5988 break;
5991 return err;
5994 int brcms_c_set_nmode(struct brcms_c_info *wlc)
5996 uint i;
5997 int err;
5998 s32 nmode = AUTO;
6000 err = brcms_c_nmode_validate(wlc, nmode);
6001 if (err)
6002 return err;
6004 if (wlc->stf->txstreams == WL_11N_3x3)
6005 nmode = WL_11N_3x3;
6006 else
6007 nmode = WL_11N_2x2;
6009 /* force GMODE_AUTO if NMODE is ON */
6010 brcms_c_set_gmode(wlc, GMODE_AUTO, true);
6011 if (nmode == WL_11N_3x3)
6012 wlc->pub->_n_enab = SUPPORT_HT;
6013 else
6014 wlc->pub->_n_enab = SUPPORT_11N;
6015 wlc->default_bss->flags |= BRCMS_BSS_HT;
6016 /* add the mcs rates to the default and hw ratesets */
6017 brcms_c_rateset_mcs_build(&wlc->default_bss->rateset,
6018 wlc->stf->txstreams);
6019 for (i = 0; i < wlc->pub->_nbands; i++)
6020 memcpy(wlc->bandstate[i]->hw_rateset.mcs,
6021 wlc->default_bss->rateset.mcs, MCSSET_LEN);
6023 return 0;
6026 static int
6027 brcms_c_set_internal_rateset(struct brcms_c_info *wlc,
6028 struct brcms_c_rateset *rs_arg)
6030 struct brcms_c_rateset rs, new;
6031 uint bandunit;
6033 memcpy(&rs, rs_arg, sizeof(struct brcms_c_rateset));
6035 /* check for bad count value */
6036 if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES))
6037 return -EINVAL;
6039 /* try the current band */
6040 bandunit = wlc->band->bandunit;
6041 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
6042 if (brcms_c_rate_hwrs_filter_sort_validate
6043 (&new, &wlc->bandstate[bandunit]->hw_rateset, true,
6044 wlc->stf->txstreams))
6045 goto good;
6047 /* try the other band */
6048 if (brcms_is_mband_unlocked(wlc)) {
6049 bandunit = OTHERBANDUNIT(wlc);
6050 memcpy(&new, &rs, sizeof(struct brcms_c_rateset));
6051 if (brcms_c_rate_hwrs_filter_sort_validate(&new,
6052 &wlc->
6053 bandstate[bandunit]->
6054 hw_rateset, true,
6055 wlc->stf->txstreams))
6056 goto good;
6059 return -EBADE;
6061 good:
6062 /* apply new rateset */
6063 memcpy(&wlc->default_bss->rateset, &new,
6064 sizeof(struct brcms_c_rateset));
6065 memcpy(&wlc->bandstate[bandunit]->defrateset, &new,
6066 sizeof(struct brcms_c_rateset));
6067 return 0;
6070 static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc)
6072 u8 r;
6073 bool war = false;
6075 if (wlc->bsscfg->associated)
6076 r = wlc->bsscfg->current_bss->rateset.rates[0];
6077 else
6078 r = wlc->default_bss->rateset.rates[0];
6080 wlc_phy_ofdm_rateset_war(wlc->band->pi, war);
6083 int brcms_c_set_channel(struct brcms_c_info *wlc, u16 channel)
6085 u16 chspec = ch20mhz_chspec(channel);
6087 if (channel < 0 || channel > MAXCHANNEL)
6088 return -EINVAL;
6090 if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec))
6091 return -EINVAL;
6094 if (!wlc->pub->up && brcms_is_mband_unlocked(wlc)) {
6095 if (wlc->band->bandunit != chspec_bandunit(chspec))
6096 wlc->bandinit_pending = true;
6097 else
6098 wlc->bandinit_pending = false;
6101 wlc->default_bss->chanspec = chspec;
6102 /* brcms_c_BSSinit() will sanitize the rateset before
6103 * using it.. */
6104 if (wlc->pub->up && (wlc_phy_chanspec_get(wlc->band->pi) != chspec)) {
6105 brcms_c_set_home_chanspec(wlc, chspec);
6106 brcms_c_suspend_mac_and_wait(wlc);
6107 brcms_c_set_chanspec(wlc, chspec);
6108 brcms_c_enable_mac(wlc);
6110 return 0;
6113 int brcms_c_set_rate_limit(struct brcms_c_info *wlc, u16 srl, u16 lrl)
6115 int ac;
6117 if (srl < 1 || srl > RETRY_SHORT_MAX ||
6118 lrl < 1 || lrl > RETRY_SHORT_MAX)
6119 return -EINVAL;
6121 wlc->SRL = srl;
6122 wlc->LRL = lrl;
6124 brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL);
6126 for (ac = 0; ac < AC_COUNT; ac++) {
6127 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6128 EDCF_SHORT, wlc->SRL);
6129 wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac],
6130 EDCF_LONG, wlc->LRL);
6132 brcms_c_wme_retries_write(wlc);
6134 return 0;
6137 void brcms_c_get_current_rateset(struct brcms_c_info *wlc,
6138 struct brcm_rateset *currs)
6140 struct brcms_c_rateset *rs;
6142 if (wlc->pub->associated)
6143 rs = &wlc->bsscfg->current_bss->rateset;
6144 else
6145 rs = &wlc->default_bss->rateset;
6147 /* Copy only legacy rateset section */
6148 currs->count = rs->count;
6149 memcpy(&currs->rates, &rs->rates, rs->count);
6152 int brcms_c_set_rateset(struct brcms_c_info *wlc, struct brcm_rateset *rs)
6154 struct brcms_c_rateset internal_rs;
6155 int bcmerror;
6157 if (rs->count > BRCMS_NUMRATES)
6158 return -ENOBUFS;
6160 memset(&internal_rs, 0, sizeof(struct brcms_c_rateset));
6162 /* Copy only legacy rateset section */
6163 internal_rs.count = rs->count;
6164 memcpy(&internal_rs.rates, &rs->rates, internal_rs.count);
6166 /* merge rateset coming in with the current mcsset */
6167 if (wlc->pub->_n_enab & SUPPORT_11N) {
6168 struct brcms_bss_info *mcsset_bss;
6169 if (wlc->bsscfg->associated)
6170 mcsset_bss = wlc->bsscfg->current_bss;
6171 else
6172 mcsset_bss = wlc->default_bss;
6173 memcpy(internal_rs.mcs, &mcsset_bss->rateset.mcs[0],
6174 MCSSET_LEN);
6177 bcmerror = brcms_c_set_internal_rateset(wlc, &internal_rs);
6178 if (!bcmerror)
6179 brcms_c_ofdm_rateset_war(wlc);
6181 return bcmerror;
6184 int brcms_c_set_beacon_period(struct brcms_c_info *wlc, u16 period)
6186 if (period < DOT11_MIN_BEACON_PERIOD ||
6187 period > DOT11_MAX_BEACON_PERIOD)
6188 return -EINVAL;
6190 wlc->default_bss->beacon_period = period;
6191 return 0;
6194 u16 brcms_c_get_phy_type(struct brcms_c_info *wlc, int phyidx)
6196 return wlc->band->phytype;
6199 void brcms_c_set_shortslot_override(struct brcms_c_info *wlc, s8 sslot_override)
6201 wlc->shortslot_override = sslot_override;
6204 * shortslot is an 11g feature, so no more work if we are
6205 * currently on the 5G band
6207 if (wlc->band->bandtype == BRCM_BAND_5G)
6208 return;
6210 if (wlc->pub->up && wlc->pub->associated) {
6211 /* let watchdog or beacon processing update shortslot */
6212 } else if (wlc->pub->up) {
6213 /* unassociated shortslot is off */
6214 brcms_c_switch_shortslot(wlc, false);
6215 } else {
6216 /* driver is down, so just update the brcms_c_info
6217 * value */
6218 if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO)
6219 wlc->shortslot = false;
6220 else
6221 wlc->shortslot =
6222 (wlc->shortslot_override ==
6223 BRCMS_SHORTSLOT_ON);
6228 * register watchdog and down handlers.
6230 int brcms_c_module_register(struct brcms_pub *pub,
6231 const char *name, struct brcms_info *hdl,
6232 int (*d_fn)(void *handle))
6234 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6235 int i;
6237 /* find an empty entry and just add, no duplication check! */
6238 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6239 if (wlc->modulecb[i].name[0] == '\0') {
6240 strncpy(wlc->modulecb[i].name, name,
6241 sizeof(wlc->modulecb[i].name) - 1);
6242 wlc->modulecb[i].hdl = hdl;
6243 wlc->modulecb[i].down_fn = d_fn;
6244 return 0;
6248 return -ENOSR;
6251 /* unregister module callbacks */
6252 int brcms_c_module_unregister(struct brcms_pub *pub, const char *name,
6253 struct brcms_info *hdl)
6255 struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc;
6256 int i;
6258 if (wlc == NULL)
6259 return -ENODATA;
6261 for (i = 0; i < BRCMS_MAXMODULES; i++) {
6262 if (!strcmp(wlc->modulecb[i].name, name) &&
6263 (wlc->modulecb[i].hdl == hdl)) {
6264 memset(&wlc->modulecb[i], 0, sizeof(struct modulecb));
6265 return 0;
6269 /* table not found! */
6270 return -ENODATA;
6273 #ifdef BCMDBG
6274 static const char * const supr_reason[] = {
6275 "None", "PMQ Entry", "Flush request",
6276 "Previous frag failure", "Channel mismatch",
6277 "Lifetime Expiry", "Underflow"
6280 static void brcms_c_print_txs_status(u16 s)
6282 printk(KERN_DEBUG "[15:12] %d frame attempts\n",
6283 (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT);
6284 printk(KERN_DEBUG " [11:8] %d rts attempts\n",
6285 (s & TX_STATUS_RTS_RTX_MASK) >> TX_STATUS_RTS_RTX_SHIFT);
6286 printk(KERN_DEBUG " [7] %d PM mode indicated\n",
6287 ((s & TX_STATUS_PMINDCTD) ? 1 : 0));
6288 printk(KERN_DEBUG " [6] %d intermediate status\n",
6289 ((s & TX_STATUS_INTERMEDIATE) ? 1 : 0));
6290 printk(KERN_DEBUG " [5] %d AMPDU\n",
6291 (s & TX_STATUS_AMPDU) ? 1 : 0);
6292 printk(KERN_DEBUG " [4:2] %d Frame Suppressed Reason (%s)\n",
6293 ((s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT),
6294 supr_reason[(s & TX_STATUS_SUPR_MASK) >> TX_STATUS_SUPR_SHIFT]);
6295 printk(KERN_DEBUG " [1] %d acked\n",
6296 ((s & TX_STATUS_ACK_RCV) ? 1 : 0));
6298 #endif /* BCMDBG */
6300 void brcms_c_print_txstatus(struct tx_status *txs)
6302 #if defined(BCMDBG)
6303 u16 s = txs->status;
6304 u16 ackphyrxsh = txs->ackphyrxsh;
6306 printk(KERN_DEBUG "\ntxpkt (MPDU) Complete\n");
6308 printk(KERN_DEBUG "FrameID: %04x ", txs->frameid);
6309 printk(KERN_DEBUG "TxStatus: %04x", s);
6310 printk(KERN_DEBUG "\n");
6312 brcms_c_print_txs_status(s);
6314 printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime);
6315 printk(KERN_DEBUG "Seq: %04x ", txs->sequence);
6316 printk(KERN_DEBUG "PHYTxStatus: %04x ", txs->phyerr);
6317 printk(KERN_DEBUG "RxAckRSSI: %04x ",
6318 (ackphyrxsh & PRXS1_JSSI_MASK) >> PRXS1_JSSI_SHIFT);
6319 printk(KERN_DEBUG "RxAckSQ: %04x",
6320 (ackphyrxsh & PRXS1_SQ_MASK) >> PRXS1_SQ_SHIFT);
6321 printk(KERN_DEBUG "\n");
6322 #endif /* defined(BCMDBG) */
6325 void brcms_c_statsupd(struct brcms_c_info *wlc)
6327 int i;
6328 struct macstat macstats;
6329 #ifdef BCMDBG
6330 u16 delta;
6331 u16 rxf0ovfl;
6332 u16 txfunfl[NFIFO];
6333 #endif /* BCMDBG */
6335 /* if driver down, make no sense to update stats */
6336 if (!wlc->pub->up)
6337 return;
6339 #ifdef BCMDBG
6340 /* save last rx fifo 0 overflow count */
6341 rxf0ovfl = wlc->core->macstat_snapshot->rxf0ovfl;
6343 /* save last tx fifo underflow count */
6344 for (i = 0; i < NFIFO; i++)
6345 txfunfl[i] = wlc->core->macstat_snapshot->txfunfl[i];
6346 #endif /* BCMDBG */
6348 /* Read mac stats from contiguous shared memory */
6349 brcms_b_copyfrom_objmem(wlc->hw, M_UCODE_MACSTAT, &macstats,
6350 sizeof(struct macstat), OBJADDR_SHM_SEL);
6352 #ifdef BCMDBG
6353 /* check for rx fifo 0 overflow */
6354 delta = (u16) (wlc->core->macstat_snapshot->rxf0ovfl - rxf0ovfl);
6355 if (delta)
6356 wiphy_err(wlc->wiphy, "wl%d: %u rx fifo 0 overflows!\n",
6357 wlc->pub->unit, delta);
6359 /* check for tx fifo underflows */
6360 for (i = 0; i < NFIFO; i++) {
6361 delta =
6362 (u16) (wlc->core->macstat_snapshot->txfunfl[i] -
6363 txfunfl[i]);
6364 if (delta)
6365 wiphy_err(wlc->wiphy, "wl%d: %u tx fifo %d underflows!"
6366 "\n", wlc->pub->unit, delta, i);
6368 #endif /* BCMDBG */
6370 /* merge counters from dma module */
6371 for (i = 0; i < NFIFO; i++) {
6372 if (wlc->hw->di[i])
6373 dma_counterreset(wlc->hw->di[i]);
6377 bool brcms_c_chipmatch(u16 vendor, u16 device)
6379 if (vendor != PCI_VENDOR_ID_BROADCOM) {
6380 pr_err("chipmatch: unknown vendor id %04x\n", vendor);
6381 return false;
6384 if (device == BCM43224_D11N_ID_VEN1)
6385 return true;
6386 if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID))
6387 return true;
6388 if (device == BCM4313_D11N2G_ID)
6389 return true;
6390 if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID))
6391 return true;
6393 pr_err("chipmatch: unknown device id %04x\n", device);
6394 return false;
6397 #if defined(BCMDBG)
6398 void brcms_c_print_txdesc(struct d11txh *txh)
6400 u16 mtcl = le16_to_cpu(txh->MacTxControlLow);
6401 u16 mtch = le16_to_cpu(txh->MacTxControlHigh);
6402 u16 mfc = le16_to_cpu(txh->MacFrameControl);
6403 u16 tfest = le16_to_cpu(txh->TxFesTimeNormal);
6404 u16 ptcw = le16_to_cpu(txh->PhyTxControlWord);
6405 u16 ptcw_1 = le16_to_cpu(txh->PhyTxControlWord_1);
6406 u16 ptcw_1_Fbr = le16_to_cpu(txh->PhyTxControlWord_1_Fbr);
6407 u16 ptcw_1_Rts = le16_to_cpu(txh->PhyTxControlWord_1_Rts);
6408 u16 ptcw_1_FbrRts = le16_to_cpu(txh->PhyTxControlWord_1_FbrRts);
6409 u16 mainrates = le16_to_cpu(txh->MainRates);
6410 u16 xtraft = le16_to_cpu(txh->XtraFrameTypes);
6411 u8 *iv = txh->IV;
6412 u8 *ra = txh->TxFrameRA;
6413 u16 tfestfb = le16_to_cpu(txh->TxFesTimeFallback);
6414 u8 *rtspfb = txh->RTSPLCPFallback;
6415 u16 rtsdfb = le16_to_cpu(txh->RTSDurFallback);
6416 u8 *fragpfb = txh->FragPLCPFallback;
6417 u16 fragdfb = le16_to_cpu(txh->FragDurFallback);
6418 u16 mmodelen = le16_to_cpu(txh->MModeLen);
6419 u16 mmodefbrlen = le16_to_cpu(txh->MModeFbrLen);
6420 u16 tfid = le16_to_cpu(txh->TxFrameID);
6421 u16 txs = le16_to_cpu(txh->TxStatus);
6422 u16 mnmpdu = le16_to_cpu(txh->MaxNMpdus);
6423 u16 mabyte = le16_to_cpu(txh->MaxABytes_MRT);
6424 u16 mabyte_f = le16_to_cpu(txh->MaxABytes_FBR);
6425 u16 mmbyte = le16_to_cpu(txh->MinMBytes);
6427 u8 *rtsph = txh->RTSPhyHeader;
6428 struct ieee80211_rts rts = txh->rts_frame;
6429 char hexbuf[256];
6431 /* add plcp header along with txh descriptor */
6432 printk(KERN_DEBUG "Raw TxDesc + plcp header:\n");
6433 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET,
6434 txh, sizeof(struct d11txh) + 48);
6436 printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl);
6437 printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch);
6438 printk(KERN_DEBUG "FC: %04x ", mfc);
6439 printk(KERN_DEBUG "FES Time: %04x\n", tfest);
6440 printk(KERN_DEBUG "PhyCtl: %04x%s ", ptcw,
6441 (ptcw & PHY_TXC_SHORT_HDR) ? " short" : "");
6442 printk(KERN_DEBUG "PhyCtl_1: %04x ", ptcw_1);
6443 printk(KERN_DEBUG "PhyCtl_1_Fbr: %04x\n", ptcw_1_Fbr);
6444 printk(KERN_DEBUG "PhyCtl_1_Rts: %04x ", ptcw_1_Rts);
6445 printk(KERN_DEBUG "PhyCtl_1_Fbr_Rts: %04x\n", ptcw_1_FbrRts);
6446 printk(KERN_DEBUG "MainRates: %04x ", mainrates);
6447 printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft);
6448 printk(KERN_DEBUG "\n");
6450 brcmu_format_hex(hexbuf, iv, sizeof(txh->IV));
6451 printk(KERN_DEBUG "SecIV: %s\n", hexbuf);
6452 brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA));
6453 printk(KERN_DEBUG "RA: %s\n", hexbuf);
6455 printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb);
6456 brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback));
6457 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6458 printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb);
6459 brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback));
6460 printk(KERN_DEBUG "PLCP: %s ", hexbuf);
6461 printk(KERN_DEBUG "DUR: %04x", fragdfb);
6462 printk(KERN_DEBUG "\n");
6464 printk(KERN_DEBUG "MModeLen: %04x ", mmodelen);
6465 printk(KERN_DEBUG "MModeFbrLen: %04x\n", mmodefbrlen);
6467 printk(KERN_DEBUG "FrameID: %04x\n", tfid);
6468 printk(KERN_DEBUG "TxStatus: %04x\n", txs);
6470 printk(KERN_DEBUG "MaxNumMpdu: %04x\n", mnmpdu);
6471 printk(KERN_DEBUG "MaxAggbyte: %04x\n", mabyte);
6472 printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f);
6473 printk(KERN_DEBUG "MinByte: %04x\n", mmbyte);
6475 brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader));
6476 printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf);
6477 brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame));
6478 printk(KERN_DEBUG "RTS Frame: %s", hexbuf);
6479 printk(KERN_DEBUG "\n");
6481 #endif /* defined(BCMDBG) */
6483 #if defined(BCMDBG)
6484 void brcms_c_print_rxh(struct d11rxhdr *rxh)
6486 u16 len = rxh->RxFrameSize;
6487 u16 phystatus_0 = rxh->PhyRxStatus_0;
6488 u16 phystatus_1 = rxh->PhyRxStatus_1;
6489 u16 phystatus_2 = rxh->PhyRxStatus_2;
6490 u16 phystatus_3 = rxh->PhyRxStatus_3;
6491 u16 macstatus1 = rxh->RxStatus1;
6492 u16 macstatus2 = rxh->RxStatus2;
6493 char flagstr[64];
6494 char lenbuf[20];
6495 static const struct brcmu_bit_desc macstat_flags[] = {
6496 {RXS_FCSERR, "FCSErr"},
6497 {RXS_RESPFRAMETX, "Reply"},
6498 {RXS_PBPRES, "PADDING"},
6499 {RXS_DECATMPT, "DeCr"},
6500 {RXS_DECERR, "DeCrErr"},
6501 {RXS_BCNSENT, "Bcn"},
6502 {0, NULL}
6505 printk(KERN_DEBUG "Raw RxDesc:\n");
6506 print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh,
6507 sizeof(struct d11rxhdr));
6509 brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64);
6511 snprintf(lenbuf, sizeof(lenbuf), "0x%x", len);
6513 printk(KERN_DEBUG "RxFrameSize: %6s (%d)%s\n", lenbuf, len,
6514 (rxh->PhyRxStatus_0 & PRXS0_SHORTH) ? " short preamble" : "");
6515 printk(KERN_DEBUG "RxPHYStatus: %04x %04x %04x %04x\n",
6516 phystatus_0, phystatus_1, phystatus_2, phystatus_3);
6517 printk(KERN_DEBUG "RxMACStatus: %x %s\n", macstatus1, flagstr);
6518 printk(KERN_DEBUG "RXMACaggtype: %x\n",
6519 (macstatus2 & RXS_AGGTYPE_MASK));
6520 printk(KERN_DEBUG "RxTSFTime: %04x\n", rxh->RxTSFTime);
6522 #endif /* defined(BCMDBG) */
6524 u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate)
6526 u16 table_ptr;
6527 u8 phy_rate, index;
6529 /* get the phy specific rate encoding for the PLCP SIGNAL field */
6530 if (is_ofdm_rate(rate))
6531 table_ptr = M_RT_DIRMAP_A;
6532 else
6533 table_ptr = M_RT_DIRMAP_B;
6535 /* for a given rate, the LS-nibble of the PLCP SIGNAL field is
6536 * the index into the rate table.
6538 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
6539 index = phy_rate & 0xf;
6541 /* Find the SHM pointer to the rate table entry by looking in the
6542 * Direct-map Table
6544 return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2));
6547 /* Callback for device removed */
6550 * Attempts to queue a packet onto a multiple-precedence queue,
6551 * if necessary evicting a lower precedence packet from the queue.
6553 * 'prec' is the precedence number that has already been mapped
6554 * from the packet priority.
6556 * Returns true if packet consumed (queued), false if not.
6558 static bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q,
6559 struct sk_buff *pkt, int prec)
6561 return brcms_c_prec_enq_head(wlc, q, pkt, prec, false);
6564 bool
6565 brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q,
6566 struct sk_buff *pkt, int prec, bool head)
6568 struct sk_buff *p;
6569 int eprec = -1; /* precedence to evict from */
6571 /* Determine precedence from which to evict packet, if any */
6572 if (pktq_pfull(q, prec))
6573 eprec = prec;
6574 else if (pktq_full(q)) {
6575 p = brcmu_pktq_peek_tail(q, &eprec);
6576 if (eprec > prec) {
6577 wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d"
6578 "\n", __func__, eprec, prec);
6579 return false;
6583 /* Evict if needed */
6584 if (eprec >= 0) {
6585 bool discard_oldest;
6587 discard_oldest = ac_bitmap_tst(0, eprec);
6589 /* Refuse newer packet unless configured to discard oldest */
6590 if (eprec == prec && !discard_oldest) {
6591 wiphy_err(wlc->wiphy, "%s: No where to go, prec == %d"
6592 "\n", __func__, prec);
6593 return false;
6596 /* Evict packet according to discard policy */
6597 p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) :
6598 brcmu_pktq_pdeq_tail(q, eprec);
6599 brcmu_pkt_buf_free_skb(p);
6602 /* Enqueue */
6603 if (head)
6604 p = brcmu_pktq_penq_head(q, prec, pkt);
6605 else
6606 p = brcmu_pktq_penq(q, prec, pkt);
6608 return true;
6611 void brcms_c_txq_enq(struct brcms_c_info *wlc, struct scb *scb,
6612 struct sk_buff *sdu, uint prec)
6614 struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */
6615 struct pktq *q = &qi->q;
6616 int prio;
6618 prio = sdu->priority;
6620 if (!brcms_c_prec_enq(wlc, q, sdu, prec)) {
6622 * we might hit this condtion in case
6623 * packet flooding from mac80211 stack
6625 brcmu_pkt_buf_free_skb(sdu);
6630 * bcmc_fid_generate:
6631 * Generate frame ID for a BCMC packet. The frag field is not used
6632 * for MC frames so is used as part of the sequence number.
6634 static inline u16
6635 bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg,
6636 struct d11txh *txh)
6638 u16 frameid;
6640 frameid = le16_to_cpu(txh->TxFrameID) & ~(TXFID_SEQ_MASK |
6641 TXFID_QUEUE_MASK);
6642 frameid |=
6643 (((wlc->
6644 mc_fid_counter++) << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6645 TX_BCMC_FIFO;
6647 return frameid;
6650 static uint
6651 brcms_c_calc_ack_time(struct brcms_c_info *wlc, u32 rspec,
6652 u8 preamble_type)
6654 uint dur = 0;
6656 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d\n",
6657 wlc->pub->unit, rspec, preamble_type);
6659 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6660 * is less than or equal to the rate of the immediately previous
6661 * frame in the FES
6663 rspec = brcms_basic_rate(wlc, rspec);
6664 /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */
6665 dur =
6666 brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6667 (DOT11_ACK_LEN + FCS_LEN));
6668 return dur;
6671 static uint
6672 brcms_c_calc_cts_time(struct brcms_c_info *wlc, u32 rspec,
6673 u8 preamble_type)
6675 BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n",
6676 wlc->pub->unit, rspec, preamble_type);
6677 return brcms_c_calc_ack_time(wlc, rspec, preamble_type);
6680 static uint
6681 brcms_c_calc_ba_time(struct brcms_c_info *wlc, u32 rspec,
6682 u8 preamble_type)
6684 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, "
6685 "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type);
6687 * Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that
6688 * is less than or equal to the rate of the immediately previous
6689 * frame in the FES
6691 rspec = brcms_basic_rate(wlc, rspec);
6692 /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */
6693 return brcms_c_calc_frame_time(wlc, rspec, preamble_type,
6694 (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN +
6695 FCS_LEN));
6698 /* brcms_c_compute_frame_dur()
6700 * Calculate the 802.11 MAC header DUR field for MPDU
6701 * DUR for a single frame = 1 SIFS + 1 ACK
6702 * DUR for a frame with following frags = 3 SIFS + 2 ACK + next frag time
6704 * rate MPDU rate in unit of 500kbps
6705 * next_frag_len next MPDU length in bytes
6706 * preamble_type use short/GF or long/MM PLCP header
6708 static u16
6709 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, u32 rate,
6710 u8 preamble_type, uint next_frag_len)
6712 u16 dur, sifs;
6714 sifs = get_sifs(wlc->band);
6716 dur = sifs;
6717 dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type);
6719 if (next_frag_len) {
6720 /* Double the current DUR to get 2 SIFS + 2 ACKs */
6721 dur *= 2;
6722 /* add another SIFS and the frag time */
6723 dur += sifs;
6724 dur +=
6725 (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type,
6726 next_frag_len);
6728 return dur;
6731 /* The opposite of brcms_c_calc_frame_time */
6732 static uint
6733 brcms_c_calc_frame_len(struct brcms_c_info *wlc, u32 ratespec,
6734 u8 preamble_type, uint dur)
6736 uint nsyms, mac_len, Ndps, kNdps;
6737 uint rate = rspec2rate(ratespec);
6739 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, dur %d\n",
6740 wlc->pub->unit, ratespec, preamble_type, dur);
6742 if (is_mcs_rate(ratespec)) {
6743 uint mcs = ratespec & RSPEC_RATE_MASK;
6744 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
6745 dur -= PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
6746 /* payload calculation matches that of regular ofdm */
6747 if (wlc->band->bandtype == BRCM_BAND_2G)
6748 dur -= DOT11_OFDM_SIGNAL_EXTENSION;
6749 /* kNdbps = kbps * 4 */
6750 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
6751 rspec_issgi(ratespec)) * 4;
6752 nsyms = dur / APHY_SYMBOL_TIME;
6753 mac_len =
6754 ((nsyms * kNdps) -
6755 ((APHY_SERVICE_NBITS + APHY_TAIL_NBITS) * 1000)) / 8000;
6756 } else if (is_ofdm_rate(ratespec)) {
6757 dur -= APHY_PREAMBLE_TIME;
6758 dur -= APHY_SIGNAL_TIME;
6759 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
6760 Ndps = rate * 2;
6761 nsyms = dur / APHY_SYMBOL_TIME;
6762 mac_len =
6763 ((nsyms * Ndps) -
6764 (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8;
6765 } else {
6766 if (preamble_type & BRCMS_SHORT_PREAMBLE)
6767 dur -= BPHY_PLCP_SHORT_TIME;
6768 else
6769 dur -= BPHY_PLCP_TIME;
6770 mac_len = dur * rate;
6771 /* divide out factor of 2 in rate (1/2 mbps) */
6772 mac_len = mac_len / 8 / 2;
6774 return mac_len;
6777 static u32
6778 mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band,
6779 u32 int_val)
6781 u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT;
6782 u8 rate = int_val & NRATE_RATE_MASK;
6783 u32 rspec;
6784 bool ismcs = ((int_val & NRATE_MCS_INUSE) == NRATE_MCS_INUSE);
6785 bool issgi = ((int_val & NRATE_SGI_MASK) >> NRATE_SGI_SHIFT);
6786 bool override_mcs_only = ((int_val & NRATE_OVERRIDE_MCS_ONLY)
6787 == NRATE_OVERRIDE_MCS_ONLY);
6788 int bcmerror = 0;
6790 if (!ismcs)
6791 return (u32) rate;
6793 /* validate the combination of rate/mcs/stf is allowed */
6794 if ((wlc->pub->_n_enab & SUPPORT_11N) && ismcs) {
6795 /* mcs only allowed when nmode */
6796 if (stf > PHY_TXC1_MODE_SDM) {
6797 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n",
6798 wlc->pub->unit, __func__);
6799 bcmerror = -EINVAL;
6800 goto done;
6803 /* mcs 32 is a special case, DUP mode 40 only */
6804 if (rate == 32) {
6805 if (!CHSPEC_IS40(wlc->home_chanspec) ||
6806 ((stf != PHY_TXC1_MODE_SISO)
6807 && (stf != PHY_TXC1_MODE_CDD))) {
6808 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs "
6809 "32\n", wlc->pub->unit, __func__);
6810 bcmerror = -EINVAL;
6811 goto done;
6813 /* mcs > 7 must use stf SDM */
6814 } else if (rate > HIGHEST_SINGLE_STREAM_MCS) {
6815 /* mcs > 7 must use stf SDM */
6816 if (stf != PHY_TXC1_MODE_SDM) {
6817 BCMMSG(wlc->wiphy, "wl%d: enabling "
6818 "SDM mode for mcs %d\n",
6819 wlc->pub->unit, rate);
6820 stf = PHY_TXC1_MODE_SDM;
6822 } else {
6824 * MCS 0-7 may use SISO, CDD, and for
6825 * phy_rev >= 3 STBC
6827 if ((stf > PHY_TXC1_MODE_STBC) ||
6828 (!BRCMS_STBC_CAP_PHY(wlc)
6829 && (stf == PHY_TXC1_MODE_STBC))) {
6830 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC"
6831 "\n", wlc->pub->unit, __func__);
6832 bcmerror = -EINVAL;
6833 goto done;
6836 } else if (is_ofdm_rate(rate)) {
6837 if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) {
6838 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n",
6839 wlc->pub->unit, __func__);
6840 bcmerror = -EINVAL;
6841 goto done;
6843 } else if (is_cck_rate(rate)) {
6844 if ((cur_band->bandtype != BRCM_BAND_2G)
6845 || (stf != PHY_TXC1_MODE_SISO)) {
6846 wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n",
6847 wlc->pub->unit, __func__);
6848 bcmerror = -EINVAL;
6849 goto done;
6851 } else {
6852 wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n",
6853 wlc->pub->unit, __func__);
6854 bcmerror = -EINVAL;
6855 goto done;
6857 /* make sure multiple antennae are available for non-siso rates */
6858 if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) {
6859 wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO "
6860 "request\n", wlc->pub->unit, __func__);
6861 bcmerror = -EINVAL;
6862 goto done;
6865 rspec = rate;
6866 if (ismcs) {
6867 rspec |= RSPEC_MIMORATE;
6868 /* For STBC populate the STC field of the ratespec */
6869 if (stf == PHY_TXC1_MODE_STBC) {
6870 u8 stc;
6871 stc = 1; /* Nss for single stream is always 1 */
6872 rspec |= (stc << RSPEC_STC_SHIFT);
6876 rspec |= (stf << RSPEC_STF_SHIFT);
6878 if (override_mcs_only)
6879 rspec |= RSPEC_OVERRIDE_MCS_ONLY;
6881 if (issgi)
6882 rspec |= RSPEC_SHORT_GI;
6884 if ((rate != 0)
6885 && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true))
6886 return rate;
6888 return rspec;
6889 done:
6890 return rate;
6894 * Add struct d11txh, struct cck_phy_hdr.
6896 * 'p' data must start with 802.11 MAC header
6897 * 'p' must allow enough bytes of local headers to be "pushed" onto the packet
6899 * headroom == D11_PHY_HDR_LEN + D11_TXH_LEN (D11_TXH_LEN is now 104 bytes)
6902 static u16
6903 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw,
6904 struct sk_buff *p, struct scb *scb, uint frag,
6905 uint nfrags, uint queue, uint next_frag_len)
6907 struct ieee80211_hdr *h;
6908 struct d11txh *txh;
6909 u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN];
6910 int len, phylen, rts_phylen;
6911 u16 mch, phyctl, xfts, mainrates;
6912 u16 seq = 0, mcl = 0, status = 0, frameid = 0;
6913 u32 rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6914 u32 rts_rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M };
6915 bool use_rts = false;
6916 bool use_cts = false;
6917 bool use_rifs = false;
6918 bool short_preamble[2] = { false, false };
6919 u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6920 u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE };
6921 u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN];
6922 struct ieee80211_rts *rts = NULL;
6923 bool qos;
6924 uint ac;
6925 bool hwtkmic = false;
6926 u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ;
6927 #define ANTCFG_NONE 0xFF
6928 u8 antcfg = ANTCFG_NONE;
6929 u8 fbantcfg = ANTCFG_NONE;
6930 uint phyctl1_stf = 0;
6931 u16 durid = 0;
6932 struct ieee80211_tx_rate *txrate[2];
6933 int k;
6934 struct ieee80211_tx_info *tx_info;
6935 bool is_mcs;
6936 u16 mimo_txbw;
6937 u8 mimo_preamble_type;
6939 /* locate 802.11 MAC header */
6940 h = (struct ieee80211_hdr *)(p->data);
6941 qos = ieee80211_is_data_qos(h->frame_control);
6943 /* compute length of frame in bytes for use in PLCP computations */
6944 len = brcmu_pkttotlen(p);
6945 phylen = len + FCS_LEN;
6947 /* Get tx_info */
6948 tx_info = IEEE80211_SKB_CB(p);
6950 /* add PLCP */
6951 plcp = skb_push(p, D11_PHY_HDR_LEN);
6953 /* add Broadcom tx descriptor header */
6954 txh = (struct d11txh *) skb_push(p, D11_TXH_LEN);
6955 memset(txh, 0, D11_TXH_LEN);
6957 /* setup frameid */
6958 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
6959 /* non-AP STA should never use BCMC queue */
6960 if (queue == TX_BCMC_FIFO) {
6961 wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == "
6962 "TX_BCMC!\n", wlc->pub->unit, __func__);
6963 frameid = bcmc_fid_generate(wlc, NULL, txh);
6964 } else {
6965 /* Increment the counter for first fragment */
6966 if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
6967 scb->seqnum[p->priority]++;
6969 /* extract fragment number from frame first */
6970 seq = le16_to_cpu(h->seq_ctrl) & FRAGNUM_MASK;
6971 seq |= (scb->seqnum[p->priority] << SEQNUM_SHIFT);
6972 h->seq_ctrl = cpu_to_le16(seq);
6974 frameid = ((seq << TXFID_SEQ_SHIFT) & TXFID_SEQ_MASK) |
6975 (queue & TXFID_QUEUE_MASK);
6978 frameid |= queue & TXFID_QUEUE_MASK;
6980 /* set the ignpmq bit for all pkts tx'd in PS mode and for beacons */
6981 if (ieee80211_is_beacon(h->frame_control))
6982 mcl |= TXC_IGNOREPMQ;
6984 txrate[0] = tx_info->control.rates;
6985 txrate[1] = txrate[0] + 1;
6988 * if rate control algorithm didn't give us a fallback
6989 * rate, use the primary rate
6991 if (txrate[1]->idx < 0)
6992 txrate[1] = txrate[0];
6994 for (k = 0; k < hw->max_rates; k++) {
6995 is_mcs = txrate[k]->flags & IEEE80211_TX_RC_MCS ? true : false;
6996 if (!is_mcs) {
6997 if ((txrate[k]->idx >= 0)
6998 && (txrate[k]->idx <
6999 hw->wiphy->bands[tx_info->band]->n_bitrates)) {
7000 rspec[k] =
7001 hw->wiphy->bands[tx_info->band]->
7002 bitrates[txrate[k]->idx].hw_value;
7003 short_preamble[k] =
7004 txrate[k]->
7005 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ?
7006 true : false;
7007 } else {
7008 rspec[k] = BRCM_RATE_1M;
7010 } else {
7011 rspec[k] = mac80211_wlc_set_nrate(wlc, wlc->band,
7012 NRATE_MCS_INUSE | txrate[k]->idx);
7016 * Currently only support same setting for primay and
7017 * fallback rates. Unify flags for each rate into a
7018 * single value for the frame
7020 use_rts |=
7021 txrate[k]->
7022 flags & IEEE80211_TX_RC_USE_RTS_CTS ? true : false;
7023 use_cts |=
7024 txrate[k]->
7025 flags & IEEE80211_TX_RC_USE_CTS_PROTECT ? true : false;
7029 * (1) RATE:
7030 * determine and validate primary rate
7031 * and fallback rates
7033 if (!rspec_active(rspec[k])) {
7034 rspec[k] = BRCM_RATE_1M;
7035 } else {
7036 if (!is_multicast_ether_addr(h->addr1)) {
7037 /* set tx antenna config */
7038 brcms_c_antsel_antcfg_get(wlc->asi, false,
7039 false, 0, 0, &antcfg, &fbantcfg);
7044 phyctl1_stf = wlc->stf->ss_opmode;
7046 if (wlc->pub->_n_enab & SUPPORT_11N) {
7047 for (k = 0; k < hw->max_rates; k++) {
7049 * apply siso/cdd to single stream mcs's or ofdm
7050 * if rspec is auto selected
7052 if (((is_mcs_rate(rspec[k]) &&
7053 is_single_stream(rspec[k] & RSPEC_RATE_MASK)) ||
7054 is_ofdm_rate(rspec[k]))
7055 && ((rspec[k] & RSPEC_OVERRIDE_MCS_ONLY)
7056 || !(rspec[k] & RSPEC_OVERRIDE))) {
7057 rspec[k] &= ~(RSPEC_STF_MASK | RSPEC_STC_MASK);
7059 /* For SISO MCS use STBC if possible */
7060 if (is_mcs_rate(rspec[k])
7061 && BRCMS_STF_SS_STBC_TX(wlc, scb)) {
7062 u8 stc;
7064 /* Nss for single stream is always 1 */
7065 stc = 1;
7066 rspec[k] |= (PHY_TXC1_MODE_STBC <<
7067 RSPEC_STF_SHIFT) |
7068 (stc << RSPEC_STC_SHIFT);
7069 } else
7070 rspec[k] |=
7071 (phyctl1_stf << RSPEC_STF_SHIFT);
7075 * Is the phy configured to use 40MHZ frames? If
7076 * so then pick the desired txbw
7078 if (brcms_chspec_bw(wlc->chanspec) == BRCMS_40_MHZ) {
7079 /* default txbw is 20in40 SB */
7080 mimo_ctlchbw = mimo_txbw =
7081 CHSPEC_SB_UPPER(wlc_phy_chanspec_get(
7082 wlc->band->pi))
7083 ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ;
7085 if (is_mcs_rate(rspec[k])) {
7086 /* mcs 32 must be 40b/w DUP */
7087 if ((rspec[k] & RSPEC_RATE_MASK)
7088 == 32) {
7089 mimo_txbw =
7090 PHY_TXC1_BW_40MHZ_DUP;
7091 /* use override */
7092 } else if (wlc->mimo_40txbw != AUTO)
7093 mimo_txbw = wlc->mimo_40txbw;
7094 /* else check if dst is using 40 Mhz */
7095 else if (scb->flags & SCB_IS40)
7096 mimo_txbw = PHY_TXC1_BW_40MHZ;
7097 } else if (is_ofdm_rate(rspec[k])) {
7098 if (wlc->ofdm_40txbw != AUTO)
7099 mimo_txbw = wlc->ofdm_40txbw;
7100 } else if (wlc->cck_40txbw != AUTO) {
7101 mimo_txbw = wlc->cck_40txbw;
7103 } else {
7105 * mcs32 is 40 b/w only.
7106 * This is possible for probe packets on
7107 * a STA during SCAN
7109 if ((rspec[k] & RSPEC_RATE_MASK) == 32)
7110 /* mcs 0 */
7111 rspec[k] = RSPEC_MIMORATE;
7113 mimo_txbw = PHY_TXC1_BW_20MHZ;
7116 /* Set channel width */
7117 rspec[k] &= ~RSPEC_BW_MASK;
7118 if ((k == 0) || ((k > 0) && is_mcs_rate(rspec[k])))
7119 rspec[k] |= (mimo_txbw << RSPEC_BW_SHIFT);
7120 else
7121 rspec[k] |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7123 /* Disable short GI, not supported yet */
7124 rspec[k] &= ~RSPEC_SHORT_GI;
7126 mimo_preamble_type = BRCMS_MM_PREAMBLE;
7127 if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD)
7128 mimo_preamble_type = BRCMS_GF_PREAMBLE;
7130 if ((txrate[k]->flags & IEEE80211_TX_RC_MCS)
7131 && (!is_mcs_rate(rspec[k]))) {
7132 wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_"
7133 "RC_MCS != is_mcs_rate(rspec)\n",
7134 wlc->pub->unit, __func__);
7137 if (is_mcs_rate(rspec[k])) {
7138 preamble_type[k] = mimo_preamble_type;
7141 * if SGI is selected, then forced mm
7142 * for single stream
7144 if ((rspec[k] & RSPEC_SHORT_GI)
7145 && is_single_stream(rspec[k] &
7146 RSPEC_RATE_MASK))
7147 preamble_type[k] = BRCMS_MM_PREAMBLE;
7150 /* should be better conditionalized */
7151 if (!is_mcs_rate(rspec[0])
7152 && (tx_info->control.rates[0].
7153 flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE))
7154 preamble_type[k] = BRCMS_SHORT_PREAMBLE;
7156 } else {
7157 for (k = 0; k < hw->max_rates; k++) {
7158 /* Set ctrlchbw as 20Mhz */
7159 rspec[k] &= ~RSPEC_BW_MASK;
7160 rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT);
7162 /* for nphy, stf of ofdm frames must follow policies */
7163 if (BRCMS_ISNPHY(wlc->band) && is_ofdm_rate(rspec[k])) {
7164 rspec[k] &= ~RSPEC_STF_MASK;
7165 rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT;
7170 /* Reset these for use with AMPDU's */
7171 txrate[0]->count = 0;
7172 txrate[1]->count = 0;
7174 /* (2) PROTECTION, may change rspec */
7175 if ((ieee80211_is_data(h->frame_control) ||
7176 ieee80211_is_mgmt(h->frame_control)) &&
7177 (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1))
7178 use_rts = true;
7180 /* (3) PLCP: determine PLCP header and MAC duration,
7181 * fill struct d11txh */
7182 brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp);
7183 brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback);
7184 memcpy(&txh->FragPLCPFallback,
7185 plcp_fallback, sizeof(txh->FragPLCPFallback));
7187 /* Length field now put in CCK FBR CRC field */
7188 if (is_cck_rate(rspec[1])) {
7189 txh->FragPLCPFallback[4] = phylen & 0xff;
7190 txh->FragPLCPFallback[5] = (phylen & 0xff00) >> 8;
7193 /* MIMO-RATE: need validation ?? */
7194 mainrates = is_ofdm_rate(rspec[0]) ?
7195 D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) :
7196 plcp[0];
7198 /* DUR field for main rate */
7199 if (!ieee80211_is_pspoll(h->frame_control) &&
7200 !is_multicast_ether_addr(h->addr1) && !use_rifs) {
7201 durid =
7202 brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0],
7203 next_frag_len);
7204 h->duration_id = cpu_to_le16(durid);
7205 } else if (use_rifs) {
7206 /* NAV protect to end of next max packet size */
7207 durid =
7208 (u16) brcms_c_calc_frame_time(wlc, rspec[0],
7209 preamble_type[0],
7210 DOT11_MAX_FRAG_LEN);
7211 durid += RIFS_11N_TIME;
7212 h->duration_id = cpu_to_le16(durid);
7215 /* DUR field for fallback rate */
7216 if (ieee80211_is_pspoll(h->frame_control))
7217 txh->FragDurFallback = h->duration_id;
7218 else if (is_multicast_ether_addr(h->addr1) || use_rifs)
7219 txh->FragDurFallback = 0;
7220 else {
7221 durid = brcms_c_compute_frame_dur(wlc, rspec[1],
7222 preamble_type[1], next_frag_len);
7223 txh->FragDurFallback = cpu_to_le16(durid);
7226 /* (4) MAC-HDR: MacTxControlLow */
7227 if (frag == 0)
7228 mcl |= TXC_STARTMSDU;
7230 if (!is_multicast_ether_addr(h->addr1))
7231 mcl |= TXC_IMMEDACK;
7233 if (wlc->band->bandtype == BRCM_BAND_5G)
7234 mcl |= TXC_FREQBAND_5G;
7236 if (CHSPEC_IS40(wlc_phy_chanspec_get(wlc->band->pi)))
7237 mcl |= TXC_BW_40;
7239 /* set AMIC bit if using hardware TKIP MIC */
7240 if (hwtkmic)
7241 mcl |= TXC_AMIC;
7243 txh->MacTxControlLow = cpu_to_le16(mcl);
7245 /* MacTxControlHigh */
7246 mch = 0;
7248 /* Set fallback rate preamble type */
7249 if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) ||
7250 (preamble_type[1] == BRCMS_GF_PREAMBLE)) {
7251 if (rspec2rate(rspec[1]) != BRCM_RATE_1M)
7252 mch |= TXC_PREAMBLE_DATA_FB_SHORT;
7255 /* MacFrameControl */
7256 memcpy(&txh->MacFrameControl, &h->frame_control, sizeof(u16));
7257 txh->TxFesTimeNormal = cpu_to_le16(0);
7259 txh->TxFesTimeFallback = cpu_to_le16(0);
7261 /* TxFrameRA */
7262 memcpy(&txh->TxFrameRA, &h->addr1, ETH_ALEN);
7264 /* TxFrameID */
7265 txh->TxFrameID = cpu_to_le16(frameid);
7268 * TxStatus, Note the case of recreating the first frag of a suppressed
7269 * frame then we may need to reset the retry cnt's via the status reg
7271 txh->TxStatus = cpu_to_le16(status);
7274 * extra fields for ucode AMPDU aggregation, the new fields are added to
7275 * the END of previous structure so that it's compatible in driver.
7277 txh->MaxNMpdus = cpu_to_le16(0);
7278 txh->MaxABytes_MRT = cpu_to_le16(0);
7279 txh->MaxABytes_FBR = cpu_to_le16(0);
7280 txh->MinMBytes = cpu_to_le16(0);
7282 /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration,
7283 * furnish struct d11txh */
7284 /* RTS PLCP header and RTS frame */
7285 if (use_rts || use_cts) {
7286 if (use_rts && use_cts)
7287 use_cts = false;
7289 for (k = 0; k < 2; k++) {
7290 rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k],
7291 false,
7292 mimo_ctlchbw);
7295 if (!is_ofdm_rate(rts_rspec[0]) &&
7296 !((rspec2rate(rts_rspec[0]) == BRCM_RATE_1M) ||
7297 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7298 rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE;
7299 mch |= TXC_PREAMBLE_RTS_MAIN_SHORT;
7302 if (!is_ofdm_rate(rts_rspec[1]) &&
7303 !((rspec2rate(rts_rspec[1]) == BRCM_RATE_1M) ||
7304 (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) {
7305 rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE;
7306 mch |= TXC_PREAMBLE_RTS_FB_SHORT;
7309 /* RTS/CTS additions to MacTxControlLow */
7310 if (use_cts) {
7311 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDCTS);
7312 } else {
7313 txh->MacTxControlLow |= cpu_to_le16(TXC_SENDRTS);
7314 txh->MacTxControlLow |= cpu_to_le16(TXC_LONGFRAME);
7317 /* RTS PLCP header */
7318 rts_plcp = txh->RTSPhyHeader;
7319 if (use_cts)
7320 rts_phylen = DOT11_CTS_LEN + FCS_LEN;
7321 else
7322 rts_phylen = DOT11_RTS_LEN + FCS_LEN;
7324 brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp);
7326 /* fallback rate version of RTS PLCP header */
7327 brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen,
7328 rts_plcp_fallback);
7329 memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback,
7330 sizeof(txh->RTSPLCPFallback));
7332 /* RTS frame fields... */
7333 rts = (struct ieee80211_rts *)&txh->rts_frame;
7335 durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0],
7336 rspec[0], rts_preamble_type[0],
7337 preamble_type[0], phylen, false);
7338 rts->duration = cpu_to_le16(durid);
7339 /* fallback rate version of RTS DUR field */
7340 durid = brcms_c_compute_rtscts_dur(wlc, use_cts,
7341 rts_rspec[1], rspec[1],
7342 rts_preamble_type[1],
7343 preamble_type[1], phylen, false);
7344 txh->RTSDurFallback = cpu_to_le16(durid);
7346 if (use_cts) {
7347 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7348 IEEE80211_STYPE_CTS);
7350 memcpy(&rts->ra, &h->addr2, ETH_ALEN);
7351 } else {
7352 rts->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
7353 IEEE80211_STYPE_RTS);
7355 memcpy(&rts->ra, &h->addr1, 2 * ETH_ALEN);
7358 /* mainrate
7359 * low 8 bits: main frag rate/mcs,
7360 * high 8 bits: rts/cts rate/mcs
7362 mainrates |= (is_ofdm_rate(rts_rspec[0]) ?
7363 D11A_PHY_HDR_GRATE(
7364 (struct ofdm_phy_hdr *) rts_plcp) :
7365 rts_plcp[0]) << 8;
7366 } else {
7367 memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN);
7368 memset((char *)&txh->rts_frame, 0,
7369 sizeof(struct ieee80211_rts));
7370 memset((char *)txh->RTSPLCPFallback, 0,
7371 sizeof(txh->RTSPLCPFallback));
7372 txh->RTSDurFallback = 0;
7375 #ifdef SUPPORT_40MHZ
7376 /* add null delimiter count */
7377 if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && is_mcs_rate(rspec))
7378 txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] =
7379 brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen);
7381 #endif
7384 * Now that RTS/RTS FB preamble types are updated, write
7385 * the final value
7387 txh->MacTxControlHigh = cpu_to_le16(mch);
7390 * MainRates (both the rts and frag plcp rates have
7391 * been calculated now)
7393 txh->MainRates = cpu_to_le16(mainrates);
7395 /* XtraFrameTypes */
7396 xfts = frametype(rspec[1], wlc->mimoft);
7397 xfts |= (frametype(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT);
7398 xfts |= (frametype(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT);
7399 xfts |= CHSPEC_CHANNEL(wlc_phy_chanspec_get(wlc->band->pi)) <<
7400 XFTS_CHANNEL_SHIFT;
7401 txh->XtraFrameTypes = cpu_to_le16(xfts);
7403 /* PhyTxControlWord */
7404 phyctl = frametype(rspec[0], wlc->mimoft);
7405 if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) ||
7406 (preamble_type[0] == BRCMS_GF_PREAMBLE)) {
7407 if (rspec2rate(rspec[0]) != BRCM_RATE_1M)
7408 phyctl |= PHY_TXC_SHORT_HDR;
7411 /* phytxant is properly bit shifted */
7412 phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]);
7413 txh->PhyTxControlWord = cpu_to_le16(phyctl);
7415 /* PhyTxControlWord_1 */
7416 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7417 u16 phyctl1 = 0;
7419 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]);
7420 txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1);
7421 phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]);
7422 txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1);
7424 if (use_rts || use_cts) {
7425 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]);
7426 txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1);
7427 phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]);
7428 txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1);
7432 * For mcs frames, if mixedmode(overloaded with long preamble)
7433 * is going to be set, fill in non-zero MModeLen and/or
7434 * MModeFbrLen it will be unnecessary if they are separated
7436 if (is_mcs_rate(rspec[0]) &&
7437 (preamble_type[0] == BRCMS_MM_PREAMBLE)) {
7438 u16 mmodelen =
7439 brcms_c_calc_lsig_len(wlc, rspec[0], phylen);
7440 txh->MModeLen = cpu_to_le16(mmodelen);
7443 if (is_mcs_rate(rspec[1]) &&
7444 (preamble_type[1] == BRCMS_MM_PREAMBLE)) {
7445 u16 mmodefbrlen =
7446 brcms_c_calc_lsig_len(wlc, rspec[1], phylen);
7447 txh->MModeFbrLen = cpu_to_le16(mmodefbrlen);
7451 ac = skb_get_queue_mapping(p);
7452 if ((scb->flags & SCB_WMECAP) && qos && wlc->edcf_txop[ac]) {
7453 uint frag_dur, dur, dur_fallback;
7455 /* WME: Update TXOP threshold */
7456 if (!(tx_info->flags & IEEE80211_TX_CTL_AMPDU) && frag == 0) {
7457 frag_dur =
7458 brcms_c_calc_frame_time(wlc, rspec[0],
7459 preamble_type[0], phylen);
7461 if (rts) {
7462 /* 1 RTS or CTS-to-self frame */
7463 dur =
7464 brcms_c_calc_cts_time(wlc, rts_rspec[0],
7465 rts_preamble_type[0]);
7466 dur_fallback =
7467 brcms_c_calc_cts_time(wlc, rts_rspec[1],
7468 rts_preamble_type[1]);
7469 /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */
7470 dur += le16_to_cpu(rts->duration);
7471 dur_fallback +=
7472 le16_to_cpu(txh->RTSDurFallback);
7473 } else if (use_rifs) {
7474 dur = frag_dur;
7475 dur_fallback = 0;
7476 } else {
7477 /* frame + SIFS + ACK */
7478 dur = frag_dur;
7479 dur +=
7480 brcms_c_compute_frame_dur(wlc, rspec[0],
7481 preamble_type[0], 0);
7483 dur_fallback =
7484 brcms_c_calc_frame_time(wlc, rspec[1],
7485 preamble_type[1],
7486 phylen);
7487 dur_fallback +=
7488 brcms_c_compute_frame_dur(wlc, rspec[1],
7489 preamble_type[1], 0);
7491 /* NEED to set TxFesTimeNormal (hard) */
7492 txh->TxFesTimeNormal = cpu_to_le16((u16) dur);
7494 * NEED to set fallback rate version of
7495 * TxFesTimeNormal (hard)
7497 txh->TxFesTimeFallback =
7498 cpu_to_le16((u16) dur_fallback);
7501 * update txop byte threshold (txop minus intraframe
7502 * overhead)
7504 if (wlc->edcf_txop[ac] >= (dur - frag_dur)) {
7505 uint newfragthresh;
7507 newfragthresh =
7508 brcms_c_calc_frame_len(wlc,
7509 rspec[0], preamble_type[0],
7510 (wlc->edcf_txop[ac] -
7511 (dur - frag_dur)));
7512 /* range bound the fragthreshold */
7513 if (newfragthresh < DOT11_MIN_FRAG_LEN)
7514 newfragthresh =
7515 DOT11_MIN_FRAG_LEN;
7516 else if (newfragthresh >
7517 wlc->usr_fragthresh)
7518 newfragthresh =
7519 wlc->usr_fragthresh;
7520 /* update the fragthresh and do txc update */
7521 if (wlc->fragthresh[queue] !=
7522 (u16) newfragthresh)
7523 wlc->fragthresh[queue] =
7524 (u16) newfragthresh;
7525 } else {
7526 wiphy_err(wlc->wiphy, "wl%d: %s txop invalid "
7527 "for rate %d\n",
7528 wlc->pub->unit, fifo_names[queue],
7529 rspec2rate(rspec[0]));
7532 if (dur > wlc->edcf_txop[ac])
7533 wiphy_err(wlc->wiphy, "wl%d: %s: %s txop "
7534 "exceeded phylen %d/%d dur %d/%d\n",
7535 wlc->pub->unit, __func__,
7536 fifo_names[queue],
7537 phylen, wlc->fragthresh[queue],
7538 dur, wlc->edcf_txop[ac]);
7542 return 0;
7545 void brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu,
7546 struct ieee80211_hw *hw)
7548 u8 prio;
7549 uint fifo;
7550 struct scb *scb = &wlc->pri_scb;
7551 struct ieee80211_hdr *d11_header = (struct ieee80211_hdr *)(sdu->data);
7554 * 802.11 standard requires management traffic
7555 * to go at highest priority
7557 prio = ieee80211_is_data(d11_header->frame_control) ? sdu->priority :
7558 MAXPRIO;
7559 fifo = prio2fifo[prio];
7560 if (brcms_c_d11hdrs_mac80211(wlc, hw, sdu, scb, 0, 1, fifo, 0))
7561 return;
7562 brcms_c_txq_enq(wlc, scb, sdu, BRCMS_PRIO_TO_PREC(prio));
7563 brcms_c_send_q(wlc);
7566 void brcms_c_send_q(struct brcms_c_info *wlc)
7568 struct sk_buff *pkt[DOT11_MAXNUMFRAGS];
7569 int prec;
7570 u16 prec_map;
7571 int err = 0, i, count;
7572 uint fifo;
7573 struct brcms_txq_info *qi = wlc->pkt_queue;
7574 struct pktq *q = &qi->q;
7575 struct ieee80211_tx_info *tx_info;
7577 prec_map = wlc->tx_prec_map;
7579 /* Send all the enq'd pkts that we can.
7580 * Dequeue packets with precedence with empty HW fifo only
7582 while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) {
7583 tx_info = IEEE80211_SKB_CB(pkt[0]);
7584 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
7585 err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec);
7586 } else {
7587 count = 1;
7588 err = brcms_c_prep_pdu(wlc, pkt[0], &fifo);
7589 if (!err) {
7590 for (i = 0; i < count; i++)
7591 brcms_c_txfifo(wlc, fifo, pkt[i], true,
7596 if (err == -EBUSY) {
7597 brcmu_pktq_penq_head(q, prec, pkt[0]);
7599 * If send failed due to any other reason than a
7600 * change in HW FIFO condition, quit. Otherwise,
7601 * read the new prec_map!
7603 if (prec_map == wlc->tx_prec_map)
7604 break;
7605 prec_map = wlc->tx_prec_map;
7610 void
7611 brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p,
7612 bool commit, s8 txpktpend)
7614 u16 frameid = INVALIDFID;
7615 struct d11txh *txh;
7617 txh = (struct d11txh *) (p->data);
7619 /* When a BC/MC frame is being committed to the BCMC fifo
7620 * via DMA (NOT PIO), update ucode or BSS info as appropriate.
7622 if (fifo == TX_BCMC_FIFO)
7623 frameid = le16_to_cpu(txh->TxFrameID);
7626 * Bump up pending count for if not using rpc. If rpc is
7627 * used, this will be handled in brcms_b_txfifo()
7629 if (commit) {
7630 wlc->core->txpktpend[fifo] += txpktpend;
7631 BCMMSG(wlc->wiphy, "pktpend inc %d to %d\n",
7632 txpktpend, wlc->core->txpktpend[fifo]);
7635 /* Commit BCMC sequence number in the SHM frame ID location */
7636 if (frameid != INVALIDFID) {
7638 * To inform the ucode of the last mcast frame posted
7639 * so that it can clear moredata bit
7641 brcms_b_write_shm(wlc->hw, M_BCMC_FID, frameid);
7644 if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0)
7645 wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n");
7649 * Compute PLCP, but only requires actual rate and length of pkt.
7650 * Rate is given in the driver standard multiple of 500 kbps.
7651 * le is set for 11 Mbps rate if necessary.
7652 * Broken out for PRQ.
7655 static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500,
7656 uint length, u8 *plcp)
7658 u16 usec = 0;
7659 u8 le = 0;
7661 switch (rate_500) {
7662 case BRCM_RATE_1M:
7663 usec = length << 3;
7664 break;
7665 case BRCM_RATE_2M:
7666 usec = length << 2;
7667 break;
7668 case BRCM_RATE_5M5:
7669 usec = (length << 4) / 11;
7670 if ((length << 4) - (usec * 11) > 0)
7671 usec++;
7672 break;
7673 case BRCM_RATE_11M:
7674 usec = (length << 3) / 11;
7675 if ((length << 3) - (usec * 11) > 0) {
7676 usec++;
7677 if ((usec * 11) - (length << 3) >= 8)
7678 le = D11B_PLCP_SIGNAL_LE;
7680 break;
7682 default:
7683 wiphy_err(wlc->wiphy,
7684 "brcms_c_cck_plcp_set: unsupported rate %d\n",
7685 rate_500);
7686 rate_500 = BRCM_RATE_1M;
7687 usec = length << 3;
7688 break;
7690 /* PLCP signal byte */
7691 plcp[0] = rate_500 * 5; /* r (500kbps) * 5 == r (100kbps) */
7692 /* PLCP service byte */
7693 plcp[1] = (u8) (le | D11B_PLCP_SIGNAL_LOCKED);
7694 /* PLCP length u16, little endian */
7695 plcp[2] = usec & 0xff;
7696 plcp[3] = (usec >> 8) & 0xff;
7697 /* PLCP CRC16 */
7698 plcp[4] = 0;
7699 plcp[5] = 0;
7702 /* Rate: 802.11 rate code, length: PSDU length in octets */
7703 static void brcms_c_compute_mimo_plcp(u32 rspec, uint length, u8 *plcp)
7705 u8 mcs = (u8) (rspec & RSPEC_RATE_MASK);
7706 plcp[0] = mcs;
7707 if (rspec_is40mhz(rspec) || (mcs == 32))
7708 plcp[0] |= MIMO_PLCP_40MHZ;
7709 BRCMS_SET_MIMO_PLCP_LEN(plcp, length);
7710 plcp[3] = rspec_mimoplcp3(rspec); /* rspec already holds this byte */
7711 plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */
7712 plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */
7713 plcp[5] = 0;
7716 /* Rate: 802.11 rate code, length: PSDU length in octets */
7717 static void
7718 brcms_c_compute_ofdm_plcp(u32 rspec, u32 length, u8 *plcp)
7720 u8 rate_signal;
7721 u32 tmp = 0;
7722 int rate = rspec2rate(rspec);
7725 * encode rate per 802.11a-1999 sec 17.3.4.1, with lsb
7726 * transmitted first
7728 rate_signal = rate_info[rate] & BRCMS_RATE_MASK;
7729 memset(plcp, 0, D11_PHY_HDR_LEN);
7730 D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal);
7732 tmp = (length & 0xfff) << 5;
7733 plcp[2] |= (tmp >> 16) & 0xff;
7734 plcp[1] |= (tmp >> 8) & 0xff;
7735 plcp[0] |= tmp & 0xff;
7738 /* Rate: 802.11 rate code, length: PSDU length in octets */
7739 static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, u32 rspec,
7740 uint length, u8 *plcp)
7742 int rate = rspec2rate(rspec);
7744 brcms_c_cck_plcp_set(wlc, rate, length, plcp);
7747 void
7748 brcms_c_compute_plcp(struct brcms_c_info *wlc, u32 rspec,
7749 uint length, u8 *plcp)
7751 if (is_mcs_rate(rspec))
7752 brcms_c_compute_mimo_plcp(rspec, length, plcp);
7753 else if (is_ofdm_rate(rspec))
7754 brcms_c_compute_ofdm_plcp(rspec, length, plcp);
7755 else
7756 brcms_c_compute_cck_plcp(wlc, rspec, length, plcp);
7759 /* brcms_c_compute_rtscts_dur()
7761 * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame
7762 * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK
7763 * DUR for CTS-TO-SELF w/ frame = 2 SIFS + next frame time + 1 ACK
7765 * cts cts-to-self or rts/cts
7766 * rts_rate rts or cts rate in unit of 500kbps
7767 * rate next MPDU rate in unit of 500kbps
7768 * frame_len next MPDU frame length in bytes
7771 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only,
7772 u32 rts_rate,
7773 u32 frame_rate, u8 rts_preamble_type,
7774 u8 frame_preamble_type, uint frame_len, bool ba)
7776 u16 dur, sifs;
7778 sifs = get_sifs(wlc->band);
7780 if (!cts_only) {
7781 /* RTS/CTS */
7782 dur = 3 * sifs;
7783 dur +=
7784 (u16) brcms_c_calc_cts_time(wlc, rts_rate,
7785 rts_preamble_type);
7786 } else {
7787 /* CTS-TO-SELF */
7788 dur = 2 * sifs;
7791 dur +=
7792 (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type,
7793 frame_len);
7794 if (ba)
7795 dur +=
7796 (u16) brcms_c_calc_ba_time(wlc, frame_rate,
7797 BRCMS_SHORT_PREAMBLE);
7798 else
7799 dur +=
7800 (u16) brcms_c_calc_ack_time(wlc, frame_rate,
7801 frame_preamble_type);
7802 return dur;
7805 u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, u32 rspec)
7807 u16 phyctl1 = 0;
7808 u16 bw;
7810 if (BRCMS_ISLCNPHY(wlc->band)) {
7811 bw = PHY_TXC1_BW_20MHZ;
7812 } else {
7813 bw = rspec_get_bw(rspec);
7814 /* 10Mhz is not supported yet */
7815 if (bw < PHY_TXC1_BW_20MHZ) {
7816 wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is "
7817 "not supported yet, set to 20L\n", bw);
7818 bw = PHY_TXC1_BW_20MHZ;
7822 if (is_mcs_rate(rspec)) {
7823 uint mcs = rspec & RSPEC_RATE_MASK;
7825 /* bw, stf, coding-type is part of rspec_phytxbyte2 returns */
7826 phyctl1 = rspec_phytxbyte2(rspec);
7827 /* set the upper byte of phyctl1 */
7828 phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8);
7829 } else if (is_cck_rate(rspec) && !BRCMS_ISLCNPHY(wlc->band)
7830 && !BRCMS_ISSSLPNPHY(wlc->band)) {
7832 * In CCK mode LPPHY overloads OFDM Modulation bits with CCK
7833 * Data Rate. Eventually MIMOPHY would also be converted to
7834 * this format
7836 /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */
7837 phyctl1 = (bw | (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7838 } else { /* legacy OFDM/CCK */
7839 s16 phycfg;
7840 /* get the phyctl byte from rate phycfg table */
7841 phycfg = brcms_c_rate_legacy_phyctl(rspec2rate(rspec));
7842 if (phycfg == -1) {
7843 wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong "
7844 "legacy OFDM/CCK rate\n");
7845 phycfg = 0;
7847 /* set the upper byte of phyctl1 */
7848 phyctl1 =
7849 (bw | (phycfg << 8) |
7850 (rspec_stf(rspec) << PHY_TXC1_MODE_SHIFT));
7852 return phyctl1;
7856 brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, u32 rspec,
7857 bool use_rspec, u16 mimo_ctlchbw)
7859 u32 rts_rspec = 0;
7861 if (use_rspec)
7862 /* use frame rate as rts rate */
7863 rts_rspec = rspec;
7864 else if (wlc->band->gmode && wlc->protection->_g && !is_cck_rate(rspec))
7865 /* Use 11Mbps as the g protection RTS target rate and fallback.
7866 * Use the brcms_basic_rate() lookup to find the best basic rate
7867 * under the target in case 11 Mbps is not Basic.
7868 * 6 and 9 Mbps are not usually selected by rate selection, but
7869 * even if the OFDM rate we are protecting is 6 or 9 Mbps, 11
7870 * is more robust.
7872 rts_rspec = brcms_basic_rate(wlc, BRCM_RATE_11M);
7873 else
7874 /* calculate RTS rate and fallback rate based on the frame rate
7875 * RTS must be sent at a basic rate since it is a
7876 * control frame, sec 9.6 of 802.11 spec
7878 rts_rspec = brcms_basic_rate(wlc, rspec);
7880 if (BRCMS_PHY_11N_CAP(wlc->band)) {
7881 /* set rts txbw to correct side band */
7882 rts_rspec &= ~RSPEC_BW_MASK;
7885 * if rspec/rspec_fallback is 40MHz, then send RTS on both
7886 * 20MHz channel (DUP), otherwise send RTS on control channel
7888 if (rspec_is40mhz(rspec) && !is_cck_rate(rts_rspec))
7889 rts_rspec |= (PHY_TXC1_BW_40MHZ_DUP << RSPEC_BW_SHIFT);
7890 else
7891 rts_rspec |= (mimo_ctlchbw << RSPEC_BW_SHIFT);
7893 /* pick siso/cdd as default for ofdm */
7894 if (is_ofdm_rate(rts_rspec)) {
7895 rts_rspec &= ~RSPEC_STF_MASK;
7896 rts_rspec |= (wlc->stf->ss_opmode << RSPEC_STF_SHIFT);
7899 return rts_rspec;
7902 void brcms_c_tbtt(struct brcms_c_info *wlc)
7904 if (!wlc->bsscfg->BSS)
7906 * DirFrmQ is now valid...defer setting until end
7907 * of ATIM window
7909 wlc->qvalid |= MCMD_DIRFRMQVAL;
7912 void
7913 brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend)
7915 wlc->core->txpktpend[fifo] -= txpktpend;
7916 BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend,
7917 wlc->core->txpktpend[fifo]);
7919 /* There is more room; mark precedences related to this FIFO sendable */
7920 wlc->tx_prec_map |= wlc->fifo2prec_map[fifo];
7922 /* figure out which bsscfg is being worked on... */
7925 /* Update beacon listen interval in shared memory */
7926 void brcms_c_bcn_li_upd(struct brcms_c_info *wlc)
7928 /* wake up every DTIM is the default */
7929 if (wlc->bcn_li_dtim == 1)
7930 brcms_b_write_shm(wlc->hw, M_BCN_LI, 0);
7931 else
7932 brcms_b_write_shm(wlc->hw, M_BCN_LI,
7933 (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn);
7936 static void
7937 brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr,
7938 u32 *tsf_h_ptr)
7940 struct d11regs __iomem *regs = wlc_hw->regs;
7942 /* read the tsf timer low, then high to get an atomic read */
7943 *tsf_l_ptr = R_REG(&regs->tsf_timerlow);
7944 *tsf_h_ptr = R_REG(&regs->tsf_timerhigh);
7948 * recover 64bit TSF value from the 16bit TSF value in the rx header
7949 * given the assumption that the TSF passed in header is within 65ms
7950 * of the current tsf.
7952 * 6 5 4 4 3 2 1
7953 * 3.......6.......8.......0.......2.......4.......6.......8......0
7954 * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->|
7956 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7957 * tsf_l is filled in by brcms_b_recv, which is done earlier in the
7958 * receive call sequence after rx interrupt. Only the higher 16 bits
7959 * are used. Finally, the tsf_h is read from the tsf register.
7961 static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc,
7962 struct d11rxhdr *rxh)
7964 u32 tsf_h, tsf_l;
7965 u16 rx_tsf_0_15, rx_tsf_16_31;
7967 brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h);
7969 rx_tsf_16_31 = (u16)(tsf_l >> 16);
7970 rx_tsf_0_15 = rxh->RxTSFTime;
7973 * a greater tsf time indicates the low 16 bits of
7974 * tsf_l wrapped, so decrement the high 16 bits.
7976 if ((u16)tsf_l < rx_tsf_0_15) {
7977 rx_tsf_16_31 -= 1;
7978 if (rx_tsf_16_31 == 0xffff)
7979 tsf_h -= 1;
7982 return ((u64)tsf_h << 32) | (((u32)rx_tsf_16_31 << 16) + rx_tsf_0_15);
7985 static void
7986 prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
7987 struct sk_buff *p,
7988 struct ieee80211_rx_status *rx_status)
7990 int preamble;
7991 int channel;
7992 u32 rspec;
7993 unsigned char *plcp;
7995 /* fill in TSF and flag its presence */
7996 rx_status->mactime = brcms_c_recover_tsf64(wlc, rxh);
7997 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
7999 channel = BRCMS_CHAN_CHANNEL(rxh->RxChan);
8001 if (channel > 14) {
8002 rx_status->band = IEEE80211_BAND_5GHZ;
8003 rx_status->freq = ieee80211_ofdm_chan_to_freq(
8004 WF_CHAN_FACTOR_5_G/2, channel);
8006 } else {
8007 rx_status->band = IEEE80211_BAND_2GHZ;
8008 rx_status->freq = ieee80211_dsss_chan_to_freq(channel);
8011 rx_status->signal = wlc_phy_rssi_compute(wlc->hw->band->pi, rxh);
8013 /* noise */
8014 /* qual */
8015 rx_status->antenna =
8016 (rxh->PhyRxStatus_0 & PRXS0_RXANT_UPSUBBAND) ? 1 : 0;
8018 plcp = p->data;
8020 rspec = brcms_c_compute_rspec(rxh, plcp);
8021 if (is_mcs_rate(rspec)) {
8022 rx_status->rate_idx = rspec & RSPEC_RATE_MASK;
8023 rx_status->flag |= RX_FLAG_HT;
8024 if (rspec_is40mhz(rspec))
8025 rx_status->flag |= RX_FLAG_40MHZ;
8026 } else {
8027 switch (rspec2rate(rspec)) {
8028 case BRCM_RATE_1M:
8029 rx_status->rate_idx = 0;
8030 break;
8031 case BRCM_RATE_2M:
8032 rx_status->rate_idx = 1;
8033 break;
8034 case BRCM_RATE_5M5:
8035 rx_status->rate_idx = 2;
8036 break;
8037 case BRCM_RATE_11M:
8038 rx_status->rate_idx = 3;
8039 break;
8040 case BRCM_RATE_6M:
8041 rx_status->rate_idx = 4;
8042 break;
8043 case BRCM_RATE_9M:
8044 rx_status->rate_idx = 5;
8045 break;
8046 case BRCM_RATE_12M:
8047 rx_status->rate_idx = 6;
8048 break;
8049 case BRCM_RATE_18M:
8050 rx_status->rate_idx = 7;
8051 break;
8052 case BRCM_RATE_24M:
8053 rx_status->rate_idx = 8;
8054 break;
8055 case BRCM_RATE_36M:
8056 rx_status->rate_idx = 9;
8057 break;
8058 case BRCM_RATE_48M:
8059 rx_status->rate_idx = 10;
8060 break;
8061 case BRCM_RATE_54M:
8062 rx_status->rate_idx = 11;
8063 break;
8064 default:
8065 wiphy_err(wlc->wiphy, "%s: Unknown rate\n", __func__);
8069 * For 5GHz, we should decrease the index as it is
8070 * a subset of the 2.4G rates. See bitrates field
8071 * of brcms_band_5GHz_nphy (in mac80211_if.c).
8073 if (rx_status->band == IEEE80211_BAND_5GHZ)
8074 rx_status->rate_idx -= BRCMS_LEGACY_5G_RATE_OFFSET;
8076 /* Determine short preamble and rate_idx */
8077 preamble = 0;
8078 if (is_cck_rate(rspec)) {
8079 if (rxh->PhyRxStatus_0 & PRXS0_SHORTH)
8080 rx_status->flag |= RX_FLAG_SHORTPRE;
8081 } else if (is_ofdm_rate(rspec)) {
8082 rx_status->flag |= RX_FLAG_SHORTPRE;
8083 } else {
8084 wiphy_err(wlc->wiphy, "%s: Unknown modulation\n",
8085 __func__);
8089 if (plcp3_issgi(plcp[3]))
8090 rx_status->flag |= RX_FLAG_SHORT_GI;
8092 if (rxh->RxStatus1 & RXS_DECERR) {
8093 rx_status->flag |= RX_FLAG_FAILED_PLCP_CRC;
8094 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_PLCP_CRC\n",
8095 __func__);
8097 if (rxh->RxStatus1 & RXS_FCSERR) {
8098 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
8099 wiphy_err(wlc->wiphy, "%s: RX_FLAG_FAILED_FCS_CRC\n",
8100 __func__);
8104 static void
8105 brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh,
8106 struct sk_buff *p)
8108 int len_mpdu;
8109 struct ieee80211_rx_status rx_status;
8111 memset(&rx_status, 0, sizeof(rx_status));
8112 prep_mac80211_status(wlc, rxh, p, &rx_status);
8114 /* mac header+body length, exclude CRC and plcp header */
8115 len_mpdu = p->len - D11_PHY_HDR_LEN - FCS_LEN;
8116 skb_pull(p, D11_PHY_HDR_LEN);
8117 __skb_trim(p, len_mpdu);
8119 memcpy(IEEE80211_SKB_RXCB(p), &rx_status, sizeof(rx_status));
8120 ieee80211_rx_irqsafe(wlc->pub->ieee_hw, p);
8123 /* Process received frames */
8125 * Return true if more frames need to be processed. false otherwise.
8126 * Param 'bound' indicates max. # frames to process before break out.
8128 void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p)
8130 struct d11rxhdr *rxh;
8131 struct ieee80211_hdr *h;
8132 uint len;
8133 bool is_amsdu;
8135 BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit);
8137 /* frame starts with rxhdr */
8138 rxh = (struct d11rxhdr *) (p->data);
8140 /* strip off rxhdr */
8141 skb_pull(p, BRCMS_HWRXOFF);
8143 /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */
8144 if (rxh->RxStatus1 & RXS_PBPRES) {
8145 if (p->len < 2) {
8146 wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of "
8147 "len %d\n", wlc->pub->unit, p->len);
8148 goto toss;
8150 skb_pull(p, 2);
8153 h = (struct ieee80211_hdr *)(p->data + D11_PHY_HDR_LEN);
8154 len = p->len;
8156 if (rxh->RxStatus1 & RXS_FCSERR) {
8157 if (wlc->pub->mac80211_state & MAC80211_PROMISC_BCNS) {
8158 wiphy_err(wlc->wiphy, "FCSERR while scanning******* -"
8159 " tossing\n");
8160 goto toss;
8161 } else {
8162 wiphy_err(wlc->wiphy, "RCSERR!!!\n");
8163 goto toss;
8167 /* check received pkt has at least frame control field */
8168 if (len < D11_PHY_HDR_LEN + sizeof(h->frame_control))
8169 goto toss;
8171 /* not supporting A-MSDU */
8172 is_amsdu = rxh->RxStatus2 & RXS_AMSDU_MASK;
8173 if (is_amsdu)
8174 goto toss;
8176 brcms_c_recvctl(wlc, rxh, p);
8177 return;
8179 toss:
8180 brcmu_pkt_buf_free_skb(p);
8183 /* calculate frame duration for Mixed-mode L-SIG spoofing, return
8184 * number of bytes goes in the length field
8186 * Formula given by HT PHY Spec v 1.13
8187 * len = 3(nsyms + nstream + 3) - 3
8190 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, u32 ratespec,
8191 uint mac_len)
8193 uint nsyms, len = 0, kNdps;
8195 BCMMSG(wlc->wiphy, "wl%d: rate %d, len%d\n",
8196 wlc->pub->unit, rspec2rate(ratespec), mac_len);
8198 if (is_mcs_rate(ratespec)) {
8199 uint mcs = ratespec & RSPEC_RATE_MASK;
8200 int tot_streams = (mcs_2_txstreams(mcs) + 1) +
8201 rspec_stc(ratespec);
8204 * the payload duration calculation matches that
8205 * of regular ofdm
8207 /* 1000Ndbps = kbps * 4 */
8208 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8209 rspec_issgi(ratespec)) * 4;
8211 if (rspec_stc(ratespec) == 0)
8212 nsyms =
8213 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8214 APHY_TAIL_NBITS) * 1000, kNdps);
8215 else
8216 /* STBC needs to have even number of symbols */
8217 nsyms =
8219 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8220 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8222 /* (+3) account for HT-SIG(2) and HT-STF(1) */
8223 nsyms += (tot_streams + 3);
8225 * 3 bytes/symbol @ legacy 6Mbps rate
8226 * (-3) excluding service bits and tail bits
8228 len = (3 * nsyms) - 3;
8231 return (u16) len;
8235 * calculate frame duration of a given rate and length, return
8236 * time in usec unit
8238 uint
8239 brcms_c_calc_frame_time(struct brcms_c_info *wlc, u32 ratespec,
8240 u8 preamble_type, uint mac_len)
8242 uint nsyms, dur = 0, Ndps, kNdps;
8243 uint rate = rspec2rate(ratespec);
8245 if (rate == 0) {
8246 wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n",
8247 wlc->pub->unit);
8248 rate = BRCM_RATE_1M;
8251 BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n",
8252 wlc->pub->unit, ratespec, preamble_type, mac_len);
8254 if (is_mcs_rate(ratespec)) {
8255 uint mcs = ratespec & RSPEC_RATE_MASK;
8256 int tot_streams = mcs_2_txstreams(mcs) + rspec_stc(ratespec);
8258 dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT);
8259 if (preamble_type == BRCMS_MM_PREAMBLE)
8260 dur += PREN_MM_EXT;
8261 /* 1000Ndbps = kbps * 4 */
8262 kNdps = mcs_2_rate(mcs, rspec_is40mhz(ratespec),
8263 rspec_issgi(ratespec)) * 4;
8265 if (rspec_stc(ratespec) == 0)
8266 nsyms =
8267 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8268 APHY_TAIL_NBITS) * 1000, kNdps);
8269 else
8270 /* STBC needs to have even number of symbols */
8271 nsyms =
8273 CEIL((APHY_SERVICE_NBITS + 8 * mac_len +
8274 APHY_TAIL_NBITS) * 1000, 2 * kNdps);
8276 dur += APHY_SYMBOL_TIME * nsyms;
8277 if (wlc->band->bandtype == BRCM_BAND_2G)
8278 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8279 } else if (is_ofdm_rate(rate)) {
8280 dur = APHY_PREAMBLE_TIME;
8281 dur += APHY_SIGNAL_TIME;
8282 /* Ndbps = Mbps * 4 = rate(500Kbps) * 2 */
8283 Ndps = rate * 2;
8284 /* NSyms = CEILING((SERVICE + 8*NBytes + TAIL) / Ndbps) */
8285 nsyms =
8286 CEIL((APHY_SERVICE_NBITS + 8 * mac_len + APHY_TAIL_NBITS),
8287 Ndps);
8288 dur += APHY_SYMBOL_TIME * nsyms;
8289 if (wlc->band->bandtype == BRCM_BAND_2G)
8290 dur += DOT11_OFDM_SIGNAL_EXTENSION;
8291 } else {
8293 * calc # bits * 2 so factor of 2 in rate (1/2 mbps)
8294 * will divide out
8296 mac_len = mac_len * 8 * 2;
8297 /* calc ceiling of bits/rate = microseconds of air time */
8298 dur = (mac_len + rate - 1) / rate;
8299 if (preamble_type & BRCMS_SHORT_PREAMBLE)
8300 dur += BPHY_PLCP_SHORT_TIME;
8301 else
8302 dur += BPHY_PLCP_TIME;
8304 return dur;
8307 /* derive wlc->band->basic_rate[] table from 'rateset' */
8308 void brcms_c_rate_lookup_init(struct brcms_c_info *wlc,
8309 struct brcms_c_rateset *rateset)
8311 u8 rate;
8312 u8 mandatory;
8313 u8 cck_basic = 0;
8314 u8 ofdm_basic = 0;
8315 u8 *br = wlc->band->basic_rate;
8316 uint i;
8318 /* incoming rates are in 500kbps units as in 802.11 Supported Rates */
8319 memset(br, 0, BRCM_MAXRATE + 1);
8321 /* For each basic rate in the rates list, make an entry in the
8322 * best basic lookup.
8324 for (i = 0; i < rateset->count; i++) {
8325 /* only make an entry for a basic rate */
8326 if (!(rateset->rates[i] & BRCMS_RATE_FLAG))
8327 continue;
8329 /* mask off basic bit */
8330 rate = (rateset->rates[i] & BRCMS_RATE_MASK);
8332 if (rate > BRCM_MAXRATE) {
8333 wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: "
8334 "invalid rate 0x%X in rate set\n",
8335 rateset->rates[i]);
8336 continue;
8339 br[rate] = rate;
8342 /* The rate lookup table now has non-zero entries for each
8343 * basic rate, equal to the basic rate: br[basicN] = basicN
8345 * To look up the best basic rate corresponding to any
8346 * particular rate, code can use the basic_rate table
8347 * like this
8349 * basic_rate = wlc->band->basic_rate[tx_rate]
8351 * Make sure there is a best basic rate entry for
8352 * every rate by walking up the table from low rates
8353 * to high, filling in holes in the lookup table
8356 for (i = 0; i < wlc->band->hw_rateset.count; i++) {
8357 rate = wlc->band->hw_rateset.rates[i];
8359 if (br[rate] != 0) {
8360 /* This rate is a basic rate.
8361 * Keep track of the best basic rate so far by
8362 * modulation type.
8364 if (is_ofdm_rate(rate))
8365 ofdm_basic = rate;
8366 else
8367 cck_basic = rate;
8369 continue;
8372 /* This rate is not a basic rate so figure out the
8373 * best basic rate less than this rate and fill in
8374 * the hole in the table
8377 br[rate] = is_ofdm_rate(rate) ? ofdm_basic : cck_basic;
8379 if (br[rate] != 0)
8380 continue;
8382 if (is_ofdm_rate(rate)) {
8384 * In 11g and 11a, the OFDM mandatory rates
8385 * are 6, 12, and 24 Mbps
8387 if (rate >= BRCM_RATE_24M)
8388 mandatory = BRCM_RATE_24M;
8389 else if (rate >= BRCM_RATE_12M)
8390 mandatory = BRCM_RATE_12M;
8391 else
8392 mandatory = BRCM_RATE_6M;
8393 } else {
8394 /* In 11b, all CCK rates are mandatory 1 - 11 Mbps */
8395 mandatory = rate;
8398 br[rate] = mandatory;
8402 static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate,
8403 u8 basic_rate)
8405 u8 phy_rate, index;
8406 u8 basic_phy_rate, basic_index;
8407 u16 dir_table, basic_table;
8408 u16 basic_ptr;
8410 /* Shared memory address for the table we are reading */
8411 dir_table = is_ofdm_rate(basic_rate) ? M_RT_DIRMAP_A : M_RT_DIRMAP_B;
8413 /* Shared memory address for the table we are writing */
8414 basic_table = is_ofdm_rate(rate) ? M_RT_BBRSMAP_A : M_RT_BBRSMAP_B;
8417 * for a given rate, the LS-nibble of the PLCP SIGNAL field is
8418 * the index into the rate table.
8420 phy_rate = rate_info[rate] & BRCMS_RATE_MASK;
8421 basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK;
8422 index = phy_rate & 0xf;
8423 basic_index = basic_phy_rate & 0xf;
8425 /* Find the SHM pointer to the ACK rate entry by looking in the
8426 * Direct-map Table
8428 basic_ptr = brcms_b_read_shm(wlc->hw, (dir_table + basic_index * 2));
8430 /* Update the SHM BSS-basic-rate-set mapping table with the pointer
8431 * to the correct basic rate for the given incoming rate
8433 brcms_b_write_shm(wlc->hw, (basic_table + index * 2), basic_ptr);
8436 static const struct brcms_c_rateset *
8437 brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc)
8439 const struct brcms_c_rateset *rs_dflt;
8441 if (BRCMS_PHY_11N_CAP(wlc->band)) {
8442 if (wlc->band->bandtype == BRCM_BAND_5G)
8443 rs_dflt = &ofdm_mimo_rates;
8444 else
8445 rs_dflt = &cck_ofdm_mimo_rates;
8446 } else if (wlc->band->gmode)
8447 rs_dflt = &cck_ofdm_rates;
8448 else
8449 rs_dflt = &cck_rates;
8451 return rs_dflt;
8454 void brcms_c_set_ratetable(struct brcms_c_info *wlc)
8456 const struct brcms_c_rateset *rs_dflt;
8457 struct brcms_c_rateset rs;
8458 u8 rate, basic_rate;
8459 uint i;
8461 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8463 brcms_c_rateset_copy(rs_dflt, &rs);
8464 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8466 /* walk the phy rate table and update SHM basic rate lookup table */
8467 for (i = 0; i < rs.count; i++) {
8468 rate = rs.rates[i] & BRCMS_RATE_MASK;
8470 /* for a given rate brcms_basic_rate returns the rate at
8471 * which a response ACK/CTS should be sent.
8473 basic_rate = brcms_basic_rate(wlc, rate);
8474 if (basic_rate == 0)
8475 /* This should only happen if we are using a
8476 * restricted rateset.
8478 basic_rate = rs.rates[0] & BRCMS_RATE_MASK;
8480 brcms_c_write_rate_shm(wlc, rate, basic_rate);
8485 * Return true if the specified rate is supported by the specified band.
8486 * BRCM_BAND_AUTO indicates the current band.
8488 bool brcms_c_valid_rate(struct brcms_c_info *wlc, u32 rspec, int band,
8489 bool verbose)
8491 struct brcms_c_rateset *hw_rateset;
8492 uint i;
8494 if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype))
8495 hw_rateset = &wlc->band->hw_rateset;
8496 else if (wlc->pub->_nbands > 1)
8497 hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset;
8498 else
8499 /* other band specified and we are a single band device */
8500 return false;
8502 /* check if this is a mimo rate */
8503 if (is_mcs_rate(rspec)) {
8504 if ((rspec & RSPEC_RATE_MASK) >= MCS_TABLE_SIZE)
8505 goto error;
8507 return isset(hw_rateset->mcs, (rspec & RSPEC_RATE_MASK));
8510 for (i = 0; i < hw_rateset->count; i++)
8511 if (hw_rateset->rates[i] == rspec2rate(rspec))
8512 return true;
8513 error:
8514 if (verbose)
8515 wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x "
8516 "not in hw_rateset\n", wlc->pub->unit, rspec);
8518 return false;
8521 void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len)
8523 const struct brcms_c_rateset *rs_dflt;
8524 struct brcms_c_rateset rs;
8525 u8 rate;
8526 u16 entry_ptr;
8527 u8 plcp[D11_PHY_HDR_LEN];
8528 u16 dur, sifs;
8529 uint i;
8531 sifs = get_sifs(wlc->band);
8533 rs_dflt = brcms_c_rateset_get_hwrs(wlc);
8535 brcms_c_rateset_copy(rs_dflt, &rs);
8536 brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams);
8539 * walk the phy rate table and update MAC core SHM
8540 * basic rate table entries
8542 for (i = 0; i < rs.count; i++) {
8543 rate = rs.rates[i] & BRCMS_RATE_MASK;
8545 entry_ptr = brcms_b_rate_shm_offset(wlc->hw, rate);
8547 /* Calculate the Probe Response PLCP for the given rate */
8548 brcms_c_compute_plcp(wlc, rate, frame_len, plcp);
8551 * Calculate the duration of the Probe Response
8552 * frame plus SIFS for the MAC
8554 dur = (u16) brcms_c_calc_frame_time(wlc, rate,
8555 BRCMS_LONG_PREAMBLE, frame_len);
8556 dur += sifs;
8558 /* Update the SHM Rate Table entry Probe Response values */
8559 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS,
8560 (u16) (plcp[0] + (plcp[1] << 8)));
8561 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_PLCP_POS + 2,
8562 (u16) (plcp[2] + (plcp[3] << 8)));
8563 brcms_b_write_shm(wlc->hw, entry_ptr + M_RT_PRS_DUR_POS, dur);
8567 /* Max buffering needed for beacon template/prb resp template is 142 bytes.
8569 * PLCP header is 6 bytes.
8570 * 802.11 A3 header is 24 bytes.
8571 * Max beacon frame body template length is 112 bytes.
8572 * Max probe resp frame body template length is 110 bytes.
8574 * *len on input contains the max length of the packet available.
8576 * The *len value is set to the number of bytes in buf used, and starts
8577 * with the PLCP and included up to, but not including, the 4 byte FCS.
8579 static void
8580 brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type,
8581 u32 bcn_rspec,
8582 struct brcms_bss_cfg *cfg, u16 *buf, int *len)
8584 static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255};
8585 struct cck_phy_hdr *plcp;
8586 struct ieee80211_mgmt *h;
8587 int hdr_len, body_len;
8589 hdr_len = D11_PHY_HDR_LEN + DOT11_MAC_HDR_LEN;
8591 /* calc buffer size provided for frame body */
8592 body_len = *len - hdr_len;
8593 /* return actual size */
8594 *len = hdr_len + body_len;
8596 /* format PHY and MAC headers */
8597 memset((char *)buf, 0, hdr_len);
8599 plcp = (struct cck_phy_hdr *) buf;
8602 * PLCP for Probe Response frames are filled in from
8603 * core's rate table
8605 if (type == IEEE80211_STYPE_BEACON)
8606 /* fill in PLCP */
8607 brcms_c_compute_plcp(wlc, bcn_rspec,
8608 (DOT11_MAC_HDR_LEN + body_len + FCS_LEN),
8609 (u8 *) plcp);
8611 /* "Regular" and 16 MBSS but not for 4 MBSS */
8612 /* Update the phytxctl for the beacon based on the rspec */
8613 brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec);
8615 h = (struct ieee80211_mgmt *)&plcp[1];
8617 /* fill in 802.11 header */
8618 h->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | type);
8620 /* DUR is 0 for multicast bcn, or filled in by MAC for prb resp */
8621 /* A1 filled in by MAC for prb resp, broadcast for bcn */
8622 if (type == IEEE80211_STYPE_BEACON)
8623 memcpy(&h->da, &ether_bcast, ETH_ALEN);
8624 memcpy(&h->sa, &cfg->cur_etheraddr, ETH_ALEN);
8625 memcpy(&h->bssid, &cfg->BSSID, ETH_ALEN);
8627 /* SEQ filled in by MAC */
8630 int brcms_c_get_header_len(void)
8632 return TXOFF;
8636 * Update all beacons for the system.
8638 void brcms_c_update_beacon(struct brcms_c_info *wlc)
8640 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8642 if (bsscfg->up && !bsscfg->BSS)
8643 /* Clear the soft intmask */
8644 wlc->defmacintmask &= ~MI_BCNTPL;
8647 /* Write ssid into shared memory */
8648 void brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg)
8650 u8 *ssidptr = cfg->SSID;
8651 u16 base = M_SSID;
8652 u8 ssidbuf[IEEE80211_MAX_SSID_LEN];
8654 /* padding the ssid with zero and copy it into shm */
8655 memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN);
8656 memcpy(ssidbuf, ssidptr, cfg->SSID_len);
8658 brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN);
8659 brcms_b_write_shm(wlc->hw, M_SSIDLEN, (u16) cfg->SSID_len);
8662 void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend)
8664 struct brcms_bss_cfg *bsscfg = wlc->bsscfg;
8666 /* update AP or IBSS probe responses */
8667 if (bsscfg->up && !bsscfg->BSS)
8668 brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend);
8671 void
8672 brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc,
8673 struct brcms_bss_cfg *cfg,
8674 bool suspend)
8676 u16 prb_resp[BCN_TMPL_LEN / 2];
8677 int len = BCN_TMPL_LEN;
8680 * write the probe response to hardware, or save in
8681 * the config structure
8684 /* create the probe response template */
8685 brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0,
8686 cfg, prb_resp, &len);
8688 if (suspend)
8689 brcms_c_suspend_mac_and_wait(wlc);
8691 /* write the probe response into the template region */
8692 brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE,
8693 (len + 3) & ~3, prb_resp);
8695 /* write the length of the probe response frame (+PLCP/-FCS) */
8696 brcms_b_write_shm(wlc->hw, M_PRB_RESP_FRM_LEN, (u16) len);
8698 /* write the SSID and SSID length */
8699 brcms_c_shm_ssid_upd(wlc, cfg);
8702 * Write PLCP headers and durations for probe response frames
8703 * at all rates. Use the actual frame length covered by the
8704 * PLCP header for the call to brcms_c_mod_prb_rsp_rate_table()
8705 * by subtracting the PLCP len and adding the FCS.
8707 len += (-D11_PHY_HDR_LEN + FCS_LEN);
8708 brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len);
8710 if (suspend)
8711 brcms_c_enable_mac(wlc);
8714 /* prepares pdu for transmission. returns BCM error codes */
8715 int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop)
8717 uint fifo;
8718 struct d11txh *txh;
8719 struct ieee80211_hdr *h;
8720 struct scb *scb;
8722 txh = (struct d11txh *) (pdu->data);
8723 h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN);
8725 /* get the pkt queue info. This was put at brcms_c_sendctl or
8726 * brcms_c_send for PDU */
8727 fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK;
8729 scb = NULL;
8731 *fifop = fifo;
8733 /* return if insufficient dma resources */
8734 if (*wlc->core->txavail[fifo] < MAX_DMA_SEGS) {
8735 /* Mark precedences related to this FIFO, unsendable */
8736 /* A fifo is full. Clear precedences related to that FIFO */
8737 wlc->tx_prec_map &= ~(wlc->fifo2prec_map[fifo]);
8738 return -EBUSY;
8740 return 0;
8743 void brcms_default_rateset(struct brcms_c_info *wlc, struct brcms_c_rateset *rs)
8745 brcms_c_rateset_default(rs, NULL, wlc->band->phytype,
8746 wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL,
8747 (bool) (wlc->pub->_n_enab & SUPPORT_11N),
8748 brcms_chspec_bw(wlc->default_bss->chanspec),
8749 wlc->stf->txstreams);
8752 /* Copy a buffer to shared memory.
8753 * SHM 'offset' needs to be an even address and
8754 * Buffer length 'len' must be an even number of bytes
8756 void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, const void *buf,
8757 int len)
8759 brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL);
8762 int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo,
8763 uint *blocks)
8765 if (fifo >= NFIFO)
8766 return -EINVAL;
8768 *blocks = wlc_hw->xmtfifo_sz[fifo];
8770 return 0;
8773 void
8774 brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset,
8775 const u8 *addr)
8777 brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr);
8778 if (match_reg_offset == RCM_BSSID_OFFSET)
8779 memcpy(wlc->bsscfg->BSSID, addr, ETH_ALEN);
8782 /* check for the particular priority flow control bit being set */
8783 bool
8784 brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc,
8785 struct brcms_txq_info *q,
8786 int prio)
8788 uint prio_mask;
8790 if (prio == ALLPRIO)
8791 prio_mask = TXQ_STOP_FOR_PRIOFC_MASK;
8792 else
8793 prio_mask = NBITVAL(prio);
8795 return (q->stopped & prio_mask) == prio_mask;
8798 /* propagate the flow control to all interfaces using the given tx queue */
8799 void brcms_c_txflowcontrol(struct brcms_c_info *wlc,
8800 struct brcms_txq_info *qi,
8801 bool on, int prio)
8803 uint prio_bits;
8804 uint cur_bits;
8806 BCMMSG(wlc->wiphy, "flow control kicks in\n");
8808 if (prio == ALLPRIO)
8809 prio_bits = TXQ_STOP_FOR_PRIOFC_MASK;
8810 else
8811 prio_bits = NBITVAL(prio);
8813 cur_bits = qi->stopped & prio_bits;
8815 /* Check for the case of no change and return early
8816 * Otherwise update the bit and continue
8818 if (on) {
8819 if (cur_bits == prio_bits)
8820 return;
8822 mboolset(qi->stopped, prio_bits);
8823 } else {
8824 if (cur_bits == 0)
8825 return;
8827 mboolclr(qi->stopped, prio_bits);
8830 /* If there is a flow control override we will not change the external
8831 * flow control state.
8833 if (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK)
8834 return;
8836 brcms_c_txflowcontrol_signal(wlc, qi, on, prio);
8839 void
8840 brcms_c_txflowcontrol_override(struct brcms_c_info *wlc,
8841 struct brcms_txq_info *qi,
8842 bool on, uint override)
8844 uint prev_override;
8846 prev_override = (qi->stopped & ~TXQ_STOP_FOR_PRIOFC_MASK);
8848 /* Update the flow control bits and do an early return if there is
8849 * no change in the external flow control state.
8851 if (on) {
8852 mboolset(qi->stopped, override);
8853 /* if there was a previous override bit on, then setting this
8854 * makes no difference.
8856 if (prev_override)
8857 return;
8859 brcms_c_txflowcontrol_signal(wlc, qi, ON, ALLPRIO);
8860 } else {
8861 mboolclr(qi->stopped, override);
8862 /* clearing an override bit will only make a difference for
8863 * flow control if it was the only bit set. For any other
8864 * override setting, just return
8866 if (prev_override != override)
8867 return;
8869 if (qi->stopped == 0) {
8870 brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO);
8871 } else {
8872 int prio;
8874 for (prio = MAXPRIO; prio >= 0; prio--) {
8875 if (!mboolisset(qi->stopped, NBITVAL(prio)))
8876 brcms_c_txflowcontrol_signal(
8877 wlc, qi, OFF, prio);
8884 * Flag 'scan in progress' to withhold dynamic phy calibration
8886 void brcms_c_scan_start(struct brcms_c_info *wlc)
8888 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true);
8891 void brcms_c_scan_stop(struct brcms_c_info *wlc)
8893 wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false);
8896 void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state)
8898 wlc->pub->associated = state;
8899 wlc->bsscfg->associated = state;
8903 * When a remote STA/AP is removed by Mac80211, or when it can no longer accept
8904 * AMPDU traffic, packets pending in hardware have to be invalidated so that
8905 * when later on hardware releases them, they can be handled appropriately.
8907 void brcms_c_inval_dma_pkts(struct brcms_hardware *hw,
8908 struct ieee80211_sta *sta,
8909 void (*dma_callback_fn))
8911 struct dma_pub *dmah;
8912 int i;
8913 for (i = 0; i < NFIFO; i++) {
8914 dmah = hw->di[i];
8915 if (dmah != NULL)
8916 dma_walk_packets(dmah, dma_callback_fn, sta);
8920 int brcms_c_get_curband(struct brcms_c_info *wlc)
8922 return wlc->band->bandunit;
8925 void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop)
8927 /* flush packet queue when requested */
8928 if (drop)
8929 brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL);
8931 /* wait for queue and DMA fifos to run dry */
8932 while (!pktq_empty(&wlc->pkt_queue->q) || brcms_txpktpendtot(wlc) > 0)
8933 brcms_msleep(wlc->wl, 1);
8936 void brcms_c_set_beacon_listen_interval(struct brcms_c_info *wlc, u8 interval)
8938 wlc->bcn_li_bcn = interval;
8939 if (wlc->pub->up)
8940 brcms_c_bcn_li_upd(wlc);
8943 int brcms_c_set_tx_power(struct brcms_c_info *wlc, int txpwr)
8945 uint qdbm;
8947 /* Remove override bit and clip to max qdbm value */
8948 qdbm = min_t(uint, txpwr * BRCMS_TXPWR_DB_FACTOR, 0xff);
8949 return wlc_phy_txpower_set(wlc->band->pi, qdbm, false);
8952 int brcms_c_get_tx_power(struct brcms_c_info *wlc)
8954 uint qdbm;
8955 bool override;
8957 wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override);
8959 /* Return qdbm units */
8960 return (int)(qdbm / BRCMS_TXPWR_DB_FACTOR);
8963 void brcms_c_set_radio_mpc(struct brcms_c_info *wlc, bool mpc)
8965 wlc->mpc = mpc;
8966 brcms_c_radio_mpc_upd(wlc);
8970 * Search the name=value vars for a specific one and return its value.
8971 * Returns NULL if not found.
8973 char *getvar(char *vars, const char *name)
8975 char *s;
8976 int len;
8978 if (!name)
8979 return NULL;
8981 len = strlen(name);
8982 if (len == 0)
8983 return NULL;
8985 /* first look in vars[] */
8986 for (s = vars; s && *s;) {
8987 if ((memcmp(s, name, len) == 0) && (s[len] == '='))
8988 return &s[len + 1];
8990 while (*s++)
8993 /* nothing found */
8994 return NULL;
8998 * Search the vars for a specific one and return its value as
8999 * an integer. Returns 0 if not found.
9001 int getintvar(char *vars, const char *name)
9003 char *val;
9004 unsigned long res;
9006 val = getvar(vars, name);
9007 if (val && !kstrtoul(val, 0, &res))
9008 return res;
9010 return 0;