Merge 3.0-rc2 into usb-linus as it's needed by some USB patches
[zen-stable.git] / sound / soc / soc-cache.c
blobc005ceb70c9d1dfc624ffa11a13eec427e2215b9
1 /*
2 * soc-cache.c -- ASoC register cache helpers
4 * Copyright 2009 Wolfson Microelectronics PLC.
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/i2c.h>
15 #include <linux/spi/spi.h>
16 #include <sound/soc.h>
17 #include <linux/lzo.h>
18 #include <linux/bitmap.h>
19 #include <linux/rbtree.h>
21 #include <trace/events/asoc.h>
23 #ifdef CONFIG_SPI_MASTER
24 static int do_spi_write(void *control, const char *data, int len)
26 struct spi_device *spi = control;
27 int ret;
29 ret = spi_write(spi, data, len);
30 if (ret < 0)
31 return ret;
33 return len;
35 #endif
37 static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
38 unsigned int value, const void *data, int len)
40 int ret;
42 if (!snd_soc_codec_volatile_register(codec, reg) &&
43 reg < codec->driver->reg_cache_size &&
44 !codec->cache_bypass) {
45 ret = snd_soc_cache_write(codec, reg, value);
46 if (ret < 0)
47 return -1;
50 if (codec->cache_only) {
51 codec->cache_sync = 1;
52 return 0;
55 ret = codec->hw_write(codec->control_data, data, len);
56 if (ret == len)
57 return 0;
58 if (ret < 0)
59 return ret;
60 else
61 return -EIO;
64 static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
66 int ret;
67 unsigned int val;
69 if (reg >= codec->driver->reg_cache_size ||
70 snd_soc_codec_volatile_register(codec, reg) ||
71 codec->cache_bypass) {
72 if (codec->cache_only)
73 return -1;
75 BUG_ON(!codec->hw_read);
76 return codec->hw_read(codec, reg);
79 ret = snd_soc_cache_read(codec, reg, &val);
80 if (ret < 0)
81 return -1;
82 return val;
85 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
86 unsigned int reg)
88 return do_hw_read(codec, reg);
91 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
92 unsigned int value)
94 u16 data;
96 data = cpu_to_be16((reg << 12) | (value & 0xffffff));
98 return do_hw_write(codec, reg, value, &data, 2);
101 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
102 unsigned int reg)
104 return do_hw_read(codec, reg);
107 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
108 unsigned int value)
110 u8 data[2];
112 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
113 data[1] = value & 0x00ff;
115 return do_hw_write(codec, reg, value, data, 2);
118 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
119 unsigned int value)
121 u8 data[2];
123 reg &= 0xff;
124 data[0] = reg;
125 data[1] = value & 0xff;
127 return do_hw_write(codec, reg, value, data, 2);
130 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
131 unsigned int reg)
133 return do_hw_read(codec, reg);
136 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
137 unsigned int value)
139 u8 data[3];
141 data[0] = reg;
142 data[1] = (value >> 8) & 0xff;
143 data[2] = value & 0xff;
145 return do_hw_write(codec, reg, value, data, 3);
148 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
149 unsigned int reg)
151 return do_hw_read(codec, reg);
154 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
155 static unsigned int do_i2c_read(struct snd_soc_codec *codec,
156 void *reg, int reglen,
157 void *data, int datalen)
159 struct i2c_msg xfer[2];
160 int ret;
161 struct i2c_client *client = codec->control_data;
163 /* Write register */
164 xfer[0].addr = client->addr;
165 xfer[0].flags = 0;
166 xfer[0].len = reglen;
167 xfer[0].buf = reg;
169 /* Read data */
170 xfer[1].addr = client->addr;
171 xfer[1].flags = I2C_M_RD;
172 xfer[1].len = datalen;
173 xfer[1].buf = data;
175 ret = i2c_transfer(client->adapter, xfer, 2);
176 if (ret == 2)
177 return 0;
178 else if (ret < 0)
179 return ret;
180 else
181 return -EIO;
183 #endif
185 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
186 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
187 unsigned int r)
189 u8 reg = r;
190 u8 data;
191 int ret;
193 ret = do_i2c_read(codec, &reg, 1, &data, 1);
194 if (ret < 0)
195 return 0;
196 return data;
198 #else
199 #define snd_soc_8_8_read_i2c NULL
200 #endif
202 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
203 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
204 unsigned int r)
206 u8 reg = r;
207 u16 data;
208 int ret;
210 ret = do_i2c_read(codec, &reg, 1, &data, 2);
211 if (ret < 0)
212 return 0;
213 return (data >> 8) | ((data & 0xff) << 8);
215 #else
216 #define snd_soc_8_16_read_i2c NULL
217 #endif
219 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
220 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
221 unsigned int r)
223 u16 reg = r;
224 u8 data;
225 int ret;
227 ret = do_i2c_read(codec, &reg, 2, &data, 1);
228 if (ret < 0)
229 return 0;
230 return data;
232 #else
233 #define snd_soc_16_8_read_i2c NULL
234 #endif
236 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
237 unsigned int reg)
239 return do_hw_read(codec, reg);
242 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
243 unsigned int value)
245 u8 data[3];
247 data[0] = (reg >> 8) & 0xff;
248 data[1] = reg & 0xff;
249 data[2] = value;
251 return do_hw_write(codec, reg, value, data, 3);
254 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
255 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
256 unsigned int r)
258 u16 reg = cpu_to_be16(r);
259 u16 data;
260 int ret;
262 ret = do_i2c_read(codec, &reg, 2, &data, 2);
263 if (ret < 0)
264 return 0;
265 return be16_to_cpu(data);
267 #else
268 #define snd_soc_16_16_read_i2c NULL
269 #endif
271 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
272 unsigned int reg)
274 return do_hw_read(codec, reg);
277 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
278 unsigned int value)
280 u8 data[4];
282 data[0] = (reg >> 8) & 0xff;
283 data[1] = reg & 0xff;
284 data[2] = (value >> 8) & 0xff;
285 data[3] = value & 0xff;
287 return do_hw_write(codec, reg, value, data, 4);
290 /* Primitive bulk write support for soc-cache. The data pointed to by
291 * `data' needs to already be in the form the hardware expects
292 * including any leading register specific data. Any data written
293 * through this function will not go through the cache as it only
294 * handles writing to volatile or out of bounds registers.
296 static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
297 const void *data, size_t len)
299 int ret;
301 /* To ensure that we don't get out of sync with the cache, check
302 * whether the base register is volatile or if we've directly asked
303 * to bypass the cache. Out of bounds registers are considered
304 * volatile.
306 if (!codec->cache_bypass
307 && !snd_soc_codec_volatile_register(codec, reg)
308 && reg < codec->driver->reg_cache_size)
309 return -EINVAL;
311 switch (codec->control_type) {
312 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
313 case SND_SOC_I2C:
314 ret = i2c_master_send(codec->control_data, data, len);
315 break;
316 #endif
317 #if defined(CONFIG_SPI_MASTER)
318 case SND_SOC_SPI:
319 ret = spi_write(codec->control_data, data, len);
320 break;
321 #endif
322 default:
323 BUG();
326 if (ret == len)
327 return 0;
328 if (ret < 0)
329 return ret;
330 else
331 return -EIO;
334 static struct {
335 int addr_bits;
336 int data_bits;
337 int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
338 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
339 unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
340 } io_types[] = {
342 .addr_bits = 4, .data_bits = 12,
343 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
346 .addr_bits = 7, .data_bits = 9,
347 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
350 .addr_bits = 8, .data_bits = 8,
351 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
352 .i2c_read = snd_soc_8_8_read_i2c,
355 .addr_bits = 8, .data_bits = 16,
356 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
357 .i2c_read = snd_soc_8_16_read_i2c,
360 .addr_bits = 16, .data_bits = 8,
361 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
362 .i2c_read = snd_soc_16_8_read_i2c,
365 .addr_bits = 16, .data_bits = 16,
366 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
367 .i2c_read = snd_soc_16_16_read_i2c,
372 * snd_soc_codec_set_cache_io: Set up standard I/O functions.
374 * @codec: CODEC to configure.
375 * @addr_bits: Number of bits of register address data.
376 * @data_bits: Number of bits of data per register.
377 * @control: Control bus used.
379 * Register formats are frequently shared between many I2C and SPI
380 * devices. In order to promote code reuse the ASoC core provides
381 * some standard implementations of CODEC read and write operations
382 * which can be set up using this function.
384 * The caller is responsible for allocating and initialising the
385 * actual cache.
387 * Note that at present this code cannot be used by CODECs with
388 * volatile registers.
390 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
391 int addr_bits, int data_bits,
392 enum snd_soc_control_type control)
394 int i;
396 for (i = 0; i < ARRAY_SIZE(io_types); i++)
397 if (io_types[i].addr_bits == addr_bits &&
398 io_types[i].data_bits == data_bits)
399 break;
400 if (i == ARRAY_SIZE(io_types)) {
401 printk(KERN_ERR
402 "No I/O functions for %d bit address %d bit data\n",
403 addr_bits, data_bits);
404 return -EINVAL;
407 codec->write = io_types[i].write;
408 codec->read = io_types[i].read;
409 codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
411 switch (control) {
412 case SND_SOC_CUSTOM:
413 break;
415 case SND_SOC_I2C:
416 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
417 codec->hw_write = (hw_write_t)i2c_master_send;
418 #endif
419 if (io_types[i].i2c_read)
420 codec->hw_read = io_types[i].i2c_read;
422 codec->control_data = container_of(codec->dev,
423 struct i2c_client,
424 dev);
425 break;
427 case SND_SOC_SPI:
428 #ifdef CONFIG_SPI_MASTER
429 codec->hw_write = do_spi_write;
430 #endif
432 codec->control_data = container_of(codec->dev,
433 struct spi_device,
434 dev);
435 break;
438 return 0;
440 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
442 static bool snd_soc_set_cache_val(void *base, unsigned int idx,
443 unsigned int val, unsigned int word_size)
445 switch (word_size) {
446 case 1: {
447 u8 *cache = base;
448 if (cache[idx] == val)
449 return true;
450 cache[idx] = val;
451 break;
453 case 2: {
454 u16 *cache = base;
455 if (cache[idx] == val)
456 return true;
457 cache[idx] = val;
458 break;
460 default:
461 BUG();
463 return false;
466 static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
467 unsigned int word_size)
469 if (!base)
470 return -1;
472 switch (word_size) {
473 case 1: {
474 const u8 *cache = base;
475 return cache[idx];
477 case 2: {
478 const u16 *cache = base;
479 return cache[idx];
481 default:
482 BUG();
484 /* unreachable */
485 return -1;
488 struct snd_soc_rbtree_node {
489 struct rb_node node;
490 unsigned int reg;
491 unsigned int value;
492 unsigned int defval;
493 } __attribute__ ((packed));
495 struct snd_soc_rbtree_ctx {
496 struct rb_root root;
499 static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
500 struct rb_root *root, unsigned int reg)
502 struct rb_node *node;
503 struct snd_soc_rbtree_node *rbnode;
505 node = root->rb_node;
506 while (node) {
507 rbnode = container_of(node, struct snd_soc_rbtree_node, node);
508 if (rbnode->reg < reg)
509 node = node->rb_left;
510 else if (rbnode->reg > reg)
511 node = node->rb_right;
512 else
513 return rbnode;
516 return NULL;
519 static int snd_soc_rbtree_insert(struct rb_root *root,
520 struct snd_soc_rbtree_node *rbnode)
522 struct rb_node **new, *parent;
523 struct snd_soc_rbtree_node *rbnode_tmp;
525 parent = NULL;
526 new = &root->rb_node;
527 while (*new) {
528 rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
529 node);
530 parent = *new;
531 if (rbnode_tmp->reg < rbnode->reg)
532 new = &((*new)->rb_left);
533 else if (rbnode_tmp->reg > rbnode->reg)
534 new = &((*new)->rb_right);
535 else
536 return 0;
539 /* insert the node into the rbtree */
540 rb_link_node(&rbnode->node, parent, new);
541 rb_insert_color(&rbnode->node, root);
543 return 1;
546 static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
548 struct snd_soc_rbtree_ctx *rbtree_ctx;
549 struct rb_node *node;
550 struct snd_soc_rbtree_node *rbnode;
551 unsigned int val;
552 int ret;
554 rbtree_ctx = codec->reg_cache;
555 for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
556 rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
557 if (rbnode->value == rbnode->defval)
558 continue;
559 WARN_ON(codec->writable_register &&
560 codec->writable_register(codec, rbnode->reg));
561 ret = snd_soc_cache_read(codec, rbnode->reg, &val);
562 if (ret)
563 return ret;
564 codec->cache_bypass = 1;
565 ret = snd_soc_write(codec, rbnode->reg, val);
566 codec->cache_bypass = 0;
567 if (ret)
568 return ret;
569 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
570 rbnode->reg, val);
573 return 0;
576 static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
577 unsigned int reg, unsigned int value)
579 struct snd_soc_rbtree_ctx *rbtree_ctx;
580 struct snd_soc_rbtree_node *rbnode;
582 rbtree_ctx = codec->reg_cache;
583 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
584 if (rbnode) {
585 if (rbnode->value == value)
586 return 0;
587 rbnode->value = value;
588 } else {
589 /* bail out early, no need to create the rbnode yet */
590 if (!value)
591 return 0;
593 * for uninitialized registers whose value is changed
594 * from the default zero, create an rbnode and insert
595 * it into the tree.
597 rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
598 if (!rbnode)
599 return -ENOMEM;
600 rbnode->reg = reg;
601 rbnode->value = value;
602 snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
605 return 0;
608 static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
609 unsigned int reg, unsigned int *value)
611 struct snd_soc_rbtree_ctx *rbtree_ctx;
612 struct snd_soc_rbtree_node *rbnode;
614 rbtree_ctx = codec->reg_cache;
615 rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
616 if (rbnode) {
617 *value = rbnode->value;
618 } else {
619 /* uninitialized registers default to 0 */
620 *value = 0;
623 return 0;
626 static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
628 struct rb_node *next;
629 struct snd_soc_rbtree_ctx *rbtree_ctx;
630 struct snd_soc_rbtree_node *rbtree_node;
632 /* if we've already been called then just return */
633 rbtree_ctx = codec->reg_cache;
634 if (!rbtree_ctx)
635 return 0;
637 /* free up the rbtree */
638 next = rb_first(&rbtree_ctx->root);
639 while (next) {
640 rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
641 next = rb_next(&rbtree_node->node);
642 rb_erase(&rbtree_node->node, &rbtree_ctx->root);
643 kfree(rbtree_node);
646 /* release the resources */
647 kfree(codec->reg_cache);
648 codec->reg_cache = NULL;
650 return 0;
653 static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
655 struct snd_soc_rbtree_node *rbtree_node;
656 struct snd_soc_rbtree_ctx *rbtree_ctx;
657 unsigned int val;
658 unsigned int word_size;
659 int i;
660 int ret;
662 codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
663 if (!codec->reg_cache)
664 return -ENOMEM;
666 rbtree_ctx = codec->reg_cache;
667 rbtree_ctx->root = RB_ROOT;
669 if (!codec->reg_def_copy)
670 return 0;
673 * populate the rbtree with the initialized registers. All other
674 * registers will be inserted when they are first modified.
676 word_size = codec->driver->reg_word_size;
677 for (i = 0; i < codec->driver->reg_cache_size; ++i) {
678 val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
679 if (!val)
680 continue;
681 rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
682 if (!rbtree_node) {
683 ret = -ENOMEM;
684 snd_soc_cache_exit(codec);
685 break;
687 rbtree_node->reg = i;
688 rbtree_node->value = val;
689 rbtree_node->defval = val;
690 snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
693 return 0;
696 #ifdef CONFIG_SND_SOC_CACHE_LZO
697 struct snd_soc_lzo_ctx {
698 void *wmem;
699 void *dst;
700 const void *src;
701 size_t src_len;
702 size_t dst_len;
703 size_t decompressed_size;
704 unsigned long *sync_bmp;
705 int sync_bmp_nbits;
708 #define LZO_BLOCK_NUM 8
709 static int snd_soc_lzo_block_count(void)
711 return LZO_BLOCK_NUM;
714 static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
716 lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
717 if (!lzo_ctx->wmem)
718 return -ENOMEM;
719 return 0;
722 static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
724 size_t compress_size;
725 int ret;
727 ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
728 lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
729 if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
730 return -EINVAL;
731 lzo_ctx->dst_len = compress_size;
732 return 0;
735 static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
737 size_t dst_len;
738 int ret;
740 dst_len = lzo_ctx->dst_len;
741 ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
742 lzo_ctx->dst, &dst_len);
743 if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
744 return -EINVAL;
745 return 0;
748 static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
749 struct snd_soc_lzo_ctx *lzo_ctx)
751 int ret;
753 lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
754 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
755 if (!lzo_ctx->dst) {
756 lzo_ctx->dst_len = 0;
757 return -ENOMEM;
760 ret = snd_soc_lzo_compress(lzo_ctx);
761 if (ret < 0)
762 return ret;
763 return 0;
766 static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
767 struct snd_soc_lzo_ctx *lzo_ctx)
769 int ret;
771 lzo_ctx->dst_len = lzo_ctx->decompressed_size;
772 lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
773 if (!lzo_ctx->dst) {
774 lzo_ctx->dst_len = 0;
775 return -ENOMEM;
778 ret = snd_soc_lzo_decompress(lzo_ctx);
779 if (ret < 0)
780 return ret;
781 return 0;
784 static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
785 unsigned int reg)
787 const struct snd_soc_codec_driver *codec_drv;
789 codec_drv = codec->driver;
790 return (reg * codec_drv->reg_word_size) /
791 DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
794 static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
795 unsigned int reg)
797 const struct snd_soc_codec_driver *codec_drv;
799 codec_drv = codec->driver;
800 return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
801 codec_drv->reg_word_size);
804 static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
806 const struct snd_soc_codec_driver *codec_drv;
808 codec_drv = codec->driver;
809 return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
812 static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
814 struct snd_soc_lzo_ctx **lzo_blocks;
815 unsigned int val;
816 int i;
817 int ret;
819 lzo_blocks = codec->reg_cache;
820 for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
821 WARN_ON(codec->writable_register &&
822 codec->writable_register(codec, i));
823 ret = snd_soc_cache_read(codec, i, &val);
824 if (ret)
825 return ret;
826 codec->cache_bypass = 1;
827 ret = snd_soc_write(codec, i, val);
828 codec->cache_bypass = 0;
829 if (ret)
830 return ret;
831 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
832 i, val);
835 return 0;
838 static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
839 unsigned int reg, unsigned int value)
841 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
842 int ret, blkindex, blkpos;
843 size_t blksize, tmp_dst_len;
844 void *tmp_dst;
846 /* index of the compressed lzo block */
847 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
848 /* register index within the decompressed block */
849 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
850 /* size of the compressed block */
851 blksize = snd_soc_lzo_get_blksize(codec);
852 lzo_blocks = codec->reg_cache;
853 lzo_block = lzo_blocks[blkindex];
855 /* save the pointer and length of the compressed block */
856 tmp_dst = lzo_block->dst;
857 tmp_dst_len = lzo_block->dst_len;
859 /* prepare the source to be the compressed block */
860 lzo_block->src = lzo_block->dst;
861 lzo_block->src_len = lzo_block->dst_len;
863 /* decompress the block */
864 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
865 if (ret < 0) {
866 kfree(lzo_block->dst);
867 goto out;
870 /* write the new value to the cache */
871 if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
872 codec->driver->reg_word_size)) {
873 kfree(lzo_block->dst);
874 goto out;
877 /* prepare the source to be the decompressed block */
878 lzo_block->src = lzo_block->dst;
879 lzo_block->src_len = lzo_block->dst_len;
881 /* compress the block */
882 ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
883 if (ret < 0) {
884 kfree(lzo_block->dst);
885 kfree(lzo_block->src);
886 goto out;
889 /* set the bit so we know we have to sync this register */
890 set_bit(reg, lzo_block->sync_bmp);
891 kfree(tmp_dst);
892 kfree(lzo_block->src);
893 return 0;
894 out:
895 lzo_block->dst = tmp_dst;
896 lzo_block->dst_len = tmp_dst_len;
897 return ret;
900 static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
901 unsigned int reg, unsigned int *value)
903 struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
904 int ret, blkindex, blkpos;
905 size_t blksize, tmp_dst_len;
906 void *tmp_dst;
908 *value = 0;
909 /* index of the compressed lzo block */
910 blkindex = snd_soc_lzo_get_blkindex(codec, reg);
911 /* register index within the decompressed block */
912 blkpos = snd_soc_lzo_get_blkpos(codec, reg);
913 /* size of the compressed block */
914 blksize = snd_soc_lzo_get_blksize(codec);
915 lzo_blocks = codec->reg_cache;
916 lzo_block = lzo_blocks[blkindex];
918 /* save the pointer and length of the compressed block */
919 tmp_dst = lzo_block->dst;
920 tmp_dst_len = lzo_block->dst_len;
922 /* prepare the source to be the compressed block */
923 lzo_block->src = lzo_block->dst;
924 lzo_block->src_len = lzo_block->dst_len;
926 /* decompress the block */
927 ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
928 if (ret >= 0)
929 /* fetch the value from the cache */
930 *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
931 codec->driver->reg_word_size);
933 kfree(lzo_block->dst);
934 /* restore the pointer and length of the compressed block */
935 lzo_block->dst = tmp_dst;
936 lzo_block->dst_len = tmp_dst_len;
937 return 0;
940 static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
942 struct snd_soc_lzo_ctx **lzo_blocks;
943 int i, blkcount;
945 lzo_blocks = codec->reg_cache;
946 if (!lzo_blocks)
947 return 0;
949 blkcount = snd_soc_lzo_block_count();
951 * the pointer to the bitmap used for syncing the cache
952 * is shared amongst all lzo_blocks. Ensure it is freed
953 * only once.
955 if (lzo_blocks[0])
956 kfree(lzo_blocks[0]->sync_bmp);
957 for (i = 0; i < blkcount; ++i) {
958 if (lzo_blocks[i]) {
959 kfree(lzo_blocks[i]->wmem);
960 kfree(lzo_blocks[i]->dst);
962 /* each lzo_block is a pointer returned by kmalloc or NULL */
963 kfree(lzo_blocks[i]);
965 kfree(lzo_blocks);
966 codec->reg_cache = NULL;
967 return 0;
970 static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
972 struct snd_soc_lzo_ctx **lzo_blocks;
973 size_t bmp_size;
974 const struct snd_soc_codec_driver *codec_drv;
975 int ret, tofree, i, blksize, blkcount;
976 const char *p, *end;
977 unsigned long *sync_bmp;
979 ret = 0;
980 codec_drv = codec->driver;
983 * If we have not been given a default register cache
984 * then allocate a dummy zero-ed out region, compress it
985 * and remember to free it afterwards.
987 tofree = 0;
988 if (!codec->reg_def_copy)
989 tofree = 1;
991 if (!codec->reg_def_copy) {
992 codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
993 if (!codec->reg_def_copy)
994 return -ENOMEM;
997 blkcount = snd_soc_lzo_block_count();
998 codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
999 GFP_KERNEL);
1000 if (!codec->reg_cache) {
1001 ret = -ENOMEM;
1002 goto err_tofree;
1004 lzo_blocks = codec->reg_cache;
1007 * allocate a bitmap to be used when syncing the cache with
1008 * the hardware. Each time a register is modified, the corresponding
1009 * bit is set in the bitmap, so we know that we have to sync
1010 * that register.
1012 bmp_size = codec_drv->reg_cache_size;
1013 sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
1014 GFP_KERNEL);
1015 if (!sync_bmp) {
1016 ret = -ENOMEM;
1017 goto err;
1019 bitmap_zero(sync_bmp, bmp_size);
1021 /* allocate the lzo blocks and initialize them */
1022 for (i = 0; i < blkcount; ++i) {
1023 lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
1024 GFP_KERNEL);
1025 if (!lzo_blocks[i]) {
1026 kfree(sync_bmp);
1027 ret = -ENOMEM;
1028 goto err;
1030 lzo_blocks[i]->sync_bmp = sync_bmp;
1031 lzo_blocks[i]->sync_bmp_nbits = bmp_size;
1032 /* alloc the working space for the compressed block */
1033 ret = snd_soc_lzo_prepare(lzo_blocks[i]);
1034 if (ret < 0)
1035 goto err;
1038 blksize = snd_soc_lzo_get_blksize(codec);
1039 p = codec->reg_def_copy;
1040 end = codec->reg_def_copy + codec->reg_size;
1041 /* compress the register map and fill the lzo blocks */
1042 for (i = 0; i < blkcount; ++i, p += blksize) {
1043 lzo_blocks[i]->src = p;
1044 if (p + blksize > end)
1045 lzo_blocks[i]->src_len = end - p;
1046 else
1047 lzo_blocks[i]->src_len = blksize;
1048 ret = snd_soc_lzo_compress_cache_block(codec,
1049 lzo_blocks[i]);
1050 if (ret < 0)
1051 goto err;
1052 lzo_blocks[i]->decompressed_size =
1053 lzo_blocks[i]->src_len;
1056 if (tofree) {
1057 kfree(codec->reg_def_copy);
1058 codec->reg_def_copy = NULL;
1060 return 0;
1061 err:
1062 snd_soc_cache_exit(codec);
1063 err_tofree:
1064 if (tofree) {
1065 kfree(codec->reg_def_copy);
1066 codec->reg_def_copy = NULL;
1068 return ret;
1070 #endif
1072 static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
1074 int i;
1075 int ret;
1076 const struct snd_soc_codec_driver *codec_drv;
1077 unsigned int val;
1079 codec_drv = codec->driver;
1080 for (i = 0; i < codec_drv->reg_cache_size; ++i) {
1081 WARN_ON(codec->writable_register &&
1082 codec->writable_register(codec, i));
1083 ret = snd_soc_cache_read(codec, i, &val);
1084 if (ret)
1085 return ret;
1086 if (codec->reg_def_copy)
1087 if (snd_soc_get_cache_val(codec->reg_def_copy,
1088 i, codec_drv->reg_word_size) == val)
1089 continue;
1090 ret = snd_soc_write(codec, i, val);
1091 if (ret)
1092 return ret;
1093 dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
1094 i, val);
1096 return 0;
1099 static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
1100 unsigned int reg, unsigned int value)
1102 snd_soc_set_cache_val(codec->reg_cache, reg, value,
1103 codec->driver->reg_word_size);
1104 return 0;
1107 static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
1108 unsigned int reg, unsigned int *value)
1110 *value = snd_soc_get_cache_val(codec->reg_cache, reg,
1111 codec->driver->reg_word_size);
1112 return 0;
1115 static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
1117 if (!codec->reg_cache)
1118 return 0;
1119 kfree(codec->reg_cache);
1120 codec->reg_cache = NULL;
1121 return 0;
1124 static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
1126 const struct snd_soc_codec_driver *codec_drv;
1128 codec_drv = codec->driver;
1130 if (codec->reg_def_copy)
1131 codec->reg_cache = kmemdup(codec->reg_def_copy,
1132 codec->reg_size, GFP_KERNEL);
1133 else
1134 codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
1135 if (!codec->reg_cache)
1136 return -ENOMEM;
1138 return 0;
1141 /* an array of all supported compression types */
1142 static const struct snd_soc_cache_ops cache_types[] = {
1143 /* Flat *must* be the first entry for fallback */
1145 .id = SND_SOC_FLAT_COMPRESSION,
1146 .name = "flat",
1147 .init = snd_soc_flat_cache_init,
1148 .exit = snd_soc_flat_cache_exit,
1149 .read = snd_soc_flat_cache_read,
1150 .write = snd_soc_flat_cache_write,
1151 .sync = snd_soc_flat_cache_sync
1153 #ifdef CONFIG_SND_SOC_CACHE_LZO
1155 .id = SND_SOC_LZO_COMPRESSION,
1156 .name = "LZO",
1157 .init = snd_soc_lzo_cache_init,
1158 .exit = snd_soc_lzo_cache_exit,
1159 .read = snd_soc_lzo_cache_read,
1160 .write = snd_soc_lzo_cache_write,
1161 .sync = snd_soc_lzo_cache_sync
1163 #endif
1165 .id = SND_SOC_RBTREE_COMPRESSION,
1166 .name = "rbtree",
1167 .init = snd_soc_rbtree_cache_init,
1168 .exit = snd_soc_rbtree_cache_exit,
1169 .read = snd_soc_rbtree_cache_read,
1170 .write = snd_soc_rbtree_cache_write,
1171 .sync = snd_soc_rbtree_cache_sync
1175 int snd_soc_cache_init(struct snd_soc_codec *codec)
1177 int i;
1179 for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
1180 if (cache_types[i].id == codec->compress_type)
1181 break;
1183 /* Fall back to flat compression */
1184 if (i == ARRAY_SIZE(cache_types)) {
1185 dev_warn(codec->dev, "Could not match compress type: %d\n",
1186 codec->compress_type);
1187 i = 0;
1190 mutex_init(&codec->cache_rw_mutex);
1191 codec->cache_ops = &cache_types[i];
1193 if (codec->cache_ops->init) {
1194 if (codec->cache_ops->name)
1195 dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
1196 codec->cache_ops->name, codec->name);
1197 return codec->cache_ops->init(codec);
1199 return -ENOSYS;
1203 * NOTE: keep in mind that this function might be called
1204 * multiple times.
1206 int snd_soc_cache_exit(struct snd_soc_codec *codec)
1208 if (codec->cache_ops && codec->cache_ops->exit) {
1209 if (codec->cache_ops->name)
1210 dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
1211 codec->cache_ops->name, codec->name);
1212 return codec->cache_ops->exit(codec);
1214 return -ENOSYS;
1218 * snd_soc_cache_read: Fetch the value of a given register from the cache.
1220 * @codec: CODEC to configure.
1221 * @reg: The register index.
1222 * @value: The value to be returned.
1224 int snd_soc_cache_read(struct snd_soc_codec *codec,
1225 unsigned int reg, unsigned int *value)
1227 int ret;
1229 mutex_lock(&codec->cache_rw_mutex);
1231 if (value && codec->cache_ops && codec->cache_ops->read) {
1232 ret = codec->cache_ops->read(codec, reg, value);
1233 mutex_unlock(&codec->cache_rw_mutex);
1234 return ret;
1237 mutex_unlock(&codec->cache_rw_mutex);
1238 return -ENOSYS;
1240 EXPORT_SYMBOL_GPL(snd_soc_cache_read);
1243 * snd_soc_cache_write: Set the value of a given register in the cache.
1245 * @codec: CODEC to configure.
1246 * @reg: The register index.
1247 * @value: The new register value.
1249 int snd_soc_cache_write(struct snd_soc_codec *codec,
1250 unsigned int reg, unsigned int value)
1252 int ret;
1254 mutex_lock(&codec->cache_rw_mutex);
1256 if (codec->cache_ops && codec->cache_ops->write) {
1257 ret = codec->cache_ops->write(codec, reg, value);
1258 mutex_unlock(&codec->cache_rw_mutex);
1259 return ret;
1262 mutex_unlock(&codec->cache_rw_mutex);
1263 return -ENOSYS;
1265 EXPORT_SYMBOL_GPL(snd_soc_cache_write);
1268 * snd_soc_cache_sync: Sync the register cache with the hardware.
1270 * @codec: CODEC to configure.
1272 * Any registers that should not be synced should be marked as
1273 * volatile. In general drivers can choose not to use the provided
1274 * syncing functionality if they so require.
1276 int snd_soc_cache_sync(struct snd_soc_codec *codec)
1278 int ret;
1279 const char *name;
1281 if (!codec->cache_sync) {
1282 return 0;
1285 if (!codec->cache_ops || !codec->cache_ops->sync)
1286 return -ENOSYS;
1288 if (codec->cache_ops->name)
1289 name = codec->cache_ops->name;
1290 else
1291 name = "unknown";
1293 if (codec->cache_ops->name)
1294 dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
1295 codec->cache_ops->name, codec->name);
1296 trace_snd_soc_cache_sync(codec, name, "start");
1297 ret = codec->cache_ops->sync(codec);
1298 if (!ret)
1299 codec->cache_sync = 0;
1300 trace_snd_soc_cache_sync(codec, name, "end");
1301 return ret;
1303 EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
1305 static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
1306 unsigned int reg)
1308 const struct snd_soc_codec_driver *codec_drv;
1309 unsigned int min, max, index;
1311 codec_drv = codec->driver;
1312 min = 0;
1313 max = codec_drv->reg_access_size - 1;
1314 do {
1315 index = (min + max) / 2;
1316 if (codec_drv->reg_access_default[index].reg == reg)
1317 return index;
1318 if (codec_drv->reg_access_default[index].reg < reg)
1319 min = index + 1;
1320 else
1321 max = index;
1322 } while (min <= max);
1323 return -1;
1326 int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
1327 unsigned int reg)
1329 int index;
1331 if (reg >= codec->driver->reg_cache_size)
1332 return 1;
1333 index = snd_soc_get_reg_access_index(codec, reg);
1334 if (index < 0)
1335 return 0;
1336 return codec->driver->reg_access_default[index].vol;
1338 EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
1340 int snd_soc_default_readable_register(struct snd_soc_codec *codec,
1341 unsigned int reg)
1343 int index;
1345 if (reg >= codec->driver->reg_cache_size)
1346 return 1;
1347 index = snd_soc_get_reg_access_index(codec, reg);
1348 if (index < 0)
1349 return 0;
1350 return codec->driver->reg_access_default[index].read;
1352 EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
1354 int snd_soc_default_writable_register(struct snd_soc_codec *codec,
1355 unsigned int reg)
1357 int index;
1359 if (reg >= codec->driver->reg_cache_size)
1360 return 1;
1361 index = snd_soc_get_reg_access_index(codec, reg);
1362 if (index < 0)
1363 return 0;
1364 return codec->driver->reg_access_default[index].write;
1366 EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);