OMAPDSS: VENC: fix NULL pointer dereference in DSS2 VENC sysfs debug attr on OMAP4
[zen-stable.git] / drivers / gpu / drm / exynos / exynos_drm_crtc.c
blobde818831a51144393a6f237feb5d81077a1776bc
1 /* exynos_drm_crtc.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Authors:
5 * Inki Dae <inki.dae@samsung.com>
6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com>
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
26 * OTHER DEALINGS IN THE SOFTWARE.
29 #include "drmP.h"
30 #include "drm_crtc_helper.h"
32 #include "exynos_drm_crtc.h"
33 #include "exynos_drm_drv.h"
34 #include "exynos_drm_fb.h"
35 #include "exynos_drm_encoder.h"
36 #include "exynos_drm_gem.h"
38 #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
39 drm_crtc)
42 * Exynos specific crtc structure.
44 * @drm_crtc: crtc object.
45 * @overlay: contain information common to display controller and hdmi and
46 * contents of this overlay object would be copied to sub driver size.
47 * @pipe: a crtc index created at load() with a new crtc object creation
48 * and the crtc object would be set to private->crtc array
49 * to get a crtc object corresponding to this pipe from private->crtc
50 * array when irq interrupt occured. the reason of using this pipe is that
51 * drm framework doesn't support multiple irq yet.
52 * we can refer to the crtc to current hardware interrupt occured through
53 * this pipe value.
54 * @dpms: store the crtc dpms value
56 struct exynos_drm_crtc {
57 struct drm_crtc drm_crtc;
58 struct exynos_drm_overlay overlay;
59 unsigned int pipe;
60 unsigned int dpms;
63 static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
65 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
66 struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
68 exynos_drm_fn_encoder(crtc, overlay,
69 exynos_drm_encoder_crtc_mode_set);
70 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
71 exynos_drm_encoder_crtc_commit);
74 int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
75 struct drm_framebuffer *fb,
76 struct drm_display_mode *mode,
77 struct exynos_drm_crtc_pos *pos)
79 struct exynos_drm_gem_buf *buffer;
80 unsigned int actual_w;
81 unsigned int actual_h;
82 int nr = exynos_drm_format_num_buffers(fb->pixel_format);
83 int i;
85 for (i = 0; i < nr; i++) {
86 buffer = exynos_drm_fb_buffer(fb, i);
87 if (!buffer) {
88 DRM_LOG_KMS("buffer is null\n");
89 return -EFAULT;
92 overlay->dma_addr[i] = buffer->dma_addr;
93 overlay->vaddr[i] = buffer->kvaddr;
95 DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
96 i, (unsigned long)overlay->vaddr[i],
97 (unsigned long)overlay->dma_addr[i]);
100 actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
101 actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
103 /* set drm framebuffer data. */
104 overlay->fb_x = pos->fb_x;
105 overlay->fb_y = pos->fb_y;
106 overlay->fb_width = fb->width;
107 overlay->fb_height = fb->height;
108 overlay->bpp = fb->bits_per_pixel;
109 overlay->pitch = fb->pitches[0];
110 overlay->pixel_format = fb->pixel_format;
112 /* set overlay range to be displayed. */
113 overlay->crtc_x = pos->crtc_x;
114 overlay->crtc_y = pos->crtc_y;
115 overlay->crtc_width = actual_w;
116 overlay->crtc_height = actual_h;
118 /* set drm mode data. */
119 overlay->mode_width = mode->hdisplay;
120 overlay->mode_height = mode->vdisplay;
121 overlay->refresh = mode->vrefresh;
122 overlay->scan_flag = mode->flags;
124 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
125 overlay->crtc_x, overlay->crtc_y,
126 overlay->crtc_width, overlay->crtc_height);
128 return 0;
131 static int exynos_drm_crtc_update(struct drm_crtc *crtc)
133 struct exynos_drm_crtc *exynos_crtc;
134 struct exynos_drm_overlay *overlay;
135 struct exynos_drm_crtc_pos pos;
136 struct drm_display_mode *mode = &crtc->mode;
137 struct drm_framebuffer *fb = crtc->fb;
139 if (!mode || !fb)
140 return -EINVAL;
142 exynos_crtc = to_exynos_crtc(crtc);
143 overlay = &exynos_crtc->overlay;
145 memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
147 /* it means the offset of framebuffer to be displayed. */
148 pos.fb_x = crtc->x;
149 pos.fb_y = crtc->y;
151 /* OSD position to be displayed. */
152 pos.crtc_x = 0;
153 pos.crtc_y = 0;
154 pos.crtc_w = fb->width - crtc->x;
155 pos.crtc_h = fb->height - crtc->y;
157 return exynos_drm_overlay_update(overlay, crtc->fb, mode, &pos);
160 static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
162 struct drm_device *dev = crtc->dev;
163 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
165 DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
167 if (exynos_crtc->dpms == mode) {
168 DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
169 return;
172 mutex_lock(&dev->struct_mutex);
174 switch (mode) {
175 case DRM_MODE_DPMS_ON:
176 exynos_drm_fn_encoder(crtc, &mode,
177 exynos_drm_encoder_crtc_dpms);
178 exynos_crtc->dpms = mode;
179 break;
180 case DRM_MODE_DPMS_STANDBY:
181 case DRM_MODE_DPMS_SUSPEND:
182 case DRM_MODE_DPMS_OFF:
183 exynos_drm_fn_encoder(crtc, &mode,
184 exynos_drm_encoder_crtc_dpms);
185 exynos_crtc->dpms = mode;
186 break;
187 default:
188 DRM_ERROR("unspecified mode %d\n", mode);
189 break;
192 mutex_unlock(&dev->struct_mutex);
195 static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
197 DRM_DEBUG_KMS("%s\n", __FILE__);
199 /* drm framework doesn't check NULL. */
202 static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
204 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
206 DRM_DEBUG_KMS("%s\n", __FILE__);
209 * when set_crtc is requested from user or at booting time,
210 * crtc->commit would be called without dpms call so if dpms is
211 * no power on then crtc->dpms should be called
212 * with DRM_MODE_DPMS_ON for the hardware power to be on.
214 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) {
215 int mode = DRM_MODE_DPMS_ON;
218 * enable hardware(power on) to all encoders hdmi connected
219 * to current crtc.
221 exynos_drm_crtc_dpms(crtc, mode);
223 * enable dma to all encoders connected to current crtc and
224 * lcd panel.
226 exynos_drm_fn_encoder(crtc, &mode,
227 exynos_drm_encoder_dpms_from_crtc);
230 exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
231 exynos_drm_encoder_crtc_commit);
234 static bool
235 exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
236 struct drm_display_mode *mode,
237 struct drm_display_mode *adjusted_mode)
239 DRM_DEBUG_KMS("%s\n", __FILE__);
241 /* drm framework doesn't check NULL */
242 return true;
245 static int
246 exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
247 struct drm_display_mode *adjusted_mode, int x, int y,
248 struct drm_framebuffer *old_fb)
250 DRM_DEBUG_KMS("%s\n", __FILE__);
252 mode = adjusted_mode;
254 return exynos_drm_crtc_update(crtc);
257 static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
258 struct drm_framebuffer *old_fb)
260 int ret;
262 DRM_DEBUG_KMS("%s\n", __FILE__);
264 ret = exynos_drm_crtc_update(crtc);
265 if (ret)
266 return ret;
268 exynos_drm_crtc_apply(crtc);
270 return ret;
273 static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
275 DRM_DEBUG_KMS("%s\n", __FILE__);
276 /* drm framework doesn't check NULL */
279 static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
280 .dpms = exynos_drm_crtc_dpms,
281 .prepare = exynos_drm_crtc_prepare,
282 .commit = exynos_drm_crtc_commit,
283 .mode_fixup = exynos_drm_crtc_mode_fixup,
284 .mode_set = exynos_drm_crtc_mode_set,
285 .mode_set_base = exynos_drm_crtc_mode_set_base,
286 .load_lut = exynos_drm_crtc_load_lut,
289 static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
290 struct drm_framebuffer *fb,
291 struct drm_pending_vblank_event *event)
293 struct drm_device *dev = crtc->dev;
294 struct exynos_drm_private *dev_priv = dev->dev_private;
295 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
296 struct drm_framebuffer *old_fb = crtc->fb;
297 int ret = -EINVAL;
299 DRM_DEBUG_KMS("%s\n", __FILE__);
301 mutex_lock(&dev->struct_mutex);
303 if (event) {
305 * the pipe from user always is 0 so we can set pipe number
306 * of current owner to event.
308 event->pipe = exynos_crtc->pipe;
310 ret = drm_vblank_get(dev, exynos_crtc->pipe);
311 if (ret) {
312 DRM_DEBUG("failed to acquire vblank counter\n");
313 list_del(&event->base.link);
315 goto out;
318 list_add_tail(&event->base.link,
319 &dev_priv->pageflip_event_list);
321 crtc->fb = fb;
322 ret = exynos_drm_crtc_update(crtc);
323 if (ret) {
324 crtc->fb = old_fb;
325 drm_vblank_put(dev, exynos_crtc->pipe);
326 list_del(&event->base.link);
328 goto out;
332 * the values related to a buffer of the drm framebuffer
333 * to be applied should be set at here. because these values
334 * first, are set to shadow registers and then to
335 * real registers at vsync front porch period.
337 exynos_drm_crtc_apply(crtc);
339 out:
340 mutex_unlock(&dev->struct_mutex);
341 return ret;
344 static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
346 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
347 struct exynos_drm_private *private = crtc->dev->dev_private;
349 DRM_DEBUG_KMS("%s\n", __FILE__);
351 private->crtc[exynos_crtc->pipe] = NULL;
353 drm_crtc_cleanup(crtc);
354 kfree(exynos_crtc);
357 static struct drm_crtc_funcs exynos_crtc_funcs = {
358 .set_config = drm_crtc_helper_set_config,
359 .page_flip = exynos_drm_crtc_page_flip,
360 .destroy = exynos_drm_crtc_destroy,
363 struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
364 struct drm_crtc *crtc)
366 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
368 return &exynos_crtc->overlay;
371 int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
373 struct exynos_drm_crtc *exynos_crtc;
374 struct exynos_drm_private *private = dev->dev_private;
375 struct drm_crtc *crtc;
377 DRM_DEBUG_KMS("%s\n", __FILE__);
379 exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
380 if (!exynos_crtc) {
381 DRM_ERROR("failed to allocate exynos crtc\n");
382 return -ENOMEM;
385 exynos_crtc->pipe = nr;
386 exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
387 exynos_crtc->overlay.zpos = DEFAULT_ZPOS;
388 crtc = &exynos_crtc->drm_crtc;
390 private->crtc[nr] = crtc;
392 drm_crtc_init(dev, crtc, &exynos_crtc_funcs);
393 drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
395 return 0;
398 int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc)
400 struct exynos_drm_private *private = dev->dev_private;
401 struct exynos_drm_crtc *exynos_crtc =
402 to_exynos_crtc(private->crtc[crtc]);
404 DRM_DEBUG_KMS("%s\n", __FILE__);
406 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
407 return -EPERM;
409 exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
410 exynos_drm_enable_vblank);
412 return 0;
415 void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc)
417 struct exynos_drm_private *private = dev->dev_private;
418 struct exynos_drm_crtc *exynos_crtc =
419 to_exynos_crtc(private->crtc[crtc]);
421 DRM_DEBUG_KMS("%s\n", __FILE__);
423 if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
424 return;
426 exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
427 exynos_drm_disable_vblank);
430 MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
431 MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
432 MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
433 MODULE_DESCRIPTION("Samsung SoC DRM CRTC Driver");
434 MODULE_LICENSE("GPL");