drivers/gpu/drm/nouveau/nv50_sor.c

   1 /*
   2  * Copyright (C) 2008 Maarten Maathuis.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "drmP.h"
  28 #include "drm_crtc_helper.h"
  29
  30 #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  31 #include "nouveau_reg.h"
  32 #include "nouveau_drv.h"
  33 #include "nouveau_dma.h"
  34 #include "nouveau_encoder.h"
  35 #include "nouveau_connector.h"
  36 #include "nouveau_crtc.h"
  37 #include "nv50_display.h"
  38
  39 static void
  40 nv50_sor_disconnect(struct drm_encoder *encoder)
  41 {
  42         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  43         struct drm_device *dev = encoder->dev;
  44         struct nouveau_channel *evo = nv50_display(dev)->master;
  45         int ret;
  46
  47         if (!nv_encoder->crtc)
  48                 return;
  49         nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
  50
  51         NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
  52
  53         ret = RING_SPACE(evo, 4);
  54         if (ret) {
  55                 NV_ERROR(dev, "no space while disconnecting SOR\n");
  56                 return;
  57         }
  58         BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  59         OUT_RING  (evo, 0);
  60         BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
  61         OUT_RING  (evo, 0);
  62
  63         nouveau_hdmi_mode_set(encoder, NULL);
  64
  65         nv_encoder->crtc = NULL;
  66         nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  67 }
  68
  69 static void
  70 nv50_sor_dpms(struct drm_encoder *encoder, int mode)
  71 {
  72         struct drm_device *dev = encoder->dev;
  73         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  74         struct drm_encoder *enc;
  75         uint32_t val;
  76         int or = nv_encoder->or;
  77
  78         NV_DEBUG_KMS(dev, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
  79
  80         nv_encoder->last_dpms = mode;
  81         list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
  82                 struct nouveau_encoder *nvenc = nouveau_encoder(enc);
  83
  84                 if (nvenc == nv_encoder ||
  85                     (nvenc->dcb->type != OUTPUT_TMDS &&
  86                      nvenc->dcb->type != OUTPUT_LVDS &&
  87                      nvenc->dcb->type != OUTPUT_DP) ||
  88                     nvenc->dcb->or != nv_encoder->dcb->or)
  89                         continue;
  90
  91                 if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
  92                         return;
  93         }
  94
  95         /* wait for it to be done */
  96         if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or),
  97                      NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
  98                 NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
  99                 NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
 100                          nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
 101         }
 102
 103         val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
 104
 105         if (mode == DRM_MODE_DPMS_ON)
 106                 val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
 107         else
 108                 val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
 109
 110         nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
 111                 NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
 112         if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or),
 113                      NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
 114                 NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
 115                 NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
 116                          nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
 117         }
 118
 119         if (nv_encoder->dcb->type == OUTPUT_DP) {
 120                 struct nouveau_i2c_chan *auxch;
 121
 122                 auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
 123                 if (!auxch)
 124                         return;
 125
 126                 if (mode == DRM_MODE_DPMS_ON) {
 127                         u8 status = DP_SET_POWER_D0;
 128                         nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
 129                         nouveau_dp_link_train(encoder, nv_encoder->dp.datarate);
 130                 } else {
 131                         u8 status = DP_SET_POWER_D3;
 132                         nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
 133                 }
 134         }
 135 }
 136
 137 static void
 138 nv50_sor_save(struct drm_encoder *encoder)
 139 {
 140         NV_ERROR(encoder->dev, "!!\n");
 141 }
 142
 143 static void
 144 nv50_sor_restore(struct drm_encoder *encoder)
 145 {
 146         NV_ERROR(encoder->dev, "!!\n");
 147 }
 148
 149 static bool
 150 nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
 151                     struct drm_display_mode *adjusted_mode)
 152 {
 153         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 154         struct nouveau_connector *connector;
 155
 156         NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
 157
 158         connector = nouveau_encoder_connector_get(nv_encoder);
 159         if (!connector) {
 160                 NV_ERROR(encoder->dev, "Encoder has no connector\n");
 161                 return false;
 162         }
 163
 164         if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
 165              connector->native_mode) {
 166                 int id = adjusted_mode->base.id;
 167                 *adjusted_mode = *connector->native_mode;
 168                 adjusted_mode->base.id = id;
 169         }
 170
 171         return true;
 172 }
 173
 174 static void
 175 nv50_sor_prepare(struct drm_encoder *encoder)
 176 {
 177         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 178         nv50_sor_disconnect(encoder);
 179         if (nv_encoder->dcb->type == OUTPUT_DP) {
 180                 /* avoid race between link training and supervisor intr */
 181                 nv50_display_sync(encoder->dev);
 182         }
 183 }
 184
 185 static void
 186 nv50_sor_commit(struct drm_encoder *encoder)
 187 {
 188 }
 189
 190 static void
 191 nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
 192                   struct drm_display_mode *mode)
 193 {
 194         struct nouveau_channel *evo = nv50_display(encoder->dev)->master;
 195         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 196         struct drm_device *dev = encoder->dev;
 197         struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
 198         struct nouveau_connector *nv_connector;
 199         uint32_t mode_ctl = 0;
 200         int ret;
 201
 202         NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d\n",
 203                      nv_encoder->or, nv_encoder->dcb->type, crtc->index);
 204         nv_encoder->crtc = encoder->crtc;
 205
 206         switch (nv_encoder->dcb->type) {
 207         case OUTPUT_TMDS:
 208                 if (nv_encoder->dcb->sorconf.link & 1) {
 209                         if (mode->clock < 165000)
 210                                 mode_ctl = 0x0100;
 211                         else
 212                                 mode_ctl = 0x0500;
 213                 } else
 214                         mode_ctl = 0x0200;
 215
 216                 nouveau_hdmi_mode_set(encoder, mode);
 217                 break;
 218         case OUTPUT_DP:
 219                 nv_connector = nouveau_encoder_connector_get(nv_encoder);
 220                 if (nv_connector && nv_connector->base.display_info.bpc == 6) {
 221                         nv_encoder->dp.datarate = mode->clock * 18 / 8;
 222                         mode_ctl |= 0x00020000;
 223                 } else {
 224                         nv_encoder->dp.datarate = mode->clock * 24 / 8;
 225                         mode_ctl |= 0x00050000;
 226                 }
 227
 228                 if (nv_encoder->dcb->sorconf.link & 1)
 229                         mode_ctl |= 0x00000800;
 230                 else
 231                         mode_ctl |= 0x00000900;
 232                 break;
 233         default:
 234                 break;
 235         }
 236
 237         if (crtc->index == 1)
 238                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
 239         else
 240                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
 241
 242         if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 243                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
 244
 245         if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 246                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
 247
 248         nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
 249
 250         ret = RING_SPACE(evo, 2);
 251         if (ret) {
 252                 NV_ERROR(dev, "no space while connecting SOR\n");
 253                 nv_encoder->crtc = NULL;
 254                 return;
 255         }
 256         BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
 257         OUT_RING(evo, mode_ctl);
 258 }
 259
 260 static struct drm_crtc *
 261 nv50_sor_crtc_get(struct drm_encoder *encoder)
 262 {
 263         return nouveau_encoder(encoder)->crtc;
 264 }
 265
 266 static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
 267         .dpms = nv50_sor_dpms,
 268         .save = nv50_sor_save,
 269         .restore = nv50_sor_restore,
 270         .mode_fixup = nv50_sor_mode_fixup,
 271         .prepare = nv50_sor_prepare,
 272         .commit = nv50_sor_commit,
 273         .mode_set = nv50_sor_mode_set,
 274         .get_crtc = nv50_sor_crtc_get,
 275         .detect = NULL,
 276         .disable = nv50_sor_disconnect
 277 };
 278
 279 static void
 280 nv50_sor_destroy(struct drm_encoder *encoder)
 281 {
 282         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 283
 284         if (!encoder)
 285                 return;
 286
 287         NV_DEBUG_KMS(encoder->dev, "\n");
 288
 289         drm_encoder_cleanup(encoder);
 290
 291         kfree(nv_encoder);
 292 }
 293
 294 static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
 295         .destroy = nv50_sor_destroy,
 296 };
 297
 298 int
 299 nv50_sor_create(struct drm_connector *connector, struct dcb_entry *entry)
 300 {
 301         struct nouveau_encoder *nv_encoder = NULL;
 302         struct drm_device *dev = connector->dev;
 303         struct drm_encoder *encoder;
 304         int type;
 305
 306         NV_DEBUG_KMS(dev, "\n");
 307
 308         switch (entry->type) {
 309         case OUTPUT_TMDS:
 310         case OUTPUT_DP:
 311                 type = DRM_MODE_ENCODER_TMDS;
 312                 break;
 313         case OUTPUT_LVDS:
 314                 type = DRM_MODE_ENCODER_LVDS;
 315                 break;
 316         default:
 317                 return -EINVAL;
 318         }
 319
 320         nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
 321         if (!nv_encoder)
 322                 return -ENOMEM;
 323         encoder = to_drm_encoder(nv_encoder);
 324
 325         nv_encoder->dcb = entry;
 326         nv_encoder->or = ffs(entry->or) - 1;
 327         nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
 328
 329         drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
 330         drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
 331
 332         encoder->possible_crtcs = entry->heads;
 333         encoder->possible_clones = 0;
 334
 335         drm_mode_connector_attach_encoder(connector, encoder);
 336         return 0;
 337 }