drivers/infiniband/hw/nes/nes.h

   1 /*
   2  * Copyright (c) 2006 - 2011 Intel Corporation.  All rights reserved.
   3  * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef __NES_H
  35 #define __NES_H
  36
  37 #include <linux/netdevice.h>
  38 #include <linux/inetdevice.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/kernel.h>
  41 #include <linux/delay.h>
  42 #include <linux/pci.h>
  43 #include <linux/dma-mapping.h>
  44 #include <linux/workqueue.h>
  45 #include <linux/slab.h>
  46 #include <asm/io.h>
  47 #include <linux/crc32c.h>
  48
  49 #include <rdma/ib_smi.h>
  50 #include <rdma/ib_verbs.h>
  51 #include <rdma/ib_pack.h>
  52 #include <rdma/rdma_cm.h>
  53 #include <rdma/iw_cm.h>
  54
  55 #define NES_SEND_FIRST_WRITE
  56
  57 #define QUEUE_DISCONNECTS
  58
  59 #define DRV_NAME    "iw_nes"
  60 #define DRV_VERSION "1.5.0.0"
  61 #define PFX         DRV_NAME ": "
  62
  63 /*
  64  * NetEffect PCI vendor id and NE010 PCI device id.
  65  */
  66 #ifndef PCI_VENDOR_ID_NETEFFECT /* not in pci.ids yet */
  67 #define PCI_VENDOR_ID_NETEFFECT          0x1678
  68 #define PCI_DEVICE_ID_NETEFFECT_NE020    0x0100
  69 #define PCI_DEVICE_ID_NETEFFECT_NE020_KR 0x0110
  70 #endif
  71
  72 #define NE020_REV   4
  73 #define NE020_REV1  5
  74
  75 #define BAR_0       0
  76 #define BAR_1       2
  77
  78 #define RX_BUF_SIZE             (1536 + 8)
  79 #define NES_REG0_SIZE           (4 * 1024)
  80 #define NES_TX_TIMEOUT          (6*HZ)
  81 #define NES_FIRST_QPN           64
  82 #define NES_SW_CONTEXT_ALIGN    1024
  83
  84 #define NES_NIC_MAX_NICS        16
  85 #define NES_MAX_ARP_TABLE_SIZE  4096
  86
  87 #define NES_NIC_CEQ_SIZE        8
  88 /* NICs will be on a separate CQ */
  89 #define NES_CCEQ_SIZE ((nesadapter->max_cq / nesadapter->port_count) - 32)
  90
  91 #define NES_MAX_PORT_COUNT 4
  92
  93 #define MAX_DPC_ITERATIONS               128
  94
  95 #define NES_DRV_OPT_ENABLE_MPA_VER_0     0x00000001
  96 #define NES_DRV_OPT_DISABLE_MPA_CRC      0x00000002
  97 #define NES_DRV_OPT_DISABLE_FIRST_WRITE  0x00000004
  98 #define NES_DRV_OPT_DISABLE_INTF         0x00000008
  99 #define NES_DRV_OPT_ENABLE_MSI           0x00000010
 100 #define NES_DRV_OPT_DUAL_LOGICAL_PORT    0x00000020
 101 #define NES_DRV_OPT_SUPRESS_OPTION_BC    0x00000040
 102 #define NES_DRV_OPT_NO_INLINE_DATA       0x00000080
 103 #define NES_DRV_OPT_DISABLE_INT_MOD      0x00000100
 104 #define NES_DRV_OPT_DISABLE_VIRT_WQ      0x00000200
 105 #define NES_DRV_OPT_ENABLE_PAU           0x00000400
 106
 107 #define NES_AEQ_EVENT_TIMEOUT         2500
 108 #define NES_DISCONNECT_EVENT_TIMEOUT  2000
 109
 110 /* debug levels */
 111 /* must match userspace */
 112 #define NES_DBG_HW          0x00000001
 113 #define NES_DBG_INIT        0x00000002
 114 #define NES_DBG_ISR         0x00000004
 115 #define NES_DBG_PHY         0x00000008
 116 #define NES_DBG_NETDEV      0x00000010
 117 #define NES_DBG_CM          0x00000020
 118 #define NES_DBG_CM1         0x00000040
 119 #define NES_DBG_NIC_RX      0x00000080
 120 #define NES_DBG_NIC_TX      0x00000100
 121 #define NES_DBG_CQP         0x00000200
 122 #define NES_DBG_MMAP        0x00000400
 123 #define NES_DBG_MR          0x00000800
 124 #define NES_DBG_PD          0x00001000
 125 #define NES_DBG_CQ          0x00002000
 126 #define NES_DBG_QP          0x00004000
 127 #define NES_DBG_MOD_QP      0x00008000
 128 #define NES_DBG_AEQ         0x00010000
 129 #define NES_DBG_IW_RX       0x00020000
 130 #define NES_DBG_IW_TX       0x00040000
 131 #define NES_DBG_SHUTDOWN    0x00080000
 132 #define NES_DBG_PAU         0x00100000
 133 #define NES_DBG_RSVD1       0x10000000
 134 #define NES_DBG_RSVD2       0x20000000
 135 #define NES_DBG_RSVD3       0x40000000
 136 #define NES_DBG_RSVD4       0x80000000
 137 #define NES_DBG_ALL         0xffffffff
 138
 139 #ifdef CONFIG_INFINIBAND_NES_DEBUG
 140 #define nes_debug(level, fmt, args...) \
 141 do { \
 142         if (level & nes_debug_level) \
 143                 printk(KERN_ERR PFX "%s[%u]: " fmt, __func__, __LINE__, ##args); \
 144 } while (0)
 145
 146 #define assert(expr) \
 147 do { \
 148         if (!(expr)) { \
 149                 printk(KERN_ERR PFX "Assertion failed! %s, %s, %s, line %d\n", \
 150                            #expr, __FILE__, __func__, __LINE__); \
 151         } \
 152 } while (0)
 153
 154 #define NES_EVENT_TIMEOUT   1200000
 155 #else
 156 #define nes_debug(level, fmt, args...)
 157 #define assert(expr)          do {} while (0)
 158
 159 #define NES_EVENT_TIMEOUT   100000
 160 #endif
 161
 162 #include "nes_hw.h"
 163 #include "nes_verbs.h"
 164 #include "nes_context.h"
 165 #include "nes_user.h"
 166 #include "nes_cm.h"
 167 #include "nes_mgt.h"
 168
 169 extern int max_mtu;
 170 #define max_frame_len (max_mtu+ETH_HLEN)
 171 extern int interrupt_mod_interval;
 172 extern int nes_if_count;
 173 extern int mpa_version;
 174 extern int disable_mpa_crc;
 175 extern unsigned int send_first;
 176 extern unsigned int nes_drv_opt;
 177 extern unsigned int nes_debug_level;
 178 extern unsigned int wqm_quanta;
 179 extern struct list_head nes_adapter_list;
 180
 181 extern atomic_t cm_connects;
 182 extern atomic_t cm_accepts;
 183 extern atomic_t cm_disconnects;
 184 extern atomic_t cm_closes;
 185 extern atomic_t cm_connecteds;
 186 extern atomic_t cm_connect_reqs;
 187 extern atomic_t cm_rejects;
 188 extern atomic_t mod_qp_timouts;
 189 extern atomic_t qps_created;
 190 extern atomic_t qps_destroyed;
 191 extern atomic_t sw_qps_destroyed;
 192 extern u32 mh_detected;
 193 extern u32 mh_pauses_sent;
 194 extern u32 cm_packets_sent;
 195 extern u32 cm_packets_bounced;
 196 extern u32 cm_packets_created;
 197 extern u32 cm_packets_received;
 198 extern u32 cm_packets_dropped;
 199 extern u32 cm_packets_retrans;
 200 extern atomic_t cm_listens_created;
 201 extern atomic_t cm_listens_destroyed;
 202 extern u32 cm_backlog_drops;
 203 extern atomic_t cm_loopbacks;
 204 extern atomic_t cm_nodes_created;
 205 extern atomic_t cm_nodes_destroyed;
 206 extern atomic_t cm_accel_dropped_pkts;
 207 extern atomic_t cm_resets_recvd;
 208 extern atomic_t pau_qps_created;
 209 extern atomic_t pau_qps_destroyed;
 210
 211 extern u32 int_mod_timer_init;
 212 extern u32 int_mod_cq_depth_256;
 213 extern u32 int_mod_cq_depth_128;
 214 extern u32 int_mod_cq_depth_32;
 215 extern u32 int_mod_cq_depth_24;
 216 extern u32 int_mod_cq_depth_16;
 217 extern u32 int_mod_cq_depth_4;
 218 extern u32 int_mod_cq_depth_1;
 219
 220 struct nes_device {
 221         struct nes_adapter         *nesadapter;
 222         void __iomem           *regs;
 223         void __iomem           *index_reg;
 224         struct pci_dev         *pcidev;
 225         struct net_device      *netdev[NES_NIC_MAX_NICS];
 226         u64                    link_status_interrupts;
 227         struct tasklet_struct  dpc_tasklet;
 228         spinlock_t             indexed_regs_lock;
 229         unsigned long          csr_start;
 230         unsigned long          doorbell_region;
 231         unsigned long          doorbell_start;
 232         unsigned long          mac_tx_errors;
 233         unsigned long          mac_pause_frames_sent;
 234         unsigned long          mac_pause_frames_received;
 235         unsigned long          mac_rx_errors;
 236         unsigned long          mac_rx_crc_errors;
 237         unsigned long          mac_rx_symbol_err_frames;
 238         unsigned long          mac_rx_jabber_frames;
 239         unsigned long          mac_rx_oversized_frames;
 240         unsigned long          mac_rx_short_frames;
 241         unsigned long          port_rx_discards;
 242         unsigned long          port_tx_discards;
 243         unsigned int           mac_index;
 244         unsigned int           nes_stack_start;
 245
 246         /* Control Structures */
 247         void                   *cqp_vbase;
 248         dma_addr_t             cqp_pbase;
 249         u32                    cqp_mem_size;
 250         u8                     ceq_index;
 251         u8                     nic_ceq_index;
 252         struct nes_hw_cqp      cqp;
 253         struct nes_hw_cq       ccq;
 254         struct list_head       cqp_avail_reqs;
 255         struct list_head       cqp_pending_reqs;
 256         struct nes_cqp_request *nes_cqp_requests;
 257
 258         u32                    int_req;
 259         u32                    int_stat;
 260         u32                    timer_int_req;
 261         u32                    timer_only_int_count;
 262         u32                    intf_int_req;
 263         u32                    last_mac_tx_pauses;
 264         u32                    last_used_chunks_tx;
 265         struct list_head       list;
 266
 267         u16                    base_doorbell_index;
 268         u16                    currcq_count;
 269         u16                    deepcq_count;
 270         u8                     iw_status;
 271         u8                     msi_enabled;
 272         u8                     netdev_count;
 273         u8                     napi_isr_ran;
 274         u8                     disable_rx_flow_control;
 275         u8                     disable_tx_flow_control;
 276
 277         struct delayed_work    work;
 278         u8                     link_recheck;
 279 };
 280
 281 /* Receive skb private area - must fit in skb->cb area */
 282 struct nes_rskb_cb {
 283         u64                    busaddr;
 284         u32                    maplen;
 285         u32                    seqnum;
 286         u8                     *data_start;
 287         struct nes_qp          *nesqp;
 288 };
 289
 290 static inline __le32 get_crc_value(struct nes_v4_quad *nes_quad)
 291 {
 292         u32 crc_value;
 293         crc_value = crc32c(~0, (void *)nes_quad, sizeof (struct nes_v4_quad));
 294
 295         /*
 296          * With commit ef19454b ("[LIB] crc32c: Keep intermediate crc
 297          * state in cpu order"), behavior of crc32c changes on
 298          * big-endian platforms.  Our algorithm expects the previous
 299          * behavior; otherwise we have RDMA connection establishment
 300          * issue on big-endian.
 301          */
 302         return cpu_to_le32(crc_value);
 303 }
 304
 305 static inline void
 306 set_wqe_64bit_value(__le32 *wqe_words, u32 index, u64 value)
 307 {
 308         wqe_words[index]     = cpu_to_le32((u32) value);
 309         wqe_words[index + 1] = cpu_to_le32(upper_32_bits(value));
 310 }
 311
 312 static inline void
 313 set_wqe_32bit_value(__le32 *wqe_words, u32 index, u32 value)
 314 {
 315         wqe_words[index] = cpu_to_le32(value);
 316 }
 317
 318 static inline void
 319 nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev)
 320 {
 321         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_LOW_IDX]       = 0;
 322         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_HIGH_IDX]      = 0;
 323         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]   = 0;
 324         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]  = 0;
 325         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
 326         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_LEN_IDX]       = 0;
 327         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_LOW_IDX]       = 0;
 328         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_LOW_IDX]        = 0;
 329         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_HIGH_IDX]       = 0;
 330 }
 331
 332 static inline void
 333 nes_fill_init_qp_wqe(struct nes_hw_qp_wqe *wqe, struct nes_qp *nesqp, u32 head)
 334 {
 335         u32 value;
 336         value = ((u32)((unsigned long) nesqp)) | head;
 337         set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX,
 338                         (u32)(upper_32_bits((unsigned long)(nesqp))));
 339         set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, value);
 340 }
 341
 342 /* Read from memory-mapped device */
 343 static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index)
 344 {
 345         unsigned long flags;
 346         void __iomem *addr = nesdev->index_reg;
 347         u32 value;
 348
 349         spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 350
 351         writel(reg_index, addr);
 352         value = readl((void __iomem *)addr + 4);
 353
 354         spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 355         return value;
 356 }
 357
 358 static inline u32 nes_read32(const void __iomem *addr)
 359 {
 360         return readl(addr);
 361 }
 362
 363 static inline u16 nes_read16(const void __iomem *addr)
 364 {
 365         return readw(addr);
 366 }
 367
 368 static inline u8 nes_read8(const void __iomem *addr)
 369 {
 370         return readb(addr);
 371 }
 372
 373 /* Write to memory-mapped device */
 374 static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val)
 375 {
 376         unsigned long flags;
 377         void __iomem *addr = nesdev->index_reg;
 378
 379         spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 380
 381         writel(reg_index, addr);
 382         writel(val, (void __iomem *)addr + 4);
 383
 384         spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 385 }
 386
 387 static inline void nes_write32(void __iomem *addr, u32 val)
 388 {
 389         writel(val, addr);
 390 }
 391
 392 static inline void nes_write16(void __iomem *addr, u16 val)
 393 {
 394         writew(val, addr);
 395 }
 396
 397 static inline void nes_write8(void __iomem *addr, u8 val)
 398 {
 399         writeb(val, addr);
 400 }
 401
 402
 403
 404 static inline int nes_alloc_resource(struct nes_adapter *nesadapter,
 405                 unsigned long *resource_array, u32 max_resources,
 406                 u32 *req_resource_num, u32 *next)
 407 {
 408         unsigned long flags;
 409         u32 resource_num;
 410
 411         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 412
 413         resource_num = find_next_zero_bit(resource_array, max_resources, *next);
 414         if (resource_num >= max_resources) {
 415                 resource_num = find_first_zero_bit(resource_array, max_resources);
 416                 if (resource_num >= max_resources) {
 417                         printk(KERN_ERR PFX "%s: No available resourcess.\n", __func__);
 418                         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 419                         return -EMFILE;
 420                 }
 421         }
 422         set_bit(resource_num, resource_array);
 423         *next = resource_num+1;
 424         if (*next == max_resources) {
 425                 *next = 0;
 426         }
 427         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 428         *req_resource_num = resource_num;
 429
 430         return 0;
 431 }
 432
 433 static inline int nes_is_resource_allocated(struct nes_adapter *nesadapter,
 434                 unsigned long *resource_array, u32 resource_num)
 435 {
 436         unsigned long flags;
 437         int bit_is_set;
 438
 439         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 440
 441         bit_is_set = test_bit(resource_num, resource_array);
 442         nes_debug(NES_DBG_HW, "resource_num %u is%s allocated.\n",
 443                         resource_num, (bit_is_set ? "": " not"));
 444         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 445
 446         return bit_is_set;
 447 }
 448
 449 static inline void nes_free_resource(struct nes_adapter *nesadapter,
 450                 unsigned long *resource_array, u32 resource_num)
 451 {
 452         unsigned long flags;
 453
 454         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 455         clear_bit(resource_num, resource_array);
 456         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 457 }
 458
 459 static inline struct nes_vnic *to_nesvnic(struct ib_device *ibdev)
 460 {
 461         return container_of(ibdev, struct nes_ib_device, ibdev)->nesvnic;
 462 }
 463
 464 static inline struct nes_pd *to_nespd(struct ib_pd *ibpd)
 465 {
 466         return container_of(ibpd, struct nes_pd, ibpd);
 467 }
 468
 469 static inline struct nes_ucontext *to_nesucontext(struct ib_ucontext *ibucontext)
 470 {
 471         return container_of(ibucontext, struct nes_ucontext, ibucontext);
 472 }
 473
 474 static inline struct nes_mr *to_nesmr(struct ib_mr *ibmr)
 475 {
 476         return container_of(ibmr, struct nes_mr, ibmr);
 477 }
 478
 479 static inline struct nes_mr *to_nesmr_from_ibfmr(struct ib_fmr *ibfmr)
 480 {
 481         return container_of(ibfmr, struct nes_mr, ibfmr);
 482 }
 483
 484 static inline struct nes_mr *to_nesmw(struct ib_mw *ibmw)
 485 {
 486         return container_of(ibmw, struct nes_mr, ibmw);
 487 }
 488
 489 static inline struct nes_fmr *to_nesfmr(struct nes_mr *nesmr)
 490 {
 491         return container_of(nesmr, struct nes_fmr, nesmr);
 492 }
 493
 494 static inline struct nes_cq *to_nescq(struct ib_cq *ibcq)
 495 {
 496         return container_of(ibcq, struct nes_cq, ibcq);
 497 }
 498
 499 static inline struct nes_qp *to_nesqp(struct ib_qp *ibqp)
 500 {
 501         return container_of(ibqp, struct nes_qp, ibqp);
 502 }
 503
 504
 505
 506 /* nes.c */
 507 void nes_add_ref(struct ib_qp *);
 508 void nes_rem_ref(struct ib_qp *);
 509 struct ib_qp *nes_get_qp(struct ib_device *, int);
 510
 511
 512 /* nes_hw.c */
 513 struct nes_adapter *nes_init_adapter(struct nes_device *, u8);
 514 void  nes_nic_init_timer_defaults(struct nes_device *, u8);
 515 void nes_destroy_adapter(struct nes_adapter *);
 516 int nes_init_cqp(struct nes_device *);
 517 int nes_init_phy(struct nes_device *);
 518 int nes_init_nic_qp(struct nes_device *, struct net_device *);
 519 void nes_destroy_nic_qp(struct nes_vnic *);
 520 int nes_napi_isr(struct nes_device *);
 521 void nes_dpc(unsigned long);
 522 void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
 523 void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
 524 int nes_destroy_cqp(struct nes_device *);
 525 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 526 void nes_recheck_link_status(struct work_struct *work);
 527
 528 /* nes_nic.c */
 529 struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
 530 void nes_netdev_destroy(struct net_device *);
 531 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 532
 533 /* nes_cm.c */
 534 void *nes_cm_create(struct net_device *);
 535 int nes_cm_recv(struct sk_buff *, struct net_device *);
 536 void nes_update_arp(unsigned char *, u32, u32, u16, u16);
 537 void nes_manage_arp_cache(struct net_device *, unsigned char *, u32, u32);
 538 void nes_sock_release(struct nes_qp *, unsigned long *);
 539 void flush_wqes(struct nes_device *nesdev, struct nes_qp *, u32, u32);
 540 int nes_manage_apbvt(struct nes_vnic *, u32, u32, u32);
 541 int nes_cm_disconn(struct nes_qp *);
 542 void nes_cm_disconn_worker(void *);
 543
 544 /* nes_verbs.c */
 545 int nes_hw_modify_qp(struct nes_device *, struct nes_qp *, u32, u32, u32);
 546 int nes_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
 547 struct nes_ib_device *nes_init_ofa_device(struct net_device *);
 548 void  nes_port_ibevent(struct nes_vnic *nesvnic);
 549 void nes_destroy_ofa_device(struct nes_ib_device *);
 550 int nes_register_ofa_device(struct nes_ib_device *);
 551
 552 /* nes_util.c */
 553 int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
 554 void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
 555 void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
 556 void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16);
 557 void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16);
 558 struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
 559 void nes_free_cqp_request(struct nes_device *nesdev,
 560                           struct nes_cqp_request *cqp_request);
 561 void nes_put_cqp_request(struct nes_device *nesdev,
 562                          struct nes_cqp_request *cqp_request);
 563 void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *);
 564 int nes_arp_table(struct nes_device *, u32, u8 *, u32);
 565 void nes_mh_fix(unsigned long);
 566 void nes_clc(unsigned long);
 567 void nes_dump_mem(unsigned int, void *, int);
 568 u32 nes_crc32(u32, u32, u32, u32, u8 *, u32, u32, u32);
 569
 570 #endif  /* __NES_H */