drivers/memstick/host/r592.c

   1 /*
   2  * Copyright (C) 2010 - Maxim Levitsky
   3  * driver for Ricoh memstick readers
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/freezer.h>
  13 #include <linux/jiffies.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/pci_ids.h>
  17 #include <linux/delay.h>
  18 #include <linux/slab.h>
  19 #include <linux/kthread.h>
  20 #include <linux/sched.h>
  21 #include <linux/highmem.h>
  22 #include <asm/byteorder.h>
  23 #include <linux/swab.h>
  24 #include "r592.h"
  25
  26 static bool r592_enable_dma = 1;
  27 static int debug;
  28
  29 static const char *tpc_names[] = {
  30         "MS_TPC_READ_MG_STATUS",
  31         "MS_TPC_READ_LONG_DATA",
  32         "MS_TPC_READ_SHORT_DATA",
  33         "MS_TPC_READ_REG",
  34         "MS_TPC_READ_QUAD_DATA",
  35         "INVALID",
  36         "MS_TPC_GET_INT",
  37         "MS_TPC_SET_RW_REG_ADRS",
  38         "MS_TPC_EX_SET_CMD",
  39         "MS_TPC_WRITE_QUAD_DATA",
  40         "MS_TPC_WRITE_REG",
  41         "MS_TPC_WRITE_SHORT_DATA",
  42         "MS_TPC_WRITE_LONG_DATA",
  43         "MS_TPC_SET_CMD",
  44 };
  45
  46 /**
  47  * memstick_debug_get_tpc_name - debug helper that returns string for
  48  * a TPC number
  49  */
  50 const char *memstick_debug_get_tpc_name(int tpc)
  51 {
  52         return tpc_names[tpc-1];
  53 }
  54 EXPORT_SYMBOL(memstick_debug_get_tpc_name);
  55
  56
  57 /* Read a register*/
  58 static inline u32 r592_read_reg(struct r592_device *dev, int address)
  59 {
  60         u32 value = readl(dev->mmio + address);
  61         dbg_reg("reg #%02d == 0x%08x", address, value);
  62         return value;
  63 }
  64
  65 /* Write a register */
  66 static inline void r592_write_reg(struct r592_device *dev,
  67                                                         int address, u32 value)
  68 {
  69         dbg_reg("reg #%02d <- 0x%08x", address, value);
  70         writel(value, dev->mmio + address);
  71 }
  72
  73 /* Reads a big endian DWORD register */
  74 static inline u32 r592_read_reg_raw_be(struct r592_device *dev, int address)
  75 {
  76         u32 value = __raw_readl(dev->mmio + address);
  77         dbg_reg("reg #%02d == 0x%08x", address, value);
  78         return be32_to_cpu(value);
  79 }
  80
  81 /* Writes a big endian DWORD register */
  82 static inline void r592_write_reg_raw_be(struct r592_device *dev,
  83                                                         int address, u32 value)
  84 {
  85         dbg_reg("reg #%02d <- 0x%08x", address, value);
  86         __raw_writel(cpu_to_be32(value), dev->mmio + address);
  87 }
  88
  89 /* Set specific bits in a register (little endian) */
  90 static inline void r592_set_reg_mask(struct r592_device *dev,
  91                                                         int address, u32 mask)
  92 {
  93         u32 reg = readl(dev->mmio + address);
  94         dbg_reg("reg #%02d |= 0x%08x (old =0x%08x)", address, mask, reg);
  95         writel(reg | mask , dev->mmio + address);
  96 }
  97
  98 /* Clear specific bits in a register (little endian) */
  99 static inline void r592_clear_reg_mask(struct r592_device *dev,
 100                                                 int address, u32 mask)
 101 {
 102         u32 reg = readl(dev->mmio + address);
 103         dbg_reg("reg #%02d &= 0x%08x (old = 0x%08x, mask = 0x%08x)",
 104                                                 address, ~mask, reg, mask);
 105         writel(reg & ~mask, dev->mmio + address);
 106 }
 107
 108
 109 /* Wait for status bits while checking for errors */
 110 static int r592_wait_status(struct r592_device *dev, u32 mask, u32 wanted_mask)
 111 {
 112         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 113         u32 reg = r592_read_reg(dev, R592_STATUS);
 114
 115         if ((reg & mask) == wanted_mask)
 116                 return 0;
 117
 118         while (time_before(jiffies, timeout)) {
 119
 120                 reg = r592_read_reg(dev, R592_STATUS);
 121
 122                 if ((reg & mask) == wanted_mask)
 123                         return 0;
 124
 125                 if (reg & (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR))
 126                         return -EIO;
 127
 128                 cpu_relax();
 129         }
 130         return -ETIME;
 131 }
 132
 133
 134 /* Enable/disable device */
 135 static int r592_enable_device(struct r592_device *dev, bool enable)
 136 {
 137         dbg("%sabling the device", enable ? "en" : "dis");
 138
 139         if (enable) {
 140
 141                 /* Power up the card */
 142                 r592_write_reg(dev, R592_POWER, R592_POWER_0 | R592_POWER_1);
 143
 144                 /* Perform a reset */
 145                 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
 146
 147                 msleep(100);
 148         } else
 149                 /* Power down the card */
 150                 r592_write_reg(dev, R592_POWER, 0);
 151
 152         return 0;
 153 }
 154
 155 /* Set serial/parallel mode */
 156 static int r592_set_mode(struct r592_device *dev, bool parallel_mode)
 157 {
 158         if (!parallel_mode) {
 159                 dbg("switching to serial mode");
 160
 161                 /* Set serial mode */
 162                 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL);
 163
 164                 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20);
 165
 166         } else {
 167                 dbg("switching to parallel mode");
 168
 169                 /* This setting should be set _before_ switch TPC */
 170                 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20);
 171
 172                 r592_clear_reg_mask(dev, R592_IO,
 173                         R592_IO_SERIAL1 | R592_IO_SERIAL2);
 174
 175                 /* Set the parallel mode now */
 176                 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL);
 177         }
 178
 179         dev->parallel_mode = parallel_mode;
 180         return 0;
 181 }
 182
 183 /* Perform a controller reset without powering down the card */
 184 static void r592_host_reset(struct r592_device *dev)
 185 {
 186         r592_set_reg_mask(dev, R592_IO, R592_IO_RESET);
 187         msleep(100);
 188         r592_set_mode(dev, dev->parallel_mode);
 189 }
 190
 191 /* Disable all hardware interrupts */
 192 static void r592_clear_interrupts(struct r592_device *dev)
 193 {
 194         /* Disable & ACK all interrupts */
 195         r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK);
 196         r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK);
 197 }
 198
 199 /* Tests if there is an CRC error */
 200 static int r592_test_io_error(struct r592_device *dev)
 201 {
 202         if (!(r592_read_reg(dev, R592_STATUS) &
 203                 (R592_STATUS_SEND_ERR | R592_STATUS_RECV_ERR)))
 204                 return 0;
 205
 206         return -EIO;
 207 }
 208
 209 /* Ensure that FIFO is ready for use */
 210 static int r592_test_fifo_empty(struct r592_device *dev)
 211 {
 212         if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
 213                 return 0;
 214
 215         dbg("FIFO not ready, trying to reset the device");
 216         r592_host_reset(dev);
 217
 218         if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY)
 219                 return 0;
 220
 221         message("FIFO still not ready, giving up");
 222         return -EIO;
 223 }
 224
 225 /* Activates the DMA transfer from to FIFO */
 226 static void r592_start_dma(struct r592_device *dev, bool is_write)
 227 {
 228         unsigned long flags;
 229         u32 reg;
 230         spin_lock_irqsave(&dev->irq_lock, flags);
 231
 232         /* Ack interrupts (just in case) + enable them */
 233         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
 234         r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
 235
 236         /* Set DMA address */
 237         r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg));
 238
 239         /* Enable the DMA */
 240         reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS);
 241         reg |= R592_FIFO_DMA_SETTINGS_EN;
 242
 243         if (!is_write)
 244                 reg |= R592_FIFO_DMA_SETTINGS_DIR;
 245         else
 246                 reg &= ~R592_FIFO_DMA_SETTINGS_DIR;
 247         r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg);
 248
 249         spin_unlock_irqrestore(&dev->irq_lock, flags);
 250 }
 251
 252 /* Cleanups DMA related settings */
 253 static void r592_stop_dma(struct r592_device *dev, int error)
 254 {
 255         r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS,
 256                 R592_FIFO_DMA_SETTINGS_EN);
 257
 258         /* This is only a precation */
 259         r592_write_reg(dev, R592_FIFO_DMA,
 260                         dev->dummy_dma_page_physical_address);
 261
 262         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK);
 263         r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK);
 264         dev->dma_error = error;
 265 }
 266
 267 /* Test if hardware supports DMA */
 268 static void r592_check_dma(struct r592_device *dev)
 269 {
 270         dev->dma_capable = r592_enable_dma &&
 271                 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) &
 272                         R592_FIFO_DMA_SETTINGS_CAP);
 273 }
 274
 275 /* Transfers fifo contents in/out using DMA */
 276 static int r592_transfer_fifo_dma(struct r592_device *dev)
 277 {
 278         int len, sg_count;
 279         bool is_write;
 280
 281         if (!dev->dma_capable || !dev->req->long_data)
 282                 return -EINVAL;
 283
 284         len = dev->req->sg.length;
 285         is_write = dev->req->data_dir == WRITE;
 286
 287         if (len != R592_LFIFO_SIZE)
 288                 return -EINVAL;
 289
 290         dbg_verbose("doing dma transfer");
 291
 292         dev->dma_error = 0;
 293         INIT_COMPLETION(dev->dma_done);
 294
 295         /* TODO: hidden assumption about nenth beeing always 1 */
 296         sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
 297                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 298
 299         if (sg_count != 1 ||
 300                         (sg_dma_len(&dev->req->sg) < dev->req->sg.length)) {
 301                 message("problem in dma_map_sg");
 302                 return -EIO;
 303         }
 304
 305         r592_start_dma(dev, is_write);
 306
 307         /* Wait for DMA completion */
 308         if (!wait_for_completion_timeout(
 309                         &dev->dma_done, msecs_to_jiffies(1000))) {
 310                 message("DMA timeout");
 311                 r592_stop_dma(dev, -ETIMEDOUT);
 312         }
 313
 314         dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ?
 315                 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
 316
 317
 318         return dev->dma_error;
 319 }
 320
 321 /*
 322  * Writes the FIFO in 4 byte chunks.
 323  * If length isn't 4 byte aligned, rest of the data if put to a fifo
 324  * to be written later
 325  * Use r592_flush_fifo_write to flush that fifo when writing for the
 326  * last time
 327  */
 328 static void r592_write_fifo_pio(struct r592_device *dev,
 329                                         unsigned char *buffer, int len)
 330 {
 331         /* flush spill from former write */
 332         if (!kfifo_is_empty(&dev->pio_fifo)) {
 333
 334                 u8 tmp[4] = {0};
 335                 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len);
 336
 337                 if (!kfifo_is_full(&dev->pio_fifo))
 338                         return;
 339                 len -= copy_len;
 340                 buffer += copy_len;
 341
 342                 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4);
 343                 WARN_ON(copy_len != 4);
 344                 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)tmp);
 345         }
 346
 347         WARN_ON(!kfifo_is_empty(&dev->pio_fifo));
 348
 349         /* write full dwords */
 350         while (len >= 4) {
 351                 r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
 352                 buffer += 4;
 353                 len -= 4;
 354         }
 355
 356         /* put remaining bytes to the spill */
 357         if (len)
 358                 kfifo_in(&dev->pio_fifo, buffer, len);
 359 }
 360
 361 /* Flushes the temporary FIFO used to make aligned DWORD writes */
 362 static void r592_flush_fifo_write(struct r592_device *dev)
 363 {
 364         u8 buffer[4] = { 0 };
 365         int len;
 366
 367         if (kfifo_is_empty(&dev->pio_fifo))
 368                 return;
 369
 370         len = kfifo_out(&dev->pio_fifo, buffer, 4);
 371         r592_write_reg_raw_be(dev, R592_FIFO_PIO, *(u32 *)buffer);
 372 }
 373
 374 /*
 375  * Read a fifo in 4 bytes chunks.
 376  * If input doesn't fit the buffer, it places bytes of last dword in spill
 377  * buffer, so that they don't get lost on last read, just throw these away.
 378  */
 379 static void r592_read_fifo_pio(struct r592_device *dev,
 380                                                 unsigned char *buffer, int len)
 381 {
 382         u8 tmp[4];
 383
 384         /* Read from last spill */
 385         if (!kfifo_is_empty(&dev->pio_fifo)) {
 386                 int bytes_copied =
 387                         kfifo_out(&dev->pio_fifo, buffer, min(4, len));
 388                 buffer += bytes_copied;
 389                 len -= bytes_copied;
 390
 391                 if (!kfifo_is_empty(&dev->pio_fifo))
 392                         return;
 393         }
 394
 395         /* Reads dwords from FIFO */
 396         while (len >= 4) {
 397                 *(u32 *)buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
 398                 buffer += 4;
 399                 len -= 4;
 400         }
 401
 402         if (len) {
 403                 *(u32 *)tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO);
 404                 kfifo_in(&dev->pio_fifo, tmp, 4);
 405                 len -= kfifo_out(&dev->pio_fifo, buffer, len);
 406         }
 407
 408         WARN_ON(len);
 409         return;
 410 }
 411
 412 /* Transfers actual data using PIO. */
 413 static int r592_transfer_fifo_pio(struct r592_device *dev)
 414 {
 415         unsigned long flags;
 416
 417         bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
 418         struct sg_mapping_iter miter;
 419
 420         kfifo_reset(&dev->pio_fifo);
 421
 422         if (!dev->req->long_data) {
 423                 if (is_write) {
 424                         r592_write_fifo_pio(dev, dev->req->data,
 425                                                         dev->req->data_len);
 426                         r592_flush_fifo_write(dev);
 427                 } else
 428                         r592_read_fifo_pio(dev, dev->req->data,
 429                                                         dev->req->data_len);
 430                 return 0;
 431         }
 432
 433         local_irq_save(flags);
 434         sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC |
 435                 (is_write ? SG_MITER_FROM_SG : SG_MITER_TO_SG));
 436
 437         /* Do the transfer fifo<->memory*/
 438         while (sg_miter_next(&miter))
 439                 if (is_write)
 440                         r592_write_fifo_pio(dev, miter.addr, miter.length);
 441                 else
 442                         r592_read_fifo_pio(dev, miter.addr, miter.length);
 443
 444
 445         /* Write last few non aligned bytes*/
 446         if (is_write)
 447                 r592_flush_fifo_write(dev);
 448
 449         sg_miter_stop(&miter);
 450         local_irq_restore(flags);
 451         return 0;
 452 }
 453
 454 /* Executes one TPC (data is read/written from small or large fifo) */
 455 static void r592_execute_tpc(struct r592_device *dev)
 456 {
 457         bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS;
 458         int len, error;
 459         u32 status, reg;
 460
 461         if (!dev->req) {
 462                 message("BUG: tpc execution without request!");
 463                 return;
 464         }
 465
 466         len = dev->req->long_data ?
 467                 dev->req->sg.length : dev->req->data_len;
 468
 469         /* Ensure that FIFO can hold the input data */
 470         if (len > R592_LFIFO_SIZE) {
 471                 message("IO: hardware doesn't support TPCs longer that 512");
 472                 error = -ENOSYS;
 473                 goto out;
 474         }
 475
 476         if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) {
 477                 dbg("IO: refusing to send TPC because card is absent");
 478                 error = -ENODEV;
 479                 goto out;
 480         }
 481
 482         dbg("IO: executing %s LEN=%d",
 483                         memstick_debug_get_tpc_name(dev->req->tpc), len);
 484
 485         /* Set IO direction */
 486         if (is_write)
 487                 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
 488         else
 489                 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION);
 490
 491
 492         error = r592_test_fifo_empty(dev);
 493         if (error)
 494                 goto out;
 495
 496         /* Transfer write data */
 497         if (is_write) {
 498                 error = r592_transfer_fifo_dma(dev);
 499                 if (error == -EINVAL)
 500                         error = r592_transfer_fifo_pio(dev);
 501         }
 502
 503         if (error)
 504                 goto out;
 505
 506         /* Trigger the TPC */
 507         reg = (len << R592_TPC_EXEC_LEN_SHIFT) |
 508                 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) |
 509                         R592_TPC_EXEC_BIG_FIFO;
 510
 511         r592_write_reg(dev, R592_TPC_EXEC, reg);
 512
 513         /* Wait for TPC completion */
 514         status = R592_STATUS_RDY;
 515         if (dev->req->need_card_int)
 516                 status |= R592_STATUS_CED;
 517
 518         error = r592_wait_status(dev, status, status);
 519         if (error) {
 520                 message("card didn't respond");
 521                 goto out;
 522         }
 523
 524         /* Test IO errors */
 525         error = r592_test_io_error(dev);
 526         if (error) {
 527                 dbg("IO error");
 528                 goto out;
 529         }
 530
 531         /* Read data from FIFO */
 532         if (!is_write) {
 533                 error = r592_transfer_fifo_dma(dev);
 534                 if (error == -EINVAL)
 535                         error = r592_transfer_fifo_pio(dev);
 536         }
 537
 538         /* read INT reg. This can be shortened with shifts, but that way
 539                 its more readable */
 540         if (dev->parallel_mode && dev->req->need_card_int) {
 541
 542                 dev->req->int_reg = 0;
 543                 status = r592_read_reg(dev, R592_STATUS);
 544
 545                 if (status & R592_STATUS_P_CMDNACK)
 546                         dev->req->int_reg |= MEMSTICK_INT_CMDNAK;
 547                 if (status & R592_STATUS_P_BREQ)
 548                         dev->req->int_reg |= MEMSTICK_INT_BREQ;
 549                 if (status & R592_STATUS_P_INTERR)
 550                         dev->req->int_reg |= MEMSTICK_INT_ERR;
 551                 if (status & R592_STATUS_P_CED)
 552                         dev->req->int_reg |= MEMSTICK_INT_CED;
 553         }
 554
 555         if (error)
 556                 dbg("FIFO read error");
 557 out:
 558         dev->req->error = error;
 559         r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED);
 560         return;
 561 }
 562
 563 /* Main request processing thread */
 564 static int r592_process_thread(void *data)
 565 {
 566         int error;
 567         struct r592_device *dev = (struct r592_device *)data;
 568         unsigned long flags;
 569
 570         while (!kthread_should_stop()) {
 571                 spin_lock_irqsave(&dev->io_thread_lock, flags);
 572                 set_current_state(TASK_INTERRUPTIBLE);
 573                 error = memstick_next_req(dev->host, &dev->req);
 574                 spin_unlock_irqrestore(&dev->io_thread_lock, flags);
 575
 576                 if (error) {
 577                         if (error == -ENXIO || error == -EAGAIN) {
 578                                 dbg_verbose("IO: done IO, sleeping");
 579                         } else {
 580                                 dbg("IO: unknown error from "
 581                                         "memstick_next_req %d", error);
 582                         }
 583
 584                         if (kthread_should_stop())
 585                                 set_current_state(TASK_RUNNING);
 586
 587                         schedule();
 588                 } else {
 589                         set_current_state(TASK_RUNNING);
 590                         r592_execute_tpc(dev);
 591                 }
 592         }
 593         return 0;
 594 }
 595
 596 /* Reprogram chip to detect change in card state */
 597 /* eg, if card is detected, arm it to detect removal, and vice versa */
 598 static void r592_update_card_detect(struct r592_device *dev)
 599 {
 600         u32 reg = r592_read_reg(dev, R592_REG_MSC);
 601         bool card_detected = reg & R592_REG_MSC_PRSNT;
 602
 603         dbg("update card detect. card state: %s", card_detected ?
 604                 "present" : "absent");
 605
 606         reg &= ~((R592_REG_MSC_IRQ_REMOVE | R592_REG_MSC_IRQ_INSERT) << 16);
 607
 608         if (card_detected)
 609                 reg |= (R592_REG_MSC_IRQ_REMOVE << 16);
 610         else
 611                 reg |= (R592_REG_MSC_IRQ_INSERT << 16);
 612
 613         r592_write_reg(dev, R592_REG_MSC, reg);
 614 }
 615
 616 /* Timer routine that fires 1 second after last card detection event, */
 617 static void r592_detect_timer(long unsigned int data)
 618 {
 619         struct r592_device *dev = (struct r592_device *)data;
 620         r592_update_card_detect(dev);
 621         memstick_detect_change(dev->host);
 622 }
 623
 624 /* Interrupt handler */
 625 static irqreturn_t r592_irq(int irq, void *data)
 626 {
 627         struct r592_device *dev = (struct r592_device *)data;
 628         irqreturn_t ret = IRQ_NONE;
 629         u32 reg;
 630         u16 irq_enable, irq_status;
 631         unsigned long flags;
 632         int error;
 633
 634         spin_lock_irqsave(&dev->irq_lock, flags);
 635
 636         reg = r592_read_reg(dev, R592_REG_MSC);
 637         irq_enable = reg >> 16;
 638         irq_status = reg & 0xFFFF;
 639
 640         /* Ack the interrupts */
 641         reg &= ~irq_status;
 642         r592_write_reg(dev, R592_REG_MSC, reg);
 643
 644         /* Get the IRQ status minus bits that aren't enabled */
 645         irq_status &= (irq_enable);
 646
 647         /* Due to limitation of memstick core, we don't look at bits that
 648                 indicate that card was removed/inserted and/or present */
 649         if (irq_status & (R592_REG_MSC_IRQ_INSERT | R592_REG_MSC_IRQ_REMOVE)) {
 650
 651                 bool card_was_added = irq_status & R592_REG_MSC_IRQ_INSERT;
 652                 ret = IRQ_HANDLED;
 653
 654                 message("IRQ: card %s", card_was_added ? "added" : "removed");
 655
 656                 mod_timer(&dev->detect_timer,
 657                         jiffies + msecs_to_jiffies(card_was_added ? 500 : 50));
 658         }
 659
 660         if (irq_status &
 661                 (R592_REG_MSC_FIFO_DMA_DONE | R592_REG_MSC_FIFO_DMA_ERR)) {
 662                 ret = IRQ_HANDLED;
 663
 664                 if (irq_status & R592_REG_MSC_FIFO_DMA_ERR) {
 665                         message("IRQ: DMA error");
 666                         error = -EIO;
 667                 } else {
 668                         dbg_verbose("IRQ: dma done");
 669                         error = 0;
 670                 }
 671
 672                 r592_stop_dma(dev, error);
 673                 complete(&dev->dma_done);
 674         }
 675
 676         spin_unlock_irqrestore(&dev->irq_lock, flags);
 677         return ret;
 678 }
 679
 680 /* External inteface: set settings */
 681 static int r592_set_param(struct memstick_host *host,
 682                         enum memstick_param param, int value)
 683 {
 684         struct r592_device *dev = memstick_priv(host);
 685
 686         switch (param) {
 687         case MEMSTICK_POWER:
 688                 switch (value) {
 689                 case MEMSTICK_POWER_ON:
 690                         return r592_enable_device(dev, true);
 691                 case MEMSTICK_POWER_OFF:
 692                         return r592_enable_device(dev, false);
 693                 default:
 694                         return -EINVAL;
 695                 }
 696         case MEMSTICK_INTERFACE:
 697                 switch (value) {
 698                 case MEMSTICK_SERIAL:
 699                         return r592_set_mode(dev, 0);
 700                 case MEMSTICK_PAR4:
 701                         return r592_set_mode(dev, 1);
 702                 default:
 703                         return -EINVAL;
 704                 }
 705         default:
 706                 return -EINVAL;
 707         }
 708 }
 709
 710 /* External interface: submit requests */
 711 static void r592_submit_req(struct memstick_host *host)
 712 {
 713         struct r592_device *dev = memstick_priv(host);
 714         unsigned long flags;
 715
 716         if (dev->req)
 717                 return;
 718
 719         spin_lock_irqsave(&dev->io_thread_lock, flags);
 720         if (wake_up_process(dev->io_thread))
 721                 dbg_verbose("IO thread woken to process requests");
 722         spin_unlock_irqrestore(&dev->io_thread_lock, flags);
 723 }
 724
 725 static const struct pci_device_id r592_pci_id_tbl[] = {
 726
 727         { PCI_VDEVICE(RICOH, 0x0592), },
 728         { },
 729 };
 730
 731 /* Main entry */
 732 static int r592_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 733 {
 734         int error = -ENOMEM;
 735         struct memstick_host *host;
 736         struct r592_device *dev;
 737
 738         /* Allocate memory */
 739         host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev);
 740         if (!host)
 741                 goto error1;
 742
 743         dev = memstick_priv(host);
 744         dev->host = host;
 745         dev->pci_dev = pdev;
 746         pci_set_drvdata(pdev, dev);
 747
 748         /* pci initialization */
 749         error = pci_enable_device(pdev);
 750         if (error)
 751                 goto error2;
 752
 753         pci_set_master(pdev);
 754         error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
 755         if (error)
 756                 goto error3;
 757
 758         error = pci_request_regions(pdev, DRV_NAME);
 759         if (error)
 760                 goto error3;
 761
 762         dev->mmio = pci_ioremap_bar(pdev, 0);
 763         if (!dev->mmio)
 764                 goto error4;
 765
 766         dev->irq = pdev->irq;
 767         spin_lock_init(&dev->irq_lock);
 768         spin_lock_init(&dev->io_thread_lock);
 769         init_completion(&dev->dma_done);
 770         INIT_KFIFO(dev->pio_fifo);
 771         setup_timer(&dev->detect_timer,
 772                 r592_detect_timer, (long unsigned int)dev);
 773
 774         /* Host initialization */
 775         host->caps = MEMSTICK_CAP_PAR4;
 776         host->request = r592_submit_req;
 777         host->set_param = r592_set_param;
 778         r592_check_dma(dev);
 779
 780         dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io");
 781         if (IS_ERR(dev->io_thread)) {
 782                 error = PTR_ERR(dev->io_thread);
 783                 goto error5;
 784         }
 785
 786         /* This is just a precation, so don't fail */
 787         dev->dummy_dma_page = pci_alloc_consistent(pdev, PAGE_SIZE,
 788                 &dev->dummy_dma_page_physical_address);
 789         r592_stop_dma(dev , 0);
 790
 791         if (request_irq(dev->irq, &r592_irq, IRQF_SHARED,
 792                           DRV_NAME, dev))
 793                 goto error6;
 794
 795         r592_update_card_detect(dev);
 796         if (memstick_add_host(host))
 797                 goto error7;
 798
 799         message("driver successfully loaded");
 800         return 0;
 801 error7:
 802         free_irq(dev->irq, dev);
 803 error6:
 804         if (dev->dummy_dma_page)
 805                 pci_free_consistent(pdev, PAGE_SIZE, dev->dummy_dma_page,
 806                         dev->dummy_dma_page_physical_address);
 807
 808         kthread_stop(dev->io_thread);
 809 error5:
 810         iounmap(dev->mmio);
 811 error4:
 812         pci_release_regions(pdev);
 813 error3:
 814         pci_disable_device(pdev);
 815 error2:
 816         memstick_free_host(host);
 817 error1:
 818         return error;
 819 }
 820
 821 static void r592_remove(struct pci_dev *pdev)
 822 {
 823         int error = 0;
 824         struct r592_device *dev = pci_get_drvdata(pdev);
 825
 826         /* Stop the processing thread.
 827         That ensures that we won't take any more requests */
 828         kthread_stop(dev->io_thread);
 829
 830         r592_enable_device(dev, false);
 831
 832         while (!error && dev->req) {
 833                 dev->req->error = -ETIME;
 834                 error = memstick_next_req(dev->host, &dev->req);
 835         }
 836         memstick_remove_host(dev->host);
 837
 838         free_irq(dev->irq, dev);
 839         iounmap(dev->mmio);
 840         pci_release_regions(pdev);
 841         pci_disable_device(pdev);
 842         memstick_free_host(dev->host);
 843
 844         if (dev->dummy_dma_page)
 845                 pci_free_consistent(pdev, PAGE_SIZE, dev->dummy_dma_page,
 846                         dev->dummy_dma_page_physical_address);
 847 }
 848
 849 #ifdef CONFIG_PM
 850 static int r592_suspend(struct device *core_dev)
 851 {
 852         struct pci_dev *pdev = to_pci_dev(core_dev);
 853         struct r592_device *dev = pci_get_drvdata(pdev);
 854
 855         r592_clear_interrupts(dev);
 856         memstick_suspend_host(dev->host);
 857         del_timer_sync(&dev->detect_timer);
 858         return 0;
 859 }
 860
 861 static int r592_resume(struct device *core_dev)
 862 {
 863         struct pci_dev *pdev = to_pci_dev(core_dev);
 864         struct r592_device *dev = pci_get_drvdata(pdev);
 865
 866         r592_clear_interrupts(dev);
 867         r592_enable_device(dev, false);
 868         memstick_resume_host(dev->host);
 869         r592_update_card_detect(dev);
 870         return 0;
 871 }
 872
 873 SIMPLE_DEV_PM_OPS(r592_pm_ops, r592_suspend, r592_resume);
 874 #endif
 875
 876 MODULE_DEVICE_TABLE(pci, r592_pci_id_tbl);
 877
 878 static struct pci_driver r852_pci_driver = {
 879         .name           = DRV_NAME,
 880         .id_table       = r592_pci_id_tbl,
 881         .probe          = r592_probe,
 882         .remove         = r592_remove,
 883 #ifdef CONFIG_PM
 884         .driver.pm      = &r592_pm_ops,
 885 #endif
 886 };
 887
 888 static __init int r592_module_init(void)
 889 {
 890         return pci_register_driver(&r852_pci_driver);
 891 }
 892
 893 static void __exit r592_module_exit(void)
 894 {
 895         pci_unregister_driver(&r852_pci_driver);
 896 }
 897
 898 module_init(r592_module_init);
 899 module_exit(r592_module_exit);
 900
 901 module_param_named(enable_dma, r592_enable_dma, bool, S_IRUGO);
 902 MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");
 903 module_param(debug, int, S_IRUGO | S_IWUSR);
 904 MODULE_PARM_DESC(debug, "Debug level (0-3)");
 905
 906 MODULE_LICENSE("GPL");
 907 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
 908 MODULE_DESCRIPTION("Ricoh R5C592 Memstick/Memstick PRO card reader driver");