2 * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
3 * Copyright (C) 2008 Markus Plessing <plessing@ems-wuensche.com>
4 * Copyright (C) 2008 Sebastian Haas <haas@ems-wuensche.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/interrupt.h>
23 #include <linux/netdevice.h>
24 #include <linux/delay.h>
25 #include <linux/slab.h>
26 #include <linux/pci.h>
27 #include <linux/can/dev.h>
32 #define DRV_NAME "ems_pci"
34 MODULE_AUTHOR("Sebastian Haas <haas@ems-wuenche.com>");
35 MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-PCI/PCIe/104P CAN cards");
36 MODULE_SUPPORTED_DEVICE("EMS CPC-PCI/PCIe/104P CAN card");
37 MODULE_LICENSE("GPL v2");
39 #define EMS_PCI_V1_MAX_CHAN 2
40 #define EMS_PCI_V2_MAX_CHAN 4
41 #define EMS_PCI_MAX_CHAN EMS_PCI_V2_MAX_CHAN
47 struct pci_dev
*pci_dev
;
48 struct net_device
*net_dev
[EMS_PCI_MAX_CHAN
];
50 void __iomem
*conf_addr
;
51 void __iomem
*base_addr
;
54 #define EMS_PCI_CAN_CLOCK (16000000 / 2)
57 * Register definitions and descriptions are from LinCAN 0.3.3.
59 * PSB4610 PITA-2 bridge control registers
61 #define PITA2_ICR 0x00 /* Interrupt Control Register */
62 #define PITA2_ICR_INT0 0x00000002 /* [RC] INT0 Active/Clear */
63 #define PITA2_ICR_INT0_EN 0x00020000 /* [RW] Enable INT0 */
65 #define PITA2_MISC 0x1c /* Miscellaneous Register */
66 #define PITA2_MISC_CONFIG 0x04000000 /* Multiplexed parallel interface */
69 * Register definitions for the PLX 9030
71 #define PLX_ICSR 0x4c /* Interrupt Control/Status register */
72 #define PLX_ICSR_LINTI1_ENA 0x0001 /* LINTi1 Enable */
73 #define PLX_ICSR_PCIINT_ENA 0x0040 /* PCI Interrupt Enable */
74 #define PLX_ICSR_LINTI1_CLR 0x0400 /* Local Edge Triggerable Interrupt Clear */
75 #define PLX_ICSR_ENA_CLR (PLX_ICSR_LINTI1_ENA | PLX_ICSR_PCIINT_ENA | \
79 * The board configuration is probably following:
80 * RX1 is connected to ground.
81 * TX1 is not connected.
82 * CLKO is not connected.
83 * Setting the OCR register to 0xDA is a good idea.
84 * This means normal output mode, push-pull and the correct polarity.
86 #define EMS_PCI_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
89 * In the CDR register, you should set CBP to 1.
90 * You will probably also want to set the clock divider value to 7
91 * (meaning direct oscillator output) because the second SJA1000 chip
92 * is driven by the first one CLKOUT output.
94 #define EMS_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
96 #define EMS_PCI_V1_BASE_BAR 1
97 #define EMS_PCI_V1_CONF_SIZE 4096 /* size of PITA control area */
98 #define EMS_PCI_V2_BASE_BAR 2
99 #define EMS_PCI_V2_CONF_SIZE 128 /* size of PLX control area */
100 #define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */
101 #define EMS_PCI_CAN_CTRL_SIZE 0x200 /* memory size for each controller */
103 #define EMS_PCI_BASE_SIZE 4096 /* size of controller area */
105 static DEFINE_PCI_DEVICE_TABLE(ems_pci_tbl
) = {
107 {PCI_VENDOR_ID_SIEMENS
, 0x2104, PCI_ANY_ID
, PCI_ANY_ID
,},
109 {PCI_VENDOR_ID_PLX
, PCI_DEVICE_ID_PLX_9030
, PCI_VENDOR_ID_PLX
, 0x4000},
111 {PCI_VENDOR_ID_PLX
, PCI_DEVICE_ID_PLX_9030
, PCI_VENDOR_ID_PLX
, 0x4002},
114 MODULE_DEVICE_TABLE(pci
, ems_pci_tbl
);
117 * Helper to read internal registers from card logic (not CAN)
119 static u8
ems_pci_v1_readb(struct ems_pci_card
*card
, unsigned int port
)
121 return readb(card
->base_addr
+ (port
* 4));
124 static u8
ems_pci_v1_read_reg(const struct sja1000_priv
*priv
, int port
)
126 return readb(priv
->reg_base
+ (port
* 4));
129 static void ems_pci_v1_write_reg(const struct sja1000_priv
*priv
,
132 writeb(val
, priv
->reg_base
+ (port
* 4));
135 static void ems_pci_v1_post_irq(const struct sja1000_priv
*priv
)
137 struct ems_pci_card
*card
= (struct ems_pci_card
*)priv
->priv
;
139 /* reset int flag of pita */
140 writel(PITA2_ICR_INT0_EN
| PITA2_ICR_INT0
,
141 card
->conf_addr
+ PITA2_ICR
);
144 static u8
ems_pci_v2_read_reg(const struct sja1000_priv
*priv
, int port
)
146 return readb(priv
->reg_base
+ port
);
149 static void ems_pci_v2_write_reg(const struct sja1000_priv
*priv
,
152 writeb(val
, priv
->reg_base
+ port
);
155 static void ems_pci_v2_post_irq(const struct sja1000_priv
*priv
)
157 struct ems_pci_card
*card
= (struct ems_pci_card
*)priv
->priv
;
159 writel(PLX_ICSR_ENA_CLR
, card
->conf_addr
+ PLX_ICSR
);
163 * Check if a CAN controller is present at the specified location
164 * by trying to set 'em into the PeliCAN mode
166 static inline int ems_pci_check_chan(const struct sja1000_priv
*priv
)
170 /* Make sure SJA1000 is in reset mode */
171 priv
->write_reg(priv
, REG_MOD
, 1);
173 priv
->write_reg(priv
, REG_CDR
, CDR_PELICAN
);
175 /* read reset-values */
176 res
= priv
->read_reg(priv
, REG_CDR
);
178 if (res
== CDR_PELICAN
)
184 static void ems_pci_del_card(struct pci_dev
*pdev
)
186 struct ems_pci_card
*card
= pci_get_drvdata(pdev
);
187 struct net_device
*dev
;
190 for (i
= 0; i
< card
->channels
; i
++) {
191 dev
= card
->net_dev
[i
];
196 dev_info(&pdev
->dev
, "Removing %s.\n", dev
->name
);
197 unregister_sja1000dev(dev
);
198 free_sja1000dev(dev
);
201 if (card
->base_addr
!= NULL
)
202 pci_iounmap(card
->pci_dev
, card
->base_addr
);
204 if (card
->conf_addr
!= NULL
)
205 pci_iounmap(card
->pci_dev
, card
->conf_addr
);
209 pci_disable_device(pdev
);
210 pci_set_drvdata(pdev
, NULL
);
213 static void ems_pci_card_reset(struct ems_pci_card
*card
)
215 /* Request board reset */
216 writeb(0, card
->base_addr
);
220 * Probe PCI device for EMS CAN signature and register each available
221 * CAN channel to SJA1000 Socket-CAN subsystem.
223 static int __devinit
ems_pci_add_card(struct pci_dev
*pdev
,
224 const struct pci_device_id
*ent
)
226 struct sja1000_priv
*priv
;
227 struct net_device
*dev
;
228 struct ems_pci_card
*card
;
229 int max_chan
, conf_size
, base_bar
;
232 /* Enabling PCI device */
233 if (pci_enable_device(pdev
) < 0) {
234 dev_err(&pdev
->dev
, "Enabling PCI device failed\n");
238 /* Allocating card structures to hold addresses, ... */
239 card
= kzalloc(sizeof(struct ems_pci_card
), GFP_KERNEL
);
241 dev_err(&pdev
->dev
, "Unable to allocate memory\n");
242 pci_disable_device(pdev
);
246 pci_set_drvdata(pdev
, card
);
248 card
->pci_dev
= pdev
;
252 if (pdev
->vendor
== PCI_VENDOR_ID_PLX
) {
253 card
->version
= 2; /* CPC-PCI v2 */
254 max_chan
= EMS_PCI_V2_MAX_CHAN
;
255 base_bar
= EMS_PCI_V2_BASE_BAR
;
256 conf_size
= EMS_PCI_V2_CONF_SIZE
;
258 card
->version
= 1; /* CPC-PCI v1 */
259 max_chan
= EMS_PCI_V1_MAX_CHAN
;
260 base_bar
= EMS_PCI_V1_BASE_BAR
;
261 conf_size
= EMS_PCI_V1_CONF_SIZE
;
264 /* Remap configuration space and controller memory area */
265 card
->conf_addr
= pci_iomap(pdev
, 0, conf_size
);
266 if (card
->conf_addr
== NULL
) {
268 goto failure_cleanup
;
271 card
->base_addr
= pci_iomap(pdev
, base_bar
, EMS_PCI_BASE_SIZE
);
272 if (card
->base_addr
== NULL
) {
274 goto failure_cleanup
;
277 if (card
->version
== 1) {
278 /* Configure PITA-2 parallel interface (enable MUX) */
279 writel(PITA2_MISC_CONFIG
, card
->conf_addr
+ PITA2_MISC
);
281 /* Check for unique EMS CAN signature */
282 if (ems_pci_v1_readb(card
, 0) != 0x55 ||
283 ems_pci_v1_readb(card
, 1) != 0xAA ||
284 ems_pci_v1_readb(card
, 2) != 0x01 ||
285 ems_pci_v1_readb(card
, 3) != 0xCB ||
286 ems_pci_v1_readb(card
, 4) != 0x11) {
288 "Not EMS Dr. Thomas Wuensche interface\n");
290 goto failure_cleanup
;
294 ems_pci_card_reset(card
);
296 /* Detect available channels */
297 for (i
= 0; i
< max_chan
; i
++) {
298 dev
= alloc_sja1000dev(0);
301 goto failure_cleanup
;
304 card
->net_dev
[i
] = dev
;
305 priv
= netdev_priv(dev
);
307 priv
->irq_flags
= IRQF_SHARED
;
309 dev
->irq
= pdev
->irq
;
310 priv
->reg_base
= card
->base_addr
+ EMS_PCI_CAN_BASE_OFFSET
311 + (i
* EMS_PCI_CAN_CTRL_SIZE
);
312 if (card
->version
== 1) {
313 priv
->read_reg
= ems_pci_v1_read_reg
;
314 priv
->write_reg
= ems_pci_v1_write_reg
;
315 priv
->post_irq
= ems_pci_v1_post_irq
;
317 priv
->read_reg
= ems_pci_v2_read_reg
;
318 priv
->write_reg
= ems_pci_v2_write_reg
;
319 priv
->post_irq
= ems_pci_v2_post_irq
;
322 /* Check if channel is present */
323 if (ems_pci_check_chan(priv
)) {
324 priv
->can
.clock
.freq
= EMS_PCI_CAN_CLOCK
;
325 priv
->ocr
= EMS_PCI_OCR
;
326 priv
->cdr
= EMS_PCI_CDR
;
328 SET_NETDEV_DEV(dev
, &pdev
->dev
);
330 if (card
->version
== 1)
331 /* reset int flag of pita */
332 writel(PITA2_ICR_INT0_EN
| PITA2_ICR_INT0
,
333 card
->conf_addr
+ PITA2_ICR
);
335 /* enable IRQ in PLX 9030 */
336 writel(PLX_ICSR_ENA_CLR
,
337 card
->conf_addr
+ PLX_ICSR
);
339 /* Register SJA1000 device */
340 err
= register_sja1000dev(dev
);
342 dev_err(&pdev
->dev
, "Registering device failed "
344 free_sja1000dev(dev
);
345 goto failure_cleanup
;
350 dev_info(&pdev
->dev
, "Channel #%d at 0x%p, irq %d\n",
351 i
+ 1, priv
->reg_base
, dev
->irq
);
353 free_sja1000dev(dev
);
360 dev_err(&pdev
->dev
, "Error: %d. Cleaning Up.\n", err
);
362 ems_pci_del_card(pdev
);
367 static struct pci_driver ems_pci_driver
= {
369 .id_table
= ems_pci_tbl
,
370 .probe
= ems_pci_add_card
,
371 .remove
= ems_pci_del_card
,
374 static int __init
ems_pci_init(void)
376 return pci_register_driver(&ems_pci_driver
);
379 static void __exit
ems_pci_exit(void)
381 pci_unregister_driver(&ems_pci_driver
);
384 module_init(ems_pci_init
);
385 module_exit(ems_pci_exit
);