drivers/net/tokenring/madgemc.c

   1 /*
   2  *  madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
   3  *
   4  *  Written 2000 by Adam Fritzler
   5  *
   6  *  This software may be used and distributed according to the terms
   7  *  of the GNU General Public License, incorporated herein by reference.
   8  *
   9  *  This driver module supports the following cards:
  10  *      - Madge Smart 16/4 Ringnode MC16
  11  *      - Madge Smart 16/4 Ringnode MC32 (??)
  12  *
  13  *  Maintainer(s):
  14  *    AF        Adam Fritzler
  15  *
  16  *  Modification History:
  17  *      16-Jan-00       AF      Created
  18  *
  19  */
  20 static const char version[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
  21
  22 #include <linux/module.h>
  23 #include <linux/mca.h>
  24 #include <linux/slab.h>
  25 #include <linux/kernel.h>
  26 #include <linux/errno.h>
  27 #include <linux/init.h>
  28 #include <linux/netdevice.h>
  29 #include <linux/trdevice.h>
  30
  31 #include <asm/system.h>
  32 #include <asm/io.h>
  33 #include <asm/irq.h>
  34
  35 #include "tms380tr.h"
  36 #include "madgemc.h"            /* Madge-specific constants */
  37
  38 #define MADGEMC_IO_EXTENT 32
  39 #define MADGEMC_SIF_OFFSET 0x08
  40
  41 struct card_info {
  42         /*
  43          * These are read from the BIA ROM.
  44          */
  45         unsigned int manid;
  46         unsigned int cardtype;
  47         unsigned int cardrev;
  48         unsigned int ramsize;
  49
  50         /*
  51          * These are read from the MCA POS registers.
  52          */
  53         unsigned int burstmode:2;
  54         unsigned int fairness:1; /* 0 = Fair, 1 = Unfair */
  55         unsigned int arblevel:4;
  56         unsigned int ringspeed:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
  57         unsigned int cabletype:1; /* 0 = RJ45, 1 = DB9 */
  58 };
  59
  60 static int madgemc_open(struct net_device *dev);
  61 static int madgemc_close(struct net_device *dev);
  62 static int madgemc_chipset_init(struct net_device *dev);
  63 static void madgemc_read_rom(struct net_device *dev, struct card_info *card);
  64 static unsigned short madgemc_setnselout_pins(struct net_device *dev);
  65 static void madgemc_setcabletype(struct net_device *dev, int type);
  66
  67 static int madgemc_mcaproc(char *buf, int slot, void *d);
  68
  69 static void madgemc_setregpage(struct net_device *dev, int page);
  70 static void madgemc_setsifsel(struct net_device *dev, int val);
  71 static void madgemc_setint(struct net_device *dev, int val);
  72
  73 static irqreturn_t madgemc_interrupt(int irq, void *dev_id);
  74
  75 /*
  76  * These work around paging, however they don't guarantee you're on the
  77  * right page.
  78  */
  79 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
  80 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
  81 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
  82 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
  83
  84 /*
  85  * Read a byte-length value from the register.
  86  */
  87 static unsigned short madgemc_sifreadb(struct net_device *dev, unsigned short reg)
  88 {
  89         unsigned short ret;
  90         if (reg<0x8)
  91                 ret = SIFREADB(reg);
  92         else {
  93                 madgemc_setregpage(dev, 1);
  94                 ret = SIFREADB(reg);
  95                 madgemc_setregpage(dev, 0);
  96         }
  97         return ret;
  98 }
  99
 100 /*
 101  * Write a byte-length value to a register.
 102  */
 103 static void madgemc_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
 104 {
 105         if (reg<0x8)
 106                 SIFWRITEB(val, reg);
 107         else {
 108                 madgemc_setregpage(dev, 1);
 109                 SIFWRITEB(val, reg);
 110                 madgemc_setregpage(dev, 0);
 111         }
 112 }
 113
 114 /*
 115  * Read a word-length value from a register
 116  */
 117 static unsigned short madgemc_sifreadw(struct net_device *dev, unsigned short reg)
 118 {
 119         unsigned short ret;
 120         if (reg<0x8)
 121                 ret = SIFREADW(reg);
 122         else {
 123                 madgemc_setregpage(dev, 1);
 124                 ret = SIFREADW(reg);
 125                 madgemc_setregpage(dev, 0);
 126         }
 127         return ret;
 128 }
 129
 130 /*
 131  * Write a word-length value to a register.
 132  */
 133 static void madgemc_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
 134 {
 135         if (reg<0x8)
 136                 SIFWRITEW(val, reg);
 137         else {
 138                 madgemc_setregpage(dev, 1);
 139                 SIFWRITEW(val, reg);
 140                 madgemc_setregpage(dev, 0);
 141         }
 142 }
 143
 144 static struct net_device_ops madgemc_netdev_ops __read_mostly;
 145
 146 static int __devinit madgemc_probe(struct device *device)
 147 {
 148         static int versionprinted;
 149         struct net_device *dev;
 150         struct net_local *tp;
 151         struct card_info *card;
 152         struct mca_device *mdev = to_mca_device(device);
 153         int ret = 0;
 154
 155         if (versionprinted++ == 0)
 156                 printk("%s", version);
 157
 158         if(mca_device_claimed(mdev))
 159                 return -EBUSY;
 160         mca_device_set_claim(mdev, 1);
 161
 162         dev = alloc_trdev(sizeof(struct net_local));
 163         if (!dev) {
 164                 printk("madgemc: unable to allocate dev space\n");
 165                 mca_device_set_claim(mdev, 0);
 166                 ret = -ENOMEM;
 167                 goto getout;
 168         }
 169
 170         dev->netdev_ops = &madgemc_netdev_ops;
 171
 172         card = kmalloc(sizeof(struct card_info), GFP_KERNEL);
 173         if (card==NULL) {
 174                 printk("madgemc: unable to allocate card struct\n");
 175                 ret = -ENOMEM;
 176                 goto getout1;
 177         }
 178
 179         /*
 180          * Parse configuration information.  This all comes
 181          * directly from the publicly available @002d.ADF.
 182          * Get it from Madge or your local ADF library.
 183          */
 184
 185         /*
 186          * Base address
 187          */
 188         dev->base_addr = 0x0a20 +
 189                 ((mdev->pos[2] & MC16_POS2_ADDR2)?0x0400:0) +
 190                 ((mdev->pos[0] & MC16_POS0_ADDR1)?0x1000:0) +
 191                 ((mdev->pos[3] & MC16_POS3_ADDR3)?0x2000:0);
 192
 193         /*
 194          * Interrupt line
 195          */
 196         switch(mdev->pos[0] >> 6) { /* upper two bits */
 197                 case 0x1: dev->irq = 3; break;
 198                 case 0x2: dev->irq = 9; break; /* IRQ 2 = IRQ 9 */
 199                 case 0x3: dev->irq = 10; break;
 200                 default: dev->irq = 0; break;
 201         }
 202
 203         if (dev->irq == 0) {
 204                 printk("%s: invalid IRQ\n", dev->name);
 205                 ret = -EBUSY;
 206                 goto getout2;
 207         }
 208
 209         if (!request_region(dev->base_addr, MADGEMC_IO_EXTENT,
 210                            "madgemc")) {
 211                 printk(KERN_INFO "madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev->slot, dev->base_addr);
 212                 dev->base_addr += MADGEMC_SIF_OFFSET;
 213                 ret = -EBUSY;
 214                 goto getout2;
 215         }
 216         dev->base_addr += MADGEMC_SIF_OFFSET;
 217
 218         /*
 219          * Arbitration Level
 220          */
 221         card->arblevel = ((mdev->pos[0] >> 1) & 0x7) + 8;
 222
 223         /*
 224          * Burst mode and Fairness
 225          */
 226         card->burstmode = ((mdev->pos[2] >> 6) & 0x3);
 227         card->fairness = ((mdev->pos[2] >> 4) & 0x1);
 228
 229         /*
 230          * Ring Speed
 231          */
 232         if ((mdev->pos[1] >> 2)&0x1)
 233                 card->ringspeed = 2; /* not selected */
 234         else if ((mdev->pos[2] >> 5) & 0x1)
 235                 card->ringspeed = 1; /* 16Mb */
 236         else
 237                 card->ringspeed = 0; /* 4Mb */
 238
 239         /*
 240          * Cable type
 241          */
 242         if ((mdev->pos[1] >> 6)&0x1)
 243                 card->cabletype = 1; /* STP/DB9 */
 244         else
 245                 card->cabletype = 0; /* UTP/RJ-45 */
 246
 247
 248         /*
 249          * ROM Info. This requires us to actually twiddle
 250          * bits on the card, so we must ensure above that
 251          * the base address is free of conflict (request_region above).
 252          */
 253         madgemc_read_rom(dev, card);
 254
 255         if (card->manid != 0x4d) { /* something went wrong */
 256                 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev->name, card->manid);
 257                 goto getout3;
 258         }
 259
 260         if ((card->cardtype != 0x08) && (card->cardtype != 0x0d)) {
 261                 printk(KERN_INFO "%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev->name, card->cardtype);
 262                 ret = -EIO;
 263                 goto getout3;
 264         }
 265
 266         /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
 267         if ((card->cardtype == 0x08) && (card->cardrev <= 0x01))
 268                 card->ramsize = 128;
 269         else
 270                 card->ramsize = 256;
 271
 272         printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
 273                dev->name,
 274                (card->cardtype == 0x08)?MADGEMC16_CARDNAME:
 275                MADGEMC32_CARDNAME, card->cardrev,
 276                dev->base_addr, dev->irq);
 277
 278         if (card->cardtype == 0x0d)
 279                 printk("%s:     Warning: MC32 support is experimental and highly untested\n", dev->name);
 280
 281         if (card->ringspeed==2) { /* Unknown */
 282                 printk("%s:     Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev->name);
 283                 card->ringspeed = 1; /* default to 16mb */
 284         }
 285
 286         printk("%s:     RAM Size: %dKB\n", dev->name, card->ramsize);
 287
 288         printk("%s:     Ring Speed: %dMb/sec on %s\n", dev->name,
 289                (card->ringspeed)?16:4,
 290                card->cabletype?"STP/DB9":"UTP/RJ-45");
 291         printk("%s:     Arbitration Level: %d\n", dev->name,
 292                card->arblevel);
 293
 294         printk("%s:     Burst Mode: ", dev->name);
 295         switch(card->burstmode) {
 296                 case 0: printk("Cycle steal"); break;
 297                 case 1: printk("Limited burst"); break;
 298                 case 2: printk("Delayed release"); break;
 299                 case 3: printk("Immediate release"); break;
 300         }
 301         printk(" (%s)\n", (card->fairness)?"Unfair":"Fair");
 302
 303
 304         /*
 305          * Enable SIF before we assign the interrupt handler,
 306          * just in case we get spurious interrupts that need
 307          * handling.
 308          */
 309         outb(0, dev->base_addr + MC_CONTROL_REG0); /* sanity */
 310         madgemc_setsifsel(dev, 1);
 311         if (request_irq(dev->irq, madgemc_interrupt, IRQF_SHARED,
 312                        "madgemc", dev)) {
 313                 ret = -EBUSY;
 314                 goto getout3;
 315         }
 316
 317         madgemc_chipset_init(dev); /* enables interrupts! */
 318         madgemc_setcabletype(dev, card->cabletype);
 319
 320         /* Setup MCA structures */
 321         mca_device_set_name(mdev, (card->cardtype == 0x08)?MADGEMC16_CARDNAME:MADGEMC32_CARDNAME);
 322         mca_set_adapter_procfn(mdev->slot, madgemc_mcaproc, dev);
 323
 324         printk("%s:     Ring Station Address: %pM\n",
 325                dev->name, dev->dev_addr);
 326
 327         if (tmsdev_init(dev, device)) {
 328                 printk("%s: unable to get memory for dev->priv.\n",
 329                        dev->name);
 330                 ret = -ENOMEM;
 331                 goto getout4;
 332         }
 333         tp = netdev_priv(dev);
 334
 335         /*
 336          * The MC16 is physically a 32bit card.  However, Madge
 337          * insists on calling it 16bit, so I'll assume here that
 338          * they know what they're talking about.  Cut off DMA
 339          * at 16mb.
 340          */
 341         tp->setnselout = madgemc_setnselout_pins;
 342         tp->sifwriteb = madgemc_sifwriteb;
 343         tp->sifreadb = madgemc_sifreadb;
 344         tp->sifwritew = madgemc_sifwritew;
 345         tp->sifreadw = madgemc_sifreadw;
 346         tp->DataRate = (card->ringspeed)?SPEED_16:SPEED_4;
 347
 348         memcpy(tp->ProductID, "Madge MCA 16/4    ", PROD_ID_SIZE + 1);
 349
 350         tp->tmspriv = card;
 351         dev_set_drvdata(device, dev);
 352
 353         if (register_netdev(dev) == 0)
 354                 return 0;
 355
 356         dev_set_drvdata(device, NULL);
 357         ret = -ENOMEM;
 358 getout4:
 359         free_irq(dev->irq, dev);
 360 getout3:
 361         release_region(dev->base_addr-MADGEMC_SIF_OFFSET,
 362                        MADGEMC_IO_EXTENT);
 363 getout2:
 364         kfree(card);
 365 getout1:
 366         free_netdev(dev);
 367 getout:
 368         mca_device_set_claim(mdev, 0);
 369         return ret;
 370 }
 371
 372 /*
 373  * Handle interrupts generated by the card
 374  *
 375  * The MicroChannel Madge cards need slightly more handling
 376  * after an interrupt than other TMS380 cards do.
 377  *
 378  * First we must make sure it was this card that generated the
 379  * interrupt (since interrupt sharing is allowed).  Then,
 380  * because we're using level-triggered interrupts (as is
 381  * standard on MCA), we must toggle the interrupt line
 382  * on the card in order to claim and acknowledge the interrupt.
 383  * Once that is done, the interrupt should be handlable in
 384  * the normal tms380tr_interrupt() routine.
 385  *
 386  * There's two ways we can check to see if the interrupt is ours,
 387  * both with their own disadvantages...
 388  *
 389  * 1)   Read in the SIFSTS register from the TMS controller.  This
 390  *      is guaranteed to be accurate, however, there's a fairly
 391  *      large performance penalty for doing so: the Madge chips
 392  *      must request the register from the Eagle, the Eagle must
 393  *      read them from its internal bus, and then take the route
 394  *      back out again, for a 16bit read.
 395  *
 396  * 2)   Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
 397  *      The major disadvantage here is that the accuracy of the
 398  *      bit is in question.  However, it cuts out the extra read
 399  *      cycles it takes to read the Eagle's SIF, as its only an
 400  *      8bit read, and theoretically the Madge bit is directly
 401  *      connected to the interrupt latch coming out of the Eagle
 402  *      hardware (that statement is not verified).
 403  *
 404  * I can't determine which of these methods has the best win.  For now,
 405  * we make a compromise.  Use the Madge way for the first interrupt,
 406  * which should be the fast-path, and then once we hit the first
 407  * interrupt, keep on trying using the SIF method until we've
 408  * exhausted all contiguous interrupts.
 409  *
 410  */
 411 static irqreturn_t madgemc_interrupt(int irq, void *dev_id)
 412 {
 413         int pending,reg1;
 414         struct net_device *dev;
 415
 416         if (!dev_id) {
 417                 printk("madgemc_interrupt: was not passed a dev_id!\n");
 418                 return IRQ_NONE;
 419         }
 420
 421         dev = dev_id;
 422
 423         /* Make sure its really us. -- the Madge way */
 424         pending = inb(dev->base_addr + MC_CONTROL_REG0);
 425         if (!(pending & MC_CONTROL_REG0_SINTR))
 426                 return IRQ_NONE; /* not our interrupt */
 427
 428         /*
 429          * Since we're level-triggered, we may miss the rising edge
 430          * of the next interrupt while we're off handling this one,
 431          * so keep checking until the SIF verifies that it has nothing
 432          * left for us to do.
 433          */
 434         pending = STS_SYSTEM_IRQ;
 435         do {
 436                 if (pending & STS_SYSTEM_IRQ) {
 437
 438                         /* Toggle the interrupt to reset the latch on card */
 439                         reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
 440                         outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
 441                              dev->base_addr + MC_CONTROL_REG1);
 442                         outb(reg1, dev->base_addr + MC_CONTROL_REG1);
 443
 444                         /* Continue handling as normal */
 445                         tms380tr_interrupt(irq, dev_id);
 446
 447                         pending = SIFREADW(SIFSTS); /* restart - the SIF way */
 448
 449                 } else
 450                         return IRQ_HANDLED;
 451         } while (1);
 452
 453         return IRQ_HANDLED; /* not reachable */
 454 }
 455
 456 /*
 457  * Set the card to the preferred ring speed.
 458  *
 459  * Unlike newer cards, the MC16/32 have their speed selection
 460  * circuit connected to the Madge ASICs and not to the TMS380
 461  * NSELOUT pins. Set the ASIC bits correctly here, and return
 462  * zero to leave the TMS NSELOUT bits unaffected.
 463  *
 464  */
 465 static unsigned short madgemc_setnselout_pins(struct net_device *dev)
 466 {
 467         unsigned char reg1;
 468         struct net_local *tp = netdev_priv(dev);
 469
 470         reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
 471
 472         if(tp->DataRate == SPEED_16)
 473                 reg1 |= MC_CONTROL_REG1_SPEED_SEL; /* add for 16mb */
 474         else if (reg1 & MC_CONTROL_REG1_SPEED_SEL)
 475                 reg1 ^= MC_CONTROL_REG1_SPEED_SEL; /* remove for 4mb */
 476         outb(reg1, dev->base_addr + MC_CONTROL_REG1);
 477
 478         return 0; /* no change */
 479 }
 480
 481 /*
 482  * Set the register page.  This equates to the SRSX line
 483  * on the TMS380Cx6.
 484  *
 485  * Register selection is normally done via three contiguous
 486  * bits.  However, some boards (such as the MC16/32) use only
 487  * two bits, plus a separate bit in the glue chip.  This
 488  * sets the SRSX bit (the top bit).  See page 4-17 in the
 489  * Yellow Book for which registers are affected.
 490  *
 491  */
 492 static void madgemc_setregpage(struct net_device *dev, int page)
 493 {
 494         static int reg1;
 495
 496         reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
 497         if ((page == 0) && (reg1 & MC_CONTROL_REG1_SRSX)) {
 498                 outb(reg1 ^ MC_CONTROL_REG1_SRSX,
 499                      dev->base_addr + MC_CONTROL_REG1);
 500         }
 501         else if (page == 1) {
 502                 outb(reg1 | MC_CONTROL_REG1_SRSX,
 503                      dev->base_addr + MC_CONTROL_REG1);
 504         }
 505         reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
 506 }
 507
 508 /*
 509  * The SIF registers are not mapped into register space by default
 510  * Set this to 1 to map them, 0 to map the BIA ROM.
 511  *
 512  */
 513 static void madgemc_setsifsel(struct net_device *dev, int val)
 514 {
 515         unsigned int reg0;
 516
 517         reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
 518         if ((val == 0) && (reg0 & MC_CONTROL_REG0_SIFSEL)) {
 519                 outb(reg0 ^ MC_CONTROL_REG0_SIFSEL,
 520                      dev->base_addr + MC_CONTROL_REG0);
 521         } else if (val == 1) {
 522                 outb(reg0 | MC_CONTROL_REG0_SIFSEL,
 523                      dev->base_addr + MC_CONTROL_REG0);
 524         }
 525         reg0 = inb(dev->base_addr + MC_CONTROL_REG0);
 526 }
 527
 528 /*
 529  * Enable SIF interrupts
 530  *
 531  * This does not enable interrupts in the SIF, but rather
 532  * enables SIF interrupts to be passed onto the host.
 533  *
 534  */
 535 static void madgemc_setint(struct net_device *dev, int val)
 536 {
 537         unsigned int reg1;
 538
 539         reg1 = inb(dev->base_addr + MC_CONTROL_REG1);
 540         if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) {
 541                 outb(reg1 ^ MC_CONTROL_REG1_SINTEN,
 542                      dev->base_addr + MC_CONTROL_REG1);
 543         } else if (val == 1) {
 544                 outb(reg1 | MC_CONTROL_REG1_SINTEN,
 545                      dev->base_addr + MC_CONTROL_REG1);
 546         }
 547 }
 548
 549 /*
 550  * Cable type is set via control register 7. Bit zero high
 551  * for UTP, low for STP.
 552  */
 553 static void madgemc_setcabletype(struct net_device *dev, int type)
 554 {
 555         outb((type==0)?MC_CONTROL_REG7_CABLEUTP:MC_CONTROL_REG7_CABLESTP,
 556              dev->base_addr + MC_CONTROL_REG7);
 557 }
 558
 559 /*
 560  * Enable the functions of the Madge chipset needed for
 561  * full working order.
 562  */
 563 static int madgemc_chipset_init(struct net_device *dev)
 564 {
 565         outb(0, dev->base_addr + MC_CONTROL_REG1); /* pull SRESET low */
 566         tms380tr_wait(100); /* wait for card to reset */
 567
 568         /* bring back into normal operating mode */
 569         outb(MC_CONTROL_REG1_NSRESET, dev->base_addr + MC_CONTROL_REG1);
 570
 571         /* map SIF registers */
 572         madgemc_setsifsel(dev, 1);
 573
 574         /* enable SIF interrupts */
 575         madgemc_setint(dev, 1);
 576
 577         return 0;
 578 }
 579
 580 /*
 581  * Disable the board, and put back into power-up state.
 582  */
 583 static void madgemc_chipset_close(struct net_device *dev)
 584 {
 585         /* disable interrupts */
 586         madgemc_setint(dev, 0);
 587         /* unmap SIF registers */
 588         madgemc_setsifsel(dev, 0);
 589 }
 590
 591 /*
 592  * Read the card type (MC16 or MC32) from the card.
 593  *
 594  * The configuration registers are stored in two separate
 595  * pages.  Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
 596  * for page zero, or setting bit 3 for page one.
 597  *
 598  * Page zero contains the following data:
 599  *      Byte 0: Manufacturer ID (0x4D -- ASCII "M")
 600  *      Byte 1: Card type:
 601  *                      0x08 for MC16
 602  *                      0x0D for MC32
 603  *      Byte 2: Card revision
 604  *      Byte 3: Mirror of POS config register 0
 605  *      Byte 4: Mirror of POS 1
 606  *      Byte 5: Mirror of POS 2
 607  *
 608  * Page one contains the following data:
 609  *      Byte 0: Unused
 610  *      Byte 1-6: BIA, MSB to LSB.
 611  *
 612  * Note that to read the BIA, we must unmap the SIF registers
 613  * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
 614  * will reside in the same logical location.  For this reason,
 615  * _never_ read the BIA while the Eagle processor is running!
 616  * The SIF will be completely inaccessible until the BIA operation
 617  * is complete.
 618  *
 619  */
 620 static void madgemc_read_rom(struct net_device *dev, struct card_info *card)
 621 {
 622         unsigned long ioaddr;
 623         unsigned char reg0, reg1, tmpreg0, i;
 624
 625         ioaddr = dev->base_addr;
 626
 627         reg0 = inb(ioaddr + MC_CONTROL_REG0);
 628         reg1 = inb(ioaddr + MC_CONTROL_REG1);
 629
 630         /* Switch to page zero and unmap SIF */
 631         tmpreg0 = reg0 & ~(MC_CONTROL_REG0_PAGE + MC_CONTROL_REG0_SIFSEL);
 632         outb(tmpreg0, ioaddr + MC_CONTROL_REG0);
 633
 634         card->manid = inb(ioaddr + MC_ROM_MANUFACTURERID);
 635         card->cardtype = inb(ioaddr + MC_ROM_ADAPTERID);
 636         card->cardrev = inb(ioaddr + MC_ROM_REVISION);
 637
 638         /* Switch to rom page one */
 639         outb(tmpreg0 | MC_CONTROL_REG0_PAGE, ioaddr + MC_CONTROL_REG0);
 640
 641         /* Read BIA */
 642         dev->addr_len = 6;
 643         for (i = 0; i < 6; i++)
 644                 dev->dev_addr[i] = inb(ioaddr + MC_ROM_BIA_START + i);
 645
 646         /* Restore original register values */
 647         outb(reg0, ioaddr + MC_CONTROL_REG0);
 648         outb(reg1, ioaddr + MC_CONTROL_REG1);
 649 }
 650
 651 static int madgemc_open(struct net_device *dev)
 652 {
 653         /*
 654          * Go ahead and reinitialize the chipset again, just to
 655          * make sure we didn't get left in a bad state.
 656          */
 657         madgemc_chipset_init(dev);
 658         tms380tr_open(dev);
 659         return 0;
 660 }
 661
 662 static int madgemc_close(struct net_device *dev)
 663 {
 664         tms380tr_close(dev);
 665         madgemc_chipset_close(dev);
 666         return 0;
 667 }
 668
 669 /*
 670  * Give some details available from /proc/mca/slotX
 671  */
 672 static int madgemc_mcaproc(char *buf, int slot, void *d)
 673 {
 674         struct net_device *dev = (struct net_device *)d;
 675         struct net_local *tp = netdev_priv(dev);
 676         struct card_info *curcard = tp->tmspriv;
 677         int len = 0;
 678
 679         len += sprintf(buf+len, "-------\n");
 680         if (curcard) {
 681                 len += sprintf(buf+len, "Card Revision: %d\n", curcard->cardrev);
 682                 len += sprintf(buf+len, "RAM Size: %dkb\n", curcard->ramsize);
 683                 len += sprintf(buf+len, "Cable type: %s\n", (curcard->cabletype)?"STP/DB9":"UTP/RJ-45");
 684                 len += sprintf(buf+len, "Configured ring speed: %dMb/sec\n", (curcard->ringspeed)?16:4);
 685                 len += sprintf(buf+len, "Running ring speed: %dMb/sec\n", (tp->DataRate==SPEED_16)?16:4);
 686                 len += sprintf(buf+len, "Device: %s\n", dev->name);
 687                 len += sprintf(buf+len, "IO Port: 0x%04lx\n", dev->base_addr);
 688                 len += sprintf(buf+len, "IRQ: %d\n", dev->irq);
 689                 len += sprintf(buf+len, "Arbitration Level: %d\n", curcard->arblevel);
 690                 len += sprintf(buf+len, "Burst Mode: ");
 691                 switch(curcard->burstmode) {
 692                 case 0: len += sprintf(buf+len, "Cycle steal"); break;
 693                 case 1: len += sprintf(buf+len, "Limited burst"); break;
 694                 case 2: len += sprintf(buf+len, "Delayed release"); break;
 695                 case 3: len += sprintf(buf+len, "Immediate release"); break;
 696                 }
 697                 len += sprintf(buf+len, " (%s)\n", (curcard->fairness)?"Unfair":"Fair");
 698
 699                 len += sprintf(buf+len, "Ring Station Address: %pM\n",
 700                                dev->dev_addr);
 701         } else
 702                 len += sprintf(buf+len, "Card not configured\n");
 703
 704         return len;
 705 }
 706
 707 static int __devexit madgemc_remove(struct device *device)
 708 {
 709         struct net_device *dev = dev_get_drvdata(device);
 710         struct net_local *tp;
 711         struct card_info *card;
 712
 713         BUG_ON(!dev);
 714
 715         tp = netdev_priv(dev);
 716         card = tp->tmspriv;
 717         kfree(card);
 718         tp->tmspriv = NULL;
 719
 720         unregister_netdev(dev);
 721         release_region(dev->base_addr-MADGEMC_SIF_OFFSET, MADGEMC_IO_EXTENT);
 722         free_irq(dev->irq, dev);
 723         tmsdev_term(dev);
 724         free_netdev(dev);
 725         dev_set_drvdata(device, NULL);
 726
 727         return 0;
 728 }
 729
 730 static short madgemc_adapter_ids[] __initdata = {
 731         0x002d,
 732         0x0000
 733 };
 734
 735 static struct mca_driver madgemc_driver = {
 736         .id_table = madgemc_adapter_ids,
 737         .driver = {
 738                 .name = "madgemc",
 739                 .bus = &mca_bus_type,
 740                 .probe = madgemc_probe,
 741                 .remove = __devexit_p(madgemc_remove),
 742         },
 743 };
 744
 745 static int __init madgemc_init (void)
 746 {
 747         madgemc_netdev_ops = tms380tr_netdev_ops;
 748         madgemc_netdev_ops.ndo_open = madgemc_open;
 749         madgemc_netdev_ops.ndo_stop = madgemc_close;
 750
 751         return mca_register_driver (&madgemc_driver);
 752 }
 753
 754 static void __exit madgemc_exit (void)
 755 {
 756         mca_unregister_driver (&madgemc_driver);
 757 }
 758
 759 module_init(madgemc_init);
 760 module_exit(madgemc_exit);
 761
 762 MODULE_LICENSE("GPL");
 763