OMAPDSS: VENC: fix NULL pointer dereference in DSS2 VENC sysfs debug attr on OMAP4
[zen-stable.git] / drivers / net / wireless / b43 / radio_2056.h
blob5b86673459faa16adbc42105717df7f73d7371e9
1 #ifndef B43_RADIO_2056_H_
2 #define B43_RADIO_2056_H_
4 #include <linux/types.h>
6 #include "tables_nphy.h"
8 #define B2056_SYN (0x0 << 12)
9 #define B2056_TX0 (0x2 << 12)
10 #define B2056_TX1 (0x3 << 12)
11 #define B2056_RX0 (0x6 << 12)
12 #define B2056_RX1 (0x7 << 12)
13 #define B2056_ALLTX (0xE << 12)
14 #define B2056_ALLRX (0xF << 12)
16 #define B2056_SYN_RESERVED_ADDR0 0x00
17 #define B2056_SYN_IDCODE 0x01
18 #define B2056_SYN_RESERVED_ADDR2 0x02
19 #define B2056_SYN_RESERVED_ADDR3 0x03
20 #define B2056_SYN_RESERVED_ADDR4 0x04
21 #define B2056_SYN_RESERVED_ADDR5 0x05
22 #define B2056_SYN_RESERVED_ADDR6 0x06
23 #define B2056_SYN_RESERVED_ADDR7 0x07
24 #define B2056_SYN_COM_CTRL 0x08
25 #define B2056_SYN_COM_PU 0x09
26 #define B2056_SYN_COM_OVR 0x0A
27 #define B2056_SYN_COM_RESET 0x0B
28 #define B2056_SYN_COM_RCAL 0x0C
29 #define B2056_SYN_COM_RC_RXLPF 0x0D
30 #define B2056_SYN_COM_RC_TXLPF 0x0E
31 #define B2056_SYN_COM_RC_RXHPF 0x0F
32 #define B2056_SYN_RESERVED_ADDR16 0x10
33 #define B2056_SYN_RESERVED_ADDR17 0x11
34 #define B2056_SYN_RESERVED_ADDR18 0x12
35 #define B2056_SYN_RESERVED_ADDR19 0x13
36 #define B2056_SYN_RESERVED_ADDR20 0x14
37 #define B2056_SYN_RESERVED_ADDR21 0x15
38 #define B2056_SYN_RESERVED_ADDR22 0x16
39 #define B2056_SYN_RESERVED_ADDR23 0x17
40 #define B2056_SYN_RESERVED_ADDR24 0x18
41 #define B2056_SYN_RESERVED_ADDR25 0x19
42 #define B2056_SYN_RESERVED_ADDR26 0x1A
43 #define B2056_SYN_RESERVED_ADDR27 0x1B
44 #define B2056_SYN_RESERVED_ADDR28 0x1C
45 #define B2056_SYN_RESERVED_ADDR29 0x1D
46 #define B2056_SYN_RESERVED_ADDR30 0x1E
47 #define B2056_SYN_RESERVED_ADDR31 0x1F
48 #define B2056_SYN_GPIO_MASTER1 0x20
49 #define B2056_SYN_GPIO_MASTER2 0x21
50 #define B2056_SYN_TOPBIAS_MASTER 0x22
51 #define B2056_SYN_TOPBIAS_RCAL 0x23
52 #define B2056_SYN_AFEREG 0x24
53 #define B2056_SYN_TEMPPROCSENSE 0x25
54 #define B2056_SYN_TEMPPROCSENSEIDAC 0x26
55 #define B2056_SYN_TEMPPROCSENSERCAL 0x27
56 #define B2056_SYN_LPO 0x28
57 #define B2056_SYN_VDDCAL_MASTER 0x29
58 #define B2056_SYN_VDDCAL_IDAC 0x2A
59 #define B2056_SYN_VDDCAL_STATUS 0x2B
60 #define B2056_SYN_RCAL_MASTER 0x2C
61 #define B2056_SYN_RCAL_CODE_OUT 0x2D
62 #define B2056_SYN_RCCAL_CTRL0 0x2E
63 #define B2056_SYN_RCCAL_CTRL1 0x2F
64 #define B2056_SYN_RCCAL_CTRL2 0x30
65 #define B2056_SYN_RCCAL_CTRL3 0x31
66 #define B2056_SYN_RCCAL_CTRL4 0x32
67 #define B2056_SYN_RCCAL_CTRL5 0x33
68 #define B2056_SYN_RCCAL_CTRL6 0x34
69 #define B2056_SYN_RCCAL_CTRL7 0x35
70 #define B2056_SYN_RCCAL_CTRL8 0x36
71 #define B2056_SYN_RCCAL_CTRL9 0x37
72 #define B2056_SYN_RCCAL_CTRL10 0x38
73 #define B2056_SYN_RCCAL_CTRL11 0x39
74 #define B2056_SYN_ZCAL_SPARE1 0x3A
75 #define B2056_SYN_ZCAL_SPARE2 0x3B
76 #define B2056_SYN_PLL_MAST1 0x3C
77 #define B2056_SYN_PLL_MAST2 0x3D
78 #define B2056_SYN_PLL_MAST3 0x3E
79 #define B2056_SYN_PLL_BIAS_RESET 0x3F
80 #define B2056_SYN_PLL_XTAL0 0x40
81 #define B2056_SYN_PLL_XTAL1 0x41
82 #define B2056_SYN_PLL_XTAL3 0x42
83 #define B2056_SYN_PLL_XTAL4 0x43
84 #define B2056_SYN_PLL_XTAL5 0x44
85 #define B2056_SYN_PLL_XTAL6 0x45
86 #define B2056_SYN_PLL_REFDIV 0x46
87 #define B2056_SYN_PLL_PFD 0x47
88 #define B2056_SYN_PLL_CP1 0x48
89 #define B2056_SYN_PLL_CP2 0x49
90 #define B2056_SYN_PLL_CP3 0x4A
91 #define B2056_SYN_PLL_LOOPFILTER1 0x4B
92 #define B2056_SYN_PLL_LOOPFILTER2 0x4C
93 #define B2056_SYN_PLL_LOOPFILTER3 0x4D
94 #define B2056_SYN_PLL_LOOPFILTER4 0x4E
95 #define B2056_SYN_PLL_LOOPFILTER5 0x4F
96 #define B2056_SYN_PLL_MMD1 0x50
97 #define B2056_SYN_PLL_MMD2 0x51
98 #define B2056_SYN_PLL_VCO1 0x52
99 #define B2056_SYN_PLL_VCO2 0x53
100 #define B2056_SYN_PLL_MONITOR1 0x54
101 #define B2056_SYN_PLL_MONITOR2 0x55
102 #define B2056_SYN_PLL_VCOCAL1 0x56
103 #define B2056_SYN_PLL_VCOCAL2 0x57
104 #define B2056_SYN_PLL_VCOCAL4 0x58
105 #define B2056_SYN_PLL_VCOCAL5 0x59
106 #define B2056_SYN_PLL_VCOCAL6 0x5A
107 #define B2056_SYN_PLL_VCOCAL7 0x5B
108 #define B2056_SYN_PLL_VCOCAL8 0x5C
109 #define B2056_SYN_PLL_VCOCAL9 0x5D
110 #define B2056_SYN_PLL_VCOCAL10 0x5E
111 #define B2056_SYN_PLL_VCOCAL11 0x5F
112 #define B2056_SYN_PLL_VCOCAL12 0x60
113 #define B2056_SYN_PLL_VCOCAL13 0x61
114 #define B2056_SYN_PLL_VREG 0x62
115 #define B2056_SYN_PLL_STATUS1 0x63
116 #define B2056_SYN_PLL_STATUS2 0x64
117 #define B2056_SYN_PLL_STATUS3 0x65
118 #define B2056_SYN_LOGEN_PU0 0x66
119 #define B2056_SYN_LOGEN_PU1 0x67
120 #define B2056_SYN_LOGEN_PU2 0x68
121 #define B2056_SYN_LOGEN_PU3 0x69
122 #define B2056_SYN_LOGEN_PU5 0x6A
123 #define B2056_SYN_LOGEN_PU6 0x6B
124 #define B2056_SYN_LOGEN_PU7 0x6C
125 #define B2056_SYN_LOGEN_PU8 0x6D
126 #define B2056_SYN_LOGEN_BIAS_RESET 0x6E
127 #define B2056_SYN_LOGEN_RCCR1 0x6F
128 #define B2056_SYN_LOGEN_VCOBUF1 0x70
129 #define B2056_SYN_LOGEN_MIXER1 0x71
130 #define B2056_SYN_LOGEN_MIXER2 0x72
131 #define B2056_SYN_LOGEN_BUF1 0x73
132 #define B2056_SYN_LOGENBUF2 0x74
133 #define B2056_SYN_LOGEN_BUF3 0x75
134 #define B2056_SYN_LOGEN_BUF4 0x76
135 #define B2056_SYN_LOGEN_DIV1 0x77
136 #define B2056_SYN_LOGEN_DIV2 0x78
137 #define B2056_SYN_LOGEN_DIV3 0x79
138 #define B2056_SYN_LOGEN_ACL1 0x7A
139 #define B2056_SYN_LOGEN_ACL2 0x7B
140 #define B2056_SYN_LOGEN_ACL3 0x7C
141 #define B2056_SYN_LOGEN_ACL4 0x7D
142 #define B2056_SYN_LOGEN_ACL5 0x7E
143 #define B2056_SYN_LOGEN_ACL6 0x7F
144 #define B2056_SYN_LOGEN_ACLOUT 0x80
145 #define B2056_SYN_LOGEN_ACLCAL1 0x81
146 #define B2056_SYN_LOGEN_ACLCAL2 0x82
147 #define B2056_SYN_LOGEN_ACLCAL3 0x83
148 #define B2056_SYN_CALEN 0x84
149 #define B2056_SYN_LOGEN_PEAKDET1 0x85
150 #define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86
151 #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87
152 #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88
153 #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89
154 #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A
155 #define B2056_SYN_LOGEN_VCOBUF2 0x8B
156 #define B2056_SYN_LOGEN_MIXER3 0x8C
157 #define B2056_SYN_LOGEN_BUF5 0x8D
158 #define B2056_SYN_LOGEN_BUF6 0x8E
159 #define B2056_SYN_LOGEN_CBUFRX1 0x8F
160 #define B2056_SYN_LOGEN_CBUFRX2 0x90
161 #define B2056_SYN_LOGEN_CBUFRX3 0x91
162 #define B2056_SYN_LOGEN_CBUFRX4 0x92
163 #define B2056_SYN_LOGEN_CBUFTX1 0x93
164 #define B2056_SYN_LOGEN_CBUFTX2 0x94
165 #define B2056_SYN_LOGEN_CBUFTX3 0x95
166 #define B2056_SYN_LOGEN_CBUFTX4 0x96
167 #define B2056_SYN_LOGEN_CMOSRX1 0x97
168 #define B2056_SYN_LOGEN_CMOSRX2 0x98
169 #define B2056_SYN_LOGEN_CMOSRX3 0x99
170 #define B2056_SYN_LOGEN_CMOSRX4 0x9A
171 #define B2056_SYN_LOGEN_CMOSTX1 0x9B
172 #define B2056_SYN_LOGEN_CMOSTX2 0x9C
173 #define B2056_SYN_LOGEN_CMOSTX3 0x9D
174 #define B2056_SYN_LOGEN_CMOSTX4 0x9E
175 #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F
176 #define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0
177 #define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1
178 #define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2
179 #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3
180 #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4
181 #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5
182 #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6
183 #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7
184 #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8
185 #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9
186 #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA
187 #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB
188 #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC
189 #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD
190 #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE
191 #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF
192 #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0
193 #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1
194 #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2
195 #define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3
196 #define B2056_SYN_LOGEN_CORE_CALVALID 0xB4
197 #define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5
198 #define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6
200 #define B2056_TX_RESERVED_ADDR0 0x00
201 #define B2056_TX_IDCODE 0x01
202 #define B2056_TX_RESERVED_ADDR2 0x02
203 #define B2056_TX_RESERVED_ADDR3 0x03
204 #define B2056_TX_RESERVED_ADDR4 0x04
205 #define B2056_TX_RESERVED_ADDR5 0x05
206 #define B2056_TX_RESERVED_ADDR6 0x06
207 #define B2056_TX_RESERVED_ADDR7 0x07
208 #define B2056_TX_COM_CTRL 0x08
209 #define B2056_TX_COM_PU 0x09
210 #define B2056_TX_COM_OVR 0x0A
211 #define B2056_TX_COM_RESET 0x0B
212 #define B2056_TX_COM_RCAL 0x0C
213 #define B2056_TX_COM_RC_RXLPF 0x0D
214 #define B2056_TX_COM_RC_TXLPF 0x0E
215 #define B2056_TX_COM_RC_RXHPF 0x0F
216 #define B2056_TX_RESERVED_ADDR16 0x10
217 #define B2056_TX_RESERVED_ADDR17 0x11
218 #define B2056_TX_RESERVED_ADDR18 0x12
219 #define B2056_TX_RESERVED_ADDR19 0x13
220 #define B2056_TX_RESERVED_ADDR20 0x14
221 #define B2056_TX_RESERVED_ADDR21 0x15
222 #define B2056_TX_RESERVED_ADDR22 0x16
223 #define B2056_TX_RESERVED_ADDR23 0x17
224 #define B2056_TX_RESERVED_ADDR24 0x18
225 #define B2056_TX_RESERVED_ADDR25 0x19
226 #define B2056_TX_RESERVED_ADDR26 0x1A
227 #define B2056_TX_RESERVED_ADDR27 0x1B
228 #define B2056_TX_RESERVED_ADDR28 0x1C
229 #define B2056_TX_RESERVED_ADDR29 0x1D
230 #define B2056_TX_RESERVED_ADDR30 0x1E
231 #define B2056_TX_RESERVED_ADDR31 0x1F
232 #define B2056_TX_IQCAL_GAIN_BW 0x20
233 #define B2056_TX_LOFT_FINE_I 0x21
234 #define B2056_TX_LOFT_FINE_Q 0x22
235 #define B2056_TX_LOFT_COARSE_I 0x23
236 #define B2056_TX_LOFT_COARSE_Q 0x24
237 #define B2056_TX_TX_COM_MASTER1 0x25
238 #define B2056_TX_TX_COM_MASTER2 0x26
239 #define B2056_TX_RXIQCAL_TXMUX 0x27
240 #define B2056_TX_TX_SSI_MASTER 0x28
241 #define B2056_TX_IQCAL_VCM_HG 0x29
242 #define B2056_TX_IQCAL_IDAC 0x2A
243 #define B2056_TX_TSSI_VCM 0x2B
244 #define B2056_TX_TX_AMP_DET 0x2C
245 #define B2056_TX_TX_SSI_MUX 0x2D
246 #define B2056_TX_TSSIA 0x2E
247 #define B2056_TX_TSSIG 0x2F
248 #define B2056_TX_TSSI_MISC1 0x30
249 #define B2056_TX_TSSI_MISC2 0x31
250 #define B2056_TX_TSSI_MISC3 0x32
251 #define B2056_TX_PA_SPARE1 0x33
252 #define B2056_TX_PA_SPARE2 0x34
253 #define B2056_TX_INTPAA_MASTER 0x35
254 #define B2056_TX_INTPAA_GAIN 0x36
255 #define B2056_TX_INTPAA_BOOST_TUNE 0x37
256 #define B2056_TX_INTPAA_IAUX_STAT 0x38
257 #define B2056_TX_INTPAA_IAUX_DYN 0x39
258 #define B2056_TX_INTPAA_IMAIN_STAT 0x3A
259 #define B2056_TX_INTPAA_IMAIN_DYN 0x3B
260 #define B2056_TX_INTPAA_CASCBIAS 0x3C
261 #define B2056_TX_INTPAA_PASLOPE 0x3D
262 #define B2056_TX_INTPAA_PA_MISC 0x3E
263 #define B2056_TX_INTPAG_MASTER 0x3F
264 #define B2056_TX_INTPAG_GAIN 0x40
265 #define B2056_TX_INTPAG_BOOST_TUNE 0x41
266 #define B2056_TX_INTPAG_IAUX_STAT 0x42
267 #define B2056_TX_INTPAG_IAUX_DYN 0x43
268 #define B2056_TX_INTPAG_IMAIN_STAT 0x44
269 #define B2056_TX_INTPAG_IMAIN_DYN 0x45
270 #define B2056_TX_INTPAG_CASCBIAS 0x46
271 #define B2056_TX_INTPAG_PASLOPE 0x47
272 #define B2056_TX_INTPAG_PA_MISC 0x48
273 #define B2056_TX_PADA_MASTER 0x49
274 #define B2056_TX_PADA_IDAC 0x4A
275 #define B2056_TX_PADA_CASCBIAS 0x4B
276 #define B2056_TX_PADA_GAIN 0x4C
277 #define B2056_TX_PADA_BOOST_TUNE 0x4D
278 #define B2056_TX_PADA_SLOPE 0x4E
279 #define B2056_TX_PADG_MASTER 0x4F
280 #define B2056_TX_PADG_IDAC 0x50
281 #define B2056_TX_PADG_CASCBIAS 0x51
282 #define B2056_TX_PADG_GAIN 0x52
283 #define B2056_TX_PADG_BOOST_TUNE 0x53
284 #define B2056_TX_PADG_SLOPE 0x54
285 #define B2056_TX_PGAA_MASTER 0x55
286 #define B2056_TX_PGAA_IDAC 0x56
287 #define B2056_TX_PGAA_GAIN 0x57
288 #define B2056_TX_PGAA_BOOST_TUNE 0x58
289 #define B2056_TX_PGAA_SLOPE 0x59
290 #define B2056_TX_PGAA_MISC 0x5A
291 #define B2056_TX_PGAG_MASTER 0x5B
292 #define B2056_TX_PGAG_IDAC 0x5C
293 #define B2056_TX_PGAG_GAIN 0x5D
294 #define B2056_TX_PGAG_BOOST_TUNE 0x5E
295 #define B2056_TX_PGAG_SLOPE 0x5F
296 #define B2056_TX_PGAG_MISC 0x60
297 #define B2056_TX_MIXA_MASTER 0x61
298 #define B2056_TX_MIXA_BOOST_TUNE 0x62
299 #define B2056_TX_MIXG 0x63
300 #define B2056_TX_MIXG_BOOST_TUNE 0x64
301 #define B2056_TX_BB_GM_MASTER 0x65
302 #define B2056_TX_GMBB_GM 0x66
303 #define B2056_TX_GMBB_IDAC 0x67
304 #define B2056_TX_TXLPF_MASTER 0x68
305 #define B2056_TX_TXLPF_RCCAL 0x69
306 #define B2056_TX_TXLPF_RCCAL_OFF0 0x6A
307 #define B2056_TX_TXLPF_RCCAL_OFF1 0x6B
308 #define B2056_TX_TXLPF_RCCAL_OFF2 0x6C
309 #define B2056_TX_TXLPF_RCCAL_OFF3 0x6D
310 #define B2056_TX_TXLPF_RCCAL_OFF4 0x6E
311 #define B2056_TX_TXLPF_RCCAL_OFF5 0x6F
312 #define B2056_TX_TXLPF_RCCAL_OFF6 0x70
313 #define B2056_TX_TXLPF_BW 0x71
314 #define B2056_TX_TXLPF_GAIN 0x72
315 #define B2056_TX_TXLPF_IDAC 0x73
316 #define B2056_TX_TXLPF_IDAC_0 0x74
317 #define B2056_TX_TXLPF_IDAC_1 0x75
318 #define B2056_TX_TXLPF_IDAC_2 0x76
319 #define B2056_TX_TXLPF_IDAC_3 0x77
320 #define B2056_TX_TXLPF_IDAC_4 0x78
321 #define B2056_TX_TXLPF_IDAC_5 0x79
322 #define B2056_TX_TXLPF_IDAC_6 0x7A
323 #define B2056_TX_TXLPF_OPAMP_IDAC 0x7B
324 #define B2056_TX_TXLPF_MISC 0x7C
325 #define B2056_TX_TXSPARE1 0x7D
326 #define B2056_TX_TXSPARE2 0x7E
327 #define B2056_TX_TXSPARE3 0x7F
328 #define B2056_TX_TXSPARE4 0x80
329 #define B2056_TX_TXSPARE5 0x81
330 #define B2056_TX_TXSPARE6 0x82
331 #define B2056_TX_TXSPARE7 0x83
332 #define B2056_TX_TXSPARE8 0x84
333 #define B2056_TX_TXSPARE9 0x85
334 #define B2056_TX_TXSPARE10 0x86
335 #define B2056_TX_TXSPARE11 0x87
336 #define B2056_TX_TXSPARE12 0x88
337 #define B2056_TX_TXSPARE13 0x89
338 #define B2056_TX_TXSPARE14 0x8A
339 #define B2056_TX_TXSPARE15 0x8B
340 #define B2056_TX_TXSPARE16 0x8C
341 #define B2056_TX_STATUS_INTPA_GAIN 0x8D
342 #define B2056_TX_STATUS_PAD_GAIN 0x8E
343 #define B2056_TX_STATUS_PGA_GAIN 0x8F
344 #define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90
345 #define B2056_TX_STATUS_TXLPF_BW 0x91
346 #define B2056_TX_STATUS_TXLPF_RC 0x92
347 #define B2056_TX_GMBB_IDAC0 0x93
348 #define B2056_TX_GMBB_IDAC1 0x94
349 #define B2056_TX_GMBB_IDAC2 0x95
350 #define B2056_TX_GMBB_IDAC3 0x96
351 #define B2056_TX_GMBB_IDAC4 0x97
352 #define B2056_TX_GMBB_IDAC5 0x98
353 #define B2056_TX_GMBB_IDAC6 0x99
354 #define B2056_TX_GMBB_IDAC7 0x9A
356 #define B2056_RX_RESERVED_ADDR0 0x00
357 #define B2056_RX_IDCODE 0x01
358 #define B2056_RX_RESERVED_ADDR2 0x02
359 #define B2056_RX_RESERVED_ADDR3 0x03
360 #define B2056_RX_RESERVED_ADDR4 0x04
361 #define B2056_RX_RESERVED_ADDR5 0x05
362 #define B2056_RX_RESERVED_ADDR6 0x06
363 #define B2056_RX_RESERVED_ADDR7 0x07
364 #define B2056_RX_COM_CTRL 0x08
365 #define B2056_RX_COM_PU 0x09
366 #define B2056_RX_COM_OVR 0x0A
367 #define B2056_RX_COM_RESET 0x0B
368 #define B2056_RX_COM_RCAL 0x0C
369 #define B2056_RX_COM_RC_RXLPF 0x0D
370 #define B2056_RX_COM_RC_TXLPF 0x0E
371 #define B2056_RX_COM_RC_RXHPF 0x0F
372 #define B2056_RX_RESERVED_ADDR16 0x10
373 #define B2056_RX_RESERVED_ADDR17 0x11
374 #define B2056_RX_RESERVED_ADDR18 0x12
375 #define B2056_RX_RESERVED_ADDR19 0x13
376 #define B2056_RX_RESERVED_ADDR20 0x14
377 #define B2056_RX_RESERVED_ADDR21 0x15
378 #define B2056_RX_RESERVED_ADDR22 0x16
379 #define B2056_RX_RESERVED_ADDR23 0x17
380 #define B2056_RX_RESERVED_ADDR24 0x18
381 #define B2056_RX_RESERVED_ADDR25 0x19
382 #define B2056_RX_RESERVED_ADDR26 0x1A
383 #define B2056_RX_RESERVED_ADDR27 0x1B
384 #define B2056_RX_RESERVED_ADDR28 0x1C
385 #define B2056_RX_RESERVED_ADDR29 0x1D
386 #define B2056_RX_RESERVED_ADDR30 0x1E
387 #define B2056_RX_RESERVED_ADDR31 0x1F
388 #define B2056_RX_RXIQCAL_RXMUX 0x20
389 #define B2056_RX_RSSI_PU 0x21
390 #define B2056_RX_RSSI_SEL 0x22
391 #define B2056_RX_RSSI_GAIN 0x23
392 #define B2056_RX_RSSI_NB_IDAC 0x24
393 #define B2056_RX_RSSI_WB2I_IDAC_1 0x25
394 #define B2056_RX_RSSI_WB2I_IDAC_2 0x26
395 #define B2056_RX_RSSI_WB2Q_IDAC_1 0x27
396 #define B2056_RX_RSSI_WB2Q_IDAC_2 0x28
397 #define B2056_RX_RSSI_POLE 0x29
398 #define B2056_RX_RSSI_WB1_IDAC 0x2A
399 #define B2056_RX_RSSI_MISC 0x2B
400 #define B2056_RX_LNAA_MASTER 0x2C
401 #define B2056_RX_LNAA_TUNE 0x2D
402 #define B2056_RX_LNAA_GAIN 0x2E
403 #define B2056_RX_LNA_A_SLOPE 0x2F
404 #define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30
405 #define B2056_RX_LNAA2_IDAC 0x31
406 #define B2056_RX_LNA1A_MISC 0x32
407 #define B2056_RX_LNAG_MASTER 0x33
408 #define B2056_RX_LNAG_TUNE 0x34
409 #define B2056_RX_LNAG_GAIN 0x35
410 #define B2056_RX_LNA_G_SLOPE 0x36
411 #define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37
412 #define B2056_RX_LNAG2_IDAC 0x38
413 #define B2056_RX_LNA1G_MISC 0x39
414 #define B2056_RX_MIXA_MASTER 0x3A
415 #define B2056_RX_MIXA_VCM 0x3B
416 #define B2056_RX_MIXA_CTRLPTAT 0x3C
417 #define B2056_RX_MIXA_LOB_BIAS 0x3D
418 #define B2056_RX_MIXA_CORE_IDAC 0x3E
419 #define B2056_RX_MIXA_CMFB_IDAC 0x3F
420 #define B2056_RX_MIXA_BIAS_AUX 0x40
421 #define B2056_RX_MIXA_BIAS_MAIN 0x41
422 #define B2056_RX_MIXA_BIAS_MISC 0x42
423 #define B2056_RX_MIXA_MAST_BIAS 0x43
424 #define B2056_RX_MIXG_MASTER 0x44
425 #define B2056_RX_MIXG_VCM 0x45
426 #define B2056_RX_MIXG_CTRLPTAT 0x46
427 #define B2056_RX_MIXG_LOB_BIAS 0x47
428 #define B2056_RX_MIXG_CORE_IDAC 0x48
429 #define B2056_RX_MIXG_CMFB_IDAC 0x49
430 #define B2056_RX_MIXG_BIAS_AUX 0x4A
431 #define B2056_RX_MIXG_BIAS_MAIN 0x4B
432 #define B2056_RX_MIXG_BIAS_MISC 0x4C
433 #define B2056_RX_MIXG_MAST_BIAS 0x4D
434 #define B2056_RX_TIA_MASTER 0x4E
435 #define B2056_RX_TIA_IOPAMP 0x4F
436 #define B2056_RX_TIA_QOPAMP 0x50
437 #define B2056_RX_TIA_IMISC 0x51
438 #define B2056_RX_TIA_QMISC 0x52
439 #define B2056_RX_TIA_GAIN 0x53
440 #define B2056_RX_TIA_SPARE1 0x54
441 #define B2056_RX_TIA_SPARE2 0x55
442 #define B2056_RX_BB_LPF_MASTER 0x56
443 #define B2056_RX_AACI_MASTER 0x57
444 #define B2056_RX_RXLPF_IDAC 0x58
445 #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59
446 #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A
447 #define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B
448 #define B2056_RX_RXLPF_OUTVCM 0x5C
449 #define B2056_RX_RXLPF_INVCM_BODY 0x5D
450 #define B2056_RX_RXLPF_CC_OP 0x5E
451 #define B2056_RX_RXLPF_GAIN 0x5F
452 #define B2056_RX_RXLPF_Q_BW 0x60
453 #define B2056_RX_RXLPF_HP_CORNER_BW 0x61
454 #define B2056_RX_RXLPF_RCCAL_HPC 0x62
455 #define B2056_RX_RXHPF_OFF0 0x63
456 #define B2056_RX_RXHPF_OFF1 0x64
457 #define B2056_RX_RXHPF_OFF2 0x65
458 #define B2056_RX_RXHPF_OFF3 0x66
459 #define B2056_RX_RXHPF_OFF4 0x67
460 #define B2056_RX_RXHPF_OFF5 0x68
461 #define B2056_RX_RXHPF_OFF6 0x69
462 #define B2056_RX_RXHPF_OFF7 0x6A
463 #define B2056_RX_RXLPF_RCCAL_LPC 0x6B
464 #define B2056_RX_RXLPF_OFF_0 0x6C
465 #define B2056_RX_RXLPF_OFF_1 0x6D
466 #define B2056_RX_RXLPF_OFF_2 0x6E
467 #define B2056_RX_RXLPF_OFF_3 0x6F
468 #define B2056_RX_RXLPF_OFF_4 0x70
469 #define B2056_RX_UNUSED 0x71
470 #define B2056_RX_VGA_MASTER 0x72
471 #define B2056_RX_VGA_BIAS 0x73
472 #define B2056_RX_VGA_BIAS_DCCANCEL 0x74
473 #define B2056_RX_VGA_GAIN 0x75
474 #define B2056_RX_VGA_HP_CORNER_BW 0x76
475 #define B2056_RX_VGABUF_BIAS 0x77
476 #define B2056_RX_VGABUF_GAIN_BW 0x78
477 #define B2056_RX_TXFBMIX_A 0x79
478 #define B2056_RX_TXFBMIX_G 0x7A
479 #define B2056_RX_RXSPARE1 0x7B
480 #define B2056_RX_RXSPARE2 0x7C
481 #define B2056_RX_RXSPARE3 0x7D
482 #define B2056_RX_RXSPARE4 0x7E
483 #define B2056_RX_RXSPARE5 0x7F
484 #define B2056_RX_RXSPARE6 0x80
485 #define B2056_RX_RXSPARE7 0x81
486 #define B2056_RX_RXSPARE8 0x82
487 #define B2056_RX_RXSPARE9 0x83
488 #define B2056_RX_RXSPARE10 0x84
489 #define B2056_RX_RXSPARE11 0x85
490 #define B2056_RX_RXSPARE12 0x86
491 #define B2056_RX_RXSPARE13 0x87
492 #define B2056_RX_RXSPARE14 0x88
493 #define B2056_RX_RXSPARE15 0x89
494 #define B2056_RX_RXSPARE16 0x8A
495 #define B2056_RX_STATUS_LNAA_GAIN 0x8B
496 #define B2056_RX_STATUS_LNAG_GAIN 0x8C
497 #define B2056_RX_STATUS_MIXTIA_GAIN 0x8D
498 #define B2056_RX_STATUS_RXLPF_GAIN 0x8E
499 #define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F
500 #define B2056_RX_STATUS_RXLPF_Q 0x90
501 #define B2056_RX_STATUS_RXLPF_BUF_BW 0x91
502 #define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92
503 #define B2056_RX_STATUS_RXLPF_RC 0x93
504 #define B2056_RX_STATUS_HPC_RC 0x94
506 #define B2056_LNA1_A_PU 0x01
507 #define B2056_LNA2_A_PU 0x02
508 #define B2056_LNA1_G_PU 0x01
509 #define B2056_LNA2_G_PU 0x02
510 #define B2056_MIXA_PU_I 0x01
511 #define B2056_MIXA_PU_Q 0x02
512 #define B2056_MIXA_PU_GM 0x10
513 #define B2056_MIXG_PU_I 0x01
514 #define B2056_MIXG_PU_Q 0x02
515 #define B2056_MIXG_PU_GM 0x10
516 #define B2056_TIA_PU 0x01
517 #define B2056_BB_LPF_PU 0x20
518 #define B2056_W1_PU 0x02
519 #define B2056_W2_PU 0x04
520 #define B2056_NB_PU 0x08
521 #define B2056_RSSI_W1_SEL 0x02
522 #define B2056_RSSI_W2_SEL 0x04
523 #define B2056_RSSI_NB_SEL 0x08
524 #define B2056_VCM_MASK 0x1C
525 #define B2056_RSSI_VCM_SHIFT 0x02
527 #define B2056_SYN (0x0 << 12)
528 #define B2056_TX0 (0x2 << 12)
529 #define B2056_TX1 (0x3 << 12)
530 #define B2056_RX0 (0x6 << 12)
531 #define B2056_RX1 (0x7 << 12)
532 #define B2056_ALLTX (0xE << 12)
533 #define B2056_ALLRX (0xF << 12)
535 #define B2056_SYN_RESERVED_ADDR0 0x00
536 #define B2056_SYN_IDCODE 0x01
537 #define B2056_SYN_RESERVED_ADDR2 0x02
538 #define B2056_SYN_RESERVED_ADDR3 0x03
539 #define B2056_SYN_RESERVED_ADDR4 0x04
540 #define B2056_SYN_RESERVED_ADDR5 0x05
541 #define B2056_SYN_RESERVED_ADDR6 0x06
542 #define B2056_SYN_RESERVED_ADDR7 0x07
543 #define B2056_SYN_COM_CTRL 0x08
544 #define B2056_SYN_COM_PU 0x09
545 #define B2056_SYN_COM_OVR 0x0A
546 #define B2056_SYN_COM_RESET 0x0B
547 #define B2056_SYN_COM_RCAL 0x0C
548 #define B2056_SYN_COM_RC_RXLPF 0x0D
549 #define B2056_SYN_COM_RC_TXLPF 0x0E
550 #define B2056_SYN_COM_RC_RXHPF 0x0F
551 #define B2056_SYN_RESERVED_ADDR16 0x10
552 #define B2056_SYN_RESERVED_ADDR17 0x11
553 #define B2056_SYN_RESERVED_ADDR18 0x12
554 #define B2056_SYN_RESERVED_ADDR19 0x13
555 #define B2056_SYN_RESERVED_ADDR20 0x14
556 #define B2056_SYN_RESERVED_ADDR21 0x15
557 #define B2056_SYN_RESERVED_ADDR22 0x16
558 #define B2056_SYN_RESERVED_ADDR23 0x17
559 #define B2056_SYN_RESERVED_ADDR24 0x18
560 #define B2056_SYN_RESERVED_ADDR25 0x19
561 #define B2056_SYN_RESERVED_ADDR26 0x1A
562 #define B2056_SYN_RESERVED_ADDR27 0x1B
563 #define B2056_SYN_RESERVED_ADDR28 0x1C
564 #define B2056_SYN_RESERVED_ADDR29 0x1D
565 #define B2056_SYN_RESERVED_ADDR30 0x1E
566 #define B2056_SYN_RESERVED_ADDR31 0x1F
567 #define B2056_SYN_GPIO_MASTER1 0x20
568 #define B2056_SYN_GPIO_MASTER2 0x21
569 #define B2056_SYN_TOPBIAS_MASTER 0x22
570 #define B2056_SYN_TOPBIAS_RCAL 0x23
571 #define B2056_SYN_AFEREG 0x24
572 #define B2056_SYN_TEMPPROCSENSE 0x25
573 #define B2056_SYN_TEMPPROCSENSEIDAC 0x26
574 #define B2056_SYN_TEMPPROCSENSERCAL 0x27
575 #define B2056_SYN_LPO 0x28
576 #define B2056_SYN_VDDCAL_MASTER 0x29
577 #define B2056_SYN_VDDCAL_IDAC 0x2A
578 #define B2056_SYN_VDDCAL_STATUS 0x2B
579 #define B2056_SYN_RCAL_MASTER 0x2C
580 #define B2056_SYN_RCAL_CODE_OUT 0x2D
581 #define B2056_SYN_RCCAL_CTRL0 0x2E
582 #define B2056_SYN_RCCAL_CTRL1 0x2F
583 #define B2056_SYN_RCCAL_CTRL2 0x30
584 #define B2056_SYN_RCCAL_CTRL3 0x31
585 #define B2056_SYN_RCCAL_CTRL4 0x32
586 #define B2056_SYN_RCCAL_CTRL5 0x33
587 #define B2056_SYN_RCCAL_CTRL6 0x34
588 #define B2056_SYN_RCCAL_CTRL7 0x35
589 #define B2056_SYN_RCCAL_CTRL8 0x36
590 #define B2056_SYN_RCCAL_CTRL9 0x37
591 #define B2056_SYN_RCCAL_CTRL10 0x38
592 #define B2056_SYN_RCCAL_CTRL11 0x39
593 #define B2056_SYN_ZCAL_SPARE1 0x3A
594 #define B2056_SYN_ZCAL_SPARE2 0x3B
595 #define B2056_SYN_PLL_MAST1 0x3C
596 #define B2056_SYN_PLL_MAST2 0x3D
597 #define B2056_SYN_PLL_MAST3 0x3E
598 #define B2056_SYN_PLL_BIAS_RESET 0x3F
599 #define B2056_SYN_PLL_XTAL0 0x40
600 #define B2056_SYN_PLL_XTAL1 0x41
601 #define B2056_SYN_PLL_XTAL3 0x42
602 #define B2056_SYN_PLL_XTAL4 0x43
603 #define B2056_SYN_PLL_XTAL5 0x44
604 #define B2056_SYN_PLL_XTAL6 0x45
605 #define B2056_SYN_PLL_REFDIV 0x46
606 #define B2056_SYN_PLL_PFD 0x47
607 #define B2056_SYN_PLL_CP1 0x48
608 #define B2056_SYN_PLL_CP2 0x49
609 #define B2056_SYN_PLL_CP3 0x4A
610 #define B2056_SYN_PLL_LOOPFILTER1 0x4B
611 #define B2056_SYN_PLL_LOOPFILTER2 0x4C
612 #define B2056_SYN_PLL_LOOPFILTER3 0x4D
613 #define B2056_SYN_PLL_LOOPFILTER4 0x4E
614 #define B2056_SYN_PLL_LOOPFILTER5 0x4F
615 #define B2056_SYN_PLL_MMD1 0x50
616 #define B2056_SYN_PLL_MMD2 0x51
617 #define B2056_SYN_PLL_VCO1 0x52
618 #define B2056_SYN_PLL_VCO2 0x53
619 #define B2056_SYN_PLL_MONITOR1 0x54
620 #define B2056_SYN_PLL_MONITOR2 0x55
621 #define B2056_SYN_PLL_VCOCAL1 0x56
622 #define B2056_SYN_PLL_VCOCAL2 0x57
623 #define B2056_SYN_PLL_VCOCAL4 0x58
624 #define B2056_SYN_PLL_VCOCAL5 0x59
625 #define B2056_SYN_PLL_VCOCAL6 0x5A
626 #define B2056_SYN_PLL_VCOCAL7 0x5B
627 #define B2056_SYN_PLL_VCOCAL8 0x5C
628 #define B2056_SYN_PLL_VCOCAL9 0x5D
629 #define B2056_SYN_PLL_VCOCAL10 0x5E
630 #define B2056_SYN_PLL_VCOCAL11 0x5F
631 #define B2056_SYN_PLL_VCOCAL12 0x60
632 #define B2056_SYN_PLL_VCOCAL13 0x61
633 #define B2056_SYN_PLL_VREG 0x62
634 #define B2056_SYN_PLL_STATUS1 0x63
635 #define B2056_SYN_PLL_STATUS2 0x64
636 #define B2056_SYN_PLL_STATUS3 0x65
637 #define B2056_SYN_LOGEN_PU0 0x66
638 #define B2056_SYN_LOGEN_PU1 0x67
639 #define B2056_SYN_LOGEN_PU2 0x68
640 #define B2056_SYN_LOGEN_PU3 0x69
641 #define B2056_SYN_LOGEN_PU5 0x6A
642 #define B2056_SYN_LOGEN_PU6 0x6B
643 #define B2056_SYN_LOGEN_PU7 0x6C
644 #define B2056_SYN_LOGEN_PU8 0x6D
645 #define B2056_SYN_LOGEN_BIAS_RESET 0x6E
646 #define B2056_SYN_LOGEN_RCCR1 0x6F
647 #define B2056_SYN_LOGEN_VCOBUF1 0x70
648 #define B2056_SYN_LOGEN_MIXER1 0x71
649 #define B2056_SYN_LOGEN_MIXER2 0x72
650 #define B2056_SYN_LOGEN_BUF1 0x73
651 #define B2056_SYN_LOGENBUF2 0x74
652 #define B2056_SYN_LOGEN_BUF3 0x75
653 #define B2056_SYN_LOGEN_BUF4 0x76
654 #define B2056_SYN_LOGEN_DIV1 0x77
655 #define B2056_SYN_LOGEN_DIV2 0x78
656 #define B2056_SYN_LOGEN_DIV3 0x79
657 #define B2056_SYN_LOGEN_ACL1 0x7A
658 #define B2056_SYN_LOGEN_ACL2 0x7B
659 #define B2056_SYN_LOGEN_ACL3 0x7C
660 #define B2056_SYN_LOGEN_ACL4 0x7D
661 #define B2056_SYN_LOGEN_ACL5 0x7E
662 #define B2056_SYN_LOGEN_ACL6 0x7F
663 #define B2056_SYN_LOGEN_ACLOUT 0x80
664 #define B2056_SYN_LOGEN_ACLCAL1 0x81
665 #define B2056_SYN_LOGEN_ACLCAL2 0x82
666 #define B2056_SYN_LOGEN_ACLCAL3 0x83
667 #define B2056_SYN_CALEN 0x84
668 #define B2056_SYN_LOGEN_PEAKDET1 0x85
669 #define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86
670 #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87
671 #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88
672 #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89
673 #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A
674 #define B2056_SYN_LOGEN_VCOBUF2 0x8B
675 #define B2056_SYN_LOGEN_MIXER3 0x8C
676 #define B2056_SYN_LOGEN_BUF5 0x8D
677 #define B2056_SYN_LOGEN_BUF6 0x8E
678 #define B2056_SYN_LOGEN_CBUFRX1 0x8F
679 #define B2056_SYN_LOGEN_CBUFRX2 0x90
680 #define B2056_SYN_LOGEN_CBUFRX3 0x91
681 #define B2056_SYN_LOGEN_CBUFRX4 0x92
682 #define B2056_SYN_LOGEN_CBUFTX1 0x93
683 #define B2056_SYN_LOGEN_CBUFTX2 0x94
684 #define B2056_SYN_LOGEN_CBUFTX3 0x95
685 #define B2056_SYN_LOGEN_CBUFTX4 0x96
686 #define B2056_SYN_LOGEN_CMOSRX1 0x97
687 #define B2056_SYN_LOGEN_CMOSRX2 0x98
688 #define B2056_SYN_LOGEN_CMOSRX3 0x99
689 #define B2056_SYN_LOGEN_CMOSRX4 0x9A
690 #define B2056_SYN_LOGEN_CMOSTX1 0x9B
691 #define B2056_SYN_LOGEN_CMOSTX2 0x9C
692 #define B2056_SYN_LOGEN_CMOSTX3 0x9D
693 #define B2056_SYN_LOGEN_CMOSTX4 0x9E
694 #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F
695 #define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0
696 #define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1
697 #define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2
698 #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3
699 #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4
700 #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5
701 #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6
702 #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7
703 #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8
704 #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9
705 #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA
706 #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB
707 #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC
708 #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD
709 #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE
710 #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF
711 #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0
712 #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1
713 #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2
714 #define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3
715 #define B2056_SYN_LOGEN_CORE_CALVALID 0xB4
716 #define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5
717 #define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6
719 #define B2056_TX_RESERVED_ADDR0 0x00
720 #define B2056_TX_IDCODE 0x01
721 #define B2056_TX_RESERVED_ADDR2 0x02
722 #define B2056_TX_RESERVED_ADDR3 0x03
723 #define B2056_TX_RESERVED_ADDR4 0x04
724 #define B2056_TX_RESERVED_ADDR5 0x05
725 #define B2056_TX_RESERVED_ADDR6 0x06
726 #define B2056_TX_RESERVED_ADDR7 0x07
727 #define B2056_TX_COM_CTRL 0x08
728 #define B2056_TX_COM_PU 0x09
729 #define B2056_TX_COM_OVR 0x0A
730 #define B2056_TX_COM_RESET 0x0B
731 #define B2056_TX_COM_RCAL 0x0C
732 #define B2056_TX_COM_RC_RXLPF 0x0D
733 #define B2056_TX_COM_RC_TXLPF 0x0E
734 #define B2056_TX_COM_RC_RXHPF 0x0F
735 #define B2056_TX_RESERVED_ADDR16 0x10
736 #define B2056_TX_RESERVED_ADDR17 0x11
737 #define B2056_TX_RESERVED_ADDR18 0x12
738 #define B2056_TX_RESERVED_ADDR19 0x13
739 #define B2056_TX_RESERVED_ADDR20 0x14
740 #define B2056_TX_RESERVED_ADDR21 0x15
741 #define B2056_TX_RESERVED_ADDR22 0x16
742 #define B2056_TX_RESERVED_ADDR23 0x17
743 #define B2056_TX_RESERVED_ADDR24 0x18
744 #define B2056_TX_RESERVED_ADDR25 0x19
745 #define B2056_TX_RESERVED_ADDR26 0x1A
746 #define B2056_TX_RESERVED_ADDR27 0x1B
747 #define B2056_TX_RESERVED_ADDR28 0x1C
748 #define B2056_TX_RESERVED_ADDR29 0x1D
749 #define B2056_TX_RESERVED_ADDR30 0x1E
750 #define B2056_TX_RESERVED_ADDR31 0x1F
751 #define B2056_TX_IQCAL_GAIN_BW 0x20
752 #define B2056_TX_LOFT_FINE_I 0x21
753 #define B2056_TX_LOFT_FINE_Q 0x22
754 #define B2056_TX_LOFT_COARSE_I 0x23
755 #define B2056_TX_LOFT_COARSE_Q 0x24
756 #define B2056_TX_TX_COM_MASTER1 0x25
757 #define B2056_TX_TX_COM_MASTER2 0x26
758 #define B2056_TX_RXIQCAL_TXMUX 0x27
759 #define B2056_TX_TX_SSI_MASTER 0x28
760 #define B2056_TX_IQCAL_VCM_HG 0x29
761 #define B2056_TX_IQCAL_IDAC 0x2A
762 #define B2056_TX_TSSI_VCM 0x2B
763 #define B2056_TX_TX_AMP_DET 0x2C
764 #define B2056_TX_TX_SSI_MUX 0x2D
765 #define B2056_TX_TSSIA 0x2E
766 #define B2056_TX_TSSIG 0x2F
767 #define B2056_TX_TSSI_MISC1 0x30
768 #define B2056_TX_TSSI_MISC2 0x31
769 #define B2056_TX_TSSI_MISC3 0x32
770 #define B2056_TX_PA_SPARE1 0x33
771 #define B2056_TX_PA_SPARE2 0x34
772 #define B2056_TX_INTPAA_MASTER 0x35
773 #define B2056_TX_INTPAA_GAIN 0x36
774 #define B2056_TX_INTPAA_BOOST_TUNE 0x37
775 #define B2056_TX_INTPAA_IAUX_STAT 0x38
776 #define B2056_TX_INTPAA_IAUX_DYN 0x39
777 #define B2056_TX_INTPAA_IMAIN_STAT 0x3A
778 #define B2056_TX_INTPAA_IMAIN_DYN 0x3B
779 #define B2056_TX_INTPAA_CASCBIAS 0x3C
780 #define B2056_TX_INTPAA_PASLOPE 0x3D
781 #define B2056_TX_INTPAA_PA_MISC 0x3E
782 #define B2056_TX_INTPAG_MASTER 0x3F
783 #define B2056_TX_INTPAG_GAIN 0x40
784 #define B2056_TX_INTPAG_BOOST_TUNE 0x41
785 #define B2056_TX_INTPAG_IAUX_STAT 0x42
786 #define B2056_TX_INTPAG_IAUX_DYN 0x43
787 #define B2056_TX_INTPAG_IMAIN_STAT 0x44
788 #define B2056_TX_INTPAG_IMAIN_DYN 0x45
789 #define B2056_TX_INTPAG_CASCBIAS 0x46
790 #define B2056_TX_INTPAG_PASLOPE 0x47
791 #define B2056_TX_INTPAG_PA_MISC 0x48
792 #define B2056_TX_PADA_MASTER 0x49
793 #define B2056_TX_PADA_IDAC 0x4A
794 #define B2056_TX_PADA_CASCBIAS 0x4B
795 #define B2056_TX_PADA_GAIN 0x4C
796 #define B2056_TX_PADA_BOOST_TUNE 0x4D
797 #define B2056_TX_PADA_SLOPE 0x4E
798 #define B2056_TX_PADG_MASTER 0x4F
799 #define B2056_TX_PADG_IDAC 0x50
800 #define B2056_TX_PADG_CASCBIAS 0x51
801 #define B2056_TX_PADG_GAIN 0x52
802 #define B2056_TX_PADG_BOOST_TUNE 0x53
803 #define B2056_TX_PADG_SLOPE 0x54
804 #define B2056_TX_PGAA_MASTER 0x55
805 #define B2056_TX_PGAA_IDAC 0x56
806 #define B2056_TX_PGAA_GAIN 0x57
807 #define B2056_TX_PGAA_BOOST_TUNE 0x58
808 #define B2056_TX_PGAA_SLOPE 0x59
809 #define B2056_TX_PGAA_MISC 0x5A
810 #define B2056_TX_PGAG_MASTER 0x5B
811 #define B2056_TX_PGAG_IDAC 0x5C
812 #define B2056_TX_PGAG_GAIN 0x5D
813 #define B2056_TX_PGAG_BOOST_TUNE 0x5E
814 #define B2056_TX_PGAG_SLOPE 0x5F
815 #define B2056_TX_PGAG_MISC 0x60
816 #define B2056_TX_MIXA_MASTER 0x61
817 #define B2056_TX_MIXA_BOOST_TUNE 0x62
818 #define B2056_TX_MIXG 0x63
819 #define B2056_TX_MIXG_BOOST_TUNE 0x64
820 #define B2056_TX_BB_GM_MASTER 0x65
821 #define B2056_TX_GMBB_GM 0x66
822 #define B2056_TX_GMBB_IDAC 0x67
823 #define B2056_TX_TXLPF_MASTER 0x68
824 #define B2056_TX_TXLPF_RCCAL 0x69
825 #define B2056_TX_TXLPF_RCCAL_OFF0 0x6A
826 #define B2056_TX_TXLPF_RCCAL_OFF1 0x6B
827 #define B2056_TX_TXLPF_RCCAL_OFF2 0x6C
828 #define B2056_TX_TXLPF_RCCAL_OFF3 0x6D
829 #define B2056_TX_TXLPF_RCCAL_OFF4 0x6E
830 #define B2056_TX_TXLPF_RCCAL_OFF5 0x6F
831 #define B2056_TX_TXLPF_RCCAL_OFF6 0x70
832 #define B2056_TX_TXLPF_BW 0x71
833 #define B2056_TX_TXLPF_GAIN 0x72
834 #define B2056_TX_TXLPF_IDAC 0x73
835 #define B2056_TX_TXLPF_IDAC_0 0x74
836 #define B2056_TX_TXLPF_IDAC_1 0x75
837 #define B2056_TX_TXLPF_IDAC_2 0x76
838 #define B2056_TX_TXLPF_IDAC_3 0x77
839 #define B2056_TX_TXLPF_IDAC_4 0x78
840 #define B2056_TX_TXLPF_IDAC_5 0x79
841 #define B2056_TX_TXLPF_IDAC_6 0x7A
842 #define B2056_TX_TXLPF_OPAMP_IDAC 0x7B
843 #define B2056_TX_TXLPF_MISC 0x7C
844 #define B2056_TX_TXSPARE1 0x7D
845 #define B2056_TX_TXSPARE2 0x7E
846 #define B2056_TX_TXSPARE3 0x7F
847 #define B2056_TX_TXSPARE4 0x80
848 #define B2056_TX_TXSPARE5 0x81
849 #define B2056_TX_TXSPARE6 0x82
850 #define B2056_TX_TXSPARE7 0x83
851 #define B2056_TX_TXSPARE8 0x84
852 #define B2056_TX_TXSPARE9 0x85
853 #define B2056_TX_TXSPARE10 0x86
854 #define B2056_TX_TXSPARE11 0x87
855 #define B2056_TX_TXSPARE12 0x88
856 #define B2056_TX_TXSPARE13 0x89
857 #define B2056_TX_TXSPARE14 0x8A
858 #define B2056_TX_TXSPARE15 0x8B
859 #define B2056_TX_TXSPARE16 0x8C
860 #define B2056_TX_STATUS_INTPA_GAIN 0x8D
861 #define B2056_TX_STATUS_PAD_GAIN 0x8E
862 #define B2056_TX_STATUS_PGA_GAIN 0x8F
863 #define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90
864 #define B2056_TX_STATUS_TXLPF_BW 0x91
865 #define B2056_TX_STATUS_TXLPF_RC 0x92
866 #define B2056_TX_GMBB_IDAC0 0x93
867 #define B2056_TX_GMBB_IDAC1 0x94
868 #define B2056_TX_GMBB_IDAC2 0x95
869 #define B2056_TX_GMBB_IDAC3 0x96
870 #define B2056_TX_GMBB_IDAC4 0x97
871 #define B2056_TX_GMBB_IDAC5 0x98
872 #define B2056_TX_GMBB_IDAC6 0x99
873 #define B2056_TX_GMBB_IDAC7 0x9A
875 #define B2056_RX_RESERVED_ADDR0 0x00
876 #define B2056_RX_IDCODE 0x01
877 #define B2056_RX_RESERVED_ADDR2 0x02
878 #define B2056_RX_RESERVED_ADDR3 0x03
879 #define B2056_RX_RESERVED_ADDR4 0x04
880 #define B2056_RX_RESERVED_ADDR5 0x05
881 #define B2056_RX_RESERVED_ADDR6 0x06
882 #define B2056_RX_RESERVED_ADDR7 0x07
883 #define B2056_RX_COM_CTRL 0x08
884 #define B2056_RX_COM_PU 0x09
885 #define B2056_RX_COM_OVR 0x0A
886 #define B2056_RX_COM_RESET 0x0B
887 #define B2056_RX_COM_RCAL 0x0C
888 #define B2056_RX_COM_RC_RXLPF 0x0D
889 #define B2056_RX_COM_RC_TXLPF 0x0E
890 #define B2056_RX_COM_RC_RXHPF 0x0F
891 #define B2056_RX_RESERVED_ADDR16 0x10
892 #define B2056_RX_RESERVED_ADDR17 0x11
893 #define B2056_RX_RESERVED_ADDR18 0x12
894 #define B2056_RX_RESERVED_ADDR19 0x13
895 #define B2056_RX_RESERVED_ADDR20 0x14
896 #define B2056_RX_RESERVED_ADDR21 0x15
897 #define B2056_RX_RESERVED_ADDR22 0x16
898 #define B2056_RX_RESERVED_ADDR23 0x17
899 #define B2056_RX_RESERVED_ADDR24 0x18
900 #define B2056_RX_RESERVED_ADDR25 0x19
901 #define B2056_RX_RESERVED_ADDR26 0x1A
902 #define B2056_RX_RESERVED_ADDR27 0x1B
903 #define B2056_RX_RESERVED_ADDR28 0x1C
904 #define B2056_RX_RESERVED_ADDR29 0x1D
905 #define B2056_RX_RESERVED_ADDR30 0x1E
906 #define B2056_RX_RESERVED_ADDR31 0x1F
907 #define B2056_RX_RXIQCAL_RXMUX 0x20
908 #define B2056_RX_RSSI_PU 0x21
909 #define B2056_RX_RSSI_SEL 0x22
910 #define B2056_RX_RSSI_GAIN 0x23
911 #define B2056_RX_RSSI_NB_IDAC 0x24
912 #define B2056_RX_RSSI_WB2I_IDAC_1 0x25
913 #define B2056_RX_RSSI_WB2I_IDAC_2 0x26
914 #define B2056_RX_RSSI_WB2Q_IDAC_1 0x27
915 #define B2056_RX_RSSI_WB2Q_IDAC_2 0x28
916 #define B2056_RX_RSSI_POLE 0x29
917 #define B2056_RX_RSSI_WB1_IDAC 0x2A
918 #define B2056_RX_RSSI_MISC 0x2B
919 #define B2056_RX_LNAA_MASTER 0x2C
920 #define B2056_RX_LNAA_TUNE 0x2D
921 #define B2056_RX_LNAA_GAIN 0x2E
922 #define B2056_RX_LNA_A_SLOPE 0x2F
923 #define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30
924 #define B2056_RX_LNAA2_IDAC 0x31
925 #define B2056_RX_LNA1A_MISC 0x32
926 #define B2056_RX_LNAG_MASTER 0x33
927 #define B2056_RX_LNAG_TUNE 0x34
928 #define B2056_RX_LNAG_GAIN 0x35
929 #define B2056_RX_LNA_G_SLOPE 0x36
930 #define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37
931 #define B2056_RX_LNAG2_IDAC 0x38
932 #define B2056_RX_LNA1G_MISC 0x39
933 #define B2056_RX_MIXA_MASTER 0x3A
934 #define B2056_RX_MIXA_VCM 0x3B
935 #define B2056_RX_MIXA_CTRLPTAT 0x3C
936 #define B2056_RX_MIXA_LOB_BIAS 0x3D
937 #define B2056_RX_MIXA_CORE_IDAC 0x3E
938 #define B2056_RX_MIXA_CMFB_IDAC 0x3F
939 #define B2056_RX_MIXA_BIAS_AUX 0x40
940 #define B2056_RX_MIXA_BIAS_MAIN 0x41
941 #define B2056_RX_MIXA_BIAS_MISC 0x42
942 #define B2056_RX_MIXA_MAST_BIAS 0x43
943 #define B2056_RX_MIXG_MASTER 0x44
944 #define B2056_RX_MIXG_VCM 0x45
945 #define B2056_RX_MIXG_CTRLPTAT 0x46
946 #define B2056_RX_MIXG_LOB_BIAS 0x47
947 #define B2056_RX_MIXG_CORE_IDAC 0x48
948 #define B2056_RX_MIXG_CMFB_IDAC 0x49
949 #define B2056_RX_MIXG_BIAS_AUX 0x4A
950 #define B2056_RX_MIXG_BIAS_MAIN 0x4B
951 #define B2056_RX_MIXG_BIAS_MISC 0x4C
952 #define B2056_RX_MIXG_MAST_BIAS 0x4D
953 #define B2056_RX_TIA_MASTER 0x4E
954 #define B2056_RX_TIA_IOPAMP 0x4F
955 #define B2056_RX_TIA_QOPAMP 0x50
956 #define B2056_RX_TIA_IMISC 0x51
957 #define B2056_RX_TIA_QMISC 0x52
958 #define B2056_RX_TIA_GAIN 0x53
959 #define B2056_RX_TIA_SPARE1 0x54
960 #define B2056_RX_TIA_SPARE2 0x55
961 #define B2056_RX_BB_LPF_MASTER 0x56
962 #define B2056_RX_AACI_MASTER 0x57
963 #define B2056_RX_RXLPF_IDAC 0x58
964 #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59
965 #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A
966 #define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B
967 #define B2056_RX_RXLPF_OUTVCM 0x5C
968 #define B2056_RX_RXLPF_INVCM_BODY 0x5D
969 #define B2056_RX_RXLPF_CC_OP 0x5E
970 #define B2056_RX_RXLPF_GAIN 0x5F
971 #define B2056_RX_RXLPF_Q_BW 0x60
972 #define B2056_RX_RXLPF_HP_CORNER_BW 0x61
973 #define B2056_RX_RXLPF_RCCAL_HPC 0x62
974 #define B2056_RX_RXHPF_OFF0 0x63
975 #define B2056_RX_RXHPF_OFF1 0x64
976 #define B2056_RX_RXHPF_OFF2 0x65
977 #define B2056_RX_RXHPF_OFF3 0x66
978 #define B2056_RX_RXHPF_OFF4 0x67
979 #define B2056_RX_RXHPF_OFF5 0x68
980 #define B2056_RX_RXHPF_OFF6 0x69
981 #define B2056_RX_RXHPF_OFF7 0x6A
982 #define B2056_RX_RXLPF_RCCAL_LPC 0x6B
983 #define B2056_RX_RXLPF_OFF_0 0x6C
984 #define B2056_RX_RXLPF_OFF_1 0x6D
985 #define B2056_RX_RXLPF_OFF_2 0x6E
986 #define B2056_RX_RXLPF_OFF_3 0x6F
987 #define B2056_RX_RXLPF_OFF_4 0x70
988 #define B2056_RX_UNUSED 0x71
989 #define B2056_RX_VGA_MASTER 0x72
990 #define B2056_RX_VGA_BIAS 0x73
991 #define B2056_RX_VGA_BIAS_DCCANCEL 0x74
992 #define B2056_RX_VGA_GAIN 0x75
993 #define B2056_RX_VGA_HP_CORNER_BW 0x76
994 #define B2056_RX_VGABUF_BIAS 0x77
995 #define B2056_RX_VGABUF_GAIN_BW 0x78
996 #define B2056_RX_TXFBMIX_A 0x79
997 #define B2056_RX_TXFBMIX_G 0x7A
998 #define B2056_RX_RXSPARE1 0x7B
999 #define B2056_RX_RXSPARE2 0x7C
1000 #define B2056_RX_RXSPARE3 0x7D
1001 #define B2056_RX_RXSPARE4 0x7E
1002 #define B2056_RX_RXSPARE5 0x7F
1003 #define B2056_RX_RXSPARE6 0x80
1004 #define B2056_RX_RXSPARE7 0x81
1005 #define B2056_RX_RXSPARE8 0x82
1006 #define B2056_RX_RXSPARE9 0x83
1007 #define B2056_RX_RXSPARE10 0x84
1008 #define B2056_RX_RXSPARE11 0x85
1009 #define B2056_RX_RXSPARE12 0x86
1010 #define B2056_RX_RXSPARE13 0x87
1011 #define B2056_RX_RXSPARE14 0x88
1012 #define B2056_RX_RXSPARE15 0x89
1013 #define B2056_RX_RXSPARE16 0x8A
1014 #define B2056_RX_STATUS_LNAA_GAIN 0x8B
1015 #define B2056_RX_STATUS_LNAG_GAIN 0x8C
1016 #define B2056_RX_STATUS_MIXTIA_GAIN 0x8D
1017 #define B2056_RX_STATUS_RXLPF_GAIN 0x8E
1018 #define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F
1019 #define B2056_RX_STATUS_RXLPF_Q 0x90
1020 #define B2056_RX_STATUS_RXLPF_BUF_BW 0x91
1021 #define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92
1022 #define B2056_RX_STATUS_RXLPF_RC 0x93
1023 #define B2056_RX_STATUS_HPC_RC 0x94
1025 #define B2056_LNA1_A_PU 0x01
1026 #define B2056_LNA2_A_PU 0x02
1027 #define B2056_LNA1_G_PU 0x01
1028 #define B2056_LNA2_G_PU 0x02
1029 #define B2056_MIXA_PU_I 0x01
1030 #define B2056_MIXA_PU_Q 0x02
1031 #define B2056_MIXA_PU_GM 0x10
1032 #define B2056_MIXG_PU_I 0x01
1033 #define B2056_MIXG_PU_Q 0x02
1034 #define B2056_MIXG_PU_GM 0x10
1035 #define B2056_TIA_PU 0x01
1036 #define B2056_BB_LPF_PU 0x20
1037 #define B2056_W1_PU 0x02
1038 #define B2056_W2_PU 0x04
1039 #define B2056_NB_PU 0x08
1040 #define B2056_RSSI_W1_SEL 0x02
1041 #define B2056_RSSI_W2_SEL 0x04
1042 #define B2056_RSSI_NB_SEL 0x08
1043 #define B2056_VCM_MASK 0x1C
1044 #define B2056_RSSI_VCM_SHIFT 0x02
1046 struct b43_nphy_channeltab_entry_rev3 {
1047 /* The channel frequency in MHz */
1048 u16 freq;
1049 /* Radio register values on channelswitch */
1050 u8 radio_syn_pll_vcocal1;
1051 u8 radio_syn_pll_vcocal2;
1052 u8 radio_syn_pll_refdiv;
1053 u8 radio_syn_pll_mmd2;
1054 u8 radio_syn_pll_mmd1;
1055 u8 radio_syn_pll_loopfilter1;
1056 u8 radio_syn_pll_loopfilter2;
1057 u8 radio_syn_pll_loopfilter3;
1058 u8 radio_syn_pll_loopfilter4;
1059 u8 radio_syn_pll_loopfilter5;
1060 u8 radio_syn_reserved_addr27;
1061 u8 radio_syn_reserved_addr28;
1062 u8 radio_syn_reserved_addr29;
1063 u8 radio_syn_logen_vcobuf1;
1064 u8 radio_syn_logen_mixer2;
1065 u8 radio_syn_logen_buf3;
1066 u8 radio_syn_logen_buf4;
1067 u8 radio_rx0_lnaa_tune;
1068 u8 radio_rx0_lnag_tune;
1069 u8 radio_tx0_intpaa_boost_tune;
1070 u8 radio_tx0_intpag_boost_tune;
1071 u8 radio_tx0_pada_boost_tune;
1072 u8 radio_tx0_padg_boost_tune;
1073 u8 radio_tx0_pgaa_boost_tune;
1074 u8 radio_tx0_pgag_boost_tune;
1075 u8 radio_tx0_mixa_boost_tune;
1076 u8 radio_tx0_mixg_boost_tune;
1077 u8 radio_rx1_lnaa_tune;
1078 u8 radio_rx1_lnag_tune;
1079 u8 radio_tx1_intpaa_boost_tune;
1080 u8 radio_tx1_intpag_boost_tune;
1081 u8 radio_tx1_pada_boost_tune;
1082 u8 radio_tx1_padg_boost_tune;
1083 u8 radio_tx1_pgaa_boost_tune;
1084 u8 radio_tx1_pgag_boost_tune;
1085 u8 radio_tx1_mixa_boost_tune;
1086 u8 radio_tx1_mixg_boost_tune;
1087 /* PHY register values on channelswitch */
1088 struct b43_phy_n_sfo_cfg phy_regs;
1091 void b2056_upload_inittabs(struct b43_wldev *dev,
1092 bool ghz5, bool ignore_uploadflag);
1093 void b2056_upload_syn_pll_cp2(struct b43_wldev *dev, bool ghz5);
1095 /* Get the NPHY Channel Switch Table entry for a channel.
1096 * Returns NULL on failure to find an entry. */
1097 const struct b43_nphy_channeltab_entry_rev3 *
1098 b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq);
1100 #endif /* B43_RADIO_2056_H_ */