include/linux/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <asm-generic/gpio.h>
  15
  16 typedef unsigned short pinmux_enum_t;
  17 typedef unsigned short pinmux_flag_t;
  18
  19 #define PINMUX_TYPE_NONE            0
  20 #define PINMUX_TYPE_FUNCTION        1
  21 #define PINMUX_TYPE_GPIO            2
  22 #define PINMUX_TYPE_OUTPUT          3
  23 #define PINMUX_TYPE_INPUT           4
  24 #define PINMUX_TYPE_INPUT_PULLUP    5
  25 #define PINMUX_TYPE_INPUT_PULLDOWN  6
  26
  27 #define PINMUX_FLAG_TYPE            (0x7)
  28 #define PINMUX_FLAG_WANT_PULLUP     (1 << 3)
  29 #define PINMUX_FLAG_WANT_PULLDOWN   (1 << 4)
  30
  31 #define PINMUX_FLAG_DBIT_SHIFT      5
  32 #define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT)
  33 #define PINMUX_FLAG_DREG_SHIFT      10
  34 #define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT)
  35
  36 struct pinmux_gpio {
  37         pinmux_enum_t enum_id;
  38         pinmux_flag_t flags;
  39 };
  40
  41 #define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
  42 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  43
  44 struct pinmux_cfg_reg {
  45         unsigned long reg, reg_width, field_width;
  46         unsigned long *cnt;
  47         pinmux_enum_t *enum_ids;
  48         unsigned long *var_field_width;
  49 };
  50
  51 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  52         .reg = r, .reg_width = r_width, .field_width = f_width,         \
  53         .cnt = (unsigned long [r_width / f_width]) {}, \
  54         .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
  55
  56 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  57         .reg = r, .reg_width = r_width, \
  58         .cnt = (unsigned long [r_width]) {}, \
  59         .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  60         .enum_ids = (pinmux_enum_t [])
  61
  62 struct pinmux_data_reg {
  63         unsigned long reg, reg_width, reg_shadow;
  64         pinmux_enum_t *enum_ids;
  65         void __iomem *mapped_reg;
  66 };
  67
  68 #define PINMUX_DATA_REG(name, r, r_width) \
  69         .reg = r, .reg_width = r_width, \
  70         .enum_ids = (pinmux_enum_t [r_width]) \
  71
  72 struct pinmux_irq {
  73         int irq;
  74         pinmux_enum_t *enum_ids;
  75 };
  76
  77 #define PINMUX_IRQ(irq_nr, ids...)                         \
  78         { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } }    \
  79
  80 struct pinmux_range {
  81         pinmux_enum_t begin;
  82         pinmux_enum_t end;
  83         pinmux_enum_t force;
  84 };
  85
  86 struct pfc_window {
  87         phys_addr_t phys;
  88         void __iomem *virt;
  89         unsigned long size;
  90 };
  91
  92 struct pinmux_info {
  93         char *name;
  94         pinmux_enum_t reserved_id;
  95         struct pinmux_range data;
  96         struct pinmux_range input;
  97         struct pinmux_range input_pd;
  98         struct pinmux_range input_pu;
  99         struct pinmux_range output;
 100         struct pinmux_range mark;
 101         struct pinmux_range function;
 102
 103         unsigned first_gpio, last_gpio;
 104
 105         struct pinmux_gpio *gpios;
 106         struct pinmux_cfg_reg *cfg_regs;
 107         struct pinmux_data_reg *data_regs;
 108
 109         pinmux_enum_t *gpio_data;
 110         unsigned int gpio_data_size;
 111
 112         struct pinmux_irq *gpio_irq;
 113         unsigned int gpio_irq_size;
 114
 115         struct resource *resource;
 116         unsigned int num_resources;
 117         struct pfc_window *window;
 118
 119         unsigned long unlock_reg;
 120
 121         struct gpio_chip chip;
 122 };
 123
 124 int register_pinmux(struct pinmux_info *pip);
 125 int unregister_pinmux(struct pinmux_info *pip);
 126
 127 /* helper macro for port */
 128 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
 129
 130 #define PORT_10(fn, pfx, sfx) \
 131         PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),       \
 132         PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),       \
 133         PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),       \
 134         PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),       \
 135         PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
 136
 137 #define PORT_90(fn, pfx, sfx) \
 138         PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),     \
 139         PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),     \
 140         PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),     \
 141         PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),     \
 142         PORT_10(fn, pfx##9, sfx)
 143
 144 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
 145 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
 146 #define PORT_ALL(str)   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 147 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
 148 #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
 149
 150 /* helper macro for pinmux_enum_t */
 151 #define PORT_DATA_I(nr) \
 152         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
 153
 154 #define PORT_DATA_I_PD(nr)      \
 155         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 156                     PORT##nr##_IN, PORT##nr##_IN_PD)
 157
 158 #define PORT_DATA_I_PU(nr)      \
 159         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 160                     PORT##nr##_IN, PORT##nr##_IN_PU)
 161
 162 #define PORT_DATA_I_PU_PD(nr)   \
 163         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,                    \
 164                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 165
 166 #define PORT_DATA_O(nr)         \
 167         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
 168
 169 #define PORT_DATA_IO(nr)        \
 170         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 171                     PORT##nr##_IN)
 172
 173 #define PORT_DATA_IO_PD(nr)     \
 174         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 175                     PORT##nr##_IN, PORT##nr##_IN_PD)
 176
 177 #define PORT_DATA_IO_PU(nr)     \
 178         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 179                     PORT##nr##_IN, PORT##nr##_IN_PU)
 180
 181 #define PORT_DATA_IO_PU_PD(nr)  \
 182         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 183                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 184
 185 /* helper macro for top 4 bits in PORTnCR */
 186 #define _PCRH(in, in_pd, in_pu, out)    \
 187         0, (out), (in), 0,              \
 188         0, 0, 0, 0,                     \
 189         0, 0, (in_pd), 0,               \
 190         0, 0, (in_pu), 0
 191
 192 #define PORTCR(nr, reg)                                                 \
 193         {                                                               \
 194                 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {             \
 195                         _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,          \
 196                               PORT##nr##_IN_PU, PORT##nr##_OUT),        \
 197                                 PORT##nr##_FN0, PORT##nr##_FN1,         \
 198                                 PORT##nr##_FN2, PORT##nr##_FN3,         \
 199                                 PORT##nr##_FN4, PORT##nr##_FN5,         \
 200                                 PORT##nr##_FN6, PORT##nr##_FN7 }        \
 201         }
 202
 203 #endif /* __SH_PFC_H */