include/xen/interface/platform.h

   1 /******************************************************************************
   2  * platform.h
   3  *
   4  * Hardware platform operations. Intended for use by domain-0 kernel.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to
   8  * deal in the Software without restriction, including without limitation the
   9  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
  10  * sell copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  19  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Copyright (c) 2002-2006, K Fraser
  25  */
  26
  27 #ifndef __XEN_PUBLIC_PLATFORM_H__
  28 #define __XEN_PUBLIC_PLATFORM_H__
  29
  30 #include "xen.h"
  31
  32 #define XENPF_INTERFACE_VERSION 0x03000001
  33
  34 /*
  35  * Set clock such that it would read <secs,nsecs> after 00:00:00 UTC,
  36  * 1 January, 1970 if the current system time was <system_time>.
  37  */
  38 #define XENPF_settime             17
  39 struct xenpf_settime {
  40         /* IN variables. */
  41         uint32_t secs;
  42         uint32_t nsecs;
  43         uint64_t system_time;
  44 };
  45 DEFINE_GUEST_HANDLE_STRUCT(xenpf_settime_t);
  46
  47 /*
  48  * Request memory range (@mfn, @mfn+@nr_mfns-1) to have type @type.
  49  * On x86, @type is an architecture-defined MTRR memory type.
  50  * On success, returns the MTRR that was used (@reg) and a handle that can
  51  * be passed to XENPF_DEL_MEMTYPE to accurately tear down the new setting.
  52  * (x86-specific).
  53  */
  54 #define XENPF_add_memtype         31
  55 struct xenpf_add_memtype {
  56         /* IN variables. */
  57         unsigned long mfn;
  58         uint64_t nr_mfns;
  59         uint32_t type;
  60         /* OUT variables. */
  61         uint32_t handle;
  62         uint32_t reg;
  63 };
  64 DEFINE_GUEST_HANDLE_STRUCT(xenpf_add_memtype_t);
  65
  66 /*
  67  * Tear down an existing memory-range type. If @handle is remembered then it
  68  * should be passed in to accurately tear down the correct setting (in case
  69  * of overlapping memory regions with differing types). If it is not known
  70  * then @handle should be set to zero. In all cases @reg must be set.
  71  * (x86-specific).
  72  */
  73 #define XENPF_del_memtype         32
  74 struct xenpf_del_memtype {
  75         /* IN variables. */
  76         uint32_t handle;
  77         uint32_t reg;
  78 };
  79 DEFINE_GUEST_HANDLE_STRUCT(xenpf_del_memtype_t);
  80
  81 /* Read current type of an MTRR (x86-specific). */
  82 #define XENPF_read_memtype        33
  83 struct xenpf_read_memtype {
  84         /* IN variables. */
  85         uint32_t reg;
  86         /* OUT variables. */
  87         unsigned long mfn;
  88         uint64_t nr_mfns;
  89         uint32_t type;
  90 };
  91 DEFINE_GUEST_HANDLE_STRUCT(xenpf_read_memtype_t);
  92
  93 #define XENPF_microcode_update    35
  94 struct xenpf_microcode_update {
  95         /* IN variables. */
  96         GUEST_HANDLE(void) data;          /* Pointer to microcode data */
  97         uint32_t length;                  /* Length of microcode data. */
  98 };
  99 DEFINE_GUEST_HANDLE_STRUCT(xenpf_microcode_update_t);
 100
 101 #define XENPF_platform_quirk      39
 102 #define QUIRK_NOIRQBALANCING      1 /* Do not restrict IO-APIC RTE targets */
 103 #define QUIRK_IOAPIC_BAD_REGSEL   2 /* IO-APIC REGSEL forgets its value    */
 104 #define QUIRK_IOAPIC_GOOD_REGSEL  3 /* IO-APIC REGSEL behaves properly     */
 105 struct xenpf_platform_quirk {
 106         /* IN variables. */
 107         uint32_t quirk_id;
 108 };
 109 DEFINE_GUEST_HANDLE_STRUCT(xenpf_platform_quirk_t);
 110
 111 #define XENPF_firmware_info       50
 112 #define XEN_FW_DISK_INFO          1 /* from int 13 AH=08/41/48 */
 113 #define XEN_FW_DISK_MBR_SIGNATURE 2 /* from MBR offset 0x1b8 */
 114 #define XEN_FW_VBEDDC_INFO        3 /* from int 10 AX=4f15 */
 115 struct xenpf_firmware_info {
 116         /* IN variables. */
 117         uint32_t type;
 118         uint32_t index;
 119         /* OUT variables. */
 120         union {
 121                 struct {
 122                         /* Int13, Fn48: Check Extensions Present. */
 123                         uint8_t device;                   /* %dl: bios device number */
 124                         uint8_t version;                  /* %ah: major version      */
 125                         uint16_t interface_support;       /* %cx: support bitmap     */
 126                         /* Int13, Fn08: Legacy Get Device Parameters. */
 127                         uint16_t legacy_max_cylinder;     /* %cl[7:6]:%ch: max cyl # */
 128                         uint8_t legacy_max_head;          /* %dh: max head #         */
 129                         uint8_t legacy_sectors_per_track; /* %cl[5:0]: max sector #  */
 130                         /* Int13, Fn41: Get Device Parameters (as filled into %ds:%esi). */
 131                         /* NB. First uint16_t of buffer must be set to buffer size.      */
 132                         GUEST_HANDLE(void) edd_params;
 133                 } disk_info; /* XEN_FW_DISK_INFO */
 134                 struct {
 135                         uint8_t device;                   /* bios device number  */
 136                         uint32_t mbr_signature;           /* offset 0x1b8 in mbr */
 137                 } disk_mbr_signature; /* XEN_FW_DISK_MBR_SIGNATURE */
 138                 struct {
 139                         /* Int10, AX=4F15: Get EDID info. */
 140                         uint8_t capabilities;
 141                         uint8_t edid_transfer_time;
 142                         /* must refer to 128-byte buffer */
 143                         GUEST_HANDLE(uchar) edid;
 144                 } vbeddc_info; /* XEN_FW_VBEDDC_INFO */
 145         } u;
 146 };
 147 DEFINE_GUEST_HANDLE_STRUCT(xenpf_firmware_info_t);
 148
 149 #define XENPF_enter_acpi_sleep    51
 150 struct xenpf_enter_acpi_sleep {
 151         /* IN variables */
 152         uint16_t pm1a_cnt_val;      /* PM1a control value. */
 153         uint16_t pm1b_cnt_val;      /* PM1b control value. */
 154         uint32_t sleep_state;       /* Which state to enter (Sn). */
 155         uint32_t flags;             /* Must be zero. */
 156 };
 157 DEFINE_GUEST_HANDLE_STRUCT(xenpf_enter_acpi_sleep_t);
 158
 159 #define XENPF_change_freq         52
 160 struct xenpf_change_freq {
 161         /* IN variables */
 162         uint32_t flags; /* Must be zero. */
 163         uint32_t cpu;   /* Physical cpu. */
 164         uint64_t freq;  /* New frequency (Hz). */
 165 };
 166 DEFINE_GUEST_HANDLE_STRUCT(xenpf_change_freq_t);
 167
 168 /*
 169  * Get idle times (nanoseconds since boot) for physical CPUs specified in the
 170  * @cpumap_bitmap with range [0..@cpumap_nr_cpus-1]. The @idletime array is
 171  * indexed by CPU number; only entries with the corresponding @cpumap_bitmap
 172  * bit set are written to. On return, @cpumap_bitmap is modified so that any
 173  * non-existent CPUs are cleared. Such CPUs have their @idletime array entry
 174  * cleared.
 175  */
 176 #define XENPF_getidletime         53
 177 struct xenpf_getidletime {
 178         /* IN/OUT variables */
 179         /* IN: CPUs to interrogate; OUT: subset of IN which are present */
 180         GUEST_HANDLE(uchar) cpumap_bitmap;
 181         /* IN variables */
 182         /* Size of cpumap bitmap. */
 183         uint32_t cpumap_nr_cpus;
 184         /* Must be indexable for every cpu in cpumap_bitmap. */
 185         GUEST_HANDLE(uint64_t) idletime;
 186         /* OUT variables */
 187         /* System time when the idletime snapshots were taken. */
 188         uint64_t now;
 189 };
 190 DEFINE_GUEST_HANDLE_STRUCT(xenpf_getidletime_t);
 191
 192 #define XENPF_set_processor_pminfo      54
 193
 194 /* ability bits */
 195 #define XEN_PROCESSOR_PM_CX     1
 196 #define XEN_PROCESSOR_PM_PX     2
 197 #define XEN_PROCESSOR_PM_TX     4
 198
 199 /* cmd type */
 200 #define XEN_PM_CX   0
 201 #define XEN_PM_PX   1
 202 #define XEN_PM_TX   2
 203
 204 /* Px sub info type */
 205 #define XEN_PX_PCT   1
 206 #define XEN_PX_PSS   2
 207 #define XEN_PX_PPC   4
 208 #define XEN_PX_PSD   8
 209
 210 struct xen_power_register {
 211         uint32_t     space_id;
 212         uint32_t     bit_width;
 213         uint32_t     bit_offset;
 214         uint32_t     access_size;
 215         uint64_t     address;
 216 };
 217
 218 struct xen_processor_csd {
 219         uint32_t    domain;      /* domain number of one dependent group */
 220         uint32_t    coord_type;  /* coordination type */
 221         uint32_t    num;         /* number of processors in same domain */
 222 };
 223 DEFINE_GUEST_HANDLE_STRUCT(xen_processor_csd);
 224
 225 struct xen_processor_cx {
 226         struct xen_power_register  reg; /* GAS for Cx trigger register */
 227         uint8_t     type;     /* cstate value, c0: 0, c1: 1, ... */
 228         uint32_t    latency;  /* worst latency (ms) to enter/exit this cstate */
 229         uint32_t    power;    /* average power consumption(mW) */
 230         uint32_t    dpcnt;    /* number of dependency entries */
 231         GUEST_HANDLE(xen_processor_csd) dp; /* NULL if no dependency */
 232 };
 233 DEFINE_GUEST_HANDLE_STRUCT(xen_processor_cx);
 234
 235 struct xen_processor_flags {
 236         uint32_t bm_control:1;
 237         uint32_t bm_check:1;
 238         uint32_t has_cst:1;
 239         uint32_t power_setup_done:1;
 240         uint32_t bm_rld_set:1;
 241 };
 242
 243 struct xen_processor_power {
 244         uint32_t count;  /* number of C state entries in array below */
 245         struct xen_processor_flags flags;  /* global flags of this processor */
 246         GUEST_HANDLE(xen_processor_cx) states; /* supported c states */
 247 };
 248
 249 struct xen_pct_register {
 250         uint8_t  descriptor;
 251         uint16_t length;
 252         uint8_t  space_id;
 253         uint8_t  bit_width;
 254         uint8_t  bit_offset;
 255         uint8_t  reserved;
 256         uint64_t address;
 257 };
 258
 259 struct xen_processor_px {
 260         uint64_t core_frequency; /* megahertz */
 261         uint64_t power;      /* milliWatts */
 262         uint64_t transition_latency; /* microseconds */
 263         uint64_t bus_master_latency; /* microseconds */
 264         uint64_t control;        /* control value */
 265         uint64_t status;     /* success indicator */
 266 };
 267 DEFINE_GUEST_HANDLE_STRUCT(xen_processor_px);
 268
 269 struct xen_psd_package {
 270         uint64_t num_entries;
 271         uint64_t revision;
 272         uint64_t domain;
 273         uint64_t coord_type;
 274         uint64_t num_processors;
 275 };
 276
 277 struct xen_processor_performance {
 278         uint32_t flags;     /* flag for Px sub info type */
 279         uint32_t platform_limit;  /* Platform limitation on freq usage */
 280         struct xen_pct_register control_register;
 281         struct xen_pct_register status_register;
 282         uint32_t state_count;     /* total available performance states */
 283         GUEST_HANDLE(xen_processor_px) states;
 284         struct xen_psd_package domain_info;
 285         uint32_t shared_type;     /* coordination type of this processor */
 286 };
 287 DEFINE_GUEST_HANDLE_STRUCT(xen_processor_performance);
 288
 289 struct xenpf_set_processor_pminfo {
 290         /* IN variables */
 291         uint32_t id;    /* ACPI CPU ID */
 292         uint32_t type;  /* {XEN_PM_CX, XEN_PM_PX} */
 293         union {
 294                 struct xen_processor_power          power;/* Cx: _CST/_CSD */
 295                 struct xen_processor_performance    perf; /* Px: _PPC/_PCT/_PSS/_PSD */
 296         };
 297 };
 298 DEFINE_GUEST_HANDLE_STRUCT(xenpf_set_processor_pminfo);
 299
 300 struct xen_platform_op {
 301         uint32_t cmd;
 302         uint32_t interface_version; /* XENPF_INTERFACE_VERSION */
 303         union {
 304                 struct xenpf_settime           settime;
 305                 struct xenpf_add_memtype       add_memtype;
 306                 struct xenpf_del_memtype       del_memtype;
 307                 struct xenpf_read_memtype      read_memtype;
 308                 struct xenpf_microcode_update  microcode;
 309                 struct xenpf_platform_quirk    platform_quirk;
 310                 struct xenpf_firmware_info     firmware_info;
 311                 struct xenpf_enter_acpi_sleep  enter_acpi_sleep;
 312                 struct xenpf_change_freq       change_freq;
 313                 struct xenpf_getidletime       getidletime;
 314                 struct xenpf_set_processor_pminfo set_pminfo;
 315                 uint8_t                        pad[128];
 316         } u;
 317 };
 318 DEFINE_GUEST_HANDLE_STRUCT(xen_platform_op_t);
 319
 320 #endif /* __XEN_PUBLIC_PLATFORM_H__ */