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xhci: Clean up 32-bit build warnings.
[zen-stable.git] / arch / blackfin / mach-bf537 / boards / stamp.c
blob7fbb0bbf86762c3fd40336cb765c1f746b90cab6
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/device.h>
10 #include <linux/export.h>
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/io.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/nand.h>
16 #include <linux/mtd/partitions.h>
17 #include <linux/mtd/plat-ram.h>
18 #include <linux/mtd/physmap.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/flash.h>
21 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
22 #include <linux/usb/isp1362.h>
23 #endif
24 #include <linux/i2c.h>
25 #include <linux/i2c/adp5588.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ata_platform.h>
28 #include <linux/irq.h>
29 #include <linux/interrupt.h>
30 #include <linux/usb/sl811.h>
31 #include <linux/spi/mmc_spi.h>
32 #include <linux/leds.h>
33 #include <linux/input.h>
34 #include <asm/dma.h>
35 #include <asm/bfin5xx_spi.h>
36 #include <asm/reboot.h>
37 #include <asm/portmux.h>
38 #include <asm/dpmc.h>
39 #include <asm/bfin_sport.h>
40 #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
41 #include <linux/regulator/fixed.h>
42 #endif
43 #include <linux/regulator/machine.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/regulator/userspace-consumer.h>
46
47 /*
48 * Name the Board for the /proc/cpuinfo
49 */
50 const char bfin_board_name[] = "ADI BF537-STAMP";
51
52 /*
53 * Driver needs to know address, irq and flag pin.
54 */
55
56 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
57 #include <linux/usb/isp1760.h>
58 static struct resource bfin_isp1760_resources[] = {
59 [0] = {
60 .start = 0x203C0000,
61 .end = 0x203C0000 + 0x000fffff,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = IRQ_PF7,
66 .end = IRQ_PF7,
67 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
68 },
69 };
70
71 static struct isp1760_platform_data isp1760_priv = {
72 .is_isp1761 = 0,
73 .bus_width_16 = 1,
74 .port1_otg = 0,
75 .analog_oc = 0,
76 .dack_polarity_high = 0,
77 .dreq_polarity_high = 0,
78 };
79
80 static struct platform_device bfin_isp1760_device = {
81 .name = "isp1760",
82 .id = 0,
83 .dev = {
84 .platform_data = &isp1760_priv,
85 },
86 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
87 .resource = bfin_isp1760_resources,
88 };
89 #endif
90
91 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
92 #include <linux/gpio_keys.h>
93
94 static struct gpio_keys_button bfin_gpio_keys_table[] = {
95 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
96 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
97 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
98 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
99 };
100
101 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
102 .buttons = bfin_gpio_keys_table,
103 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
104 };
105
106 static struct platform_device bfin_device_gpiokeys = {
107 .name = "gpio-keys",
108 .dev = {
109 .platform_data = &bfin_gpio_keys_data,
110 },
111 };
112 #endif
113
114 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
115 static struct resource bfin_pcmcia_cf_resources[] = {
116 {
117 .start = 0x20310000, /* IO PORT */
118 .end = 0x20312000,
119 .flags = IORESOURCE_MEM,
120 }, {
121 .start = 0x20311000, /* Attribute Memory */
122 .end = 0x20311FFF,
123 .flags = IORESOURCE_MEM,
124 }, {
125 .start = IRQ_PF4,
126 .end = IRQ_PF4,
127 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
128 }, {
129 .start = 6, /* Card Detect PF6 */
130 .end = 6,
131 .flags = IORESOURCE_IRQ,
132 },
133 };
134
135 static struct platform_device bfin_pcmcia_cf_device = {
136 .name = "bfin_cf_pcmcia",
137 .id = -1,
138 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
139 .resource = bfin_pcmcia_cf_resources,
140 };
141 #endif
142
143 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144 static struct platform_device rtc_device = {
145 .name = "rtc-bfin",
146 .id = -1,
147 };
148 #endif
149
150 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
151 #include <linux/smc91x.h>
152
153 static struct smc91x_platdata smc91x_info = {
154 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155 .leda = RPC_LED_100_10,
156 .ledb = RPC_LED_TX_RX,
157 };
158
159 static struct resource smc91x_resources[] = {
160 {
161 .name = "smc91x-regs",
162 .start = 0x20300300,
163 .end = 0x20300300 + 16,
164 .flags = IORESOURCE_MEM,
165 }, {
166
167 .start = IRQ_PF7,
168 .end = IRQ_PF7,
169 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
170 },
171 };
172 static struct platform_device smc91x_device = {
173 .name = "smc91x",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(smc91x_resources),
176 .resource = smc91x_resources,
177 .dev = {
178 .platform_data = &smc91x_info,
179 },
180 };
181 #endif
182
183 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
184 static struct resource dm9000_resources[] = {
185 [0] = {
186 .start = 0x203FB800,
187 .end = 0x203FB800 + 1,
188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
191 .start = 0x203FB804,
192 .end = 0x203FB804 + 1,
193 .flags = IORESOURCE_MEM,
194 },
195 [2] = {
196 .start = IRQ_PF9,
197 .end = IRQ_PF9,
198 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
199 },
200 };
201
202 static struct platform_device dm9000_device = {
203 .name = "dm9000",
204 .id = -1,
205 .num_resources = ARRAY_SIZE(dm9000_resources),
206 .resource = dm9000_resources,
207 };
208 #endif
209
210 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
211 static struct resource sl811_hcd_resources[] = {
212 {
213 .start = 0x20340000,
214 .end = 0x20340000,
215 .flags = IORESOURCE_MEM,
216 }, {
217 .start = 0x20340004,
218 .end = 0x20340004,
219 .flags = IORESOURCE_MEM,
220 }, {
221 .start = IRQ_PF4,
222 .end = IRQ_PF4,
223 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224 },
225 };
226
227 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
228 void sl811_port_power(struct device *dev, int is_on)
229 {
230 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
231 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
232 }
233 #endif
234
235 static struct sl811_platform_data sl811_priv = {
236 .potpg = 10,
237 .power = 250, /* == 500mA */
238 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
239 .port_power = &sl811_port_power,
240 #endif
241 };
242
243 static struct platform_device sl811_hcd_device = {
244 .name = "sl811-hcd",
245 .id = 0,
246 .dev = {
247 .platform_data = &sl811_priv,
248 },
249 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
250 .resource = sl811_hcd_resources,
251 };
252 #endif
253
254 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255 static struct resource isp1362_hcd_resources[] = {
256 {
257 .start = 0x20360000,
258 .end = 0x20360000,
259 .flags = IORESOURCE_MEM,
260 }, {
261 .start = 0x20360004,
262 .end = 0x20360004,
263 .flags = IORESOURCE_MEM,
264 }, {
265 .start = IRQ_PF3,
266 .end = IRQ_PF3,
267 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
268 },
269 };
270
271 static struct isp1362_platform_data isp1362_priv = {
272 .sel15Kres = 1,
273 .clknotstop = 0,
274 .oc_enable = 0,
275 .int_act_high = 0,
276 .int_edge_triggered = 0,
277 .remote_wakeup_connected = 0,
278 .no_power_switching = 1,
279 .power_switching_mode = 0,
280 };
281
282 static struct platform_device isp1362_hcd_device = {
283 .name = "isp1362-hcd",
284 .id = 0,
285 .dev = {
286 .platform_data = &isp1362_priv,
287 },
288 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
289 .resource = isp1362_hcd_resources,
290 };
291 #endif
292
293 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
294 static unsigned short bfin_can_peripherals[] = {
295 P_CAN0_RX, P_CAN0_TX, 0
296 };
297
298 static struct resource bfin_can_resources[] = {
299 {
300 .start = 0xFFC02A00,
301 .end = 0xFFC02FFF,
302 .flags = IORESOURCE_MEM,
303 },
304 {
305 .start = IRQ_CAN_RX,
306 .end = IRQ_CAN_RX,
307 .flags = IORESOURCE_IRQ,
308 },
309 {
310 .start = IRQ_CAN_TX,
311 .end = IRQ_CAN_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_CAN_ERROR,
316 .end = IRQ_CAN_ERROR,
317 .flags = IORESOURCE_IRQ,
318 },
319 };
320
321 static struct platform_device bfin_can_device = {
322 .name = "bfin_can",
323 .num_resources = ARRAY_SIZE(bfin_can_resources),
324 .resource = bfin_can_resources,
325 .dev = {
326 .platform_data = &bfin_can_peripherals, /* Passed to driver */
327 },
328 };
329 #endif
330
331 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
332 #include <linux/bfin_mac.h>
333 static const unsigned short bfin_mac_peripherals[] = P_MII0;
334
335 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
336 {
337 .addr = 1,
338 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
339 },
340 };
341
342 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
343 .phydev_number = 1,
344 .phydev_data = bfin_phydev_data,
345 .phy_mode = PHY_INTERFACE_MODE_MII,
346 .mac_peripherals = bfin_mac_peripherals,
347 };
348
349 static struct platform_device bfin_mii_bus = {
350 .name = "bfin_mii_bus",
351 .dev = {
352 .platform_data = &bfin_mii_bus_data,
353 }
354 };
355
356 static struct platform_device bfin_mac_device = {
357 .name = "bfin_mac",
358 .dev = {
359 .platform_data = &bfin_mii_bus,
360 }
361 };
362 #endif
363
364 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
365 static struct resource net2272_bfin_resources[] = {
366 {
367 .start = 0x20300000,
368 .end = 0x20300000 + 0x100,
369 .flags = IORESOURCE_MEM,
370 }, {
371 .start = 1,
372 .flags = IORESOURCE_BUS,
373 }, {
374 .start = IRQ_PF7,
375 .end = IRQ_PF7,
376 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
377 },
378 };
379
380 static struct platform_device net2272_bfin_device = {
381 .name = "net2272",
382 .id = -1,
383 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
384 .resource = net2272_bfin_resources,
385 };
386 #endif
387
388 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
389 const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
390
391 static struct mtd_partition bfin_plat_nand_partitions[] = {
392 {
393 .name = "linux kernel(nand)",
394 .size = 0x400000,
395 .offset = 0,
396 }, {
397 .name = "file system(nand)",
398 .size = MTDPART_SIZ_FULL,
399 .offset = MTDPART_OFS_APPEND,
400 },
401 };
402
403 #define BFIN_NAND_PLAT_CLE 2
404 #define BFIN_NAND_PLAT_ALE 1
405 static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
406 {
407 struct nand_chip *this = mtd->priv;
408
409 if (cmd == NAND_CMD_NONE)
410 return;
411
412 if (ctrl & NAND_CLE)
413 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
414 else
415 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
416 }
417
418 #define BFIN_NAND_PLAT_READY GPIO_PF3
419 static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
420 {
421 return gpio_get_value(BFIN_NAND_PLAT_READY);
422 }
423
424 static struct platform_nand_data bfin_plat_nand_data = {
425 .chip = {
426 .nr_chips = 1,
427 .chip_delay = 30,
428 .part_probe_types = part_probes,
429 .partitions = bfin_plat_nand_partitions,
430 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
431 },
432 .ctrl = {
433 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
434 .dev_ready = bfin_plat_nand_dev_ready,
435 },
436 };
437
438 #define MAX(x, y) (x > y ? x : y)
439 static struct resource bfin_plat_nand_resources = {
440 .start = 0x20212000,
441 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
442 .flags = IORESOURCE_MEM,
443 };
444
445 static struct platform_device bfin_async_nand_device = {
446 .name = "gen_nand",
447 .id = -1,
448 .num_resources = 1,
449 .resource = &bfin_plat_nand_resources,
450 .dev = {
451 .platform_data = &bfin_plat_nand_data,
452 },
453 };
454
455 static void bfin_plat_nand_init(void)
456 {
457 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
458 }
459 #else
460 static void bfin_plat_nand_init(void) {}
461 #endif
462
463 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
464 static struct mtd_partition stamp_partitions[] = {
465 {
466 .name = "bootloader(nor)",
467 .size = 0x40000,
468 .offset = 0,
469 }, {
470 .name = "linux kernel(nor)",
471 .size = 0x180000,
472 .offset = MTDPART_OFS_APPEND,
473 }, {
474 .name = "file system(nor)",
475 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
476 .offset = MTDPART_OFS_APPEND,
477 }, {
478 .name = "MAC Address(nor)",
479 .size = MTDPART_SIZ_FULL,
480 .offset = 0x3F0000,
481 .mask_flags = MTD_WRITEABLE,
482 }
483 };
484
485 static struct physmap_flash_data stamp_flash_data = {
486 .width = 2,
487 .parts = stamp_partitions,
488 .nr_parts = ARRAY_SIZE(stamp_partitions),
489 #ifdef CONFIG_ROMKERNEL
490 .probe_type = "map_rom",
491 #endif
492 };
493
494 static struct resource stamp_flash_resource = {
495 .start = 0x20000000,
496 .end = 0x203fffff,
497 .flags = IORESOURCE_MEM,
498 };
499
500 static struct platform_device stamp_flash_device = {
501 .name = "physmap-flash",
502 .id = 0,
503 .dev = {
504 .platform_data = &stamp_flash_data,
505 },
506 .num_resources = 1,
507 .resource = &stamp_flash_resource,
508 };
509 #endif
510
511 #if defined(CONFIG_MTD_M25P80) \
512 || defined(CONFIG_MTD_M25P80_MODULE)
513 static struct mtd_partition bfin_spi_flash_partitions[] = {
514 {
515 .name = "bootloader(spi)",
516 .size = 0x00040000,
517 .offset = 0,
518 .mask_flags = MTD_CAP_ROM
519 }, {
520 .name = "linux kernel(spi)",
521 .size = 0x180000,
522 .offset = MTDPART_OFS_APPEND,
523 }, {
524 .name = "file system(spi)",
525 .size = MTDPART_SIZ_FULL,
526 .offset = MTDPART_OFS_APPEND,
527 }
528 };
529
530 static struct flash_platform_data bfin_spi_flash_data = {
531 .name = "m25p80",
532 .parts = bfin_spi_flash_partitions,
533 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
534 /* .type = "m25p64", */
535 };
536
537 /* SPI flash chip (m25p64) */
538 static struct bfin5xx_spi_chip spi_flash_chip_info = {
539 .enable_dma = 0, /* use dma transfer with this chip*/
540 };
541 #endif
542
543 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
544 #include <linux/input/ad714x.h>
545
546 static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
547 {
548 .start_stage = 0,
549 .end_stage = 7,
550 .max_coord = 128,
551 },
552 };
553
554 static struct ad714x_button_plat ad7147_spi_button_plat[] = {
555 {
556 .keycode = BTN_FORWARD,
557 .l_mask = 0,
558 .h_mask = 0x600,
559 },
560 {
561 .keycode = BTN_LEFT,
562 .l_mask = 0,
563 .h_mask = 0x500,
564 },
565 {
566 .keycode = BTN_MIDDLE,
567 .l_mask = 0,
568 .h_mask = 0x800,
569 },
570 {
571 .keycode = BTN_RIGHT,
572 .l_mask = 0x100,
573 .h_mask = 0x400,
574 },
575 {
576 .keycode = BTN_BACK,
577 .l_mask = 0x200,
578 .h_mask = 0x400,
579 },
580 };
581 static struct ad714x_platform_data ad7147_spi_platform_data = {
582 .slider_num = 1,
583 .button_num = 5,
584 .slider = ad7147_spi_slider_plat,
585 .button = ad7147_spi_button_plat,
586 .stage_cfg_reg = {
587 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
588 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
589 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
590 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
591 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
592 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
593 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
594 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
595 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
596 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
597 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
598 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
599 },
600 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
601 };
602 #endif
603
604 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
605 #include <linux/input/ad714x.h>
606 static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
607 {
608 .keycode = BTN_1,
609 .l_mask = 0,
610 .h_mask = 0x1,
611 },
612 {
613 .keycode = BTN_2,
614 .l_mask = 0,
615 .h_mask = 0x2,
616 },
617 {
618 .keycode = BTN_3,
619 .l_mask = 0,
620 .h_mask = 0x4,
621 },
622 {
623 .keycode = BTN_4,
624 .l_mask = 0x0,
625 .h_mask = 0x8,
626 },
627 };
628 static struct ad714x_platform_data ad7142_i2c_platform_data = {
629 .button_num = 4,
630 .button = ad7142_i2c_button_plat,
631 .stage_cfg_reg = {
632 /* fixme: figure out right setting for all comoponent according
633 * to hardware feature of EVAL-AD7142EB board */
634 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
635 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
636 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
637 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
642 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
643 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
644 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
645 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
646 },
647 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
648 };
649 #endif
650
651 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
652 static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
653 .enable_dma = 0,
654 };
655 #endif
656
657 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
658 static unsigned short ad2s120x_platform_data[] = {
659 /* used as SAMPLE and RDVEL */
660 GPIO_PF5, GPIO_PF6, 0
661 };
662
663 static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
664 .enable_dma = 0,
665 };
666 #endif
667
668 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
669 static unsigned short ad2s1210_platform_data[] = {
670 /* use as SAMPLE, A0, A1 */
671 GPIO_PF7, GPIO_PF8, GPIO_PF9,
672 # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
673 /* the RES0 and RES1 pins */
674 GPIO_PF4, GPIO_PF5,
675 # endif
676 0,
677 };
678
679 static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
680 .enable_dma = 0,
681 };
682 #endif
683
684 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
685 static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
686 .enable_dma = 0,
687 };
688 #endif
689
690 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
691 static unsigned short ad7816_platform_data[] = {
692 GPIO_PF4, /* rdwr_pin */
693 GPIO_PF5, /* convert_pin */
694 GPIO_PF7, /* busy_pin */
695 0,
696 };
697
698 static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
699 .enable_dma = 0,
700 };
701 #endif
702
703 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
704 static unsigned long adt7310_platform_data[3] = {
705 /* INT bound temperature alarm event. line 1 */
706 IRQ_PG4, IRQF_TRIGGER_LOW,
707 /* CT bound temperature alarm event irq_flags. line 0 */
708 IRQF_TRIGGER_LOW,
709 };
710
711 static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
712 .enable_dma = 0,
713 };
714 #endif
715
716 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
717 static unsigned short ad7298_platform_data[] = {
718 GPIO_PF7, /* busy_pin */
719 0,
720 };
721 #endif
722
723 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
724 static unsigned long adt7316_spi_data[2] = {
725 IRQF_TRIGGER_LOW, /* interrupt flags */
726 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
727 };
728
729 static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
730 .enable_dma = 0,
731 };
732 #endif
733
734 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
735 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
736
737 static int bfin_mmc_spi_init(struct device *dev,
738 irqreturn_t (*detect_int)(int, void *), void *data)
739 {
740 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
741 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
742 }
743
744 static void bfin_mmc_spi_exit(struct device *dev, void *data)
745 {
746 free_irq(MMC_SPI_CARD_DETECT_INT, data);
747 }
748
749 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
750 .init = bfin_mmc_spi_init,
751 .exit = bfin_mmc_spi_exit,
752 .detect_delay = 100, /* msecs */
753 };
754
755 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
756 .enable_dma = 0,
757 .pio_interrupt = 0,
758 };
759 #endif
760
761 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
762 #include <linux/spi/ad7877.h>
763 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
764 .model = 7877,
765 .vref_delay_usecs = 50, /* internal, no capacitor */
766 .x_plate_ohms = 419,
767 .y_plate_ohms = 486,
768 .pressure_max = 1000,
769 .pressure_min = 0,
770 .stopacq_polarity = 1,
771 .first_conversion_delay = 3,
772 .acquisition_time = 1,
773 .averaging = 1,
774 .pen_down_acc_interval = 1,
775 };
776 #endif
777
778 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
779 #include <linux/spi/ad7879.h>
780 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
781 .model = 7879, /* Model = AD7879 */
782 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
783 .pressure_max = 10000,
784 .pressure_min = 0,
785 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
786 .acquisition_time = 1, /* 4us acquisition time per sample */
787 .median = 2, /* do 8 measurements */
788 .averaging = 1, /* take the average of 4 middle samples */
789 .pen_down_acc_interval = 255, /* 9.4 ms */
790 .gpio_export = 1, /* Export GPIO to gpiolib */
791 .gpio_base = -1, /* Dynamic allocation */
792 };
793 #endif
794
795 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
796 #include <linux/input/adxl34x.h>
797 static const struct adxl34x_platform_data adxl34x_info = {
798 .x_axis_offset = 0,
799 .y_axis_offset = 0,
800 .z_axis_offset = 0,
801 .tap_threshold = 0x31,
802 .tap_duration = 0x10,
803 .tap_latency = 0x60,
804 .tap_window = 0xF0,
805 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
806 .act_axis_control = 0xFF,
807 .activity_threshold = 5,
808 .inactivity_threshold = 3,
809 .inactivity_time = 4,
810 .free_fall_threshold = 0x7,
811 .free_fall_time = 0x20,
812 .data_rate = 0x8,
813 .data_range = ADXL_FULL_RES,
814
815 .ev_type = EV_ABS,
816 .ev_code_x = ABS_X, /* EV_REL */
817 .ev_code_y = ABS_Y, /* EV_REL */
818 .ev_code_z = ABS_Z, /* EV_REL */
819
820 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
821
822 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
823 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
824 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
825 .fifo_mode = ADXL_FIFO_STREAM,
826 .orientation_enable = ADXL_EN_ORIENTATION_3D,
827 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
828 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
829 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
830 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
831 };
832 #endif
833
834 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
835 static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
836 .enable_dma = 1,
837 };
838 #endif
839
840 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
841 #include <linux/spi/adf702x.h>
842 #define TXREG 0x0160A470
843 static const u32 adf7021_regs[] = {
844 0x09608FA0,
845 0x00575011,
846 0x00A7F092,
847 0x2B141563,
848 0x81F29E94,
849 0x00003155,
850 0x050A4F66,
851 0x00000007,
852 0x00000008,
853 0x000231E9,
854 0x3296354A,
855 0x891A2B3B,
856 0x00000D9C,
857 0x0000000D,
858 0x0000000E,
859 0x0000000F,
860 };
861
862 static struct adf702x_platform_data adf7021_platform_data = {
863 .regs_base = (void *)SPORT1_TCR1,
864 .dma_ch_rx = CH_SPORT1_RX,
865 .dma_ch_tx = CH_SPORT1_TX,
866 .irq_sport_err = IRQ_SPORT1_ERROR,
867 .gpio_int_rfs = GPIO_PF8,
868 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
869 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
870 .adf702x_model = MODEL_ADF7021,
871 .adf702x_regs = adf7021_regs,
872 .tx_reg = TXREG,
873 };
874 static inline void adf702x_mac_init(void)
875 {
876 random_ether_addr(adf7021_platform_data.mac_addr);
877 }
878 #else
879 static inline void adf702x_mac_init(void) {}
880 #endif
881
882 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
883 #include <linux/spi/ads7846.h>
884 static int ads7873_get_pendown_state(void)
885 {
886 return gpio_get_value(GPIO_PF6);
887 }
888
889 static struct ads7846_platform_data __initdata ad7873_pdata = {
890 .model = 7873, /* AD7873 */
891 .x_max = 0xfff,
892 .y_max = 0xfff,
893 .x_plate_ohms = 620,
894 .debounce_max = 1,
895 .debounce_rep = 0,
896 .debounce_tol = (~0),
897 .get_pendown_state = ads7873_get_pendown_state,
898 };
899 #endif
900
901 #if defined(CONFIG_MTD_DATAFLASH) \
902 || defined(CONFIG_MTD_DATAFLASH_MODULE)
903
904 static struct mtd_partition bfin_spi_dataflash_partitions[] = {
905 {
906 .name = "bootloader(spi)",
907 .size = 0x00040000,
908 .offset = 0,
909 .mask_flags = MTD_CAP_ROM
910 }, {
911 .name = "linux kernel(spi)",
912 .size = 0x180000,
913 .offset = MTDPART_OFS_APPEND,
914 }, {
915 .name = "file system(spi)",
916 .size = MTDPART_SIZ_FULL,
917 .offset = MTDPART_OFS_APPEND,
918 }
919 };
920
921 static struct flash_platform_data bfin_spi_dataflash_data = {
922 .name = "SPI Dataflash",
923 .parts = bfin_spi_dataflash_partitions,
924 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
925 };
926
927 /* DataFlash chip */
928 static struct bfin5xx_spi_chip data_flash_chip_info = {
929 .enable_dma = 0, /* use dma transfer with this chip*/
930 };
931 #endif
932
933 #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
934 static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
935 .enable_dma = 0, /* use dma transfer with this chip*/
936 };
937 #endif
938
939 static struct spi_board_info bfin_spi_board_info[] __initdata = {
940 #if defined(CONFIG_MTD_M25P80) \
941 || defined(CONFIG_MTD_M25P80_MODULE)
942 {
943 /* the modalias must be the same as spi device driver name */
944 .modalias = "m25p80", /* Name of spi_driver for this device */
945 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
946 .bus_num = 0, /* Framework bus number */
947 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
948 .platform_data = &bfin_spi_flash_data,
949 .controller_data = &spi_flash_chip_info,
950 .mode = SPI_MODE_3,
951 },
952 #endif
953 #if defined(CONFIG_MTD_DATAFLASH) \
954 || defined(CONFIG_MTD_DATAFLASH_MODULE)
955 { /* DataFlash chip */
956 .modalias = "mtd_dataflash",
957 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
958 .bus_num = 0, /* Framework bus number */
959 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
960 .platform_data = &bfin_spi_dataflash_data,
961 .controller_data = &data_flash_chip_info,
962 .mode = SPI_MODE_3,
963 },
964 #endif
965
966 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
967 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
968 {
969 .modalias = "ad1836",
970 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
971 .bus_num = 0,
972 .chip_select = 4,
973 .platform_data = "ad1836", /* only includes chip name for the moment */
974 .mode = SPI_MODE_3,
975 },
976 #endif
977
978 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
979 {
980 .modalias = "ad193x",
981 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
982 .bus_num = 0,
983 .chip_select = 5,
984 .mode = SPI_MODE_3,
985 },
986 #endif
987
988 #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADV80X_MODULE)
989 {
990 .modalias = "adav801",
991 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
992 .bus_num = 0,
993 .chip_select = 1,
994 .mode = SPI_MODE_3,
995 },
996 #endif
997
998 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
999 {
1000 .modalias = "ad714x_captouch",
1001 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1002 .irq = IRQ_PF4,
1003 .bus_num = 0,
1004 .chip_select = 5,
1005 .mode = SPI_MODE_3,
1006 .platform_data = &ad7147_spi_platform_data,
1007 },
1008 #endif
1009
1010 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1011 {
1012 .modalias = "ad2s90",
1013 .bus_num = 0,
1014 .chip_select = 3, /* change it for your board */
1015 .mode = SPI_MODE_3,
1016 .platform_data = NULL,
1017 .controller_data = &ad2s90_spi_chip_info,
1018 },
1019 #endif
1020
1021 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1022 {
1023 .modalias = "ad2s120x",
1024 .bus_num = 0,
1025 .chip_select = 4, /* CS, change it for your board */
1026 .platform_data = ad2s120x_platform_data,
1027 .controller_data = &ad2s120x_spi_chip_info,
1028 },
1029 #endif
1030
1031 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1032 {
1033 .modalias = "ad2s1210",
1034 .max_speed_hz = 8192000,
1035 .bus_num = 0,
1036 .chip_select = 4, /* CS, change it for your board */
1037 .platform_data = ad2s1210_platform_data,
1038 .controller_data = &ad2s1210_spi_chip_info,
1039 },
1040 #endif
1041
1042 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1043 {
1044 .modalias = "ad7314",
1045 .max_speed_hz = 1000000,
1046 .bus_num = 0,
1047 .chip_select = 4, /* CS, change it for your board */
1048 .controller_data = &ad7314_spi_chip_info,
1049 .mode = SPI_MODE_1,
1050 },
1051 #endif
1052
1053 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1054 {
1055 .modalias = "ad7818",
1056 .max_speed_hz = 1000000,
1057 .bus_num = 0,
1058 .chip_select = 4, /* CS, change it for your board */
1059 .platform_data = ad7816_platform_data,
1060 .controller_data = &ad7816_spi_chip_info,
1061 .mode = SPI_MODE_3,
1062 },
1063 #endif
1064
1065 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1066 {
1067 .modalias = "adt7310",
1068 .max_speed_hz = 1000000,
1069 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1070 .bus_num = 0,
1071 .chip_select = 4, /* CS, change it for your board */
1072 .platform_data = adt7310_platform_data,
1073 .controller_data = &adt7310_spi_chip_info,
1074 .mode = SPI_MODE_3,
1075 },
1076 #endif
1077
1078 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1079 {
1080 .modalias = "ad7298",
1081 .max_speed_hz = 1000000,
1082 .bus_num = 0,
1083 .chip_select = 4, /* CS, change it for your board */
1084 .platform_data = ad7298_platform_data,
1085 .mode = SPI_MODE_3,
1086 },
1087 #endif
1088
1089 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1090 {
1091 .modalias = "adt7316",
1092 .max_speed_hz = 1000000,
1093 .irq = IRQ_PG5, /* interrupt line */
1094 .bus_num = 0,
1095 .chip_select = 4, /* CS, change it for your board */
1096 .platform_data = adt7316_spi_data,
1097 .controller_data = &adt7316_spi_chip_info,
1098 .mode = SPI_MODE_3,
1099 },
1100 #endif
1101
1102 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1103 {
1104 .modalias = "mmc_spi",
1105 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1106 .bus_num = 0,
1107 .chip_select = 4,
1108 .platform_data = &bfin_mmc_spi_pdata,
1109 .controller_data = &mmc_spi_chip_info,
1110 .mode = SPI_MODE_3,
1111 },
1112 #endif
1113 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1114 {
1115 .modalias = "ad7877",
1116 .platform_data = &bfin_ad7877_ts_info,
1117 .irq = IRQ_PF6,
1118 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1119 .bus_num = 0,
1120 .chip_select = 1,
1121 },
1122 #endif
1123 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
1124 {
1125 .modalias = "ad7879",
1126 .platform_data = &bfin_ad7879_ts_info,
1127 .irq = IRQ_PF7,
1128 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1129 .bus_num = 0,
1130 .chip_select = 1,
1131 .mode = SPI_CPHA | SPI_CPOL,
1132 },
1133 #endif
1134 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1135 {
1136 .modalias = "spidev",
1137 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1138 .bus_num = 0,
1139 .chip_select = 1,
1140 },
1141 #endif
1142 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1143 {
1144 .modalias = "bfin-lq035q1-spi",
1145 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1146 .bus_num = 0,
1147 .chip_select = 2,
1148 .mode = SPI_CPHA | SPI_CPOL,
1149 },
1150 #endif
1151 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1152 {
1153 .modalias = "enc28j60",
1154 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1155 .irq = IRQ_PF6,
1156 .bus_num = 0,
1157 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1158 .controller_data = &enc28j60_spi_chip_info,
1159 .mode = SPI_MODE_0,
1160 },
1161 #endif
1162 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1163 {
1164 .modalias = "adxl34x",
1165 .platform_data = &adxl34x_info,
1166 .irq = IRQ_PF6,
1167 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1168 .bus_num = 0,
1169 .chip_select = 2,
1170 .mode = SPI_MODE_3,
1171 },
1172 #endif
1173 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1174 {
1175 .modalias = "adf702x",
1176 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1177 .bus_num = 0,
1178 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1179 .platform_data = &adf7021_platform_data,
1180 .mode = SPI_MODE_0,
1181 },
1182 #endif
1183 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1184 {
1185 .modalias = "ads7846",
1186 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1187 .bus_num = 0,
1188 .irq = IRQ_PF6,
1189 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1190 .platform_data = &ad7873_pdata,
1191 .mode = SPI_MODE_0,
1192 },
1193 #endif
1194 #if defined(CONFIG_AD7476) \
1195 || defined(CONFIG_AD7476_MODULE)
1196 {
1197 .modalias = "ad7476", /* Name of spi_driver for this device */
1198 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1199 .bus_num = 0, /* Framework bus number */
1200 .chip_select = 1, /* Framework chip select. */
1201 .platform_data = NULL, /* No spi_driver specific config */
1202 .controller_data = &spi_ad7476_chip_info,
1203 .mode = SPI_MODE_3,
1204 },
1205 #endif
1206 #if defined(CONFIG_ADE7753) \
1207 || defined(CONFIG_ADE7753_MODULE)
1208 {
1209 .modalias = "ade7753",
1210 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1211 .bus_num = 0,
1212 .chip_select = 1, /* CS, change it for your board */
1213 .platform_data = NULL, /* No spi_driver specific config */
1214 .mode = SPI_MODE_1,
1215 },
1216 #endif
1217 #if defined(CONFIG_ADE7754) \
1218 || defined(CONFIG_ADE7754_MODULE)
1219 {
1220 .modalias = "ade7754",
1221 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1222 .bus_num = 0,
1223 .chip_select = 1, /* CS, change it for your board */
1224 .platform_data = NULL, /* No spi_driver specific config */
1225 .mode = SPI_MODE_1,
1226 },
1227 #endif
1228 #if defined(CONFIG_ADE7758) \
1229 || defined(CONFIG_ADE7758_MODULE)
1230 {
1231 .modalias = "ade7758",
1232 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1233 .bus_num = 0,
1234 .chip_select = 1, /* CS, change it for your board */
1235 .platform_data = NULL, /* No spi_driver specific config */
1236 .mode = SPI_MODE_1,
1237 },
1238 #endif
1239 #if defined(CONFIG_ADE7759) \
1240 || defined(CONFIG_ADE7759_MODULE)
1241 {
1242 .modalias = "ade7759",
1243 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1244 .bus_num = 0,
1245 .chip_select = 1, /* CS, change it for your board */
1246 .platform_data = NULL, /* No spi_driver specific config */
1247 .mode = SPI_MODE_1,
1248 },
1249 #endif
1250 #if defined(CONFIG_ADE7854_SPI) \
1251 || defined(CONFIG_ADE7854_SPI_MODULE)
1252 {
1253 .modalias = "ade7854",
1254 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1255 .bus_num = 0,
1256 .chip_select = 1, /* CS, change it for your board */
1257 .platform_data = NULL, /* No spi_driver specific config */
1258 .mode = SPI_MODE_3,
1259 },
1260 #endif
1261 #if defined(CONFIG_ADIS16060) \
1262 || defined(CONFIG_ADIS16060_MODULE)
1263 {
1264 .modalias = "adis16060_r",
1265 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1266 .bus_num = 0,
1267 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1268 .platform_data = NULL, /* No spi_driver specific config */
1269 .mode = SPI_MODE_0,
1270 },
1271 {
1272 .modalias = "adis16060_w",
1273 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1274 .bus_num = 0,
1275 .chip_select = 2, /* CS for write, change it for your board */
1276 .platform_data = NULL, /* No spi_driver specific config */
1277 .mode = SPI_MODE_1,
1278 },
1279 #endif
1280 #if defined(CONFIG_ADIS16130) \
1281 || defined(CONFIG_ADIS16130_MODULE)
1282 {
1283 .modalias = "adis16130",
1284 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1285 .bus_num = 0,
1286 .chip_select = 1, /* CS for read, change it for your board */
1287 .platform_data = NULL, /* No spi_driver specific config */
1288 .mode = SPI_MODE_3,
1289 },
1290 #endif
1291 #if defined(CONFIG_ADIS16201) \
1292 || defined(CONFIG_ADIS16201_MODULE)
1293 {
1294 .modalias = "adis16201",
1295 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1296 .bus_num = 0,
1297 .chip_select = 5, /* CS, change it for your board */
1298 .platform_data = NULL, /* No spi_driver specific config */
1299 .mode = SPI_MODE_3,
1300 .irq = IRQ_PF4,
1301 },
1302 #endif
1303 #if defined(CONFIG_ADIS16203) \
1304 || defined(CONFIG_ADIS16203_MODULE)
1305 {
1306 .modalias = "adis16203",
1307 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1308 .bus_num = 0,
1309 .chip_select = 5, /* CS, change it for your board */
1310 .platform_data = NULL, /* No spi_driver specific config */
1311 .mode = SPI_MODE_3,
1312 .irq = IRQ_PF4,
1313 },
1314 #endif
1315 #if defined(CONFIG_ADIS16204) \
1316 || defined(CONFIG_ADIS16204_MODULE)
1317 {
1318 .modalias = "adis16204",
1319 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1320 .bus_num = 0,
1321 .chip_select = 5, /* CS, change it for your board */
1322 .platform_data = NULL, /* No spi_driver specific config */
1323 .mode = SPI_MODE_3,
1324 .irq = IRQ_PF4,
1325 },
1326 #endif
1327 #if defined(CONFIG_ADIS16209) \
1328 || defined(CONFIG_ADIS16209_MODULE)
1329 {
1330 .modalias = "adis16209",
1331 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1332 .bus_num = 0,
1333 .chip_select = 5, /* CS, change it for your board */
1334 .platform_data = NULL, /* No spi_driver specific config */
1335 .mode = SPI_MODE_3,
1336 .irq = IRQ_PF4,
1337 },
1338 #endif
1339 #if defined(CONFIG_ADIS16220) \
1340 || defined(CONFIG_ADIS16220_MODULE)
1341 {
1342 .modalias = "adis16220",
1343 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1344 .bus_num = 0,
1345 .chip_select = 5, /* CS, change it for your board */
1346 .platform_data = NULL, /* No spi_driver specific config */
1347 .mode = SPI_MODE_3,
1348 .irq = IRQ_PF4,
1349 },
1350 #endif
1351 #if defined(CONFIG_ADIS16240) \
1352 || defined(CONFIG_ADIS16240_MODULE)
1353 {
1354 .modalias = "adis16240",
1355 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1356 .bus_num = 0,
1357 .chip_select = 5, /* CS, change it for your board */
1358 .platform_data = NULL, /* No spi_driver specific config */
1359 .mode = SPI_MODE_3,
1360 .irq = IRQ_PF4,
1361 },
1362 #endif
1363 #if defined(CONFIG_ADIS16260) \
1364 || defined(CONFIG_ADIS16260_MODULE)
1365 {
1366 .modalias = "adis16260",
1367 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1368 .bus_num = 0,
1369 .chip_select = 5, /* CS, change it for your board */
1370 .platform_data = NULL, /* No spi_driver specific config */
1371 .mode = SPI_MODE_3,
1372 .irq = IRQ_PF4,
1373 },
1374 #endif
1375 #if defined(CONFIG_ADIS16261) \
1376 || defined(CONFIG_ADIS16261_MODULE)
1377 {
1378 .modalias = "adis16261",
1379 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1380 .bus_num = 0,
1381 .chip_select = 1, /* CS, change it for your board */
1382 .platform_data = NULL, /* No spi_driver specific config */
1383 .mode = SPI_MODE_3,
1384 },
1385 #endif
1386 #if defined(CONFIG_ADIS16300) \
1387 || defined(CONFIG_ADIS16300_MODULE)
1388 {
1389 .modalias = "adis16300",
1390 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1391 .bus_num = 0,
1392 .chip_select = 5, /* CS, change it for your board */
1393 .platform_data = NULL, /* No spi_driver specific config */
1394 .mode = SPI_MODE_3,
1395 .irq = IRQ_PF4,
1396 },
1397 #endif
1398 #if defined(CONFIG_ADIS16350) \
1399 || defined(CONFIG_ADIS16350_MODULE)
1400 {
1401 .modalias = "adis16364",
1402 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1403 .bus_num = 0,
1404 .chip_select = 5, /* CS, change it for your board */
1405 .platform_data = NULL, /* No spi_driver specific config */
1406 .mode = SPI_MODE_3,
1407 .irq = IRQ_PF4,
1408 },
1409 #endif
1410 #if defined(CONFIG_ADIS16400) \
1411 || defined(CONFIG_ADIS16400_MODULE)
1412 {
1413 .modalias = "adis16400",
1414 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1415 .bus_num = 0,
1416 .chip_select = 1, /* CS, change it for your board */
1417 .platform_data = NULL, /* No spi_driver specific config */
1418 .mode = SPI_MODE_3,
1419 },
1420 #endif
1421 };
1422
1423 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1424 /* SPI controller data */
1425 static struct bfin5xx_spi_master bfin_spi0_info = {
1426 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1427 .enable_dma = 1, /* master has the ability to do dma transfer */
1428 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1429 };
1430
1431 /* SPI (0) */
1432 static struct resource bfin_spi0_resource[] = {
1433 [0] = {
1434 .start = SPI0_REGBASE,
1435 .end = SPI0_REGBASE + 0xFF,
1436 .flags = IORESOURCE_MEM,
1437 },
1438 [1] = {
1439 .start = CH_SPI,
1440 .end = CH_SPI,
1441 .flags = IORESOURCE_DMA,
1442 },
1443 [2] = {
1444 .start = IRQ_SPI,
1445 .end = IRQ_SPI,
1446 .flags = IORESOURCE_IRQ,
1447 },
1448 };
1449
1450 static struct platform_device bfin_spi0_device = {
1451 .name = "bfin-spi",
1452 .id = 0, /* Bus number */
1453 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1454 .resource = bfin_spi0_resource,
1455 .dev = {
1456 .platform_data = &bfin_spi0_info, /* Passed to driver */
1457 },
1458 };
1459 #endif /* spi master and devices */
1460
1461 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1462
1463 /* SPORT SPI controller data */
1464 static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1465 .num_chipselect = 1, /* master only supports one device */
1466 .enable_dma = 0, /* master don't support DMA */
1467 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1468 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1469 };
1470
1471 static struct resource bfin_sport_spi0_resource[] = {
1472 [0] = {
1473 .start = SPORT0_TCR1,
1474 .end = SPORT0_TCR1 + 0xFF,
1475 .flags = IORESOURCE_MEM,
1476 },
1477 [1] = {
1478 .start = IRQ_SPORT0_ERROR,
1479 .end = IRQ_SPORT0_ERROR,
1480 .flags = IORESOURCE_IRQ,
1481 },
1482 };
1483
1484 static struct platform_device bfin_sport_spi0_device = {
1485 .name = "bfin-sport-spi",
1486 .id = 1, /* Bus number */
1487 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1488 .resource = bfin_sport_spi0_resource,
1489 .dev = {
1490 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1491 },
1492 };
1493
1494 static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1495 .num_chipselect = 1, /* master only supports one device */
1496 .enable_dma = 0, /* master don't support DMA */
1497 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1498 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1499 };
1500
1501 static struct resource bfin_sport_spi1_resource[] = {
1502 [0] = {
1503 .start = SPORT1_TCR1,
1504 .end = SPORT1_TCR1 + 0xFF,
1505 .flags = IORESOURCE_MEM,
1506 },
1507 [1] = {
1508 .start = IRQ_SPORT1_ERROR,
1509 .end = IRQ_SPORT1_ERROR,
1510 .flags = IORESOURCE_IRQ,
1511 },
1512 };
1513
1514 static struct platform_device bfin_sport_spi1_device = {
1515 .name = "bfin-sport-spi",
1516 .id = 2, /* Bus number */
1517 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1518 .resource = bfin_sport_spi1_resource,
1519 .dev = {
1520 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1521 },
1522 };
1523
1524 #endif /* sport spi master and devices */
1525
1526 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1527 static struct platform_device bfin_fb_device = {
1528 .name = "bf537-lq035",
1529 };
1530 #endif
1531
1532 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1533 #include <asm/bfin-lq035q1.h>
1534
1535 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1536 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1537 .ppi_mode = USE_RGB565_16_BIT_PPI,
1538 .use_bl = 0, /* let something else control the LCD Blacklight */
1539 .gpio_bl = GPIO_PF7,
1540 };
1541
1542 static struct resource bfin_lq035q1_resources[] = {
1543 {
1544 .start = IRQ_PPI_ERROR,
1545 .end = IRQ_PPI_ERROR,
1546 .flags = IORESOURCE_IRQ,
1547 },
1548 };
1549
1550 static struct platform_device bfin_lq035q1_device = {
1551 .name = "bfin-lq035q1",
1552 .id = -1,
1553 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1554 .resource = bfin_lq035q1_resources,
1555 .dev = {
1556 .platform_data = &bfin_lq035q1_data,
1557 },
1558 };
1559 #endif
1560
1561 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1562 #ifdef CONFIG_SERIAL_BFIN_UART0
1563 static struct resource bfin_uart0_resources[] = {
1564 {
1565 .start = UART0_THR,
1566 .end = UART0_GCTL+2,
1567 .flags = IORESOURCE_MEM,
1568 },
1569 {
1570 .start = IRQ_UART0_TX,
1571 .end = IRQ_UART0_TX,
1572 .flags = IORESOURCE_IRQ,
1573 },
1574 {
1575 .start = IRQ_UART0_RX,
1576 .end = IRQ_UART0_RX,
1577 .flags = IORESOURCE_IRQ,
1578 },
1579 {
1580 .start = IRQ_UART0_ERROR,
1581 .end = IRQ_UART0_ERROR,
1582 .flags = IORESOURCE_IRQ,
1583 },
1584 {
1585 .start = CH_UART0_TX,
1586 .end = CH_UART0_TX,
1587 .flags = IORESOURCE_DMA,
1588 },
1589 {
1590 .start = CH_UART0_RX,
1591 .end = CH_UART0_RX,
1592 .flags = IORESOURCE_DMA,
1593 },
1594 #ifdef CONFIG_BFIN_UART0_CTSRTS
1595 { /* CTS pin */
1596 .start = GPIO_PG7,
1597 .end = GPIO_PG7,
1598 .flags = IORESOURCE_IO,
1599 },
1600 { /* RTS pin */
1601 .start = GPIO_PG6,
1602 .end = GPIO_PG6,
1603 .flags = IORESOURCE_IO,
1604 },
1605 #endif
1606 };
1607
1608 static unsigned short bfin_uart0_peripherals[] = {
1609 P_UART0_TX, P_UART0_RX, 0
1610 };
1611
1612 static struct platform_device bfin_uart0_device = {
1613 .name = "bfin-uart",
1614 .id = 0,
1615 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1616 .resource = bfin_uart0_resources,
1617 .dev = {
1618 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1619 },
1620 };
1621 #endif
1622 #ifdef CONFIG_SERIAL_BFIN_UART1
1623 static struct resource bfin_uart1_resources[] = {
1624 {
1625 .start = UART1_THR,
1626 .end = UART1_GCTL+2,
1627 .flags = IORESOURCE_MEM,
1628 },
1629 {
1630 .start = IRQ_UART1_TX,
1631 .end = IRQ_UART1_TX,
1632 .flags = IORESOURCE_IRQ,
1633 },
1634 {
1635 .start = IRQ_UART1_RX,
1636 .end = IRQ_UART1_RX,
1637 .flags = IORESOURCE_IRQ,
1638 },
1639 {
1640 .start = IRQ_UART1_ERROR,
1641 .end = IRQ_UART1_ERROR,
1642 .flags = IORESOURCE_IRQ,
1643 },
1644 {
1645 .start = CH_UART1_TX,
1646 .end = CH_UART1_TX,
1647 .flags = IORESOURCE_DMA,
1648 },
1649 {
1650 .start = CH_UART1_RX,
1651 .end = CH_UART1_RX,
1652 .flags = IORESOURCE_DMA,
1653 },
1654 };
1655
1656 static unsigned short bfin_uart1_peripherals[] = {
1657 P_UART1_TX, P_UART1_RX, 0
1658 };
1659
1660 static struct platform_device bfin_uart1_device = {
1661 .name = "bfin-uart",
1662 .id = 1,
1663 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1664 .resource = bfin_uart1_resources,
1665 .dev = {
1666 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1667 },
1668 };
1669 #endif
1670 #endif
1671
1672 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1673 #ifdef CONFIG_BFIN_SIR0
1674 static struct resource bfin_sir0_resources[] = {
1675 {
1676 .start = 0xFFC00400,
1677 .end = 0xFFC004FF,
1678 .flags = IORESOURCE_MEM,
1679 },
1680 {
1681 .start = IRQ_UART0_RX,
1682 .end = IRQ_UART0_RX+1,
1683 .flags = IORESOURCE_IRQ,
1684 },
1685 {
1686 .start = CH_UART0_RX,
1687 .end = CH_UART0_RX+1,
1688 .flags = IORESOURCE_DMA,
1689 },
1690 };
1691
1692 static struct platform_device bfin_sir0_device = {
1693 .name = "bfin_sir",
1694 .id = 0,
1695 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1696 .resource = bfin_sir0_resources,
1697 };
1698 #endif
1699 #ifdef CONFIG_BFIN_SIR1
1700 static struct resource bfin_sir1_resources[] = {
1701 {
1702 .start = 0xFFC02000,
1703 .end = 0xFFC020FF,
1704 .flags = IORESOURCE_MEM,
1705 },
1706 {
1707 .start = IRQ_UART1_RX,
1708 .end = IRQ_UART1_RX+1,
1709 .flags = IORESOURCE_IRQ,
1710 },
1711 {
1712 .start = CH_UART1_RX,
1713 .end = CH_UART1_RX+1,
1714 .flags = IORESOURCE_DMA,
1715 },
1716 };
1717
1718 static struct platform_device bfin_sir1_device = {
1719 .name = "bfin_sir",
1720 .id = 1,
1721 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1722 .resource = bfin_sir1_resources,
1723 };
1724 #endif
1725 #endif
1726
1727 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1728 static struct resource bfin_twi0_resource[] = {
1729 [0] = {
1730 .start = TWI0_REGBASE,
1731 .end = TWI0_REGBASE,
1732 .flags = IORESOURCE_MEM,
1733 },
1734 [1] = {
1735 .start = IRQ_TWI,
1736 .end = IRQ_TWI,
1737 .flags = IORESOURCE_IRQ,
1738 },
1739 };
1740
1741 static struct platform_device i2c_bfin_twi_device = {
1742 .name = "i2c-bfin-twi",
1743 .id = 0,
1744 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1745 .resource = bfin_twi0_resource,
1746 };
1747 #endif
1748
1749 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1750 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1751 [0] = KEY_GRAVE,
1752 [1] = KEY_1,
1753 [2] = KEY_2,
1754 [3] = KEY_3,
1755 [4] = KEY_4,
1756 [5] = KEY_5,
1757 [6] = KEY_6,
1758 [7] = KEY_7,
1759 [8] = KEY_8,
1760 [9] = KEY_9,
1761 [10] = KEY_0,
1762 [11] = KEY_MINUS,
1763 [12] = KEY_EQUAL,
1764 [13] = KEY_BACKSLASH,
1765 [15] = KEY_KP0,
1766 [16] = KEY_Q,
1767 [17] = KEY_W,
1768 [18] = KEY_E,
1769 [19] = KEY_R,
1770 [20] = KEY_T,
1771 [21] = KEY_Y,
1772 [22] = KEY_U,
1773 [23] = KEY_I,
1774 [24] = KEY_O,
1775 [25] = KEY_P,
1776 [26] = KEY_LEFTBRACE,
1777 [27] = KEY_RIGHTBRACE,
1778 [29] = KEY_KP1,
1779 [30] = KEY_KP2,
1780 [31] = KEY_KP3,
1781 [32] = KEY_A,
1782 [33] = KEY_S,
1783 [34] = KEY_D,
1784 [35] = KEY_F,
1785 [36] = KEY_G,
1786 [37] = KEY_H,
1787 [38] = KEY_J,
1788 [39] = KEY_K,
1789 [40] = KEY_L,
1790 [41] = KEY_SEMICOLON,
1791 [42] = KEY_APOSTROPHE,
1792 [43] = KEY_BACKSLASH,
1793 [45] = KEY_KP4,
1794 [46] = KEY_KP5,
1795 [47] = KEY_KP6,
1796 [48] = KEY_102ND,
1797 [49] = KEY_Z,
1798 [50] = KEY_X,
1799 [51] = KEY_C,
1800 [52] = KEY_V,
1801 [53] = KEY_B,
1802 [54] = KEY_N,
1803 [55] = KEY_M,
1804 [56] = KEY_COMMA,
1805 [57] = KEY_DOT,
1806 [58] = KEY_SLASH,
1807 [60] = KEY_KPDOT,
1808 [61] = KEY_KP7,
1809 [62] = KEY_KP8,
1810 [63] = KEY_KP9,
1811 [64] = KEY_SPACE,
1812 [65] = KEY_BACKSPACE,
1813 [66] = KEY_TAB,
1814 [67] = KEY_KPENTER,
1815 [68] = KEY_ENTER,
1816 [69] = KEY_ESC,
1817 [70] = KEY_DELETE,
1818 [74] = KEY_KPMINUS,
1819 [76] = KEY_UP,
1820 [77] = KEY_DOWN,
1821 [78] = KEY_RIGHT,
1822 [79] = KEY_LEFT,
1823 };
1824
1825 static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1826 .rows = 8,
1827 .cols = 10,
1828 .keymap = adp5588_keymap,
1829 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1830 .repeat = 0,
1831 };
1832 #endif
1833
1834 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1835 #include <linux/mfd/adp5520.h>
1836
1837 /*
1838 * ADP5520/5501 Backlight Data
1839 */
1840
1841 static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1842 .fade_in = ADP5520_FADE_T_1200ms,
1843 .fade_out = ADP5520_FADE_T_1200ms,
1844 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1845 .en_ambl_sens = 1,
1846 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1847 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1848 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1849 .l2_office_max = ADP5520_BL_CUR_mA(7),
1850 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1851 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1852 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1853 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1854 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1855 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1856 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
1857 };
1858
1859 /*
1860 * ADP5520/5501 LEDs Data
1861 */
1862
1863 static struct led_info adp5520_leds[] = {
1864 {
1865 .name = "adp5520-led1",
1866 .default_trigger = "none",
1867 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
1868 },
1869 #ifdef ADP5520_EN_ALL_LEDS
1870 {
1871 .name = "adp5520-led2",
1872 .default_trigger = "none",
1873 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1874 },
1875 {
1876 .name = "adp5520-led3",
1877 .default_trigger = "none",
1878 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1879 },
1880 #endif
1881 };
1882
1883 static struct adp5520_leds_platform_data adp5520_leds_data = {
1884 .num_leds = ARRAY_SIZE(adp5520_leds),
1885 .leds = adp5520_leds,
1886 .fade_in = ADP5520_FADE_T_600ms,
1887 .fade_out = ADP5520_FADE_T_600ms,
1888 .led_on_time = ADP5520_LED_ONT_600ms,
1889 };
1890
1891 /*
1892 * ADP5520 GPIO Data
1893 */
1894
1895 static struct adp5520_gpio_platform_data adp5520_gpio_data = {
1896 .gpio_start = 50,
1897 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1898 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1899 };
1900
1901 /*
1902 * ADP5520 Keypad Data
1903 */
1904
1905 static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1906 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1907 [ADP5520_KEY(0, 1)] = KEY_1,
1908 [ADP5520_KEY(0, 2)] = KEY_2,
1909 [ADP5520_KEY(0, 3)] = KEY_3,
1910 [ADP5520_KEY(1, 0)] = KEY_4,
1911 [ADP5520_KEY(1, 1)] = KEY_5,
1912 [ADP5520_KEY(1, 2)] = KEY_6,
1913 [ADP5520_KEY(1, 3)] = KEY_7,
1914 [ADP5520_KEY(2, 0)] = KEY_8,
1915 [ADP5520_KEY(2, 1)] = KEY_9,
1916 [ADP5520_KEY(2, 2)] = KEY_0,
1917 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1918 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1919 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1920 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1921 [ADP5520_KEY(3, 3)] = KEY_ENTER,
1922 };
1923
1924 static struct adp5520_keys_platform_data adp5520_keys_data = {
1925 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1926 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
1927 .keymap = adp5520_keymap,
1928 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1929 .repeat = 0,
1930 };
1931
1932 /*
1933 * ADP5520/5501 Multifunction Device Init Data
1934 */
1935
1936 static struct adp5520_platform_data adp5520_pdev_data = {
1937 .backlight = &adp5520_backlight_data,
1938 .leds = &adp5520_leds_data,
1939 .gpio = &adp5520_gpio_data,
1940 .keys = &adp5520_keys_data,
1941 };
1942
1943 #endif
1944
1945 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1946 static struct adp5588_gpio_platform_data adp5588_gpio_data = {
1947 .gpio_start = 50,
1948 .pullup_dis_mask = 0,
1949 };
1950 #endif
1951
1952 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1953 #include <linux/i2c/adp8870.h>
1954 static struct led_info adp8870_leds[] = {
1955 {
1956 .name = "adp8870-led7",
1957 .default_trigger = "none",
1958 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1959 },
1960 };
1961
1962
1963 static struct adp8870_backlight_platform_data adp8870_pdata = {
1964 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1965 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1966 .pwm_assign = 0, /* 1 = Enables PWM mode */
1967
1968 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1969 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1970 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1971
1972 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1973 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1974
1975 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1976 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1977 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1978 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1979 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1980 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1981 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1982 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1983 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1984 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1985
1986 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1987 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1988 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1989 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1990 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1991 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1992 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1993 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1994
1995 .leds = adp8870_leds,
1996 .num_leds = ARRAY_SIZE(adp8870_leds),
1997 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1998 .led_fade_in = ADP8870_FADE_T_600ms,
1999 .led_fade_out = ADP8870_FADE_T_600ms,
2000 .led_on_time = ADP8870_LED_ONT_200ms,
2001 };
2002 #endif
2003
2004 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2005 #include <linux/i2c/adp8860.h>
2006 static struct led_info adp8860_leds[] = {
2007 {
2008 .name = "adp8860-led7",
2009 .default_trigger = "none",
2010 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2011 },
2012 };
2013
2014 static struct adp8860_backlight_platform_data adp8860_pdata = {
2015 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2016 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2017
2018 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2019 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2020 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2021
2022 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2023 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2024
2025 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2026 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2027 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2028 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2029 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2030 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2031
2032 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2033 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2034 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2035 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2036
2037 .leds = adp8860_leds,
2038 .num_leds = ARRAY_SIZE(adp8860_leds),
2039 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2040 .led_fade_in = ADP8860_FADE_T_600ms,
2041 .led_fade_out = ADP8860_FADE_T_600ms,
2042 .led_on_time = ADP8860_LED_ONT_200ms,
2043 };
2044 #endif
2045
2046 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2047 static struct regulator_consumer_supply ad5398_consumer = {
2048 .supply = "current",
2049 };
2050
2051 static struct regulator_init_data ad5398_regulator_data = {
2052 .constraints = {
2053 .name = "current range",
2054 .max_uA = 120000,
2055 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2056 },
2057 .num_consumer_supplies = 1,
2058 .consumer_supplies = &ad5398_consumer,
2059 };
2060
2061 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2062 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2063 static struct platform_device ad5398_virt_consumer_device = {
2064 .name = "reg-virt-consumer",
2065 .id = 0,
2066 .dev = {
2067 .platform_data = "current", /* Passed to driver */
2068 },
2069 };
2070 #endif
2071 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2072 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2073 static struct regulator_bulk_data ad5398_bulk_data = {
2074 .supply = "current",
2075 };
2076
2077 static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2078 .name = "ad5398",
2079 .num_supplies = 1,
2080 .supplies = &ad5398_bulk_data,
2081 };
2082
2083 static struct platform_device ad5398_userspace_consumer_device = {
2084 .name = "reg-userspace-consumer",
2085 .id = 0,
2086 .dev = {
2087 .platform_data = &ad5398_userspace_comsumer_data,
2088 },
2089 };
2090 #endif
2091 #endif
2092
2093 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2094 /* INT bound temperature alarm event. line 1 */
2095 static unsigned long adt7410_platform_data[2] = {
2096 IRQ_PG4, IRQF_TRIGGER_LOW,
2097 };
2098 #endif
2099
2100 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2101 /* INT bound temperature alarm event. line 1 */
2102 static unsigned long adt7316_i2c_data[2] = {
2103 IRQF_TRIGGER_LOW, /* interrupt flags */
2104 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2105 };
2106 #endif
2107
2108 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
2109 #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
2110 {
2111 I2C_BOARD_INFO("ad1937", 0x04),
2112 },
2113 #endif
2114
2115 #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADAV80X_MODULE)
2116 {
2117 I2C_BOARD_INFO("adav803", 0x10),
2118 },
2119 #endif
2120
2121 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
2122 {
2123 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
2124 .irq = IRQ_PG5,
2125 .platform_data = (void *)&ad7142_i2c_platform_data,
2126 },
2127 #endif
2128
2129 #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2130 {
2131 I2C_BOARD_INFO("ad7150", 0x48),
2132 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2133 },
2134 #endif
2135
2136 #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2137 {
2138 I2C_BOARD_INFO("ad7152", 0x48),
2139 },
2140 #endif
2141
2142 #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2143 {
2144 I2C_BOARD_INFO("ad774x", 0x48),
2145 },
2146 #endif
2147
2148 #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2149 {
2150 I2C_BOARD_INFO("ade7854", 0x38),
2151 },
2152 #endif
2153
2154 #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2155 {
2156 I2C_BOARD_INFO("adt75", 0x9),
2157 .irq = IRQ_PG5,
2158 },
2159 #endif
2160
2161 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2162 {
2163 I2C_BOARD_INFO("adt7410", 0x48),
2164 /* CT critical temperature event. line 0 */
2165 .irq = IRQ_PG5,
2166 .platform_data = (void *)&adt7410_platform_data,
2167 },
2168 #endif
2169
2170 #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2171 {
2172 I2C_BOARD_INFO("ad7291", 0x20),
2173 .irq = IRQ_PG5,
2174 },
2175 #endif
2176
2177 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2178 {
2179 I2C_BOARD_INFO("adt7316", 0x48),
2180 .irq = IRQ_PG6,
2181 .platform_data = (void *)&adt7316_i2c_data,
2182 },
2183 #endif
2184
2185 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2186 {
2187 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
2188 },
2189 #endif
2190 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
2191 {
2192 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
2193 .irq = IRQ_PG6,
2194 },
2195 #endif
2196 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2197 {
2198 I2C_BOARD_INFO("ad7879", 0x2F),
2199 .irq = IRQ_PG5,
2200 .platform_data = (void *)&bfin_ad7879_ts_info,
2201 },
2202 #endif
2203 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2204 {
2205 I2C_BOARD_INFO("adp5588-keys", 0x34),
2206 .irq = IRQ_PG0,
2207 .platform_data = (void *)&adp5588_kpad_data,
2208 },
2209 #endif
2210 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2211 {
2212 I2C_BOARD_INFO("pmic-adp5520", 0x32),
2213 .irq = IRQ_PG0,
2214 .platform_data = (void *)&adp5520_pdev_data,
2215 },
2216 #endif
2217 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2218 {
2219 I2C_BOARD_INFO("adxl34x", 0x53),
2220 .irq = IRQ_PG3,
2221 .platform_data = (void *)&adxl34x_info,
2222 },
2223 #endif
2224 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2225 {
2226 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2227 .platform_data = (void *)&adp5588_gpio_data,
2228 },
2229 #endif
2230 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2231 {
2232 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2233 },
2234 #endif
2235 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2236 {
2237 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
2238 },
2239 #endif
2240 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2241 {
2242 I2C_BOARD_INFO("adp8870", 0x2B),
2243 .platform_data = (void *)&adp8870_pdata,
2244 },
2245 #endif
2246 #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2247 {
2248 I2C_BOARD_INFO("adau1371", 0x1A),
2249 },
2250 #endif
2251 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2252 {
2253 I2C_BOARD_INFO("adau1761", 0x38),
2254 },
2255 #endif
2256 #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2257 {
2258 I2C_BOARD_INFO("adau1361", 0x38),
2259 },
2260 #endif
2261 #if defined(CONFIG_SND_SOC_ADAU1701) || defined(CONFIG_SND_SOC_ADAU1701_MODULE)
2262 {
2263 I2C_BOARD_INFO("adau1701", 0x34),
2264 },
2265 #endif
2266 #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2267 {
2268 I2C_BOARD_INFO("ad5258", 0x18),
2269 },
2270 #endif
2271 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2272 {
2273 I2C_BOARD_INFO("ssm2602", 0x1b),
2274 },
2275 #endif
2276 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2277 {
2278 I2C_BOARD_INFO("ad5398", 0xC),
2279 .platform_data = (void *)&ad5398_regulator_data,
2280 },
2281 #endif
2282 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2283 {
2284 I2C_BOARD_INFO("adp8860", 0x2A),
2285 .platform_data = (void *)&adp8860_pdata,
2286 },
2287 #endif
2288 #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2289 {
2290 I2C_BOARD_INFO("adau1373", 0x1A),
2291 },
2292 #endif
2293 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2294 {
2295 I2C_BOARD_INFO("ad5252", 0x2e),
2296 },
2297 #endif
2298 };
2299
2300 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2301 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2302 static struct resource bfin_sport0_uart_resources[] = {
2303 {
2304 .start = SPORT0_TCR1,
2305 .end = SPORT0_MRCS3+4,
2306 .flags = IORESOURCE_MEM,
2307 },
2308 {
2309 .start = IRQ_SPORT0_RX,
2310 .end = IRQ_SPORT0_RX+1,
2311 .flags = IORESOURCE_IRQ,
2312 },
2313 {
2314 .start = IRQ_SPORT0_ERROR,
2315 .end = IRQ_SPORT0_ERROR,
2316 .flags = IORESOURCE_IRQ,
2317 },
2318 };
2319
2320 static unsigned short bfin_sport0_peripherals[] = {
2321 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
2322 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
2323 };
2324
2325 static struct platform_device bfin_sport0_uart_device = {
2326 .name = "bfin-sport-uart",
2327 .id = 0,
2328 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2329 .resource = bfin_sport0_uart_resources,
2330 .dev = {
2331 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2332 },
2333 };
2334 #endif
2335 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2336 static struct resource bfin_sport1_uart_resources[] = {
2337 {
2338 .start = SPORT1_TCR1,
2339 .end = SPORT1_MRCS3+4,
2340 .flags = IORESOURCE_MEM,
2341 },
2342 {
2343 .start = IRQ_SPORT1_RX,
2344 .end = IRQ_SPORT1_RX+1,
2345 .flags = IORESOURCE_IRQ,
2346 },
2347 {
2348 .start = IRQ_SPORT1_ERROR,
2349 .end = IRQ_SPORT1_ERROR,
2350 .flags = IORESOURCE_IRQ,
2351 },
2352 };
2353
2354 static unsigned short bfin_sport1_peripherals[] = {
2355 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2356 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
2357 };
2358
2359 static struct platform_device bfin_sport1_uart_device = {
2360 .name = "bfin-sport-uart",
2361 .id = 1,
2362 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2363 .resource = bfin_sport1_uart_resources,
2364 .dev = {
2365 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2366 },
2367 };
2368 #endif
2369 #endif
2370
2371 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2372 #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2373 /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
2374
2375 #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2376 #define PATA_INT IRQ_PF5
2377 static struct pata_platform_info bfin_pata_platform_data = {
2378 .ioport_shift = 1,
2379 .irq_flags = IRQF_TRIGGER_HIGH,
2380 };
2381
2382 static struct resource bfin_pata_resources[] = {
2383 {
2384 .start = 0x20314020,
2385 .end = 0x2031403F,
2386 .flags = IORESOURCE_MEM,
2387 },
2388 {
2389 .start = 0x2031401C,
2390 .end = 0x2031401F,
2391 .flags = IORESOURCE_MEM,
2392 },
2393 {
2394 .start = PATA_INT,
2395 .end = PATA_INT,
2396 .flags = IORESOURCE_IRQ,
2397 },
2398 };
2399 #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2400 static struct pata_platform_info bfin_pata_platform_data = {
2401 .ioport_shift = 0,
2402 };
2403 /* CompactFlash Storage Card Memory Mapped Addressing
2404 * /REG = A11 = 1
2405 */
2406 static struct resource bfin_pata_resources[] = {
2407 {
2408 .start = 0x20211800,
2409 .end = 0x20211807,
2410 .flags = IORESOURCE_MEM,
2411 },
2412 {
2413 .start = 0x2021180E, /* Device Ctl */
2414 .end = 0x2021180E,
2415 .flags = IORESOURCE_MEM,
2416 },
2417 };
2418 #endif
2419
2420 static struct platform_device bfin_pata_device = {
2421 .name = "pata_platform",
2422 .id = -1,
2423 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2424 .resource = bfin_pata_resources,
2425 .dev = {
2426 .platform_data = &bfin_pata_platform_data,
2427 }
2428 };
2429 #endif
2430
2431 static const unsigned int cclk_vlev_datasheet[] =
2432 {
2433 VRPAIR(VLEV_085, 250000000),
2434 VRPAIR(VLEV_090, 376000000),
2435 VRPAIR(VLEV_095, 426000000),
2436 VRPAIR(VLEV_100, 426000000),
2437 VRPAIR(VLEV_105, 476000000),
2438 VRPAIR(VLEV_110, 476000000),
2439 VRPAIR(VLEV_115, 476000000),
2440 VRPAIR(VLEV_120, 500000000),
2441 VRPAIR(VLEV_125, 533000000),
2442 VRPAIR(VLEV_130, 600000000),
2443 };
2444
2445 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2446 .tuple_tab = cclk_vlev_datasheet,
2447 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2448 .vr_settling_time = 25 /* us */,
2449 };
2450
2451 static struct platform_device bfin_dpmc = {
2452 .name = "bfin dpmc",
2453 .dev = {
2454 .platform_data = &bfin_dmpc_vreg_data,
2455 },
2456 };
2457
2458 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2459 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2460 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2461
2462 #define SPORT_REQ(x) \
2463 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
2464 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
2465
2466 static const u16 bfin_snd_pin[][7] = {
2467 SPORT_REQ(0),
2468 SPORT_REQ(1),
2469 };
2470
2471 static struct bfin_snd_platform_data bfin_snd_data[] = {
2472 {
2473 .pin_req = &bfin_snd_pin[0][0],
2474 },
2475 {
2476 .pin_req = &bfin_snd_pin[1][0],
2477 },
2478 };
2479
2480 #define BFIN_SND_RES(x) \
2481 [x] = { \
2482 { \
2483 .start = SPORT##x##_TCR1, \
2484 .end = SPORT##x##_TCR1, \
2485 .flags = IORESOURCE_MEM \
2486 }, \
2487 { \
2488 .start = CH_SPORT##x##_RX, \
2489 .end = CH_SPORT##x##_RX, \
2490 .flags = IORESOURCE_DMA, \
2491 }, \
2492 { \
2493 .start = CH_SPORT##x##_TX, \
2494 .end = CH_SPORT##x##_TX, \
2495 .flags = IORESOURCE_DMA, \
2496 }, \
2497 { \
2498 .start = IRQ_SPORT##x##_ERROR, \
2499 .end = IRQ_SPORT##x##_ERROR, \
2500 .flags = IORESOURCE_IRQ, \
2501 } \
2502 }
2503
2504 static struct resource bfin_snd_resources[][4] = {
2505 BFIN_SND_RES(0),
2506 BFIN_SND_RES(1),
2507 };
2508 #endif
2509
2510 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2511 static struct platform_device bfin_i2s_pcm = {
2512 .name = "bfin-i2s-pcm-audio",
2513 .id = -1,
2514 };
2515 #endif
2516
2517 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2518 static struct platform_device bfin_tdm_pcm = {
2519 .name = "bfin-tdm-pcm-audio",
2520 .id = -1,
2521 };
2522 #endif
2523
2524 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2525 static struct platform_device bfin_ac97_pcm = {
2526 .name = "bfin-ac97-pcm-audio",
2527 .id = -1,
2528 };
2529 #endif
2530
2531 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2532 static struct platform_device bfin_ad73311_codec_device = {
2533 .name = "ad73311",
2534 .id = -1,
2535 };
2536 #endif
2537
2538 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
2539 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
2540 static struct platform_device bfin_eval_adav801_device = {
2541 .name = "bfin-eval-adav801",
2542 .id = -1,
2543 };
2544 #endif
2545
2546 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2547 static struct platform_device bfin_i2s = {
2548 .name = "bfin-i2s",
2549 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2550 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2551 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2552 .dev = {
2553 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2554 },
2555 };
2556 #endif
2557
2558 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2559 static struct platform_device bfin_tdm = {
2560 .name = "bfin-tdm",
2561 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2562 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2563 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2564 .dev = {
2565 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2566 },
2567 };
2568 #endif
2569
2570 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2571 static struct platform_device bfin_ac97 = {
2572 .name = "bfin-ac97",
2573 .id = CONFIG_SND_BF5XX_SPORT_NUM,
2574 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2575 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2576 .dev = {
2577 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2578 },
2579 };
2580 #endif
2581
2582 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2583 #define REGULATOR_ADP122 "adp122"
2584 #define REGULATOR_ADP122_UV 2500000
2585
2586 static struct regulator_consumer_supply adp122_consumers = {
2587 .supply = REGULATOR_ADP122,
2588 };
2589
2590 static struct regulator_init_data adp_switch_regulator_data = {
2591 .constraints = {
2592 .name = REGULATOR_ADP122,
2593 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2594 .min_uV = REGULATOR_ADP122_UV,
2595 .max_uV = REGULATOR_ADP122_UV,
2596 .min_uA = 0,
2597 .max_uA = 300000,
2598 },
2599 .num_consumer_supplies = 1, /* only 1 */
2600 .consumer_supplies = &adp122_consumers,
2601 };
2602
2603 static struct fixed_voltage_config adp_switch_pdata = {
2604 .supply_name = REGULATOR_ADP122,
2605 .microvolts = REGULATOR_ADP122_UV,
2606 .gpio = GPIO_PF2,
2607 .enable_high = 1,
2608 .enabled_at_boot = 0,
2609 .init_data = &adp_switch_regulator_data,
2610 };
2611
2612 static struct platform_device adp_switch_device = {
2613 .name = "reg-fixed-voltage",
2614 .id = 0,
2615 .dev = {
2616 .platform_data = &adp_switch_pdata,
2617 },
2618 };
2619
2620 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2621 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2622 static struct regulator_bulk_data adp122_bulk_data = {
2623 .supply = REGULATOR_ADP122,
2624 };
2625
2626 static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2627 .name = REGULATOR_ADP122,
2628 .num_supplies = 1,
2629 .supplies = &adp122_bulk_data,
2630 };
2631
2632 static struct platform_device adp122_userspace_consumer_device = {
2633 .name = "reg-userspace-consumer",
2634 .id = 0,
2635 .dev = {
2636 .platform_data = &adp122_userspace_comsumer_data,
2637 },
2638 };
2639 #endif
2640 #endif
2641
2642 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2643 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2644
2645 static struct resource iio_gpio_trigger_resources[] = {
2646 [0] = {
2647 .start = IRQ_PF5,
2648 .end = IRQ_PF5,
2649 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2650 },
2651 };
2652
2653 static struct platform_device iio_gpio_trigger = {
2654 .name = "iio_gpio_trigger",
2655 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2656 .resource = iio_gpio_trigger_resources,
2657 };
2658 #endif
2659
2660 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2661 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2662 static struct platform_device bf5xx_adau1373_device = {
2663 .name = "bfin-eval-adau1373",
2664 };
2665 #endif
2666
2667 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
2668 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
2669 static struct platform_device bf5xx_adau1701_device = {
2670 .name = "bfin-eval-adau1701",
2671 };
2672 #endif
2673
2674 static struct platform_device *stamp_devices[] __initdata = {
2675
2676 &bfin_dpmc,
2677
2678 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2679 &bfin_pcmcia_cf_device,
2680 #endif
2681
2682 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2683 &rtc_device,
2684 #endif
2685
2686 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2687 &sl811_hcd_device,
2688 #endif
2689
2690 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2691 &isp1362_hcd_device,
2692 #endif
2693
2694 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2695 &bfin_isp1760_device,
2696 #endif
2697
2698 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2699 &smc91x_device,
2700 #endif
2701
2702 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2703 &dm9000_device,
2704 #endif
2705
2706 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2707 &bfin_can_device,
2708 #endif
2709
2710 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
2711 &bfin_mii_bus,
2712 &bfin_mac_device,
2713 #endif
2714
2715 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2716 &net2272_bfin_device,
2717 #endif
2718
2719 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
2720 &bfin_spi0_device,
2721 #endif
2722
2723 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2724 &bfin_sport_spi0_device,
2725 &bfin_sport_spi1_device,
2726 #endif
2727
2728 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2729 &bfin_fb_device,
2730 #endif
2731
2732 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2733 &bfin_lq035q1_device,
2734 #endif
2735
2736 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
2737 #ifdef CONFIG_SERIAL_BFIN_UART0
2738 &bfin_uart0_device,
2739 #endif
2740 #ifdef CONFIG_SERIAL_BFIN_UART1
2741 &bfin_uart1_device,
2742 #endif
2743 #endif
2744
2745 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
2746 #ifdef CONFIG_BFIN_SIR0
2747 &bfin_sir0_device,
2748 #endif
2749 #ifdef CONFIG_BFIN_SIR1
2750 &bfin_sir1_device,
2751 #endif
2752 #endif
2753
2754 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2755 &i2c_bfin_twi_device,
2756 #endif
2757
2758 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2759 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2760 &bfin_sport0_uart_device,
2761 #endif
2762 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2763 &bfin_sport1_uart_device,
2764 #endif
2765 #endif
2766
2767 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2768 &bfin_pata_device,
2769 #endif
2770
2771 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2772 &bfin_device_gpiokeys,
2773 #endif
2774
2775 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2776 &bfin_async_nand_device,
2777 #endif
2778
2779 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
2780 &stamp_flash_device,
2781 #endif
2782
2783 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2784 &bfin_i2s_pcm,
2785 #endif
2786
2787 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2788 &bfin_tdm_pcm,
2789 #endif
2790
2791 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2792 &bfin_ac97_pcm,
2793 #endif
2794
2795 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2796 &bfin_ad73311_codec_device,
2797 #endif
2798
2799 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2800 &bfin_i2s,
2801 #endif
2802
2803 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2804 &bfin_tdm,
2805 #endif
2806
2807 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2808 &bfin_ac97,
2809 #endif
2810
2811 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2812 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2813 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2814 &ad5398_virt_consumer_device,
2815 #endif
2816 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2817 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2818 &ad5398_userspace_consumer_device,
2819 #endif
2820 #endif
2821
2822 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2823 &adp_switch_device,
2824 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2825 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2826 &adp122_userspace_consumer_device,
2827 #endif
2828 #endif
2829
2830 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2831 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2832 &iio_gpio_trigger,
2833 #endif
2834
2835 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2836 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2837 &bf5xx_adau1373_device,
2838 #endif
2839
2840 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
2841 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
2842 &bf5xx_adau1701_device,
2843 #endif
2844
2845 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
2846 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
2847 &bfin_eval_adav801_device,
2848 #endif
2849 };
2850
2851 static int __init net2272_init(void)
2852 {
2853 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2854 int ret;
2855
2856 ret = gpio_request(GPIO_PF6, "net2272");
2857 if (ret)
2858 return ret;
2859
2860 /* Reset the USB chip */
2861 gpio_direction_output(GPIO_PF6, 0);
2862 mdelay(2);
2863 gpio_set_value(GPIO_PF6, 1);
2864 #endif
2865
2866 return 0;
2867 }
2868
2869 static int __init stamp_init(void)
2870 {
2871 printk(KERN_INFO "%s(): registering device resources\n", __func__);
2872 bfin_plat_nand_init();
2873 adf702x_mac_init();
2874 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
2875 i2c_register_board_info(0, bfin_i2c_board_info,
2876 ARRAY_SIZE(bfin_i2c_board_info));
2877 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
2878
2879 if (net2272_init())
2880 pr_warning("unable to configure net2272; it probably won't work\n");
2881
2882 return 0;
2883 }
2884
2885 arch_initcall(stamp_init);
2886
2887
2888 static struct platform_device *stamp_early_devices[] __initdata = {
2889 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2890 #ifdef CONFIG_SERIAL_BFIN_UART0
2891 &bfin_uart0_device,
2892 #endif
2893 #ifdef CONFIG_SERIAL_BFIN_UART1
2894 &bfin_uart1_device,
2895 #endif
2896 #endif
2897
2898 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2899 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2900 &bfin_sport0_uart_device,
2901 #endif
2902 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2903 &bfin_sport1_uart_device,
2904 #endif
2905 #endif
2906 };
2907
2908 void __init native_machine_early_platform_add_devices(void)
2909 {
2910 printk(KERN_INFO "register early platform devices\n");
2911 early_platform_add_devices(stamp_early_devices,
2912 ARRAY_SIZE(stamp_early_devices));
2913 }
2914
2915 void native_machine_restart(char *cmd)
2916 {
2917 /* workaround reboot hang when booting from SPI */
2918 if ((bfin_read_SYSCR() & 0x7) == 0x3)
2919 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
2920 }
2921
2922 /*
2923 * Currently the MAC address is saved in Flash by U-Boot
2924 */
2925 #define FLASH_MAC 0x203f0000
2926 void bfin_get_ether_addr(char *addr)
2927 {
2928 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2929 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2930 }
2931 EXPORT_SYMBOL(bfin_get_ether_addr);