1 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 #include <linux/delay.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/videodev2.h>
31 #include <media/tvp7002.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-chip-ident.h>
34 #include <media/v4l2-common.h>
35 #include "tvp7002_reg.h"
37 MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
38 MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
39 MODULE_LICENSE("GPL");
42 #define TVP7002_MODULE_NAME "tvp7002"
44 /* I2C retry attempts */
45 #define I2C_RETRY_COUNT (5)
47 /* End of registers */
48 #define TVP7002_EOR 0x5c
50 /* Read write definition for registers */
51 #define TVP7002_READ 0
52 #define TVP7002_WRITE 1
53 #define TVP7002_RESERVED 2
55 /* Interlaced vs progressive mask and shift */
56 #define TVP7002_IP_SHIFT 5
57 #define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
59 /* Shift for CPL and LPF registers */
60 #define TVP7002_CL_SHIFT 8
61 #define TVP7002_CL_MASK 0x0f
65 module_param(debug
, bool, 0644);
66 MODULE_PARM_DESC(debug
, "Debug level (0-2)");
68 /* Structure for register values */
69 struct i2c_reg_value
{
76 * Register default values (according to tvp7002 datasheet)
77 * In the case of read-only registers, the value (0xff) is
78 * never written. R/W functionality is controlled by the
79 * writable bit in the register struct definition.
81 static const struct i2c_reg_value tvp7002_init_default
[] = {
82 { TVP7002_CHIP_REV
, 0xff, TVP7002_READ
},
83 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0x67, TVP7002_WRITE
},
84 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0x20, TVP7002_WRITE
},
85 { TVP7002_HPLL_CRTL
, 0xa0, TVP7002_WRITE
},
86 { TVP7002_HPLL_PHASE_SEL
, 0x80, TVP7002_WRITE
},
87 { TVP7002_CLAMP_START
, 0x32, TVP7002_WRITE
},
88 { TVP7002_CLAMP_W
, 0x20, TVP7002_WRITE
},
89 { TVP7002_HSYNC_OUT_W
, 0x60, TVP7002_WRITE
},
90 { TVP7002_B_FINE_GAIN
, 0x00, TVP7002_WRITE
},
91 { TVP7002_G_FINE_GAIN
, 0x00, TVP7002_WRITE
},
92 { TVP7002_R_FINE_GAIN
, 0x00, TVP7002_WRITE
},
93 { TVP7002_B_FINE_OFF_MSBS
, 0x80, TVP7002_WRITE
},
94 { TVP7002_G_FINE_OFF_MSBS
, 0x80, TVP7002_WRITE
},
95 { TVP7002_R_FINE_OFF_MSBS
, 0x80, TVP7002_WRITE
},
96 { TVP7002_SYNC_CTL_1
, 0x20, TVP7002_WRITE
},
97 { TVP7002_HPLL_AND_CLAMP_CTL
, 0x2e, TVP7002_WRITE
},
98 { TVP7002_SYNC_ON_G_THRS
, 0x5d, TVP7002_WRITE
},
99 { TVP7002_SYNC_SEPARATOR_THRS
, 0x47, TVP7002_WRITE
},
100 { TVP7002_HPLL_PRE_COAST
, 0x00, TVP7002_WRITE
},
101 { TVP7002_HPLL_POST_COAST
, 0x00, TVP7002_WRITE
},
102 { TVP7002_SYNC_DETECT_STAT
, 0xff, TVP7002_READ
},
103 { TVP7002_OUT_FORMATTER
, 0x47, TVP7002_WRITE
},
104 { TVP7002_MISC_CTL_1
, 0x01, TVP7002_WRITE
},
105 { TVP7002_MISC_CTL_2
, 0x00, TVP7002_WRITE
},
106 { TVP7002_MISC_CTL_3
, 0x01, TVP7002_WRITE
},
107 { TVP7002_IN_MUX_SEL_1
, 0x00, TVP7002_WRITE
},
108 { TVP7002_IN_MUX_SEL_2
, 0x67, TVP7002_WRITE
},
109 { TVP7002_B_AND_G_COARSE_GAIN
, 0x77, TVP7002_WRITE
},
110 { TVP7002_R_COARSE_GAIN
, 0x07, TVP7002_WRITE
},
111 { TVP7002_FINE_OFF_LSBS
, 0x00, TVP7002_WRITE
},
112 { TVP7002_B_COARSE_OFF
, 0x10, TVP7002_WRITE
},
113 { TVP7002_G_COARSE_OFF
, 0x10, TVP7002_WRITE
},
114 { TVP7002_R_COARSE_OFF
, 0x10, TVP7002_WRITE
},
115 { TVP7002_HSOUT_OUT_START
, 0x08, TVP7002_WRITE
},
116 { TVP7002_MISC_CTL_4
, 0x00, TVP7002_WRITE
},
117 { TVP7002_B_DGTL_ALC_OUT_LSBS
, 0xff, TVP7002_READ
},
118 { TVP7002_G_DGTL_ALC_OUT_LSBS
, 0xff, TVP7002_READ
},
119 { TVP7002_R_DGTL_ALC_OUT_LSBS
, 0xff, TVP7002_READ
},
120 { TVP7002_AUTO_LVL_CTL_ENABLE
, 0x80, TVP7002_WRITE
},
121 { TVP7002_DGTL_ALC_OUT_MSBS
, 0xff, TVP7002_READ
},
122 { TVP7002_AUTO_LVL_CTL_FILTER
, 0x53, TVP7002_WRITE
},
123 { 0x29, 0x08, TVP7002_RESERVED
},
124 { TVP7002_FINE_CLAMP_CTL
, 0x07, TVP7002_WRITE
},
125 /* PWR_CTL is controlled only by the probe and reset functions */
126 { TVP7002_PWR_CTL
, 0x00, TVP7002_RESERVED
},
127 { TVP7002_ADC_SETUP
, 0x50, TVP7002_WRITE
},
128 { TVP7002_COARSE_CLAMP_CTL
, 0x00, TVP7002_WRITE
},
129 { TVP7002_SOG_CLAMP
, 0x80, TVP7002_WRITE
},
130 { TVP7002_RGB_COARSE_CLAMP_CTL
, 0x00, TVP7002_WRITE
},
131 { TVP7002_SOG_COARSE_CLAMP_CTL
, 0x04, TVP7002_WRITE
},
132 { TVP7002_ALC_PLACEMENT
, 0x5a, TVP7002_WRITE
},
133 { 0x32, 0x18, TVP7002_RESERVED
},
134 { 0x33, 0x60, TVP7002_RESERVED
},
135 { TVP7002_MVIS_STRIPPER_W
, 0xff, TVP7002_RESERVED
},
136 { TVP7002_VSYNC_ALGN
, 0x10, TVP7002_WRITE
},
137 { TVP7002_SYNC_BYPASS
, 0x00, TVP7002_WRITE
},
138 { TVP7002_L_FRAME_STAT_LSBS
, 0xff, TVP7002_READ
},
139 { TVP7002_L_FRAME_STAT_MSBS
, 0xff, TVP7002_READ
},
140 { TVP7002_CLK_L_STAT_LSBS
, 0xff, TVP7002_READ
},
141 { TVP7002_CLK_L_STAT_MSBS
, 0xff, TVP7002_READ
},
142 { TVP7002_HSYNC_W
, 0xff, TVP7002_READ
},
143 { TVP7002_VSYNC_W
, 0xff, TVP7002_READ
},
144 { TVP7002_L_LENGTH_TOL
, 0x03, TVP7002_WRITE
},
145 { 0x3e, 0x60, TVP7002_RESERVED
},
146 { TVP7002_VIDEO_BWTH_CTL
, 0x01, TVP7002_WRITE
},
147 { TVP7002_AVID_START_PIXEL_LSBS
, 0x01, TVP7002_WRITE
},
148 { TVP7002_AVID_START_PIXEL_MSBS
, 0x2c, TVP7002_WRITE
},
149 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x06, TVP7002_WRITE
},
150 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x2c, TVP7002_WRITE
},
151 { TVP7002_VBLK_F_0_START_L_OFF
, 0x05, TVP7002_WRITE
},
152 { TVP7002_VBLK_F_1_START_L_OFF
, 0x00, TVP7002_WRITE
},
153 { TVP7002_VBLK_F_0_DURATION
, 0x1e, TVP7002_WRITE
},
154 { TVP7002_VBLK_F_1_DURATION
, 0x00, TVP7002_WRITE
},
155 { TVP7002_FBIT_F_0_START_L_OFF
, 0x00, TVP7002_WRITE
},
156 { TVP7002_FBIT_F_1_START_L_OFF
, 0x00, TVP7002_WRITE
},
157 { TVP7002_YUV_Y_G_COEF_LSBS
, 0xe3, TVP7002_WRITE
},
158 { TVP7002_YUV_Y_G_COEF_MSBS
, 0x16, TVP7002_WRITE
},
159 { TVP7002_YUV_Y_B_COEF_LSBS
, 0x4f, TVP7002_WRITE
},
160 { TVP7002_YUV_Y_B_COEF_MSBS
, 0x02, TVP7002_WRITE
},
161 { TVP7002_YUV_Y_R_COEF_LSBS
, 0xce, TVP7002_WRITE
},
162 { TVP7002_YUV_Y_R_COEF_MSBS
, 0x06, TVP7002_WRITE
},
163 { TVP7002_YUV_U_G_COEF_LSBS
, 0xab, TVP7002_WRITE
},
164 { TVP7002_YUV_U_G_COEF_MSBS
, 0xf3, TVP7002_WRITE
},
165 { TVP7002_YUV_U_B_COEF_LSBS
, 0x00, TVP7002_WRITE
},
166 { TVP7002_YUV_U_B_COEF_MSBS
, 0x10, TVP7002_WRITE
},
167 { TVP7002_YUV_U_R_COEF_LSBS
, 0x55, TVP7002_WRITE
},
168 { TVP7002_YUV_U_R_COEF_MSBS
, 0xfc, TVP7002_WRITE
},
169 { TVP7002_YUV_V_G_COEF_LSBS
, 0x78, TVP7002_WRITE
},
170 { TVP7002_YUV_V_G_COEF_MSBS
, 0xf1, TVP7002_WRITE
},
171 { TVP7002_YUV_V_B_COEF_LSBS
, 0x88, TVP7002_WRITE
},
172 { TVP7002_YUV_V_B_COEF_MSBS
, 0xfe, TVP7002_WRITE
},
173 { TVP7002_YUV_V_R_COEF_LSBS
, 0x00, TVP7002_WRITE
},
174 { TVP7002_YUV_V_R_COEF_MSBS
, 0x10, TVP7002_WRITE
},
175 /* This signals end of register values */
176 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
179 /* Register parameters for 480P */
180 static const struct i2c_reg_value tvp7002_parms_480P
[] = {
181 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0x35, TVP7002_WRITE
},
182 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0xa0, TVP7002_WRITE
},
183 { TVP7002_HPLL_CRTL
, 0x02, TVP7002_WRITE
},
184 { TVP7002_HPLL_PHASE_SEL
, 0x14, TVP7002_WRITE
},
185 { TVP7002_AVID_START_PIXEL_LSBS
, 0x91, TVP7002_WRITE
},
186 { TVP7002_AVID_START_PIXEL_MSBS
, 0x00, TVP7002_WRITE
},
187 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x0B, TVP7002_WRITE
},
188 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x00, TVP7002_WRITE
},
189 { TVP7002_VBLK_F_0_START_L_OFF
, 0x03, TVP7002_WRITE
},
190 { TVP7002_VBLK_F_1_START_L_OFF
, 0x01, TVP7002_WRITE
},
191 { TVP7002_VBLK_F_0_DURATION
, 0x13, TVP7002_WRITE
},
192 { TVP7002_VBLK_F_1_DURATION
, 0x13, TVP7002_WRITE
},
193 { TVP7002_ALC_PLACEMENT
, 0x18, TVP7002_WRITE
},
194 { TVP7002_CLAMP_START
, 0x06, TVP7002_WRITE
},
195 { TVP7002_CLAMP_W
, 0x10, TVP7002_WRITE
},
196 { TVP7002_HPLL_PRE_COAST
, 0x03, TVP7002_WRITE
},
197 { TVP7002_HPLL_POST_COAST
, 0x03, TVP7002_WRITE
},
198 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
201 /* Register parameters for 576P */
202 static const struct i2c_reg_value tvp7002_parms_576P
[] = {
203 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0x36, TVP7002_WRITE
},
204 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0x00, TVP7002_WRITE
},
205 { TVP7002_HPLL_CRTL
, 0x18, TVP7002_WRITE
},
206 { TVP7002_HPLL_PHASE_SEL
, 0x14, TVP7002_WRITE
},
207 { TVP7002_AVID_START_PIXEL_LSBS
, 0x9B, TVP7002_WRITE
},
208 { TVP7002_AVID_START_PIXEL_MSBS
, 0x00, TVP7002_WRITE
},
209 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x0F, TVP7002_WRITE
},
210 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x00, TVP7002_WRITE
},
211 { TVP7002_VBLK_F_0_START_L_OFF
, 0x00, TVP7002_WRITE
},
212 { TVP7002_VBLK_F_1_START_L_OFF
, 0x00, TVP7002_WRITE
},
213 { TVP7002_VBLK_F_0_DURATION
, 0x2D, TVP7002_WRITE
},
214 { TVP7002_VBLK_F_1_DURATION
, 0x00, TVP7002_WRITE
},
215 { TVP7002_ALC_PLACEMENT
, 0x18, TVP7002_WRITE
},
216 { TVP7002_CLAMP_START
, 0x06, TVP7002_WRITE
},
217 { TVP7002_CLAMP_W
, 0x10, TVP7002_WRITE
},
218 { TVP7002_HPLL_PRE_COAST
, 0x03, TVP7002_WRITE
},
219 { TVP7002_HPLL_POST_COAST
, 0x03, TVP7002_WRITE
},
220 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
223 /* Register parameters for 1080I60 */
224 static const struct i2c_reg_value tvp7002_parms_1080I60
[] = {
225 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0x89, TVP7002_WRITE
},
226 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0x80, TVP7002_WRITE
},
227 { TVP7002_HPLL_CRTL
, 0x98, TVP7002_WRITE
},
228 { TVP7002_HPLL_PHASE_SEL
, 0x14, TVP7002_WRITE
},
229 { TVP7002_AVID_START_PIXEL_LSBS
, 0x06, TVP7002_WRITE
},
230 { TVP7002_AVID_START_PIXEL_MSBS
, 0x01, TVP7002_WRITE
},
231 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x8a, TVP7002_WRITE
},
232 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x08, TVP7002_WRITE
},
233 { TVP7002_VBLK_F_0_START_L_OFF
, 0x02, TVP7002_WRITE
},
234 { TVP7002_VBLK_F_1_START_L_OFF
, 0x02, TVP7002_WRITE
},
235 { TVP7002_VBLK_F_0_DURATION
, 0x16, TVP7002_WRITE
},
236 { TVP7002_VBLK_F_1_DURATION
, 0x17, TVP7002_WRITE
},
237 { TVP7002_ALC_PLACEMENT
, 0x5a, TVP7002_WRITE
},
238 { TVP7002_CLAMP_START
, 0x32, TVP7002_WRITE
},
239 { TVP7002_CLAMP_W
, 0x20, TVP7002_WRITE
},
240 { TVP7002_HPLL_PRE_COAST
, 0x01, TVP7002_WRITE
},
241 { TVP7002_HPLL_POST_COAST
, 0x00, TVP7002_WRITE
},
242 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
245 /* Register parameters for 1080P60 */
246 static const struct i2c_reg_value tvp7002_parms_1080P60
[] = {
247 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0x89, TVP7002_WRITE
},
248 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0x80, TVP7002_WRITE
},
249 { TVP7002_HPLL_CRTL
, 0xE0, TVP7002_WRITE
},
250 { TVP7002_HPLL_PHASE_SEL
, 0x14, TVP7002_WRITE
},
251 { TVP7002_AVID_START_PIXEL_LSBS
, 0x06, TVP7002_WRITE
},
252 { TVP7002_AVID_START_PIXEL_MSBS
, 0x01, TVP7002_WRITE
},
253 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x8a, TVP7002_WRITE
},
254 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x08, TVP7002_WRITE
},
255 { TVP7002_VBLK_F_0_START_L_OFF
, 0x02, TVP7002_WRITE
},
256 { TVP7002_VBLK_F_1_START_L_OFF
, 0x02, TVP7002_WRITE
},
257 { TVP7002_VBLK_F_0_DURATION
, 0x16, TVP7002_WRITE
},
258 { TVP7002_VBLK_F_1_DURATION
, 0x17, TVP7002_WRITE
},
259 { TVP7002_ALC_PLACEMENT
, 0x5a, TVP7002_WRITE
},
260 { TVP7002_CLAMP_START
, 0x32, TVP7002_WRITE
},
261 { TVP7002_CLAMP_W
, 0x20, TVP7002_WRITE
},
262 { TVP7002_HPLL_PRE_COAST
, 0x01, TVP7002_WRITE
},
263 { TVP7002_HPLL_POST_COAST
, 0x00, TVP7002_WRITE
},
264 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
267 /* Register parameters for 1080I50 */
268 static const struct i2c_reg_value tvp7002_parms_1080I50
[] = {
269 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0xa5, TVP7002_WRITE
},
270 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0x00, TVP7002_WRITE
},
271 { TVP7002_HPLL_CRTL
, 0x98, TVP7002_WRITE
},
272 { TVP7002_HPLL_PHASE_SEL
, 0x14, TVP7002_WRITE
},
273 { TVP7002_AVID_START_PIXEL_LSBS
, 0x06, TVP7002_WRITE
},
274 { TVP7002_AVID_START_PIXEL_MSBS
, 0x01, TVP7002_WRITE
},
275 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x8a, TVP7002_WRITE
},
276 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x08, TVP7002_WRITE
},
277 { TVP7002_VBLK_F_0_START_L_OFF
, 0x02, TVP7002_WRITE
},
278 { TVP7002_VBLK_F_1_START_L_OFF
, 0x02, TVP7002_WRITE
},
279 { TVP7002_VBLK_F_0_DURATION
, 0x16, TVP7002_WRITE
},
280 { TVP7002_VBLK_F_1_DURATION
, 0x17, TVP7002_WRITE
},
281 { TVP7002_ALC_PLACEMENT
, 0x5a, TVP7002_WRITE
},
282 { TVP7002_CLAMP_START
, 0x32, TVP7002_WRITE
},
283 { TVP7002_CLAMP_W
, 0x20, TVP7002_WRITE
},
284 { TVP7002_HPLL_PRE_COAST
, 0x01, TVP7002_WRITE
},
285 { TVP7002_HPLL_POST_COAST
, 0x00, TVP7002_WRITE
},
286 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
289 /* Register parameters for 720P60 */
290 static const struct i2c_reg_value tvp7002_parms_720P60
[] = {
291 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0x67, TVP7002_WRITE
},
292 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0x20, TVP7002_WRITE
},
293 { TVP7002_HPLL_CRTL
, 0xa0, TVP7002_WRITE
},
294 { TVP7002_HPLL_PHASE_SEL
, 0x16, TVP7002_WRITE
},
295 { TVP7002_AVID_START_PIXEL_LSBS
, 0x47, TVP7002_WRITE
},
296 { TVP7002_AVID_START_PIXEL_MSBS
, 0x01, TVP7002_WRITE
},
297 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x4B, TVP7002_WRITE
},
298 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x06, TVP7002_WRITE
},
299 { TVP7002_VBLK_F_0_START_L_OFF
, 0x05, TVP7002_WRITE
},
300 { TVP7002_VBLK_F_1_START_L_OFF
, 0x00, TVP7002_WRITE
},
301 { TVP7002_VBLK_F_0_DURATION
, 0x2D, TVP7002_WRITE
},
302 { TVP7002_VBLK_F_1_DURATION
, 0x00, TVP7002_WRITE
},
303 { TVP7002_ALC_PLACEMENT
, 0x5a, TVP7002_WRITE
},
304 { TVP7002_CLAMP_START
, 0x32, TVP7002_WRITE
},
305 { TVP7002_CLAMP_W
, 0x20, TVP7002_WRITE
},
306 { TVP7002_HPLL_PRE_COAST
, 0x00, TVP7002_WRITE
},
307 { TVP7002_HPLL_POST_COAST
, 0x00, TVP7002_WRITE
},
308 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
311 /* Register parameters for 720P50 */
312 static const struct i2c_reg_value tvp7002_parms_720P50
[] = {
313 { TVP7002_HPLL_FDBK_DIV_MSBS
, 0x7b, TVP7002_WRITE
},
314 { TVP7002_HPLL_FDBK_DIV_LSBS
, 0xc0, TVP7002_WRITE
},
315 { TVP7002_HPLL_CRTL
, 0x98, TVP7002_WRITE
},
316 { TVP7002_HPLL_PHASE_SEL
, 0x16, TVP7002_WRITE
},
317 { TVP7002_AVID_START_PIXEL_LSBS
, 0x47, TVP7002_WRITE
},
318 { TVP7002_AVID_START_PIXEL_MSBS
, 0x01, TVP7002_WRITE
},
319 { TVP7002_AVID_STOP_PIXEL_LSBS
, 0x4B, TVP7002_WRITE
},
320 { TVP7002_AVID_STOP_PIXEL_MSBS
, 0x06, TVP7002_WRITE
},
321 { TVP7002_VBLK_F_0_START_L_OFF
, 0x05, TVP7002_WRITE
},
322 { TVP7002_VBLK_F_1_START_L_OFF
, 0x00, TVP7002_WRITE
},
323 { TVP7002_VBLK_F_0_DURATION
, 0x2D, TVP7002_WRITE
},
324 { TVP7002_VBLK_F_1_DURATION
, 0x00, TVP7002_WRITE
},
325 { TVP7002_ALC_PLACEMENT
, 0x5a, TVP7002_WRITE
},
326 { TVP7002_CLAMP_START
, 0x32, TVP7002_WRITE
},
327 { TVP7002_CLAMP_W
, 0x20, TVP7002_WRITE
},
328 { TVP7002_HPLL_PRE_COAST
, 0x01, TVP7002_WRITE
},
329 { TVP7002_HPLL_POST_COAST
, 0x00, TVP7002_WRITE
},
330 { TVP7002_EOR
, 0xff, TVP7002_RESERVED
}
333 /* Preset definition for handling device operation */
334 struct tvp7002_preset_definition
{
336 const struct i2c_reg_value
*p_settings
;
337 enum v4l2_colorspace color_space
;
338 enum v4l2_field scanmode
;
345 /* Struct list for digital video presets */
346 static const struct tvp7002_preset_definition tvp7002_presets
[] = {
349 tvp7002_parms_720P60
,
350 V4L2_COLORSPACE_REC709
,
359 tvp7002_parms_1080I60
,
360 V4L2_COLORSPACE_REC709
,
361 V4L2_FIELD_INTERLACED
,
369 tvp7002_parms_1080I50
,
370 V4L2_COLORSPACE_REC709
,
371 V4L2_FIELD_INTERLACED
,
379 tvp7002_parms_720P50
,
380 V4L2_COLORSPACE_REC709
,
389 tvp7002_parms_1080P60
,
390 V4L2_COLORSPACE_REC709
,
400 V4L2_COLORSPACE_SMPTE170M
,
410 V4L2_COLORSPACE_SMPTE170M
,
419 #define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
421 /* Device definition */
423 struct v4l2_subdev sd
;
424 const struct tvp7002_config
*pdata
;
429 const struct tvp7002_preset_definition
*current_preset
;
434 * to_tvp7002 - Obtain device handler TVP7002
435 * @sd: ptr to v4l2_subdev struct
437 * Returns device handler tvp7002.
439 static inline struct tvp7002
*to_tvp7002(struct v4l2_subdev
*sd
)
441 return container_of(sd
, struct tvp7002
, sd
);
445 * tvp7002_read - Read a value from a register in an TVP7002
446 * @sd: ptr to v4l2_subdev struct
447 * @addr: TVP7002 register address
448 * @dst: pointer to 8-bit destination
450 * Returns value read if successful, or non-zero (-1) otherwise.
452 static int tvp7002_read(struct v4l2_subdev
*sd
, u8 addr
, u8
*dst
)
454 struct i2c_client
*c
= v4l2_get_subdevdata(sd
);
458 for (retry
= 0; retry
< I2C_RETRY_COUNT
; retry
++) {
459 error
= i2c_smbus_read_byte_data(c
, addr
);
466 msleep_interruptible(10);
468 v4l2_err(sd
, "TVP7002 read error %d\n", error
);
473 * tvp7002_read_err() - Read a register value with error code
474 * @sd: pointer to standard V4L2 sub-device structure
475 * @reg: destination register
476 * @val: value to be read
477 * @err: pointer to error value
479 * Read a value in a register and save error value in pointer.
480 * Also update the register table if successful
482 static inline void tvp7002_read_err(struct v4l2_subdev
*sd
, u8 reg
,
486 *err
= tvp7002_read(sd
, reg
, dst
);
490 * tvp7002_write() - Write a value to a register in TVP7002
491 * @sd: ptr to v4l2_subdev struct
492 * @addr: TVP7002 register address
493 * @value: value to be written to the register
495 * Write a value to a register in an TVP7002 decoder device.
496 * Returns zero if successful, or non-zero otherwise.
498 static int tvp7002_write(struct v4l2_subdev
*sd
, u8 addr
, u8 value
)
500 struct i2c_client
*c
;
504 c
= v4l2_get_subdevdata(sd
);
506 for (retry
= 0; retry
< I2C_RETRY_COUNT
; retry
++) {
507 error
= i2c_smbus_write_byte_data(c
, addr
, value
);
512 v4l2_warn(sd
, "Write: retry ... %d\n", retry
);
513 msleep_interruptible(10);
515 v4l2_err(sd
, "TVP7002 write error %d\n", error
);
520 * tvp7002_write_err() - Write a register value with error code
521 * @sd: pointer to standard V4L2 sub-device structure
522 * @reg: destination register
523 * @val: value to be written
524 * @err: pointer to error value
526 * Write a value in a register and save error value in pointer.
527 * Also update the register table if successful
529 static inline void tvp7002_write_err(struct v4l2_subdev
*sd
, u8 reg
,
533 *err
= tvp7002_write(sd
, reg
, val
);
537 * tvp7002_g_chip_ident() - Get chip identification number
538 * @sd: ptr to v4l2_subdev struct
539 * @chip: ptr to v4l2_dbg_chip_ident struct
541 * Obtains the chip's identification number.
542 * Returns zero or -EINVAL if read operation fails.
544 static int tvp7002_g_chip_ident(struct v4l2_subdev
*sd
,
545 struct v4l2_dbg_chip_ident
*chip
)
549 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
551 error
= tvp7002_read(sd
, TVP7002_CHIP_REV
, &rev
);
556 return v4l2_chip_ident_i2c_client(client
, chip
, V4L2_IDENT_TVP7002
, rev
);
560 * tvp7002_write_inittab() - Write initialization values
561 * @sd: ptr to v4l2_subdev struct
562 * @regs: ptr to i2c_reg_value struct
564 * Write initialization values.
565 * Returns zero or -EINVAL if read operation fails.
567 static int tvp7002_write_inittab(struct v4l2_subdev
*sd
,
568 const struct i2c_reg_value
*regs
)
572 /* Initialize the first (defined) registers */
573 while (TVP7002_EOR
!= regs
->reg
) {
574 if (TVP7002_WRITE
== regs
->type
)
575 tvp7002_write_err(sd
, regs
->reg
, regs
->value
, &error
);
583 * tvp7002_s_dv_preset() - Set digital video preset
584 * @sd: ptr to v4l2_subdev struct
585 * @dv_preset: ptr to v4l2_dv_preset struct
587 * Set the digital video preset for a TVP7002 decoder device.
588 * Returns zero when successful or -EINVAL if register access fails.
590 static int tvp7002_s_dv_preset(struct v4l2_subdev
*sd
,
591 struct v4l2_dv_preset
*dv_preset
)
593 struct tvp7002
*device
= to_tvp7002(sd
);
597 for (i
= 0; i
< NUM_PRESETS
; i
++) {
598 preset
= tvp7002_presets
[i
].preset
;
599 if (preset
== dv_preset
->preset
) {
600 device
->current_preset
= &tvp7002_presets
[i
];
601 return tvp7002_write_inittab(sd
, tvp7002_presets
[i
].p_settings
);
609 * tvp7002_g_ctrl() - Get a control
610 * @sd: ptr to v4l2_subdev struct
611 * @ctrl: ptr to v4l2_control struct
613 * Get a control for a TVP7002 decoder device.
614 * Returns zero when successful or -EINVAL if register access fails.
616 static int tvp7002_g_ctrl(struct v4l2_subdev
*sd
, struct v4l2_control
*ctrl
)
618 struct tvp7002
*device
= to_tvp7002(sd
);
622 ctrl
->value
= device
->gain
;
630 * tvp7002_s_ctrl() - Set a control
631 * @sd: ptr to v4l2_subdev struct
632 * @ctrl: ptr to v4l2_control struct
634 * Set a control in TVP7002 decoder device.
635 * Returns zero when successful or -EINVAL if register access fails.
637 static int tvp7002_s_ctrl(struct v4l2_subdev
*sd
, struct v4l2_control
*ctrl
)
639 struct tvp7002
*device
= to_tvp7002(sd
);
644 tvp7002_write_err(sd
, TVP7002_R_FINE_GAIN
,
645 ctrl
->value
& 0xff, &error
);
646 tvp7002_write_err(sd
, TVP7002_G_FINE_GAIN
,
647 ctrl
->value
& 0xff, &error
);
648 tvp7002_write_err(sd
, TVP7002_B_FINE_GAIN
,
649 ctrl
->value
& 0xff, &error
);
654 /* Set only after knowing there is no error */
655 device
->gain
= ctrl
->value
& 0xff;
663 * tvp7002_queryctrl() - Query a control
664 * @sd: ptr to v4l2_subdev struct
665 * @qc: ptr to v4l2_queryctrl struct
667 * Query a control of a TVP7002 decoder device.
668 * Returns zero when successful or -EINVAL if register read fails.
670 static int tvp7002_queryctrl(struct v4l2_subdev
*sd
, struct v4l2_queryctrl
*qc
)
675 * Gain is supported [0-255, default=0, step=1]
677 return v4l2_ctrl_query_fill(qc
, 0, 255, 1, 0);
684 * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
685 * @sd: pointer to standard V4L2 sub-device structure
686 * @f: pointer to mediabus format structure
688 * Negotiate the image capture size and mediabus format.
689 * There is only one possible format, so this single function works for
692 static int tvp7002_mbus_fmt(struct v4l2_subdev
*sd
, struct v4l2_mbus_framefmt
*f
)
694 struct tvp7002
*device
= to_tvp7002(sd
);
695 struct v4l2_dv_enum_preset e_preset
;
698 /* Calculate height and width based on current standard */
699 error
= v4l_fill_dv_preset_info(device
->current_preset
->preset
, &e_preset
);
703 f
->width
= e_preset
.width
;
704 f
->height
= e_preset
.height
;
705 f
->code
= V4L2_MBUS_FMT_YUYV10_1X20
;
706 f
->field
= device
->current_preset
->scanmode
;
707 f
->colorspace
= device
->current_preset
->color_space
;
709 v4l2_dbg(1, debug
, sd
, "MBUS_FMT: Width - %d, Height - %d",
710 f
->width
, f
->height
);
715 * tvp7002_query_dv_preset() - query DV preset
716 * @sd: pointer to standard V4L2 sub-device structure
717 * @qpreset: standard V4L2 v4l2_dv_preset structure
719 * Returns the current DV preset by TVP7002. If no active input is
720 * detected, returns -EINVAL
722 static int tvp7002_query_dv_preset(struct v4l2_subdev
*sd
,
723 struct v4l2_dv_preset
*qpreset
)
725 const struct tvp7002_preset_definition
*presets
= tvp7002_presets
;
726 struct tvp7002
*device
;
737 device
= to_tvp7002(sd
);
739 /* Read standards from device registers */
740 tvp7002_read_err(sd
, TVP7002_L_FRAME_STAT_LSBS
, &lpf_lsb
, &error
);
741 tvp7002_read_err(sd
, TVP7002_L_FRAME_STAT_MSBS
, &lpf_msb
, &error
);
746 tvp7002_read_err(sd
, TVP7002_CLK_L_STAT_LSBS
, &cpl_lsb
, &error
);
747 tvp7002_read_err(sd
, TVP7002_CLK_L_STAT_MSBS
, &cpl_msb
, &error
);
752 /* Get lines per frame, clocks per line and interlaced/progresive */
753 lpfr
= lpf_lsb
| ((TVP7002_CL_MASK
& lpf_msb
) << TVP7002_CL_SHIFT
);
754 cpln
= cpl_lsb
| ((TVP7002_CL_MASK
& cpl_msb
) << TVP7002_CL_SHIFT
);
755 progressive
= (lpf_msb
& TVP7002_INPR_MASK
) >> TVP7002_IP_SHIFT
;
757 /* Do checking of video modes */
758 for (index
= 0; index
< NUM_PRESETS
; index
++, presets
++)
759 if (lpfr
== presets
->lines_per_frame
&&
760 progressive
== presets
->progressive
) {
761 if (presets
->cpl_min
== 0xffff)
763 if (cpln
>= presets
->cpl_min
&& cpln
<= presets
->cpl_max
)
767 if (index
== NUM_PRESETS
) {
768 v4l2_dbg(1, debug
, sd
, "detection failed: lpf = %x, cpl = %x\n",
770 /* Could not detect a signal, so return the 'invalid' preset */
771 qpreset
->preset
= V4L2_DV_INVALID
;
775 /* Set values in found preset */
776 qpreset
->preset
= presets
->preset
;
778 /* Update lines per frame and clocks per line info */
779 v4l2_dbg(1, debug
, sd
, "detected preset: %d\n", presets
->preset
);
783 #ifdef CONFIG_VIDEO_ADV_DEBUG
785 * tvp7002_g_register() - Get the value of a register
786 * @sd: ptr to v4l2_subdev struct
787 * @reg: ptr to v4l2_dbg_register struct
789 * Get the value of a TVP7002 decoder device register.
790 * Returns zero when successful, -EINVAL if register read fails or
791 * access to I2C client fails, -EPERM if the call is not allowed
792 * by disabled CAP_SYS_ADMIN.
794 static int tvp7002_g_register(struct v4l2_subdev
*sd
,
795 struct v4l2_dbg_register
*reg
)
797 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
801 if (!v4l2_chip_match_i2c_client(client
, ®
->match
))
803 if (!capable(CAP_SYS_ADMIN
))
806 ret
= tvp7002_read(sd
, reg
->reg
& 0xff, &val
);
812 * tvp7002_s_register() - set a control
813 * @sd: ptr to v4l2_subdev struct
814 * @reg: ptr to v4l2_dbg_register struct
816 * Get the value of a TVP7002 decoder device register.
817 * Returns zero when successful, -EINVAL if register read fails or
818 * -EPERM if call not allowed.
820 static int tvp7002_s_register(struct v4l2_subdev
*sd
,
821 struct v4l2_dbg_register
*reg
)
823 struct i2c_client
*client
= v4l2_get_subdevdata(sd
);
825 if (!v4l2_chip_match_i2c_client(client
, ®
->match
))
827 if (!capable(CAP_SYS_ADMIN
))
830 return tvp7002_write(sd
, reg
->reg
& 0xff, reg
->val
& 0xff);
835 * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
836 * @sd: pointer to standard V4L2 sub-device structure
837 * @index: format index
838 * @code: pointer to mediabus format
840 * Enumerate supported mediabus formats.
843 static int tvp7002_enum_mbus_fmt(struct v4l2_subdev
*sd
, unsigned index
,
844 enum v4l2_mbus_pixelcode
*code
)
846 /* Check requested format index is within range */
849 *code
= V4L2_MBUS_FMT_YUYV10_1X20
;
854 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
855 * @sd: pointer to standard V4L2 sub-device structure
856 * @enable: streaming enable or disable
858 * Sets streaming to enable or disable, if possible.
860 static int tvp7002_s_stream(struct v4l2_subdev
*sd
, int enable
)
862 struct tvp7002
*device
= to_tvp7002(sd
);
865 if (device
->streaming
== enable
)
869 /* Set output state on (low impedance means stream on) */
870 error
= tvp7002_write(sd
, TVP7002_MISC_CTL_2
, 0x00);
871 device
->streaming
= enable
;
873 /* Set output state off (high impedance means stream off) */
874 error
= tvp7002_write(sd
, TVP7002_MISC_CTL_2
, 0x03);
876 v4l2_dbg(1, debug
, sd
, "Unable to stop streaming\n");
878 device
->streaming
= enable
;
885 * tvp7002_log_status() - Print information about register settings
886 * @sd: ptr to v4l2_subdev struct
888 * Log register values of a TVP7002 decoder device.
889 * Returns zero or -EINVAL if read operation fails.
891 static int tvp7002_log_status(struct v4l2_subdev
*sd
)
893 const struct tvp7002_preset_definition
*presets
= tvp7002_presets
;
894 struct tvp7002
*device
= to_tvp7002(sd
);
895 struct v4l2_dv_enum_preset e_preset
;
896 struct v4l2_dv_preset detected
;
899 detected
.preset
= V4L2_DV_INVALID
;
900 /* Find my current standard*/
901 tvp7002_query_dv_preset(sd
, &detected
);
903 /* Print standard related code values */
904 for (i
= 0; i
< NUM_PRESETS
; i
++, presets
++)
905 if (presets
->preset
== detected
.preset
)
908 if (v4l_fill_dv_preset_info(device
->current_preset
->preset
, &e_preset
))
911 v4l2_info(sd
, "Selected DV Preset: %s\n", e_preset
.name
);
912 v4l2_info(sd
, " Pixels per line: %u\n", e_preset
.width
);
913 v4l2_info(sd
, " Lines per frame: %u\n\n", e_preset
.height
);
914 if (i
== NUM_PRESETS
) {
915 v4l2_info(sd
, "Detected DV Preset: None\n");
917 if (v4l_fill_dv_preset_info(presets
->preset
, &e_preset
))
919 v4l2_info(sd
, "Detected DV Preset: %s\n", e_preset
.name
);
920 v4l2_info(sd
, " Pixels per line: %u\n", e_preset
.width
);
921 v4l2_info(sd
, " Lines per frame: %u\n\n", e_preset
.height
);
923 v4l2_info(sd
, "Streaming enabled: %s\n",
924 device
->streaming
? "yes" : "no");
926 /* Print the current value of the gain control */
927 v4l2_info(sd
, "Gain: %u\n", device
->gain
);
933 * tvp7002_enum_dv_presets() - Enum supported digital video formats
934 * @sd: pointer to standard V4L2 sub-device structure
935 * @preset: pointer to format struct
937 * Enumerate supported digital video formats.
939 static int tvp7002_enum_dv_presets(struct v4l2_subdev
*sd
,
940 struct v4l2_dv_enum_preset
*preset
)
942 /* Check requested format index is within range */
943 if (preset
->index
>= NUM_PRESETS
)
946 return v4l_fill_dv_preset_info(tvp7002_presets
[preset
->index
].preset
, preset
);
949 /* V4L2 core operation handlers */
950 static const struct v4l2_subdev_core_ops tvp7002_core_ops
= {
951 .g_chip_ident
= tvp7002_g_chip_ident
,
952 .log_status
= tvp7002_log_status
,
953 .g_ctrl
= tvp7002_g_ctrl
,
954 .s_ctrl
= tvp7002_s_ctrl
,
955 .queryctrl
= tvp7002_queryctrl
,
956 #ifdef CONFIG_VIDEO_ADV_DEBUG
957 .g_register
= tvp7002_g_register
,
958 .s_register
= tvp7002_s_register
,
962 /* Specific video subsystem operation handlers */
963 static const struct v4l2_subdev_video_ops tvp7002_video_ops
= {
964 .enum_dv_presets
= tvp7002_enum_dv_presets
,
965 .s_dv_preset
= tvp7002_s_dv_preset
,
966 .query_dv_preset
= tvp7002_query_dv_preset
,
967 .s_stream
= tvp7002_s_stream
,
968 .g_mbus_fmt
= tvp7002_mbus_fmt
,
969 .try_mbus_fmt
= tvp7002_mbus_fmt
,
970 .s_mbus_fmt
= tvp7002_mbus_fmt
,
971 .enum_mbus_fmt
= tvp7002_enum_mbus_fmt
,
974 /* V4L2 top level operation handlers */
975 static const struct v4l2_subdev_ops tvp7002_ops
= {
976 .core
= &tvp7002_core_ops
,
977 .video
= &tvp7002_video_ops
,
980 static struct tvp7002 tvp7002_dev
= {
982 .current_preset
= tvp7002_presets
,
987 * tvp7002_probe - Probe a TVP7002 device
988 * @c: ptr to i2c_client struct
989 * @id: ptr to i2c_device_id struct
991 * Initialize the TVP7002 device
992 * Returns zero when successful, -EINVAL if register read fails or
993 * -EIO if i2c access is not available.
995 static int tvp7002_probe(struct i2c_client
*c
, const struct i2c_device_id
*id
)
997 struct v4l2_subdev
*sd
;
998 struct tvp7002
*device
;
999 struct v4l2_dv_preset preset
;
1006 /* Check if the adapter supports the needed features */
1007 if (!i2c_check_functionality(c
->adapter
,
1008 I2C_FUNC_SMBUS_READ_BYTE
| I2C_FUNC_SMBUS_WRITE_BYTE_DATA
))
1011 if (!c
->dev
.platform_data
) {
1012 v4l_err(c
, "No platform data!!\n");
1016 device
= kmalloc(sizeof(struct tvp7002
), GFP_KERNEL
);
1021 *device
= tvp7002_dev
;
1023 device
->pdata
= c
->dev
.platform_data
;
1025 /* Tell v4l2 the device is ready */
1026 v4l2_i2c_subdev_init(sd
, c
, &tvp7002_ops
);
1027 v4l_info(c
, "tvp7002 found @ 0x%02x (%s)\n",
1028 c
->addr
, c
->adapter
->name
);
1030 error
= tvp7002_read(sd
, TVP7002_CHIP_REV
, &revision
);
1034 /* Get revision number */
1035 v4l2_info(sd
, "Rev. %02x detected.\n", revision
);
1036 if (revision
!= 0x02)
1037 v4l2_info(sd
, "Unknown revision detected.\n");
1039 /* Initializes TVP7002 to its default values */
1040 error
= tvp7002_write_inittab(sd
, tvp7002_init_default
);
1045 /* Set polarity information after registers have been set */
1046 polarity_a
= 0x20 | device
->pdata
->hs_polarity
<< 5
1047 | device
->pdata
->vs_polarity
<< 2;
1048 error
= tvp7002_write(sd
, TVP7002_SYNC_CTL_1
, polarity_a
);
1052 polarity_b
= 0x01 | device
->pdata
->fid_polarity
<< 2
1053 | device
->pdata
->sog_polarity
<< 1
1054 | device
->pdata
->clk_polarity
;
1055 error
= tvp7002_write(sd
, TVP7002_MISC_CTL_3
, polarity_b
);
1059 /* Set registers according to default video mode */
1060 preset
.preset
= device
->current_preset
->preset
;
1061 error
= tvp7002_s_dv_preset(sd
, &preset
);
1071 * tvp7002_remove - Remove TVP7002 device support
1072 * @c: ptr to i2c_client struct
1074 * Reset the TVP7002 device
1077 static int tvp7002_remove(struct i2c_client
*c
)
1079 struct v4l2_subdev
*sd
= i2c_get_clientdata(c
);
1080 struct tvp7002
*device
= to_tvp7002(sd
);
1082 v4l2_dbg(1, debug
, sd
, "Removing tvp7002 adapter"
1083 "on address 0x%x\n", c
->addr
);
1085 v4l2_device_unregister_subdev(sd
);
1090 /* I2C Device ID table */
1091 static const struct i2c_device_id tvp7002_id
[] = {
1095 MODULE_DEVICE_TABLE(i2c
, tvp7002_id
);
1097 /* I2C driver data */
1098 static struct i2c_driver tvp7002_driver
= {
1100 .owner
= THIS_MODULE
,
1101 .name
= TVP7002_MODULE_NAME
,
1103 .probe
= tvp7002_probe
,
1104 .remove
= tvp7002_remove
,
1105 .id_table
= tvp7002_id
,
1109 * tvp7002_init - Initialize driver via I2C interface
1111 * Register the TVP7002 driver.
1112 * Return 0 on success or error code on failure.
1114 static int __init
tvp7002_init(void)
1116 return i2c_add_driver(&tvp7002_driver
);
1120 * tvp7002_exit - Remove driver via I2C interface
1122 * Unregister the TVP7002 driver.
1125 static void __exit
tvp7002_exit(void)
1127 i2c_del_driver(&tvp7002_driver
);
1130 module_init(tvp7002_init
);
1131 module_exit(tvp7002_exit
);