1 /* linux/arch/arm/mach-exynos4/mach-origen.c
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/serial_core.h>
12 #include <linux/gpio.h>
13 #include <linux/mmc/host.h>
14 #include <linux/platform_device.h>
16 #include <linux/input.h>
17 #include <linux/pwm_backlight.h>
18 #include <linux/gpio_keys.h>
19 #include <linux/i2c.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/max8997.h>
22 #include <linux/lcd.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach-types.h>
27 #include <video/platform_lcd.h>
29 #include <plat/regs-serial.h>
30 #include <plat/regs-fb-v4.h>
31 #include <plat/exynos4.h>
33 #include <plat/devs.h>
34 #include <plat/sdhci.h>
36 #include <plat/ehci.h>
37 #include <plat/clock.h>
38 #include <plat/gpio-cfg.h>
39 #include <plat/backlight.h>
46 /* Following are default values for UCON, ULCON and UFCON UART registers */
47 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
48 S3C2410_UCON_RXILEVEL | \
49 S3C2410_UCON_TXIRQMODE | \
50 S3C2410_UCON_RXIRQMODE | \
51 S3C2410_UCON_RXFIFO_TOI | \
52 S3C2443_UCON_RXERR_IRQEN)
54 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
56 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
57 S5PV210_UFCON_TXTRIG4 | \
58 S5PV210_UFCON_RXTRIG4)
60 static struct s3c2410_uartcfg origen_uartcfgs
[] __initdata
= {
64 .ucon
= ORIGEN_UCON_DEFAULT
,
65 .ulcon
= ORIGEN_ULCON_DEFAULT
,
66 .ufcon
= ORIGEN_UFCON_DEFAULT
,
71 .ucon
= ORIGEN_UCON_DEFAULT
,
72 .ulcon
= ORIGEN_ULCON_DEFAULT
,
73 .ufcon
= ORIGEN_UFCON_DEFAULT
,
78 .ucon
= ORIGEN_UCON_DEFAULT
,
79 .ulcon
= ORIGEN_ULCON_DEFAULT
,
80 .ufcon
= ORIGEN_UFCON_DEFAULT
,
85 .ucon
= ORIGEN_UCON_DEFAULT
,
86 .ulcon
= ORIGEN_ULCON_DEFAULT
,
87 .ufcon
= ORIGEN_UFCON_DEFAULT
,
91 static struct regulator_consumer_supply __initdata ldo3_consumer
[] = {
92 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
93 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
94 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
96 static struct regulator_consumer_supply __initdata ldo6_consumer
[] = {
97 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
99 static struct regulator_consumer_supply __initdata ldo7_consumer
[] = {
100 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
102 static struct regulator_consumer_supply __initdata ldo8_consumer
[] = {
103 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
104 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
106 static struct regulator_consumer_supply __initdata ldo9_consumer
[] = {
107 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
109 static struct regulator_consumer_supply __initdata ldo11_consumer
[] = {
110 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
112 static struct regulator_consumer_supply __initdata ldo14_consumer
[] = {
113 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
115 static struct regulator_consumer_supply __initdata ldo17_consumer
[] = {
116 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
118 static struct regulator_consumer_supply __initdata buck1_consumer
[] = {
119 REGULATOR_SUPPLY("vdd_arm", NULL
), /* CPUFREQ */
121 static struct regulator_consumer_supply __initdata buck2_consumer
[] = {
122 REGULATOR_SUPPLY("vdd_int", NULL
), /* CPUFREQ */
124 static struct regulator_consumer_supply __initdata buck3_consumer
[] = {
125 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
127 static struct regulator_consumer_supply __initdata buck7_consumer
[] = {
128 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
131 static struct regulator_init_data __initdata max8997_ldo1_data
= {
133 .name
= "VDD_ABB_3.3V",
143 static struct regulator_init_data __initdata max8997_ldo2_data
= {
145 .name
= "VDD_ALIVE_1.1V",
156 static struct regulator_init_data __initdata max8997_ldo3_data
= {
158 .name
= "VMIPI_1.1V",
162 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
167 .num_consumer_supplies
= ARRAY_SIZE(ldo3_consumer
),
168 .consumer_supplies
= ldo3_consumer
,
171 static struct regulator_init_data __initdata max8997_ldo4_data
= {
173 .name
= "VDD_RTC_1.8V",
184 static struct regulator_init_data __initdata max8997_ldo6_data
= {
186 .name
= "VMIPI_1.8V",
190 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
195 .num_consumer_supplies
= ARRAY_SIZE(ldo6_consumer
),
196 .consumer_supplies
= ldo6_consumer
,
199 static struct regulator_init_data __initdata max8997_ldo7_data
= {
201 .name
= "VDD_AUD_1.8V",
205 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
210 .num_consumer_supplies
= ARRAY_SIZE(ldo7_consumer
),
211 .consumer_supplies
= ldo7_consumer
,
214 static struct regulator_init_data __initdata max8997_ldo8_data
= {
220 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
225 .num_consumer_supplies
= ARRAY_SIZE(ldo8_consumer
),
226 .consumer_supplies
= ldo8_consumer
,
229 static struct regulator_init_data __initdata max8997_ldo9_data
= {
231 .name
= "DVDD_SWB_2.8V",
235 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
240 .num_consumer_supplies
= ARRAY_SIZE(ldo9_consumer
),
241 .consumer_supplies
= ldo9_consumer
,
244 static struct regulator_init_data __initdata max8997_ldo10_data
= {
246 .name
= "VDD_PLL_1.1V",
257 static struct regulator_init_data __initdata max8997_ldo11_data
= {
259 .name
= "VDD_AUD_3V",
263 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
268 .num_consumer_supplies
= ARRAY_SIZE(ldo11_consumer
),
269 .consumer_supplies
= ldo11_consumer
,
272 static struct regulator_init_data __initdata max8997_ldo14_data
= {
274 .name
= "AVDD18_SWB_1.8V",
278 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
283 .num_consumer_supplies
= ARRAY_SIZE(ldo14_consumer
),
284 .consumer_supplies
= ldo14_consumer
,
287 static struct regulator_init_data __initdata max8997_ldo17_data
= {
289 .name
= "VDD_SWB_3.3V",
293 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
298 .num_consumer_supplies
= ARRAY_SIZE(ldo17_consumer
),
299 .consumer_supplies
= ldo17_consumer
,
302 static struct regulator_init_data __initdata max8997_ldo21_data
= {
304 .name
= "VDD_MIF_1.2V",
315 static struct regulator_init_data __initdata max8997_buck1_data
= {
317 .name
= "VDD_ARM_1.2V",
322 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
327 .num_consumer_supplies
= ARRAY_SIZE(buck1_consumer
),
328 .consumer_supplies
= buck1_consumer
,
331 static struct regulator_init_data __initdata max8997_buck2_data
= {
333 .name
= "VDD_INT_1.1V",
338 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
343 .num_consumer_supplies
= ARRAY_SIZE(buck2_consumer
),
344 .consumer_supplies
= buck2_consumer
,
347 static struct regulator_init_data __initdata max8997_buck3_data
= {
349 .name
= "VDD_G3D_1.1V",
352 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
353 REGULATOR_CHANGE_STATUS
,
358 .num_consumer_supplies
= ARRAY_SIZE(buck3_consumer
),
359 .consumer_supplies
= buck3_consumer
,
362 static struct regulator_init_data __initdata max8997_buck5_data
= {
364 .name
= "VDDQ_M1M2_1.2V",
375 static struct regulator_init_data __initdata max8997_buck7_data
= {
377 .name
= "VDD_LCD_3.3V",
382 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
387 .num_consumer_supplies
= ARRAY_SIZE(buck7_consumer
),
388 .consumer_supplies
= buck7_consumer
,
391 static struct max8997_regulator_data __initdata origen_max8997_regulators
[] = {
392 { MAX8997_LDO1
, &max8997_ldo1_data
},
393 { MAX8997_LDO2
, &max8997_ldo2_data
},
394 { MAX8997_LDO3
, &max8997_ldo3_data
},
395 { MAX8997_LDO4
, &max8997_ldo4_data
},
396 { MAX8997_LDO6
, &max8997_ldo6_data
},
397 { MAX8997_LDO7
, &max8997_ldo7_data
},
398 { MAX8997_LDO8
, &max8997_ldo8_data
},
399 { MAX8997_LDO9
, &max8997_ldo9_data
},
400 { MAX8997_LDO10
, &max8997_ldo10_data
},
401 { MAX8997_LDO11
, &max8997_ldo11_data
},
402 { MAX8997_LDO14
, &max8997_ldo14_data
},
403 { MAX8997_LDO17
, &max8997_ldo17_data
},
404 { MAX8997_LDO21
, &max8997_ldo21_data
},
405 { MAX8997_BUCK1
, &max8997_buck1_data
},
406 { MAX8997_BUCK2
, &max8997_buck2_data
},
407 { MAX8997_BUCK3
, &max8997_buck3_data
},
408 { MAX8997_BUCK5
, &max8997_buck5_data
},
409 { MAX8997_BUCK7
, &max8997_buck7_data
},
412 struct max8997_platform_data __initdata origen_max8997_pdata
= {
413 .num_regulators
= ARRAY_SIZE(origen_max8997_regulators
),
414 .regulators
= origen_max8997_regulators
,
417 .buck1_gpiodvs
= false,
418 .buck2_gpiodvs
= false,
419 .buck5_gpiodvs
= false,
420 .irq_base
= IRQ_GPIO_END
+ 1,
422 .ignore_gpiodvs_side_effect
= true,
423 .buck125_default_idx
= 0x0,
425 .buck125_gpios
[0] = EXYNOS4_GPX0(0),
426 .buck125_gpios
[1] = EXYNOS4_GPX0(1),
427 .buck125_gpios
[2] = EXYNOS4_GPX0(2),
429 .buck1_voltage
[0] = 1350000,
430 .buck1_voltage
[1] = 1300000,
431 .buck1_voltage
[2] = 1250000,
432 .buck1_voltage
[3] = 1200000,
433 .buck1_voltage
[4] = 1150000,
434 .buck1_voltage
[5] = 1100000,
435 .buck1_voltage
[6] = 1000000,
436 .buck1_voltage
[7] = 950000,
438 .buck2_voltage
[0] = 1100000,
439 .buck2_voltage
[1] = 1100000,
440 .buck2_voltage
[2] = 1100000,
441 .buck2_voltage
[3] = 1100000,
442 .buck2_voltage
[4] = 1000000,
443 .buck2_voltage
[5] = 1000000,
444 .buck2_voltage
[6] = 1000000,
445 .buck2_voltage
[7] = 1000000,
447 .buck5_voltage
[0] = 1200000,
448 .buck5_voltage
[1] = 1200000,
449 .buck5_voltage
[2] = 1200000,
450 .buck5_voltage
[3] = 1200000,
451 .buck5_voltage
[4] = 1200000,
452 .buck5_voltage
[5] = 1200000,
453 .buck5_voltage
[6] = 1200000,
454 .buck5_voltage
[7] = 1200000,
458 static struct i2c_board_info i2c0_devs
[] __initdata
= {
460 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
461 .platform_data
= &origen_max8997_pdata
,
466 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata
= {
467 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
468 .clk_type
= S3C_SDHCI_CLK_DIV_EXTERNAL
,
471 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata
= {
472 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
473 .clk_type
= S3C_SDHCI_CLK_DIV_EXTERNAL
,
477 static struct s5p_ehci_platdata origen_ehci_pdata
;
479 static void __init
origen_ehci_init(void)
481 struct s5p_ehci_platdata
*pdata
= &origen_ehci_pdata
;
483 s5p_ehci_set_platdata(pdata
);
486 static struct gpio_keys_button origen_gpio_keys_table
[] = {
489 .gpio
= EXYNOS4_GPX1(5),
490 .desc
= "gpio-keys: KEY_MENU",
494 .debounce_interval
= 1,
497 .gpio
= EXYNOS4_GPX1(6),
498 .desc
= "gpio-keys: KEY_HOME",
502 .debounce_interval
= 1,
505 .gpio
= EXYNOS4_GPX1(7),
506 .desc
= "gpio-keys: KEY_BACK",
510 .debounce_interval
= 1,
513 .gpio
= EXYNOS4_GPX2(0),
514 .desc
= "gpio-keys: KEY_UP",
518 .debounce_interval
= 1,
521 .gpio
= EXYNOS4_GPX2(1),
522 .desc
= "gpio-keys: KEY_DOWN",
526 .debounce_interval
= 1,
530 static struct gpio_keys_platform_data origen_gpio_keys_data
= {
531 .buttons
= origen_gpio_keys_table
,
532 .nbuttons
= ARRAY_SIZE(origen_gpio_keys_table
),
535 static struct platform_device origen_device_gpiokeys
= {
538 .platform_data
= &origen_gpio_keys_data
,
542 static void lcd_hv070wsa_set_power(struct plat_lcd_data
*pd
, unsigned int power
)
547 ret
= gpio_request_one(EXYNOS4_GPE3(4),
548 GPIOF_OUT_INIT_HIGH
, "GPE3_4");
550 ret
= gpio_request_one(EXYNOS4_GPE3(4),
551 GPIOF_OUT_INIT_LOW
, "GPE3_4");
553 gpio_free(EXYNOS4_GPE3(4));
556 pr_err("failed to request gpio for LCD power: %d\n", ret
);
559 static struct plat_lcd_data origen_lcd_hv070wsa_data
= {
560 .set_power
= lcd_hv070wsa_set_power
,
563 static struct platform_device origen_lcd_hv070wsa
= {
564 .name
= "platform-lcd",
565 .dev
.parent
= &s5p_device_fimd0
.dev
,
566 .dev
.platform_data
= &origen_lcd_hv070wsa_data
,
569 static struct s3c_fb_pd_win origen_fb_win0
= {
584 static struct s3c_fb_platdata origen_lcd_pdata __initdata
= {
585 .win
[0] = &origen_fb_win0
,
586 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
587 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
588 .setup_gpio
= exynos4_fimd0_gpio_setup_24bpp
,
591 static struct platform_device
*origen_devices
[] __initdata
= {
604 &s5p_device_i2c_hdmiphy
,
609 &exynos4_device_pd
[PD_LCD0
],
610 &exynos4_device_pd
[PD_TV
],
611 &exynos4_device_pd
[PD_G3D
],
612 &exynos4_device_pd
[PD_LCD1
],
613 &exynos4_device_pd
[PD_CAM
],
614 &exynos4_device_pd
[PD_GPS
],
615 &exynos4_device_pd
[PD_MFC
],
616 &origen_device_gpiokeys
,
617 &origen_lcd_hv070wsa
,
620 /* LCD Backlight data */
621 static struct samsung_bl_gpio_info origen_bl_gpio_info
= {
622 .no
= EXYNOS4_GPD0(0),
623 .func
= S3C_GPIO_SFN(2),
626 static struct platform_pwm_backlight_data origen_bl_data
= {
628 .pwm_period_ns
= 1000,
631 static void s5p_tv_setup(void)
633 /* Direct HPD to HDMI chip */
634 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN
, "hpd-plug");
635 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
636 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE
);
639 static void __init
origen_map_io(void)
641 s5p_init_io(NULL
, 0, S5P_VA_CHIPID
);
642 s3c24xx_init_clocks(24000000);
643 s3c24xx_init_uarts(origen_uartcfgs
, ARRAY_SIZE(origen_uartcfgs
));
646 static void __init
origen_power_init(void)
648 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
649 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
650 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE
);
653 static void __init
origen_reserve(void)
655 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
658 static void __init
origen_machine_init(void)
662 s3c_i2c0_set_platdata(NULL
);
663 i2c_register_board_info(0, i2c0_devs
, ARRAY_SIZE(i2c0_devs
));
666 * Since sdhci instance 2 can contain a bootable media,
667 * sdhci instance 0 is registered after instance 2.
669 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata
);
670 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata
);
673 clk_xusbxti
.rate
= 24000000;
676 s5p_i2c_hdmiphy_set_platdata(NULL
);
678 s5p_fimd0_set_platdata(&origen_lcd_pdata
);
680 platform_add_devices(origen_devices
, ARRAY_SIZE(origen_devices
));
682 s5p_device_fimd0
.dev
.parent
= &exynos4_device_pd
[PD_LCD0
].dev
;
684 s5p_device_hdmi
.dev
.parent
= &exynos4_device_pd
[PD_TV
].dev
;
685 s5p_device_mixer
.dev
.parent
= &exynos4_device_pd
[PD_TV
].dev
;
687 s5p_device_mfc
.dev
.parent
= &exynos4_device_pd
[PD_MFC
].dev
;
689 samsung_bl_set(&origen_bl_gpio_info
, &origen_bl_data
);
692 MACHINE_START(ORIGEN
, "ORIGEN")
693 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
694 .atag_offset
= 0x100,
695 .init_irq
= exynos4_init_irq
,
696 .map_io
= origen_map_io
,
697 .init_machine
= origen_machine_init
,
698 .timer
= &exynos4_timer
,
699 .reserve
= &origen_reserve
,