2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/init.h>
16 #include <linux/of_address.h>
17 #include <asm/unified.h>
20 #define SRC_GPR1 0x020
21 #define BP_SRC_SCR_CORE1_RST 14
22 #define BP_SRC_SCR_CORE1_ENABLE 22
24 static void __iomem
*src_base
;
26 void imx_enable_cpu(int cpu
, bool enable
)
30 mask
= 1 << (BP_SRC_SCR_CORE1_ENABLE
+ cpu
- 1);
31 val
= readl_relaxed(src_base
+ SRC_SCR
);
32 val
= enable
? val
| mask
: val
& ~mask
;
33 writel_relaxed(val
, src_base
+ SRC_SCR
);
36 void imx_set_cpu_jump(int cpu
, void *jump_addr
)
38 writel_relaxed(BSYM(virt_to_phys(jump_addr
)),
39 src_base
+ SRC_GPR1
+ cpu
* 8);
42 void __init
imx_src_init(void)
44 struct device_node
*np
;
46 np
= of_find_compatible_node(NULL
, NULL
, "fsl,imx6q-src");
47 src_base
= of_iomap(np
, 0);