arch/arm/mm/dma-mapping.c

   1 /*
   2  *  linux/arch/arm/mm/dma-mapping.c
   3  *
   4  *  Copyright (C) 2000-2004 Russell King
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  *  DMA uncached mapping support.
  11  */
  12 #include <linux/module.h>
  13 #include <linux/mm.h>
  14 #include <linux/gfp.h>
  15 #include <linux/errno.h>
  16 #include <linux/list.h>
  17 #include <linux/init.h>
  18 #include <linux/device.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/highmem.h>
  21 #include <linux/slab.h>
  22
  23 #include <asm/memory.h>
  24 #include <asm/highmem.h>
  25 #include <asm/cacheflush.h>
  26 #include <asm/tlbflush.h>
  27 #include <asm/sizes.h>
  28 #include <asm/mach/arch.h>
  29
  30 #include "mm.h"
  31
  32 static u64 get_coherent_dma_mask(struct device *dev)
  33 {
  34         u64 mask = (u64)arm_dma_limit;
  35
  36         if (dev) {
  37                 mask = dev->coherent_dma_mask;
  38
  39                 /*
  40                  * Sanity check the DMA mask - it must be non-zero, and
  41                  * must be able to be satisfied by a DMA allocation.
  42                  */
  43                 if (mask == 0) {
  44                         dev_warn(dev, "coherent DMA mask is unset\n");
  45                         return 0;
  46                 }
  47
  48                 if ((~mask) & (u64)arm_dma_limit) {
  49                         dev_warn(dev, "coherent DMA mask %#llx is smaller "
  50                                  "than system GFP_DMA mask %#llx\n",
  51                                  mask, (u64)arm_dma_limit);
  52                         return 0;
  53                 }
  54         }
  55
  56         return mask;
  57 }
  58
  59 /*
  60  * Allocate a DMA buffer for 'dev' of size 'size' using the
  61  * specified gfp mask.  Note that 'size' must be page aligned.
  62  */
  63 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
  64 {
  65         unsigned long order = get_order(size);
  66         struct page *page, *p, *e;
  67         void *ptr;
  68         u64 mask = get_coherent_dma_mask(dev);
  69
  70 #ifdef CONFIG_DMA_API_DEBUG
  71         u64 limit = (mask + 1) & ~mask;
  72         if (limit && size >= limit) {
  73                 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
  74                         size, mask);
  75                 return NULL;
  76         }
  77 #endif
  78
  79         if (!mask)
  80                 return NULL;
  81
  82         if (mask < 0xffffffffULL)
  83                 gfp |= GFP_DMA;
  84
  85         page = alloc_pages(gfp, order);
  86         if (!page)
  87                 return NULL;
  88
  89         /*
  90          * Now split the huge page and free the excess pages
  91          */
  92         split_page(page, order);
  93         for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
  94                 __free_page(p);
  95
  96         /*
  97          * Ensure that the allocated pages are zeroed, and that any data
  98          * lurking in the kernel direct-mapped region is invalidated.
  99          */
 100         ptr = page_address(page);
 101         memset(ptr, 0, size);
 102         dmac_flush_range(ptr, ptr + size);
 103         outer_flush_range(__pa(ptr), __pa(ptr) + size);
 104
 105         return page;
 106 }
 107
 108 /*
 109  * Free a DMA buffer.  'size' must be page aligned.
 110  */
 111 static void __dma_free_buffer(struct page *page, size_t size)
 112 {
 113         struct page *e = page + (size >> PAGE_SHIFT);
 114
 115         while (page < e) {
 116                 __free_page(page);
 117                 page++;
 118         }
 119 }
 120
 121 #ifdef CONFIG_MMU
 122
 123 #define CONSISTENT_OFFSET(x)    (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT)
 124 #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT)
 125
 126 /*
 127  * These are the page tables (2MB each) covering uncached, DMA consistent allocations
 128  */
 129 static pte_t **consistent_pte;
 130
 131 #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
 132
 133 unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
 134
 135 void __init init_consistent_dma_size(unsigned long size)
 136 {
 137         unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M);
 138
 139         BUG_ON(consistent_pte); /* Check we're called before DMA region init */
 140         BUG_ON(base < VMALLOC_END);
 141
 142         /* Grow region to accommodate specified size  */
 143         if (base < consistent_base)
 144                 consistent_base = base;
 145 }
 146
 147 #include "vmregion.h"
 148
 149 static struct arm_vmregion_head consistent_head = {
 150         .vm_lock        = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
 151         .vm_list        = LIST_HEAD_INIT(consistent_head.vm_list),
 152         .vm_end         = CONSISTENT_END,
 153 };
 154
 155 #ifdef CONFIG_HUGETLB_PAGE
 156 #error ARM Coherent DMA allocator does not (yet) support huge TLB
 157 #endif
 158
 159 /*
 160  * Initialise the consistent memory allocation.
 161  */
 162 static int __init consistent_init(void)
 163 {
 164         int ret = 0;
 165         pgd_t *pgd;
 166         pud_t *pud;
 167         pmd_t *pmd;
 168         pte_t *pte;
 169         int i = 0;
 170         unsigned long base = consistent_base;
 171         unsigned long num_ptes = (CONSISTENT_END - base) >> PGDIR_SHIFT;
 172
 173         consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
 174         if (!consistent_pte) {
 175                 pr_err("%s: no memory\n", __func__);
 176                 return -ENOMEM;
 177         }
 178
 179         pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END);
 180         consistent_head.vm_start = base;
 181
 182         do {
 183                 pgd = pgd_offset(&init_mm, base);
 184
 185                 pud = pud_alloc(&init_mm, pgd, base);
 186                 if (!pud) {
 187                         printk(KERN_ERR "%s: no pud tables\n", __func__);
 188                         ret = -ENOMEM;
 189                         break;
 190                 }
 191
 192                 pmd = pmd_alloc(&init_mm, pud, base);
 193                 if (!pmd) {
 194                         printk(KERN_ERR "%s: no pmd tables\n", __func__);
 195                         ret = -ENOMEM;
 196                         break;
 197                 }
 198                 WARN_ON(!pmd_none(*pmd));
 199
 200                 pte = pte_alloc_kernel(pmd, base);
 201                 if (!pte) {
 202                         printk(KERN_ERR "%s: no pte tables\n", __func__);
 203                         ret = -ENOMEM;
 204                         break;
 205                 }
 206
 207                 consistent_pte[i++] = pte;
 208                 base += PMD_SIZE;
 209         } while (base < CONSISTENT_END);
 210
 211         return ret;
 212 }
 213
 214 core_initcall(consistent_init);
 215
 216 static void *
 217 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
 218 {
 219         struct arm_vmregion *c;
 220         size_t align;
 221         int bit;
 222
 223         if (!consistent_pte) {
 224                 printk(KERN_ERR "%s: not initialised\n", __func__);
 225                 dump_stack();
 226                 return NULL;
 227         }
 228
 229         /*
 230          * Align the virtual region allocation - maximum alignment is
 231          * a section size, minimum is a page size.  This helps reduce
 232          * fragmentation of the DMA space, and also prevents allocations
 233          * smaller than a section from crossing a section boundary.
 234          */
 235         bit = fls(size - 1);
 236         if (bit > SECTION_SHIFT)
 237                 bit = SECTION_SHIFT;
 238         align = 1 << bit;
 239
 240         /*
 241          * Allocate a virtual address in the consistent mapping region.
 242          */
 243         c = arm_vmregion_alloc(&consistent_head, align, size,
 244                             gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
 245         if (c) {
 246                 pte_t *pte;
 247                 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
 248                 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
 249
 250                 pte = consistent_pte[idx] + off;
 251                 c->vm_pages = page;
 252
 253                 do {
 254                         BUG_ON(!pte_none(*pte));
 255
 256                         set_pte_ext(pte, mk_pte(page, prot), 0);
 257                         page++;
 258                         pte++;
 259                         off++;
 260                         if (off >= PTRS_PER_PTE) {
 261                                 off = 0;
 262                                 pte = consistent_pte[++idx];
 263                         }
 264                 } while (size -= PAGE_SIZE);
 265
 266                 dsb();
 267
 268                 return (void *)c->vm_start;
 269         }
 270         return NULL;
 271 }
 272
 273 static void __dma_free_remap(void *cpu_addr, size_t size)
 274 {
 275         struct arm_vmregion *c;
 276         unsigned long addr;
 277         pte_t *ptep;
 278         int idx;
 279         u32 off;
 280
 281         c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
 282         if (!c) {
 283                 printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
 284                        __func__, cpu_addr);
 285                 dump_stack();
 286                 return;
 287         }
 288
 289         if ((c->vm_end - c->vm_start) != size) {
 290                 printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
 291                        __func__, c->vm_end - c->vm_start, size);
 292                 dump_stack();
 293                 size = c->vm_end - c->vm_start;
 294         }
 295
 296         idx = CONSISTENT_PTE_INDEX(c->vm_start);
 297         off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
 298         ptep = consistent_pte[idx] + off;
 299         addr = c->vm_start;
 300         do {
 301                 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
 302
 303                 ptep++;
 304                 addr += PAGE_SIZE;
 305                 off++;
 306                 if (off >= PTRS_PER_PTE) {
 307                         off = 0;
 308                         ptep = consistent_pte[++idx];
 309                 }
 310
 311                 if (pte_none(pte) || !pte_present(pte))
 312                         printk(KERN_CRIT "%s: bad page in kernel page table\n",
 313                                __func__);
 314         } while (size -= PAGE_SIZE);
 315
 316         flush_tlb_kernel_range(c->vm_start, c->vm_end);
 317
 318         arm_vmregion_free(&consistent_head, c);
 319 }
 320
 321 #else   /* !CONFIG_MMU */
 322
 323 #define __dma_alloc_remap(page, size, gfp, prot)        page_address(page)
 324 #define __dma_free_remap(addr, size)                    do { } while (0)
 325
 326 #endif  /* CONFIG_MMU */
 327
 328 static void *
 329 __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
 330             pgprot_t prot)
 331 {
 332         struct page *page;
 333         void *addr;
 334
 335         *handle = ~0;
 336         size = PAGE_ALIGN(size);
 337
 338         page = __dma_alloc_buffer(dev, size, gfp);
 339         if (!page)
 340                 return NULL;
 341
 342         if (!arch_is_coherent())
 343                 addr = __dma_alloc_remap(page, size, gfp, prot);
 344         else
 345                 addr = page_address(page);
 346
 347         if (addr)
 348                 *handle = pfn_to_dma(dev, page_to_pfn(page));
 349         else
 350                 __dma_free_buffer(page, size);
 351
 352         return addr;
 353 }
 354
 355 /*
 356  * Allocate DMA-coherent memory space and return both the kernel remapped
 357  * virtual and bus address for that space.
 358  */
 359 void *
 360 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
 361 {
 362         void *memory;
 363
 364         if (dma_alloc_from_coherent(dev, size, handle, &memory))
 365                 return memory;
 366
 367         return __dma_alloc(dev, size, handle, gfp,
 368                            pgprot_dmacoherent(pgprot_kernel));
 369 }
 370 EXPORT_SYMBOL(dma_alloc_coherent);
 371
 372 /*
 373  * Allocate a writecombining region, in much the same way as
 374  * dma_alloc_coherent above.
 375  */
 376 void *
 377 dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
 378 {
 379         return __dma_alloc(dev, size, handle, gfp,
 380                            pgprot_writecombine(pgprot_kernel));
 381 }
 382 EXPORT_SYMBOL(dma_alloc_writecombine);
 383
 384 static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
 385                     void *cpu_addr, dma_addr_t dma_addr, size_t size)
 386 {
 387         int ret = -ENXIO;
 388 #ifdef CONFIG_MMU
 389         unsigned long user_size, kern_size;
 390         struct arm_vmregion *c;
 391
 392         user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
 393
 394         c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
 395         if (c) {
 396                 unsigned long off = vma->vm_pgoff;
 397
 398                 kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
 399
 400                 if (off < kern_size &&
 401                     user_size <= (kern_size - off)) {
 402                         ret = remap_pfn_range(vma, vma->vm_start,
 403                                               page_to_pfn(c->vm_pages) + off,
 404                                               user_size << PAGE_SHIFT,
 405                                               vma->vm_page_prot);
 406                 }
 407         }
 408 #endif  /* CONFIG_MMU */
 409
 410         return ret;
 411 }
 412
 413 int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
 414                       void *cpu_addr, dma_addr_t dma_addr, size_t size)
 415 {
 416         vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
 417         return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
 418 }
 419 EXPORT_SYMBOL(dma_mmap_coherent);
 420
 421 int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
 422                           void *cpu_addr, dma_addr_t dma_addr, size_t size)
 423 {
 424         vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 425         return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
 426 }
 427 EXPORT_SYMBOL(dma_mmap_writecombine);
 428
 429 /*
 430  * free a page as defined by the above mapping.
 431  * Must not be called with IRQs disabled.
 432  */
 433 void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
 434 {
 435         WARN_ON(irqs_disabled());
 436
 437         if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
 438                 return;
 439
 440         size = PAGE_ALIGN(size);
 441
 442         if (!arch_is_coherent())
 443                 __dma_free_remap(cpu_addr, size);
 444
 445         __dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size);
 446 }
 447 EXPORT_SYMBOL(dma_free_coherent);
 448
 449 /*
 450  * Make an area consistent for devices.
 451  * Note: Drivers should NOT use this function directly, as it will break
 452  * platforms with CONFIG_DMABOUNCE.
 453  * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
 454  */
 455 void ___dma_single_cpu_to_dev(const void *kaddr, size_t size,
 456         enum dma_data_direction dir)
 457 {
 458         unsigned long paddr;
 459
 460         BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
 461
 462         dmac_map_area(kaddr, size, dir);
 463
 464         paddr = __pa(kaddr);
 465         if (dir == DMA_FROM_DEVICE) {
 466                 outer_inv_range(paddr, paddr + size);
 467         } else {
 468                 outer_clean_range(paddr, paddr + size);
 469         }
 470         /* FIXME: non-speculating: flush on bidirectional mappings? */
 471 }
 472 EXPORT_SYMBOL(___dma_single_cpu_to_dev);
 473
 474 void ___dma_single_dev_to_cpu(const void *kaddr, size_t size,
 475         enum dma_data_direction dir)
 476 {
 477         BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
 478
 479         /* FIXME: non-speculating: not required */
 480         /* don't bother invalidating if DMA to device */
 481         if (dir != DMA_TO_DEVICE) {
 482                 unsigned long paddr = __pa(kaddr);
 483                 outer_inv_range(paddr, paddr + size);
 484         }
 485
 486         dmac_unmap_area(kaddr, size, dir);
 487 }
 488 EXPORT_SYMBOL(___dma_single_dev_to_cpu);
 489
 490 static void dma_cache_maint_page(struct page *page, unsigned long offset,
 491         size_t size, enum dma_data_direction dir,
 492         void (*op)(const void *, size_t, int))
 493 {
 494         /*
 495          * A single sg entry may refer to multiple physically contiguous
 496          * pages.  But we still need to process highmem pages individually.
 497          * If highmem is not configured then the bulk of this loop gets
 498          * optimized out.
 499          */
 500         size_t left = size;
 501         do {
 502                 size_t len = left;
 503                 void *vaddr;
 504
 505                 if (PageHighMem(page)) {
 506                         if (len + offset > PAGE_SIZE) {
 507                                 if (offset >= PAGE_SIZE) {
 508                                         page += offset / PAGE_SIZE;
 509                                         offset %= PAGE_SIZE;
 510                                 }
 511                                 len = PAGE_SIZE - offset;
 512                         }
 513                         vaddr = kmap_high_get(page);
 514                         if (vaddr) {
 515                                 vaddr += offset;
 516                                 op(vaddr, len, dir);
 517                                 kunmap_high(page);
 518                         } else if (cache_is_vipt()) {
 519                                 /* unmapped pages might still be cached */
 520                                 vaddr = kmap_atomic(page);
 521                                 op(vaddr + offset, len, dir);
 522                                 kunmap_atomic(vaddr);
 523                         }
 524                 } else {
 525                         vaddr = page_address(page) + offset;
 526                         op(vaddr, len, dir);
 527                 }
 528                 offset = 0;
 529                 page++;
 530                 left -= len;
 531         } while (left);
 532 }
 533
 534 void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,
 535         size_t size, enum dma_data_direction dir)
 536 {
 537         unsigned long paddr;
 538
 539         dma_cache_maint_page(page, off, size, dir, dmac_map_area);
 540
 541         paddr = page_to_phys(page) + off;
 542         if (dir == DMA_FROM_DEVICE) {
 543                 outer_inv_range(paddr, paddr + size);
 544         } else {
 545                 outer_clean_range(paddr, paddr + size);
 546         }
 547         /* FIXME: non-speculating: flush on bidirectional mappings? */
 548 }
 549 EXPORT_SYMBOL(___dma_page_cpu_to_dev);
 550
 551 void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
 552         size_t size, enum dma_data_direction dir)
 553 {
 554         unsigned long paddr = page_to_phys(page) + off;
 555
 556         /* FIXME: non-speculating: not required */
 557         /* don't bother invalidating if DMA to device */
 558         if (dir != DMA_TO_DEVICE)
 559                 outer_inv_range(paddr, paddr + size);
 560
 561         dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
 562
 563         /*
 564          * Mark the D-cache clean for this page to avoid extra flushing.
 565          */
 566         if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
 567                 set_bit(PG_dcache_clean, &page->flags);
 568 }
 569 EXPORT_SYMBOL(___dma_page_dev_to_cpu);
 570
 571 /**
 572  * dma_map_sg - map a set of SG buffers for streaming mode DMA
 573  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 574  * @sg: list of buffers
 575  * @nents: number of buffers to map
 576  * @dir: DMA transfer direction
 577  *
 578  * Map a set of buffers described by scatterlist in streaming mode for DMA.
 579  * This is the scatter-gather version of the dma_map_single interface.
 580  * Here the scatter gather list elements are each tagged with the
 581  * appropriate dma address and length.  They are obtained via
 582  * sg_dma_{address,length}.
 583  *
 584  * Device ownership issues as mentioned for dma_map_single are the same
 585  * here.
 586  */
 587 int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
 588                 enum dma_data_direction dir)
 589 {
 590         struct scatterlist *s;
 591         int i, j;
 592
 593         BUG_ON(!valid_dma_direction(dir));
 594
 595         for_each_sg(sg, s, nents, i) {
 596                 s->dma_address = __dma_map_page(dev, sg_page(s), s->offset,
 597                                                 s->length, dir);
 598                 if (dma_mapping_error(dev, s->dma_address))
 599                         goto bad_mapping;
 600         }
 601         debug_dma_map_sg(dev, sg, nents, nents, dir);
 602         return nents;
 603
 604  bad_mapping:
 605         for_each_sg(sg, s, i, j)
 606                 __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
 607         return 0;
 608 }
 609 EXPORT_SYMBOL(dma_map_sg);
 610
 611 /**
 612  * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
 613  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 614  * @sg: list of buffers
 615  * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
 616  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 617  *
 618  * Unmap a set of streaming mode DMA translations.  Again, CPU access
 619  * rules concerning calls here are the same as for dma_unmap_single().
 620  */
 621 void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
 622                 enum dma_data_direction dir)
 623 {
 624         struct scatterlist *s;
 625         int i;
 626
 627         debug_dma_unmap_sg(dev, sg, nents, dir);
 628
 629         for_each_sg(sg, s, nents, i)
 630                 __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
 631 }
 632 EXPORT_SYMBOL(dma_unmap_sg);
 633
 634 /**
 635  * dma_sync_sg_for_cpu
 636  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 637  * @sg: list of buffers
 638  * @nents: number of buffers to map (returned from dma_map_sg)
 639  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 640  */
 641 void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
 642                         int nents, enum dma_data_direction dir)
 643 {
 644         struct scatterlist *s;
 645         int i;
 646
 647         for_each_sg(sg, s, nents, i) {
 648                 if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
 649                                             sg_dma_len(s), dir))
 650                         continue;
 651
 652                 __dma_page_dev_to_cpu(sg_page(s), s->offset,
 653                                       s->length, dir);
 654         }
 655
 656         debug_dma_sync_sg_for_cpu(dev, sg, nents, dir);
 657 }
 658 EXPORT_SYMBOL(dma_sync_sg_for_cpu);
 659
 660 /**
 661  * dma_sync_sg_for_device
 662  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 663  * @sg: list of buffers
 664  * @nents: number of buffers to map (returned from dma_map_sg)
 665  * @dir: DMA transfer direction (same as was passed to dma_map_sg)
 666  */
 667 void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
 668                         int nents, enum dma_data_direction dir)
 669 {
 670         struct scatterlist *s;
 671         int i;
 672
 673         for_each_sg(sg, s, nents, i) {
 674                 if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
 675                                         sg_dma_len(s), dir))
 676                         continue;
 677
 678                 __dma_page_cpu_to_dev(sg_page(s), s->offset,
 679                                       s->length, dir);
 680         }
 681
 682         debug_dma_sync_sg_for_device(dev, sg, nents, dir);
 683 }
 684 EXPORT_SYMBOL(dma_sync_sg_for_device);
 685
 686 /*
 687  * Return whether the given device DMA address mask can be supported
 688  * properly.  For example, if your device can only drive the low 24-bits
 689  * during bus mastering, then you would pass 0x00ffffff as the mask
 690  * to this function.
 691  */
 692 int dma_supported(struct device *dev, u64 mask)
 693 {
 694         if (mask < (u64)arm_dma_limit)
 695                 return 0;
 696         return 1;
 697 }
 698 EXPORT_SYMBOL(dma_supported);
 699
 700 int dma_set_mask(struct device *dev, u64 dma_mask)
 701 {
 702         if (!dev->dma_mask || !dma_supported(dev, dma_mask))
 703                 return -EIO;
 704
 705 #ifndef CONFIG_DMABOUNCE
 706         *dev->dma_mask = dma_mask;
 707 #endif
 708
 709         return 0;
 710 }
 711 EXPORT_SYMBOL(dma_set_mask);
 712
 713 #define PREALLOC_DMA_DEBUG_ENTRIES      4096
 714
 715 static int __init dma_debug_do_init(void)
 716 {
 717         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
 718         return 0;
 719 }
 720 fs_initcall(dma_debug_do_init);