1 /*----- < smil.h> ----------------------------------------------------*/
5 /***************************************************************************
7 ***************************************************************************/
8 #define K_BYTE 1024 /* Kilo Byte */
9 #define SECTSIZE 512 /* Sector buffer size */
10 #define REDTSIZE 16 /* Redundant buffer size */
12 /***************************************************************************/
13 #define DUMMY_DATA 0xFF /* No Assign Sector Read Data */
15 /***************************************************************************
16 Max Zone/Block/Sectors Data Definition
17 ***************************************************************************/
18 #define MAX_ZONENUM 128 /* Max Zone Numbers in a SmartMedia */
19 #define MAX_BLOCKNUM 0x0400 /* Max Block Numbers in a Zone */
20 #define MAX_SECTNUM 0x20 /* Max Sector Numbers in a Block */
21 #define MAX_LOGBLOCK 1000 /* Max Logical Block Numbers in a Zone */
23 /***************************************************************************/
24 #define CIS_SEARCH_SECT 0x08 /* Max CIS Search Sector Number */
26 /***************************************************************************
27 Logical to Physical Block Table Data Definition
28 ***************************************************************************/
29 #define NO_ASSIGN 0xFFFF /* No Assign Logical Block Address */
31 /***************************************************************************
33 ***************************************************************************/
34 #define COMPLETED 0 /* Sector Copy Completed */
35 #define REQ_ERASE 1 /* Request Read Block Erase */
36 #define REQ_FAIL 2 /* Request Read Block Failed */
38 /***************************************************************************
39 Retry Counter Definition
40 ***************************************************************************/
41 #define RDERR_REASSIGN 1 /* Reassign with Read Error */
42 #define L2P_ERR_ERASE 1 /* BlockErase for Contradicted L2P Table */
44 /***************************************************************************
45 Hardware ECC Definition
46 ***************************************************************************/
47 #define HW_ECC_SUPPORTED 1 /* Hardware ECC Supported */
48 /* No difinition for Software ECC */
50 /***************************************************************************
51 SmartMedia Command & Status Definition
52 ***************************************************************************/
53 /* SmartMedia Command */
55 /* #define READ 0x00 */
56 #define READ_REDT 0x50
57 /* #define WRITE 0x10 */
60 #define READ1 0x00 /* NO */
61 #define READ2 0x01 /* NO */
62 #define READ3 0x50 /* NO */
66 #define READ_ID_1 0x90
67 #define READ_ID_2 0x91
68 #define READ_ID_3 0x9A
70 /* 712 SmartMedia Command */
71 #define SM_CMD_RESET 0x00 /* 0xFF */
72 #define SM_CMD_READ_ID_1 0x10 /* 0x90 */
73 #define SM_CMD_READ_ID_2 0x20 /* 0x91 */
74 #define SM_CMD_READ_STAT 0x30 /* 0x70 */
75 #define SM_CMD_RDMULTPL_STAT 0x40 /* 0x71 */
76 #define SM_CMD_READ_1 0x50 /* 0x00 */
77 #define SM_CMD_READ_2 0x60 /* 0x01 */
78 #define SM_CMD_READ_3 0x70 /* 0x50 */
79 #define SM_CMD_PAGPRGM_TRUE 0x80 /* {0x80, 0x10} */
80 #define SM_CMD_PAGPRGM_DUMY 0x90 /* {0x80, 0x11} */
81 #define SM_CMD_PAGPRGM_MBLK 0xA0 /* {0x80, 0x15} */
82 #define SM_CMD_BLKERASE 0xB0 /* {0x60, 0xD0} */
83 #define SM_CMD_BLKERASE_MULTPL 0xC0 /* {0x60-0x60, 0xD0} */
85 #define SM_CRADDTCT_DEBNCETIMER_EN 0x02
86 #define SM_CMD_START_BIT 0x01
88 #define SM_WaitCmdDone { while (!SM_CmdDone); }
89 #define SM_WaitDmaDone { while (!SM_DmaDone); }
91 /* SmartMedia Status */
92 #define WR_FAIL 0x01 /* 0:Pass, 1:Fail */
93 #define SUSPENDED 0x20 /* 0:Not Suspended, 1:Suspended */
94 #define READY 0x40 /* 0:Busy, 1:Ready */
95 #define WR_PRTCT 0x80 /* 0:Protect, 1:Not Protect */
97 /* SmartMedia Busy Time (1bit:0.1ms) */
98 #define BUSY_PROG 200 /* tPROG : 20ms ----- Program Time old : 200 */
99 #define BUSY_ERASE 4000 /* tBERASE : 400ms ----- Block Erase Time old : 4000 */
102 /* #define BUSY_READ 1 *//* tR : 100us ----- Data transfer Time old : 1 */
103 /* #define BUSY_READ 10 *//* tR : 100us ----- Data transfer Time old : 1 */
105 #define BUSY_READ 200 /* tR : 20ms ----- Data transfer Time old : 1 */
107 /* #define BUSY_RESET 60 *//* tRST : 6ms ----- Device Resetting Time old : 60 */
109 #define BUSY_RESET 600 /* tRST : 60ms ----- Device Resetting Time old : 60 */
111 /* Hardware Timer (1bit:0.1ms) */
112 #define TIME_PON 3000 /* 300ms ------ Power On Wait Time */
113 #define TIME_CDCHK 200 /* 20ms ------ Card Check Interval Timer */
114 #define TIME_WPCHK 50 /* 5ms ------ WP Check Interval Timer */
115 #define TIME_5VCHK 10 /* 1ms ------ 5V Check Interval Timer */
117 /***************************************************************************
119 ***************************************************************************/
120 #define REDT_DATA 0x04
121 #define REDT_BLOCK 0x05
122 #define REDT_ADDR1H 0x06
123 #define REDT_ADDR1L 0x07
124 #define REDT_ADDR2H 0x0B
125 #define REDT_ADDR2L 0x0C
126 #define REDT_ECC10 0x0D
127 #define REDT_ECC11 0x0E
128 #define REDT_ECC12 0x0F
129 #define REDT_ECC20 0x08
130 #define REDT_ECC21 0x09
131 #define REDT_ECC22 0x0A
133 /***************************************************************************
134 SmartMedia Model & Attribute
135 ***************************************************************************/
136 /* SmartMedia Attribute */
137 #define NOWP 0x00 /* 0... .... No Write Protect */
138 #define WP 0x80 /* 1... .... Write Protected */
139 #define MASK 0x00 /* .00. .... NAND MASK ROM Model */
140 #define FLASH 0x20 /* .01. .... NAND Flash ROM Model */
141 #define AD3CYC 0x00 /* ...0 .... Address 3-cycle */
142 #define AD4CYC 0x10 /* ...1 .... Address 4-cycle */
143 #define BS16 0x00 /* .... 00.. 16page/block */
144 #define BS32 0x04 /* .... 01.. 32page/block */
145 #define PS256 0x00 /* .... ..00 256byte/page */
146 #define PS512 0x01 /* .... ..01 512byte/page */
147 #define MWP 0x80 /* WriteProtect mask */
148 #define MFLASH 0x60 /* Flash Rom mask */
149 #define MADC 0x10 /* Address Cycle */
150 #define MBS 0x0C /* BlockSize mask */
151 #define MPS 0x03 /* PageSize mask */
153 /* SmartMedia Model */
154 #define NOSSFDC 0x00 /* NO SmartMedia */
155 #define SSFDC1MB 0x01 /* 1MB SmartMedia */
156 #define SSFDC2MB 0x02 /* 2MB SmartMedia */
157 #define SSFDC4MB 0x03 /* 4MB SmartMedia */
158 #define SSFDC8MB 0x04 /* 8MB SmartMedia */
159 #define SSFDC16MB 0x05 /* 16MB SmartMedia */
160 #define SSFDC32MB 0x06 /* 32MB SmartMedia */
161 #define SSFDC64MB 0x07 /* 64MB SmartMedia */
162 #define SSFDC128MB 0x08 /*128MB SmartMedia */
163 #define SSFDC256MB 0x09
164 #define SSFDC512MB 0x0A
165 #define SSFDC1GB 0x0B
166 #define SSFDC2GB 0x0C
168 /***************************************************************************
170 ***************************************************************************/
180 typedef struct SSFDCTYPE_T
{
190 BYTE Zone
; /* Zone Number */
191 BYTE Sector
; /* Sector(512byte) Number on Block */
192 WORD PhyBlock
; /* Physical Block Number on Zone */
193 WORD LogBlock
; /* Logical Block Number of Zone */
196 typedef struct ADDRESS_T
{
197 BYTE Zone
; /* Zone Number */
198 BYTE Sector
; /* Sector(512byte) Number on Block */
199 WORD PhyBlock
; /* Physical Block Number on Zone */
200 WORD LogBlock
; /* Logical Block Number of Zone */
204 BYTE Sector
; /* Sector(512byte) Number on Block */
205 WORD PhyBlock
; /* Physical Block Number on Zone 0 */
209 extern BYTE IsSSFDCCompliance
;
210 extern BYTE IsXDCompliance
;
212 extern DWORD ErrXDCode
;
213 extern DWORD ErrCode
;
214 extern WORD ReadBlock
;
215 extern WORD WriteBlock
;
216 extern DWORD MediaChange
;
218 extern struct SSFDCTYPE Ssfdc
;
219 extern struct ADDRESS Media
;
220 extern struct CIS_AREA CisArea
;
225 /******************************************/
226 int Init_D_SmartMedia(void);
227 int Pwoff_D_SmartMedia(void);
228 int Check_D_SmartMedia(void);
229 int Check_D_Parameter(struct us_data
*, WORD
*, BYTE
*, BYTE
*);
230 int Media_D_ReadSector(struct us_data
*, DWORD
, WORD
, BYTE
*);
231 int Media_D_WriteSector(struct us_data
*, DWORD
, WORD
, BYTE
*);
232 int Media_D_CopySector(struct us_data
*, DWORD
, WORD
, BYTE
*);
233 int Media_D_EraseBlock(struct us_data
*, DWORD
, WORD
);
234 int Media_D_EraseAll(struct us_data
*);
235 /******************************************/
236 int Media_D_OneSectWriteStart(struct us_data
*, DWORD
, BYTE
*);
237 int Media_D_OneSectWriteNext(struct us_data
*, BYTE
*);
238 int Media_D_OneSectWriteFlush(struct us_data
*);
240 /******************************************/
241 extern int SM_FreeMem(void); /* ENE SM function */
242 void SM_EnableLED(struct us_data
*, BOOLEAN
);
243 void Led_D_TernOn(void);
244 void Led_D_TernOff(void);
246 int Media_D_EraseAllRedtData(DWORD Index
, BOOLEAN CheckBlock
);
247 /*DWORD Media_D_GetMediaInfo(struct us_data * fdoExt,
248 PIOCTL_MEDIA_INFO_IN pParamIn, PIOCTL_MEDIA_INFO_OUT pParamOut); */
253 /******************************************/
254 int Check_D_DataBlank(BYTE
*);
255 int Check_D_FailBlock(BYTE
*);
256 int Check_D_DataStatus(BYTE
*);
257 int Load_D_LogBlockAddr(BYTE
*);
258 void Clr_D_RedundantData(BYTE
*);
259 void Set_D_LogBlockAddr(BYTE
*);
260 void Set_D_FailBlock(BYTE
*);
261 void Set_D_DataStaus(BYTE
*);
263 /******************************************/
264 void Ssfdc_D_Reset(struct us_data
*);
265 int Ssfdc_D_ReadCisSect(struct us_data
*, BYTE
*, BYTE
*);
266 void Ssfdc_D_WriteRedtMode(void);
267 void Ssfdc_D_ReadID(BYTE
*, BYTE
);
268 int Ssfdc_D_ReadSect(struct us_data
*, BYTE
*, BYTE
*);
269 int Ssfdc_D_ReadBlock(struct us_data
*, WORD
, BYTE
*, BYTE
*);
270 int Ssfdc_D_WriteSect(struct us_data
*, BYTE
*, BYTE
*);
271 int Ssfdc_D_WriteBlock(struct us_data
*, WORD
, BYTE
*, BYTE
*);
272 int Ssfdc_D_CopyBlock(struct us_data
*, WORD
, BYTE
*, BYTE
*);
273 int Ssfdc_D_WriteSectForCopy(struct us_data
*, BYTE
*, BYTE
*);
274 int Ssfdc_D_EraseBlock(struct us_data
*);
275 int Ssfdc_D_ReadRedtData(struct us_data
*, BYTE
*);
276 int Ssfdc_D_WriteRedtData(struct us_data
*, BYTE
*);
277 int Ssfdc_D_CheckStatus(void);
278 int Set_D_SsfdcModel(BYTE
);
279 void Cnt_D_Reset(void);
280 int Cnt_D_PowerOn(void);
281 void Cnt_D_PowerOff(void);
282 void Cnt_D_LedOn(void);
283 void Cnt_D_LedOff(void);
284 int Check_D_CntPower(void);
285 int Check_D_CardExist(void);
286 int Check_D_CardStsChg(void);
287 int Check_D_SsfdcWP(void);
288 int SM_ReadBlock(struct us_data
*, BYTE
*, BYTE
*);
290 int Ssfdc_D_ReadSect_DMA(struct us_data
*, BYTE
*, BYTE
*);
291 int Ssfdc_D_ReadSect_PIO(struct us_data
*, BYTE
*, BYTE
*);
292 int Ssfdc_D_WriteSect_DMA(struct us_data
*, BYTE
*, BYTE
*);
293 int Ssfdc_D_WriteSect_PIO(struct us_data
*, BYTE
*, BYTE
*);
295 /******************************************/
296 int Check_D_ReadError(BYTE
*);
297 int Check_D_Correct(BYTE
*, BYTE
*);
298 int Check_D_CISdata(BYTE
*, BYTE
*);
299 void Set_D_RightECC(BYTE
*);
304 void calculate_ecc(BYTE
*, BYTE
*, BYTE
*, BYTE
*, BYTE
*);
305 BYTE
correct_data(BYTE
*, BYTE
*, BYTE
, BYTE
, BYTE
);
306 int _Correct_D_SwECC(BYTE
*, BYTE
*, BYTE
*);
307 void _Calculate_D_SwECC(BYTE
*, BYTE
*);
311 #endif /* already included */