2 * Copyright (c) 2011 Mark Einon <mark.einon@gmail.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #include "et131x_version.h"
19 #include "et131x_defs.h"
21 #include <linux/types.h>
22 #include <linux/interrupt.h>
23 #include <linux/netdevice.h>
24 #include <linux/ethtool.h>
25 #include <linux/phy.h>
26 #include <linux/pci.h>
28 #include "et131x_adapter.h"
29 #include "et1310_phy.h"
32 static int et131x_get_settings(struct net_device
*netdev
,
33 struct ethtool_cmd
*cmd
)
35 struct et131x_adapter
*adapter
= netdev_priv(netdev
);
37 return phy_ethtool_gset(adapter
->phydev
, cmd
);
40 static int et131x_set_settings(struct net_device
*netdev
,
41 struct ethtool_cmd
*cmd
)
43 struct et131x_adapter
*adapter
= netdev_priv(netdev
);
45 return phy_ethtool_sset(adapter
->phydev
, cmd
);
48 static int et131x_get_regs_len(struct net_device
*netdev
)
50 #define ET131X_REGS_LEN 256
51 return ET131X_REGS_LEN
* sizeof(u32
);
54 static void et131x_get_regs(struct net_device
*netdev
,
55 struct ethtool_regs
*regs
, void *regs_data
)
57 struct et131x_adapter
*adapter
= netdev_priv(netdev
);
58 struct address_map __iomem
*aregs
= adapter
->regs
;
59 u32
*regs_buff
= regs_data
;
62 memset(regs_data
, 0, et131x_get_regs_len(netdev
));
64 regs
->version
= (1 << 24) | (adapter
->pdev
->revision
<< 16) |
65 adapter
->pdev
->device
;
68 et131x_mii_read(adapter
, MII_BMCR
, (u16
*)®s_buff
[num
++]);
69 et131x_mii_read(adapter
, MII_BMSR
, (u16
*)®s_buff
[num
++]);
70 et131x_mii_read(adapter
, MII_PHYSID1
, (u16
*)®s_buff
[num
++]);
71 et131x_mii_read(adapter
, MII_PHYSID2
, (u16
*)®s_buff
[num
++]);
72 et131x_mii_read(adapter
, MII_ADVERTISE
, (u16
*)®s_buff
[num
++]);
73 et131x_mii_read(adapter
, MII_LPA
, (u16
*)®s_buff
[num
++]);
74 et131x_mii_read(adapter
, MII_EXPANSION
, (u16
*)®s_buff
[num
++]);
75 /* Autoneg next page transmit reg */
76 et131x_mii_read(adapter
, 0x07, (u16
*)®s_buff
[num
++]);
77 /* Link partner next page reg */
78 et131x_mii_read(adapter
, 0x08, (u16
*)®s_buff
[num
++]);
79 et131x_mii_read(adapter
, MII_CTRL1000
, (u16
*)®s_buff
[num
++]);
80 et131x_mii_read(adapter
, MII_STAT1000
, (u16
*)®s_buff
[num
++]);
81 et131x_mii_read(adapter
, MII_ESTATUS
, (u16
*)®s_buff
[num
++]);
82 et131x_mii_read(adapter
, PHY_INDEX_REG
, (u16
*)®s_buff
[num
++]);
83 et131x_mii_read(adapter
, PHY_DATA_REG
, (u16
*)®s_buff
[num
++]);
84 et131x_mii_read(adapter
, PHY_MPHY_CONTROL_REG
,
85 (u16
*)®s_buff
[num
++]);
86 et131x_mii_read(adapter
, PHY_LOOPBACK_CONTROL
,
87 (u16
*)®s_buff
[num
++]);
88 et131x_mii_read(adapter
, PHY_LOOPBACK_CONTROL
+1,
89 (u16
*)®s_buff
[num
++]);
90 et131x_mii_read(adapter
, PHY_REGISTER_MGMT_CONTROL
,
91 (u16
*)®s_buff
[num
++]);
92 et131x_mii_read(adapter
, PHY_CONFIG
, (u16
*)®s_buff
[num
++]);
93 et131x_mii_read(adapter
, PHY_PHY_CONTROL
, (u16
*)®s_buff
[num
++]);
94 et131x_mii_read(adapter
, PHY_INTERRUPT_MASK
, (u16
*)®s_buff
[num
++]);
95 et131x_mii_read(adapter
, PHY_INTERRUPT_STATUS
,
96 (u16
*)®s_buff
[num
++]);
97 et131x_mii_read(adapter
, PHY_PHY_STATUS
, (u16
*)®s_buff
[num
++]);
98 et131x_mii_read(adapter
, PHY_LED_1
, (u16
*)®s_buff
[num
++]);
99 et131x_mii_read(adapter
, PHY_LED_2
, (u16
*)®s_buff
[num
++]);
102 regs_buff
[num
++] = readl(&aregs
->global
.txq_start_addr
);
103 regs_buff
[num
++] = readl(&aregs
->global
.txq_end_addr
);
104 regs_buff
[num
++] = readl(&aregs
->global
.rxq_start_addr
);
105 regs_buff
[num
++] = readl(&aregs
->global
.rxq_end_addr
);
106 regs_buff
[num
++] = readl(&aregs
->global
.pm_csr
);
107 regs_buff
[num
++] = adapter
->stats
.interrupt_status
;
108 regs_buff
[num
++] = readl(&aregs
->global
.int_mask
);
109 regs_buff
[num
++] = readl(&aregs
->global
.int_alias_clr_en
);
110 regs_buff
[num
++] = readl(&aregs
->global
.int_status_alias
);
111 regs_buff
[num
++] = readl(&aregs
->global
.sw_reset
);
112 regs_buff
[num
++] = readl(&aregs
->global
.slv_timer
);
113 regs_buff
[num
++] = readl(&aregs
->global
.msi_config
);
114 regs_buff
[num
++] = readl(&aregs
->global
.loopback
);
115 regs_buff
[num
++] = readl(&aregs
->global
.watchdog_timer
);
118 regs_buff
[num
++] = readl(&aregs
->txdma
.csr
);
119 regs_buff
[num
++] = readl(&aregs
->txdma
.pr_base_hi
);
120 regs_buff
[num
++] = readl(&aregs
->txdma
.pr_base_lo
);
121 regs_buff
[num
++] = readl(&aregs
->txdma
.pr_num_des
);
122 regs_buff
[num
++] = readl(&aregs
->txdma
.txq_wr_addr
);
123 regs_buff
[num
++] = readl(&aregs
->txdma
.txq_wr_addr_ext
);
124 regs_buff
[num
++] = readl(&aregs
->txdma
.txq_rd_addr
);
125 regs_buff
[num
++] = readl(&aregs
->txdma
.dma_wb_base_hi
);
126 regs_buff
[num
++] = readl(&aregs
->txdma
.dma_wb_base_lo
);
127 regs_buff
[num
++] = readl(&aregs
->txdma
.service_request
);
128 regs_buff
[num
++] = readl(&aregs
->txdma
.service_complete
);
129 regs_buff
[num
++] = readl(&aregs
->txdma
.cache_rd_index
);
130 regs_buff
[num
++] = readl(&aregs
->txdma
.cache_wr_index
);
131 regs_buff
[num
++] = readl(&aregs
->txdma
.tx_dma_error
);
132 regs_buff
[num
++] = readl(&aregs
->txdma
.desc_abort_cnt
);
133 regs_buff
[num
++] = readl(&aregs
->txdma
.payload_abort_cnt
);
134 regs_buff
[num
++] = readl(&aregs
->txdma
.writeback_abort_cnt
);
135 regs_buff
[num
++] = readl(&aregs
->txdma
.desc_timeout_cnt
);
136 regs_buff
[num
++] = readl(&aregs
->txdma
.payload_timeout_cnt
);
137 regs_buff
[num
++] = readl(&aregs
->txdma
.writeback_timeout_cnt
);
138 regs_buff
[num
++] = readl(&aregs
->txdma
.desc_error_cnt
);
139 regs_buff
[num
++] = readl(&aregs
->txdma
.payload_error_cnt
);
140 regs_buff
[num
++] = readl(&aregs
->txdma
.writeback_error_cnt
);
141 regs_buff
[num
++] = readl(&aregs
->txdma
.dropped_tlp_cnt
);
142 regs_buff
[num
++] = readl(&aregs
->txdma
.new_service_complete
);
143 regs_buff
[num
++] = readl(&aregs
->txdma
.ethernet_packet_cnt
);
146 regs_buff
[num
++] = readl(&aregs
->rxdma
.csr
);
147 regs_buff
[num
++] = readl(&aregs
->rxdma
.dma_wb_base_hi
);
148 regs_buff
[num
++] = readl(&aregs
->rxdma
.dma_wb_base_lo
);
149 regs_buff
[num
++] = readl(&aregs
->rxdma
.num_pkt_done
);
150 regs_buff
[num
++] = readl(&aregs
->rxdma
.max_pkt_time
);
151 regs_buff
[num
++] = readl(&aregs
->rxdma
.rxq_rd_addr
);
152 regs_buff
[num
++] = readl(&aregs
->rxdma
.rxq_rd_addr_ext
);
153 regs_buff
[num
++] = readl(&aregs
->rxdma
.rxq_wr_addr
);
154 regs_buff
[num
++] = readl(&aregs
->rxdma
.psr_base_hi
);
155 regs_buff
[num
++] = readl(&aregs
->rxdma
.psr_base_lo
);
156 regs_buff
[num
++] = readl(&aregs
->rxdma
.psr_num_des
);
157 regs_buff
[num
++] = readl(&aregs
->rxdma
.psr_avail_offset
);
158 regs_buff
[num
++] = readl(&aregs
->rxdma
.psr_full_offset
);
159 regs_buff
[num
++] = readl(&aregs
->rxdma
.psr_access_index
);
160 regs_buff
[num
++] = readl(&aregs
->rxdma
.psr_min_des
);
161 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr0_base_lo
);
162 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr0_base_hi
);
163 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr0_num_des
);
164 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr0_avail_offset
);
165 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr0_full_offset
);
166 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr0_rd_index
);
167 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr0_min_des
);
168 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr1_base_lo
);
169 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr1_base_hi
);
170 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr1_num_des
);
171 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr1_avail_offset
);
172 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr1_full_offset
);
173 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr1_rd_index
);
174 regs_buff
[num
++] = readl(&aregs
->rxdma
.fbr1_min_des
);
177 #define ET131X_DRVINFO_LEN 32 /* value from ethtool.h */
178 static void et131x_get_drvinfo(struct net_device
*netdev
,
179 struct ethtool_drvinfo
*info
)
181 struct et131x_adapter
*adapter
= netdev_priv(netdev
);
183 strncpy(info
->driver
, DRIVER_NAME
, ET131X_DRVINFO_LEN
);
184 strncpy(info
->version
, DRIVER_VERSION_STRING
, ET131X_DRVINFO_LEN
);
185 strncpy(info
->bus_info
, pci_name(adapter
->pdev
), ET131X_DRVINFO_LEN
);
188 static struct ethtool_ops et131x_ethtool_ops
= {
189 .get_settings
= et131x_get_settings
,
190 .set_settings
= et131x_set_settings
,
191 .get_drvinfo
= et131x_get_drvinfo
,
192 .get_regs_len
= et131x_get_regs_len
,
193 .get_regs
= et131x_get_regs
,
194 .get_link
= ethtool_op_get_link
,
197 void et131x_set_ethtool_ops(struct net_device
*netdev
)
199 SET_ETHTOOL_OPS(netdev
, &et131x_ethtool_ops
);