staging: brcm80211: remove brcms_b_dotxstatus wrapper function
[zen-stable.git] / drivers / staging / et131x / et131x_initpci.c
blob9795310fa71e6aa0c28860789f6191c8ee1df12f
1 /*
2 * Agere Systems Inc.
3 * 10/100/1000 Base-T Ethernet Driver for the ET1310 and ET131x series MACs
5 * Copyright © 2005 Agere Systems Inc.
6 * All rights reserved.
7 * http://www.agere.com
9 * Copyright (c) 2011 Mark Einon <mark.einon@gmail.com>
11 *------------------------------------------------------------------------------
13 * et131x_initpci.c - Routines and data used to register the driver with the
14 * PCI (and PCI Express) subsystem, as well as basic driver
15 * init and startup.
17 *------------------------------------------------------------------------------
19 * SOFTWARE LICENSE
21 * This software is provided subject to the following terms and conditions,
22 * which you should read carefully before using the software. Using this
23 * software indicates your acceptance of these terms and conditions. If you do
24 * not agree with these terms and conditions, do not use the software.
26 * Copyright © 2005 Agere Systems Inc.
27 * All rights reserved.
29 * Redistribution and use in source or binary forms, with or without
30 * modifications, are permitted provided that the following conditions are met:
32 * . Redistributions of source code must retain the above copyright notice, this
33 * list of conditions and the following Disclaimer as comments in the code as
34 * well as in the documentation and/or other materials provided with the
35 * distribution.
37 * . Redistributions in binary form must reproduce the above copyright notice,
38 * this list of conditions and the following Disclaimer in the documentation
39 * and/or other materials provided with the distribution.
41 * . Neither the name of Agere Systems Inc. nor the names of the contributors
42 * may be used to endorse or promote products derived from this software
43 * without specific prior written permission.
45 * Disclaimer
47 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
48 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
49 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
50 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
51 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
52 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
53 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
54 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
55 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
57 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
58 * DAMAGE.
62 #include "et131x_version.h"
63 #include "et131x_defs.h"
65 #include <linux/pci.h>
66 #include <linux/init.h>
67 #include <linux/module.h>
68 #include <linux/types.h>
69 #include <linux/kernel.h>
71 #include <linux/sched.h>
72 #include <linux/ptrace.h>
73 #include <linux/ctype.h>
74 #include <linux/string.h>
75 #include <linux/timer.h>
76 #include <linux/interrupt.h>
77 #include <linux/in.h>
78 #include <linux/delay.h>
79 #include <linux/io.h>
80 #include <linux/bitops.h>
81 #include <asm/system.h>
83 #include <linux/netdevice.h>
84 #include <linux/etherdevice.h>
85 #include <linux/phy.h>
86 #include <linux/skbuff.h>
87 #include <linux/if_arp.h>
88 #include <linux/ioport.h>
89 #include <linux/random.h>
91 #include "et1310_phy.h"
93 #include "et131x_adapter.h"
95 #include "et1310_address_map.h"
96 #include "et1310_tx.h"
97 #include "et1310_rx.h"
98 #include "et131x.h"
100 #define INTERNAL_MEM_SIZE 0x400 /* 1024 of internal memory */
101 #define INTERNAL_MEM_RX_OFFSET 0x1FF /* 50% Tx, 50% Rx */
104 * et131x_hwaddr_init - set up the MAC Address on the ET1310
105 * @adapter: pointer to our private adapter structure
107 void et131x_hwaddr_init(struct et131x_adapter *adapter)
109 /* If have our default mac from init and no mac address from
110 * EEPROM then we need to generate the last octet and set it on the
111 * device
113 if (adapter->rom_addr[0] == 0x00 &&
114 adapter->rom_addr[1] == 0x00 &&
115 adapter->rom_addr[2] == 0x00 &&
116 adapter->rom_addr[3] == 0x00 &&
117 adapter->rom_addr[4] == 0x00 &&
118 adapter->rom_addr[5] == 0x00) {
120 * We need to randomly generate the last octet so we
121 * decrease our chances of setting the mac address to
122 * same as another one of our cards in the system
124 get_random_bytes(&adapter->addr[5], 1);
126 * We have the default value in the register we are
127 * working with so we need to copy the current
128 * address into the permanent address
130 memcpy(adapter->rom_addr,
131 adapter->addr, ETH_ALEN);
132 } else {
133 /* We do not have an override address, so set the
134 * current address to the permanent address and add
135 * it to the device
137 memcpy(adapter->addr,
138 adapter->rom_addr, ETH_ALEN);
143 * et131x_pci_init - initial PCI setup
144 * @adapter: pointer to our private adapter structure
145 * @pdev: our PCI device
147 * Perform the initial setup of PCI registers and if possible initialise
148 * the MAC address. At this point the I/O registers have yet to be mapped
150 static int et131x_pci_init(struct et131x_adapter *adapter,
151 struct pci_dev *pdev)
153 int i;
154 u8 max_payload;
155 u8 read_size_reg;
157 if (et131x_init_eeprom(adapter) < 0)
158 return -EIO;
160 /* Let's set up the PORT LOGIC Register. First we need to know what
161 * the max_payload_size is
163 if (pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &max_payload)) {
164 dev_err(&pdev->dev,
165 "Could not read PCI config space for Max Payload Size\n");
166 return -EIO;
169 /* Program the Ack/Nak latency and replay timers */
170 max_payload &= 0x07; /* Only the lower 3 bits are valid */
172 if (max_payload < 2) {
173 static const u16 acknak[2] = { 0x76, 0xD0 };
174 static const u16 replay[2] = { 0x1E0, 0x2ED };
176 if (pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
177 acknak[max_payload])) {
178 dev_err(&pdev->dev,
179 "Could not write PCI config space for ACK/NAK\n");
180 return -EIO;
182 if (pci_write_config_word(pdev, ET1310_PCI_REPLAY,
183 replay[max_payload])) {
184 dev_err(&pdev->dev,
185 "Could not write PCI config space for Replay Timer\n");
186 return -EIO;
190 /* l0s and l1 latency timers. We are using default values.
191 * Representing 001 for L0s and 010 for L1
193 if (pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11)) {
194 dev_err(&pdev->dev,
195 "Could not write PCI config space for Latency Timers\n");
196 return -EIO;
199 /* Change the max read size to 2k */
200 if (pci_read_config_byte(pdev, 0x51, &read_size_reg)) {
201 dev_err(&pdev->dev,
202 "Could not read PCI config space for Max read size\n");
203 return -EIO;
206 read_size_reg &= 0x8f;
207 read_size_reg |= 0x40;
209 if (pci_write_config_byte(pdev, 0x51, read_size_reg)) {
210 dev_err(&pdev->dev,
211 "Could not write PCI config space for Max read size\n");
212 return -EIO;
215 /* Get MAC address from config space if an eeprom exists, otherwise
216 * the MAC address there will not be valid
218 if (!adapter->has_eeprom) {
219 et131x_hwaddr_init(adapter);
220 return 0;
223 for (i = 0; i < ETH_ALEN; i++) {
224 if (pci_read_config_byte(pdev, ET1310_PCI_MAC_ADDRESS + i,
225 adapter->rom_addr + i)) {
226 dev_err(&pdev->dev, "Could not read PCI config space for MAC address\n");
227 return -EIO;
230 memcpy(adapter->addr, adapter->rom_addr, ETH_ALEN);
231 return 0;
235 * et131x_error_timer_handler
236 * @data: timer-specific variable; here a pointer to our adapter structure
238 * The routine called when the error timer expires, to track the number of
239 * recurring errors.
241 void et131x_error_timer_handler(unsigned long data)
243 struct et131x_adapter *adapter = (struct et131x_adapter *) data;
244 struct phy_device *phydev = adapter->phydev;
246 if (et1310_in_phy_coma(adapter)) {
247 /* Bring the device immediately out of coma, to
248 * prevent it from sleeping indefinitely, this
249 * mechanism could be improved! */
250 et1310_disable_phy_coma(adapter);
251 adapter->boot_coma = 20;
252 } else {
253 et1310_update_macstat_host_counters(adapter);
256 if (!phydev->link && adapter->boot_coma < 11)
257 adapter->boot_coma++;
259 if (adapter->boot_coma == 10) {
260 if (!phydev->link) {
261 if (!et1310_in_phy_coma(adapter)) {
262 /* NOTE - This was originally a 'sync with
263 * interrupt'. How to do that under Linux?
265 et131x_enable_interrupts(adapter);
266 et1310_enable_phy_coma(adapter);
271 /* This is a periodic timer, so reschedule */
272 mod_timer(&adapter->error_timer, jiffies +
273 TX_ERROR_PERIOD * HZ / 1000);
277 * et131x_configure_global_regs - configure JAGCore global regs
278 * @adapter: pointer to our adapter structure
280 * Used to configure the global registers on the JAGCore
282 void et131x_configure_global_regs(struct et131x_adapter *adapter)
284 struct global_regs __iomem *regs = &adapter->regs->global;
286 writel(0, &regs->rxq_start_addr);
287 writel(INTERNAL_MEM_SIZE - 1, &regs->txq_end_addr);
289 if (adapter->registry_jumbo_packet < 2048) {
290 /* Tx / RxDMA and Tx/Rx MAC interfaces have a 1k word
291 * block of RAM that the driver can split between Tx
292 * and Rx as it desires. Our default is to split it
293 * 50/50:
295 writel(PARM_RX_MEM_END_DEF, &regs->rxq_end_addr);
296 writel(PARM_RX_MEM_END_DEF + 1, &regs->txq_start_addr);
297 } else if (adapter->registry_jumbo_packet < 8192) {
298 /* For jumbo packets > 2k but < 8k, split 50-50. */
299 writel(INTERNAL_MEM_RX_OFFSET, &regs->rxq_end_addr);
300 writel(INTERNAL_MEM_RX_OFFSET + 1, &regs->txq_start_addr);
301 } else {
302 /* 9216 is the only packet size greater than 8k that
303 * is available. The Tx buffer has to be big enough
304 * for one whole packet on the Tx side. We'll make
305 * the Tx 9408, and give the rest to Rx
307 writel(0x01b3, &regs->rxq_end_addr);
308 writel(0x01b4, &regs->txq_start_addr);
311 /* Initialize the loopback register. Disable all loopbacks. */
312 writel(0, &regs->loopback);
314 /* MSI Register */
315 writel(0, &regs->msi_config);
317 /* By default, disable the watchdog timer. It will be enabled when
318 * a packet is queued.
320 writel(0, &regs->watchdog_timer);
324 * et131x_adapter_setup - Set the adapter up as per cassini+ documentation
325 * @adapter: pointer to our private adapter structure
327 * Returns 0 on success, errno on failure (as defined in errno.h)
329 void et131x_adapter_setup(struct et131x_adapter *adapter)
331 /* Configure the JAGCore */
332 et131x_configure_global_regs(adapter);
334 et1310_config_mac_regs1(adapter);
336 /* Configure the MMC registers */
337 /* All we need to do is initialize the Memory Control Register */
338 writel(ET_MMC_ENABLE, &adapter->regs->mmc.mmc_ctrl);
340 et1310_config_rxmac_regs(adapter);
341 et1310_config_txmac_regs(adapter);
343 et131x_config_rx_dma_regs(adapter);
344 et131x_config_tx_dma_regs(adapter);
346 et1310_config_macstat_regs(adapter);
348 et1310_phy_power_down(adapter, 0);
349 et131x_xcvr_init(adapter);
353 * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
354 * @adapter: pointer to our private adapter structure
356 void et131x_soft_reset(struct et131x_adapter *adapter)
358 /* Disable MAC Core */
359 writel(0xc00f0000, &adapter->regs->mac.cfg1);
361 /* Set everything to a reset value */
362 writel(0x7F, &adapter->regs->global.sw_reset);
363 writel(0x000f0000, &adapter->regs->mac.cfg1);
364 writel(0x00000000, &adapter->regs->mac.cfg1);
368 * et131x_align_allocated_memory - Align allocated memory on a given boundary
369 * @adapter: pointer to our adapter structure
370 * @phys_addr: pointer to Physical address
371 * @offset: pointer to the offset variable
372 * @mask: correct mask
374 void et131x_align_allocated_memory(struct et131x_adapter *adapter,
375 uint64_t *phys_addr,
376 uint64_t *offset, uint64_t mask)
378 uint64_t new_addr;
380 *offset = 0;
382 new_addr = *phys_addr & ~mask;
384 if (new_addr != *phys_addr) {
385 /* Move to next aligned block */
386 new_addr += mask + 1;
387 /* Return offset for adjusting virt addr */
388 *offset = new_addr - *phys_addr;
389 /* Return new physical address */
390 *phys_addr = new_addr;
395 * et131x_adapter_memory_alloc
396 * @adapter: pointer to our private adapter structure
398 * Returns 0 on success, errno on failure (as defined in errno.h).
400 * Allocate all the memory blocks for send, receive and others.
402 int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
404 int status;
406 /* Allocate memory for the Tx Ring */
407 status = et131x_tx_dma_memory_alloc(adapter);
408 if (status != 0) {
409 dev_err(&adapter->pdev->dev,
410 "et131x_tx_dma_memory_alloc FAILED\n");
411 return status;
413 /* Receive buffer memory allocation */
414 status = et131x_rx_dma_memory_alloc(adapter);
415 if (status != 0) {
416 dev_err(&adapter->pdev->dev,
417 "et131x_rx_dma_memory_alloc FAILED\n");
418 et131x_tx_dma_memory_free(adapter);
419 return status;
422 /* Init receive data structures */
423 status = et131x_init_recv(adapter);
424 if (status != 0) {
425 dev_err(&adapter->pdev->dev,
426 "et131x_init_recv FAILED\n");
427 et131x_tx_dma_memory_free(adapter);
428 et131x_rx_dma_memory_free(adapter);
430 return status;
434 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
435 * @adapter: pointer to our private adapter structure
437 void et131x_adapter_memory_free(struct et131x_adapter *adapter)
439 /* Free DMA memory */
440 et131x_tx_dma_memory_free(adapter);
441 et131x_rx_dma_memory_free(adapter);
444 static void et131x_adjust_link(struct net_device *netdev)
446 struct et131x_adapter *adapter = netdev_priv(netdev);
447 struct phy_device *phydev = adapter->phydev;
449 if (netif_carrier_ok(netdev)) {
450 adapter->boot_coma = 20;
452 if (phydev && phydev->speed == SPEED_10) {
454 * NOTE - Is there a way to query this without
455 * TruePHY?
456 * && TRU_QueryCoreType(adapter->hTruePhy, 0)==
457 * EMI_TRUEPHY_A13O) {
459 u16 register18;
461 et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG,
462 &register18);
463 et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG,
464 register18 | 0x4);
465 et131x_mii_write(adapter, PHY_INDEX_REG,
466 register18 | 0x8402);
467 et131x_mii_write(adapter, PHY_DATA_REG,
468 register18 | 511);
469 et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG,
470 register18);
473 et1310_config_flow_control(adapter);
475 if (phydev && phydev->speed == SPEED_1000 &&
476 adapter->registry_jumbo_packet > 2048) {
477 u16 reg;
479 et131x_mii_read(adapter, PHY_CONFIG, &reg);
480 reg &= ~ET_PHY_CONFIG_TX_FIFO_DEPTH;
481 reg |= ET_PHY_CONFIG_FIFO_DEPTH_32;
482 et131x_mii_write(adapter, PHY_CONFIG, reg);
485 et131x_set_rx_dma_timer(adapter);
486 et1310_config_mac_regs2(adapter);
489 if (phydev->link != adapter->link) {
491 * Check to see if we are in coma mode and if
492 * so, disable it because we will not be able
493 * to read PHY values until we are out.
495 if (et1310_in_phy_coma(adapter))
496 et1310_disable_phy_coma(adapter);
498 if (phydev->link) {
499 adapter->boot_coma = 20;
500 } else {
501 dev_warn(&adapter->pdev->dev,
502 "Link down - cable problem ?\n");
503 adapter->boot_coma = 0;
505 if (phydev && phydev->speed == SPEED_10) {
506 /* NOTE - Is there a way to query this without
507 * TruePHY?
508 * && TRU_QueryCoreType(adapter->hTruePhy, 0) ==
509 * EMI_TRUEPHY_A13O)
511 u16 register18;
513 et131x_mii_read(adapter, PHY_MPHY_CONTROL_REG,
514 &register18);
515 et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG,
516 register18 | 0x4);
517 et131x_mii_write(adapter, PHY_INDEX_REG,
518 register18 | 0x8402);
519 et131x_mii_write(adapter, PHY_DATA_REG,
520 register18 | 511);
521 et131x_mii_write(adapter, PHY_MPHY_CONTROL_REG,
522 register18);
525 /* Free the packets being actively sent & stopped */
526 et131x_free_busy_send_packets(adapter);
528 /* Re-initialize the send structures */
529 et131x_init_send(adapter);
531 /* Reset the RFD list and re-start RU */
532 et131x_reset_recv(adapter);
535 * Bring the device back to the state it was during
536 * init prior to autonegotiation being complete. This
537 * way, when we get the auto-neg complete interrupt,
538 * we can complete init by calling config_mac_regs2.
540 et131x_soft_reset(adapter);
542 /* Setup ET1310 as per the documentation */
543 et131x_adapter_setup(adapter);
545 /* perform reset of tx/rx */
546 et131x_disable_txrx(netdev);
547 et131x_enable_txrx(netdev);
550 adapter->link = phydev->link;
552 phy_print_status(phydev);
556 int et131x_mii_probe(struct net_device *netdev)
558 struct et131x_adapter *adapter = netdev_priv(netdev);
559 struct phy_device *phydev = NULL;
561 phydev = phy_find_first(adapter->mii_bus);
562 if (!phydev) {
563 dev_err(&adapter->pdev->dev, "no PHY found\n");
564 return -ENODEV;
567 phydev = phy_connect(netdev, dev_name(&phydev->dev),
568 &et131x_adjust_link, 0, PHY_INTERFACE_MODE_MII);
570 if (IS_ERR(phydev)) {
571 dev_err(&adapter->pdev->dev, "Could not attach to PHY\n");
572 return PTR_ERR(phydev);
575 phydev->supported &= (SUPPORTED_10baseT_Half
576 | SUPPORTED_10baseT_Full
577 | SUPPORTED_100baseT_Half
578 | SUPPORTED_100baseT_Full
579 | SUPPORTED_Autoneg
580 | SUPPORTED_MII
581 | SUPPORTED_TP);
583 if (adapter->pdev->device != ET131X_PCI_DEVICE_ID_FAST)
584 phydev->supported |= SUPPORTED_1000baseT_Full;
586 phydev->advertising = phydev->supported;
587 adapter->phydev = phydev;
589 dev_info(&adapter->pdev->dev, "attached PHY driver [%s] "
590 "(mii_bus:phy_addr=%s)\n",
591 phydev->drv->name, dev_name(&phydev->dev));
593 return 0;
597 * et131x_adapter_init
598 * @adapter: pointer to the private adapter struct
599 * @pdev: pointer to the PCI device
601 * Initialize the data structures for the et131x_adapter object and link
602 * them together with the platform provided device structures.
604 static struct et131x_adapter *et131x_adapter_init(struct net_device *netdev,
605 struct pci_dev *pdev)
607 static const u8 default_mac[] = { 0x00, 0x05, 0x3d, 0x00, 0x02, 0x00 };
609 struct et131x_adapter *adapter;
611 /* Allocate private adapter struct and copy in relevant information */
612 adapter = netdev_priv(netdev);
613 adapter->pdev = pci_dev_get(pdev);
614 adapter->netdev = netdev;
616 /* Do the same for the netdev struct */
617 netdev->irq = pdev->irq;
618 netdev->base_addr = pci_resource_start(pdev, 0);
620 /* Initialize spinlocks here */
621 spin_lock_init(&adapter->lock);
622 spin_lock_init(&adapter->tcb_send_qlock);
623 spin_lock_init(&adapter->tcb_ready_qlock);
624 spin_lock_init(&adapter->send_hw_lock);
625 spin_lock_init(&adapter->rcv_lock);
626 spin_lock_init(&adapter->rcv_pend_lock);
627 spin_lock_init(&adapter->fbr_lock);
628 spin_lock_init(&adapter->phy_lock);
630 adapter->registry_jumbo_packet = 1514; /* 1514-9216 */
632 /* Set the MAC address to a default */
633 memcpy(adapter->addr, default_mac, ETH_ALEN);
635 return adapter;
639 * et131x_pci_setup - Perform device initialization
640 * @pdev: a pointer to the device's pci_dev structure
641 * @ent: this device's entry in the pci_device_id table
643 * Returns 0 on success, errno on failure (as defined in errno.h)
645 * Registered in the pci_driver structure, this function is called when the
646 * PCI subsystem finds a new PCI device which matches the information
647 * contained in the pci_device_id table. This routine is the equivalent to
648 * a device insertion routine.
650 static int __devinit et131x_pci_setup(struct pci_dev *pdev,
651 const struct pci_device_id *ent)
653 int result;
654 int pm_cap;
655 struct net_device *netdev;
656 struct et131x_adapter *adapter;
657 int ii;
659 result = pci_enable_device(pdev);
660 if (result) {
661 dev_err(&pdev->dev, "pci_enable_device() failed\n");
662 goto err_out;
665 /* Perform some basic PCI checks */
666 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
667 dev_err(&pdev->dev, "Can't find PCI device's base address\n");
668 goto err_disable;
671 if (pci_request_regions(pdev, DRIVER_NAME)) {
672 dev_err(&pdev->dev, "Can't get PCI resources\n");
673 goto err_disable;
676 pci_set_master(pdev);
678 /* Query PCI for Power Mgmt Capabilities
680 * NOTE: Now reading PowerMgmt in another location; is this still
681 * needed?
683 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
684 if (!pm_cap) {
685 dev_err(&pdev->dev,
686 "Cannot find Power Management capabilities\n");
687 result = -EIO;
688 goto err_release_res;
691 /* Check the DMA addressing support of this device */
692 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
693 result = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
694 if (result) {
695 dev_err(&pdev->dev,
696 "Unable to obtain 64 bit DMA for consistent allocations\n");
697 goto err_release_res;
699 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
700 result = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
701 if (result) {
702 dev_err(&pdev->dev,
703 "Unable to obtain 32 bit DMA for consistent allocations\n");
704 goto err_release_res;
706 } else {
707 dev_err(&pdev->dev, "No usable DMA addressing method\n");
708 result = -EIO;
709 goto err_release_res;
712 /* Allocate netdev and private adapter structs */
713 netdev = et131x_device_alloc();
714 if (!netdev) {
715 dev_err(&pdev->dev, "Couldn't alloc netdev struct\n");
716 result = -ENOMEM;
717 goto err_release_res;
720 SET_NETDEV_DEV(netdev, &pdev->dev);
721 et131x_set_ethtool_ops(netdev);
723 adapter = et131x_adapter_init(netdev, pdev);
725 /* Initialise the PCI setup for the device */
726 et131x_pci_init(adapter, pdev);
728 /* Map the bus-relative registers to system virtual memory */
729 adapter->regs = pci_ioremap_bar(pdev, 0);
730 if (!adapter->regs) {
731 dev_err(&pdev->dev, "Cannot map device registers\n");
732 result = -ENOMEM;
733 goto err_free_dev;
736 /* If Phy COMA mode was enabled when we went down, disable it here. */
737 writel(ET_PMCSR_INIT, &adapter->regs->global.pm_csr);
739 /* Issue a global reset to the et1310 */
740 et131x_soft_reset(adapter);
742 /* Disable all interrupts (paranoid) */
743 et131x_disable_interrupts(adapter);
745 /* Allocate DMA memory */
746 result = et131x_adapter_memory_alloc(adapter);
747 if (result) {
748 dev_err(&pdev->dev, "Could not alloc adapater memory (DMA)\n");
749 goto err_iounmap;
752 /* Init send data structures */
753 et131x_init_send(adapter);
755 /* Set up the task structure for the ISR's deferred handler */
756 INIT_WORK(&adapter->task, et131x_isr_handler);
758 /* Copy address into the net_device struct */
759 memcpy(netdev->dev_addr, adapter->addr, ETH_ALEN);
761 /* Init variable for counting how long we do not have link status */
762 adapter->boot_coma = 0;
763 et1310_disable_phy_coma(adapter);
765 /* Setup the mii_bus struct */
766 adapter->mii_bus = mdiobus_alloc();
767 if (!adapter->mii_bus) {
768 dev_err(&pdev->dev, "Alloc of mii_bus struct failed\n");
769 goto err_mem_free;
772 adapter->mii_bus->name = "et131x_eth_mii";
773 snprintf(adapter->mii_bus->id, MII_BUS_ID_SIZE, "%x",
774 (adapter->pdev->bus->number << 8) | adapter->pdev->devfn);
775 adapter->mii_bus->priv = netdev;
776 adapter->mii_bus->read = et131x_mdio_read;
777 adapter->mii_bus->write = et131x_mdio_write;
778 adapter->mii_bus->reset = et131x_mdio_reset;
779 adapter->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
780 if (!adapter->mii_bus->irq) {
781 dev_err(&pdev->dev, "mii_bus irq allocation failed\n");
782 goto err_mdio_free;
785 for (ii = 0; ii < PHY_MAX_ADDR; ii++)
786 adapter->mii_bus->irq[ii] = PHY_POLL;
788 if (mdiobus_register(adapter->mii_bus)) {
789 dev_err(&pdev->dev, "failed to register MII bus\n");
790 mdiobus_free(adapter->mii_bus);
791 goto err_mdio_free_irq;
794 if (et131x_mii_probe(netdev)) {
795 dev_err(&pdev->dev, "failed to probe MII bus\n");
796 goto err_mdio_unregister;
799 /* Setup et1310 as per the documentation */
800 et131x_adapter_setup(adapter);
802 /* We can enable interrupts now
804 * NOTE - Because registration of interrupt handler is done in the
805 * device's open(), defer enabling device interrupts to that
806 * point
809 /* Register the net_device struct with the Linux network layer */
810 result = register_netdev(netdev);
811 if (result != 0) {
812 dev_err(&pdev->dev, "register_netdev() failed\n");
813 goto err_mdio_unregister;
816 /* Register the net_device struct with the PCI subsystem. Save a copy
817 * of the PCI config space for this device now that the device has
818 * been initialized, just in case it needs to be quickly restored.
820 pci_set_drvdata(pdev, netdev);
821 pci_save_state(adapter->pdev);
823 return result;
825 err_mdio_unregister:
826 mdiobus_unregister(adapter->mii_bus);
827 err_mdio_free_irq:
828 kfree(adapter->mii_bus->irq);
829 err_mdio_free:
830 mdiobus_free(adapter->mii_bus);
831 err_mem_free:
832 et131x_adapter_memory_free(adapter);
833 err_iounmap:
834 iounmap(adapter->regs);
835 err_free_dev:
836 pci_dev_put(pdev);
837 free_netdev(netdev);
838 err_release_res:
839 pci_release_regions(pdev);
840 err_disable:
841 pci_disable_device(pdev);
842 err_out:
843 return result;
847 * et131x_pci_remove
848 * @pdev: a pointer to the device's pci_dev structure
850 * Registered in the pci_driver structure, this function is called when the
851 * PCI subsystem detects that a PCI device which matches the information
852 * contained in the pci_device_id table has been removed.
854 static void __devexit et131x_pci_remove(struct pci_dev *pdev)
856 struct net_device *netdev = pci_get_drvdata(pdev);
857 struct et131x_adapter *adapter = netdev_priv(netdev);
859 unregister_netdev(netdev);
860 mdiobus_unregister(adapter->mii_bus);
861 kfree(adapter->mii_bus->irq);
862 mdiobus_free(adapter->mii_bus);
864 et131x_adapter_memory_free(adapter);
865 iounmap(adapter->regs);
866 pci_dev_put(pdev);
868 free_netdev(netdev);
869 pci_release_regions(pdev);
870 pci_disable_device(pdev);
873 static int et131x_pci_suspend(struct pci_dev *pdev, pm_message_t state)
875 struct net_device *netdev = pci_get_drvdata(pdev);
877 if (!netif_running(netdev))
878 return 0;
880 et131x_close(netdev);
881 netif_device_detach(netdev);
883 pci_save_state(pdev);
884 pci_set_power_state(pdev, pci_choose_state(pdev, state));
886 return 0;
889 static int et131x_pci_resume(struct pci_dev *pdev)
891 struct net_device *netdev = pci_get_drvdata(pdev);
892 int err = 0;
894 if (!netif_running(netdev))
895 return 0;
897 pci_set_power_state(pdev, PCI_D0);
898 pci_restore_state(pdev);
900 err = et131x_open(netdev);
901 if (err) {
902 dev_err(&pdev->dev, "Can't resume interface!\n");
903 goto out;
906 netif_device_attach(netdev);
908 out:
909 return err;
912 static struct pci_device_id et131x_pci_table[] __devinitdata = {
913 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_GIG, PCI_ANY_ID,
914 PCI_ANY_ID, 0, 0, 0UL},
915 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_FAST, PCI_ANY_ID,
916 PCI_ANY_ID, 0, 0, 0UL},
917 {0,}
920 MODULE_DEVICE_TABLE(pci, et131x_pci_table);
922 static struct pci_driver et131x_driver = {
923 .name = DRIVER_NAME,
924 .id_table = et131x_pci_table,
925 .probe = et131x_pci_setup,
926 .remove = __devexit_p(et131x_pci_remove),
927 #ifdef CONFIG_PM
928 .suspend = et131x_pci_suspend,
929 .resume = et131x_pci_resume,
930 #endif
934 * et131x_init_module - The "main" entry point called on driver initialization
936 * Returns 0 on success, errno on failure (as defined in errno.h)
938 static int __init et131x_init_module(void)
940 return pci_register_driver(&et131x_driver);
944 * et131x_cleanup_module - The entry point called on driver cleanup
946 static void __exit et131x_cleanup_module(void)
948 pci_unregister_driver(&et131x_driver);
951 module_init(et131x_init_module);
952 module_exit(et131x_cleanup_module);
954 /* Modinfo parameters (filled out using defines from et131x_version.h) */
955 MODULE_AUTHOR(DRIVER_AUTHOR);
956 MODULE_AUTHOR(DRIVER_AUTHOR2);
957 MODULE_DESCRIPTION(DRIVER_INFO);
958 MODULE_LICENSE(DRIVER_LICENSE);