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staging: brcm80211: remove redundant CHIPREV macro
[zen-stable.git] / drivers / staging / winbond / wb35reg.c
blob42ae61014522d03805d3659e565e4cee1d583316
1 #include "wb35reg_f.h"
2
3 #include <linux/usb.h>
4 #include <linux/slab.h>
5
6 extern void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
7
8 /*
9 * true : read command process successfully
10 * false : register not support
11 * RegisterNo : start base
12 * pRegisterData : data point
13 * NumberOfData : number of register data
14 * Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
15 * NO_INCREMENT - Function will write data into the same register
16 */
17 unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterData, u8 NumberOfData, u8 Flag)
18 {
19 struct wb35_reg *reg = &pHwData->reg;
20 struct urb *urb = NULL;
21 struct wb35_reg_queue *reg_queue = NULL;
22 u16 UrbSize;
23 struct usb_ctrlrequest *dr;
24 u16 i, DataSize = NumberOfData * 4;
25
26 /* Module shutdown */
27 if (pHwData->SurpriseRemove)
28 return false;
29
30 /* Trying to use burst write function if use new hardware */
31 UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
32 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
33 urb = usb_alloc_urb(0, GFP_ATOMIC);
34 if (urb && reg_queue) {
35 reg_queue->DIRECT = 2; /* burst write register */
36 reg_queue->INDEX = RegisterNo;
37 reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
38 memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
39 /* the function for reversing register data from little endian to big endian */
40 for (i = 0; i < NumberOfData ; i++)
41 reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
42
43 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
44 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
45 dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
46 dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
47 dr->wIndex = cpu_to_le16(RegisterNo);
48 dr->wLength = cpu_to_le16(DataSize);
49 reg_queue->Next = NULL;
50 reg_queue->pUsbReq = dr;
51 reg_queue->urb = urb;
52
53 spin_lock_irq(&reg->EP0VM_spin_lock);
54 if (reg->reg_first == NULL)
55 reg->reg_first = reg_queue;
56 else
57 reg->reg_last->Next = reg_queue;
58 reg->reg_last = reg_queue;
59
60 spin_unlock_irq(&reg->EP0VM_spin_lock);
61
62 /* Start EP0VM */
63 Wb35Reg_EP0VM_start(pHwData);
64
65 return true;
66 } else {
67 if (urb)
68 usb_free_urb(urb);
69 if (reg_queue)
70 kfree(reg_queue);
71 return false;
72 }
73 return false;
74 }
75
76 void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
77 {
78 struct wb35_reg *reg = &pHwData->reg;
79 switch (RegisterNo) {
80 case 0x3b0: reg->U1B0 = RegisterValue; break;
81 case 0x3bc: reg->U1BC_LEDConfigure = RegisterValue; break;
82 case 0x400: reg->D00_DmaControl = RegisterValue; break;
83 case 0x800: reg->M00_MacControl = RegisterValue; break;
84 case 0x804: reg->M04_MulticastAddress1 = RegisterValue; break;
85 case 0x808: reg->M08_MulticastAddress2 = RegisterValue; break;
86 case 0x824: reg->M24_MacControl = RegisterValue; break;
87 case 0x828: reg->M28_MacControl = RegisterValue; break;
88 case 0x82c: reg->M2C_MacControl = RegisterValue; break;
89 case 0x838: reg->M38_MacControl = RegisterValue; break;
90 case 0x840: reg->M40_MacControl = RegisterValue; break;
91 case 0x844: reg->M44_MacControl = RegisterValue; break;
92 case 0x848: reg->M48_MacControl = RegisterValue; break;
93 case 0x84c: reg->M4C_MacStatus = RegisterValue; break;
94 case 0x860: reg->M60_MacControl = RegisterValue; break;
95 case 0x868: reg->M68_MacControl = RegisterValue; break;
96 case 0x870: reg->M70_MacControl = RegisterValue; break;
97 case 0x874: reg->M74_MacControl = RegisterValue; break;
98 case 0x878: reg->M78_ERPInformation = RegisterValue; break;
99 case 0x87C: reg->M7C_MacControl = RegisterValue; break;
100 case 0x880: reg->M80_MacControl = RegisterValue; break;
101 case 0x884: reg->M84_MacControl = RegisterValue; break;
102 case 0x888: reg->M88_MacControl = RegisterValue; break;
103 case 0x898: reg->M98_MacControl = RegisterValue; break;
104 case 0x100c: reg->BB0C = RegisterValue; break;
105 case 0x102c: reg->BB2C = RegisterValue; break;
106 case 0x1030: reg->BB30 = RegisterValue; break;
107 case 0x103c: reg->BB3C = RegisterValue; break;
108 case 0x1048: reg->BB48 = RegisterValue; break;
109 case 0x104c: reg->BB4C = RegisterValue; break;
110 case 0x1050: reg->BB50 = RegisterValue; break;
111 case 0x1054: reg->BB54 = RegisterValue; break;
112 case 0x1058: reg->BB58 = RegisterValue; break;
113 case 0x105c: reg->BB5C = RegisterValue; break;
114 case 0x1060: reg->BB60 = RegisterValue; break;
115 }
116 }
117
118 /*
119 * true : read command process successfully
120 * false : register not support
121 */
122 unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
123 {
124 struct wb35_reg *reg = &pHwData->reg;
125 int ret = -1;
126
127 /* Module shutdown */
128 if (pHwData->SurpriseRemove)
129 return false;
130
131 RegisterValue = cpu_to_le32(RegisterValue);
132
133 /* update the register by send usb message */
134 reg->SyncIoPause = 1;
135
136 /* Wait until EP0VM stop */
137 while (reg->EP0vm_state != VM_STOP)
138 msleep(10);
139
140 /* Sync IoCallDriver */
141 reg->EP0vm_state = VM_RUNNING;
142 ret = usb_control_msg(pHwData->udev,
143 usb_sndctrlpipe(pHwData->udev, 0),
144 0x03, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
145 0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
146 reg->EP0vm_state = VM_STOP;
147 reg->SyncIoPause = 0;
148
149 Wb35Reg_EP0VM_start(pHwData);
150
151 if (ret < 0) {
152 pr_debug("EP0 Write register usb message sending error\n");
153 pHwData->SurpriseRemove = 1;
154 return false;
155 }
156 return true;
157 }
158
159 /*
160 * true : read command process successfully
161 * false : register not support
162 */
163 unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
164 {
165 struct wb35_reg *reg = &pHwData->reg;
166 struct usb_ctrlrequest *dr;
167 struct urb *urb = NULL;
168 struct wb35_reg_queue *reg_queue = NULL;
169 u16 UrbSize;
170
171 /* Module shutdown */
172 if (pHwData->SurpriseRemove)
173 return false;
174
175 /* update the register by send urb request */
176 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
177 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
178 urb = usb_alloc_urb(0, GFP_ATOMIC);
179 if (urb && reg_queue) {
180 reg_queue->DIRECT = 1; /* burst write register */
181 reg_queue->INDEX = RegisterNo;
182 reg_queue->VALUE = cpu_to_le32(RegisterValue);
183 reg_queue->RESERVED_VALID = false;
184 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
185 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
186 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
187 dr->wValue = cpu_to_le16(0x0);
188 dr->wIndex = cpu_to_le16(RegisterNo);
189 dr->wLength = cpu_to_le16(4);
190
191 /* Enter the sending queue */
192 reg_queue->Next = NULL;
193 reg_queue->pUsbReq = dr;
194 reg_queue->urb = urb;
195
196 spin_lock_irq(&reg->EP0VM_spin_lock);
197 if (reg->reg_first == NULL)
198 reg->reg_first = reg_queue;
199 else
200 reg->reg_last->Next = reg_queue;
201 reg->reg_last = reg_queue;
202
203 spin_unlock_irq(&reg->EP0VM_spin_lock);
204
205 /* Start EP0VM */
206 Wb35Reg_EP0VM_start(pHwData);
207
208 return true;
209 } else {
210 if (urb)
211 usb_free_urb(urb);
212 kfree(reg_queue);
213 return false;
214 }
215 }
216
217 /*
218 * This command will be executed with a user defined value. When it completes,
219 * this value is useful. For example, hal_set_current_channel will use it.
220 * true : read command process successfully
221 * false : register not support
222 */
223 unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
224 u16 RegisterNo,
225 u32 RegisterValue,
226 s8 *pValue,
227 s8 Len)
228 {
229 struct wb35_reg *reg = &pHwData->reg;
230 struct usb_ctrlrequest *dr;
231 struct urb *urb = NULL;
232 struct wb35_reg_queue *reg_queue = NULL;
233 u16 UrbSize;
234
235 /* Module shutdown */
236 if (pHwData->SurpriseRemove)
237 return false;
238
239 /* update the register by send urb request */
240 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
241 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
242 urb = usb_alloc_urb(0, GFP_ATOMIC);
243 if (urb && reg_queue) {
244 reg_queue->DIRECT = 1; /* burst write register */
245 reg_queue->INDEX = RegisterNo;
246 reg_queue->VALUE = cpu_to_le32(RegisterValue);
247 /* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
248 memcpy(reg_queue->RESERVED, pValue, Len);
249 reg_queue->RESERVED_VALID = true;
250 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
251 dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
252 dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
253 dr->wValue = cpu_to_le16(0x0);
254 dr->wIndex = cpu_to_le16(RegisterNo);
255 dr->wLength = cpu_to_le16(4);
256
257 /* Enter the sending queue */
258 reg_queue->Next = NULL;
259 reg_queue->pUsbReq = dr;
260 reg_queue->urb = urb;
261 spin_lock_irq(&reg->EP0VM_spin_lock);
262 if (reg->reg_first == NULL)
263 reg->reg_first = reg_queue;
264 else
265 reg->reg_last->Next = reg_queue;
266 reg->reg_last = reg_queue;
267
268 spin_unlock_irq(&reg->EP0VM_spin_lock);
269
270 /* Start EP0VM */
271 Wb35Reg_EP0VM_start(pHwData);
272 return true;
273 } else {
274 if (urb)
275 usb_free_urb(urb);
276 kfree(reg_queue);
277 return false;
278 }
279 }
280
281 /*
282 * true : read command process successfully
283 * false : register not support
284 * pRegisterValue : It must be a resident buffer due to
285 * asynchronous read register.
286 */
287 unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
288 {
289 struct wb35_reg *reg = &pHwData->reg;
290 u32 *pltmp = pRegisterValue;
291 int ret = -1;
292
293 /* Module shutdown */
294 if (pHwData->SurpriseRemove)
295 return false;
296
297 /* Read the register by send usb message */
298 reg->SyncIoPause = 1;
299
300 /* Wait until EP0VM stop */
301 while (reg->EP0vm_state != VM_STOP)
302 msleep(10);
303
304 reg->EP0vm_state = VM_RUNNING;
305 ret = usb_control_msg(pHwData->udev,
306 usb_rcvctrlpipe(pHwData->udev, 0),
307 0x01, USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
308 0x0, RegisterNo, pltmp, 4, HZ * 100);
309
310 *pRegisterValue = cpu_to_le32(*pltmp);
311
312 reg->EP0vm_state = VM_STOP;
313
314 Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
315 reg->SyncIoPause = 0;
316
317 Wb35Reg_EP0VM_start(pHwData);
318
319 if (ret < 0) {
320 pr_debug("EP0 Read register usb message sending error\n");
321 pHwData->SurpriseRemove = 1;
322 return false;
323 }
324 return true;
325 }
326
327 /*
328 * true : read command process successfully
329 * false : register not support
330 * pRegisterValue : It must be a resident buffer due to
331 * asynchronous read register.
332 */
333 unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo, u32 *pRegisterValue)
334 {
335 struct wb35_reg *reg = &pHwData->reg;
336 struct usb_ctrlrequest *dr;
337 struct urb *urb;
338 struct wb35_reg_queue *reg_queue;
339 u16 UrbSize;
340
341 /* Module shutdown */
342 if (pHwData->SurpriseRemove)
343 return false;
344
345 /* update the variable by send Urb to read register */
346 UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
347 reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
348 urb = usb_alloc_urb(0, GFP_ATOMIC);
349 if (urb && reg_queue) {
350 reg_queue->DIRECT = 0; /* read register */
351 reg_queue->INDEX = RegisterNo;
352 reg_queue->pBuffer = pRegisterValue;
353 dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
354 dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
355 dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
356 dr->wValue = cpu_to_le16(0x0);
357 dr->wIndex = cpu_to_le16(RegisterNo);
358 dr->wLength = cpu_to_le16(4);
359
360 /* Enter the sending queue */
361 reg_queue->Next = NULL;
362 reg_queue->pUsbReq = dr;
363 reg_queue->urb = urb;
364 spin_lock_irq(&reg->EP0VM_spin_lock);
365 if (reg->reg_first == NULL)
366 reg->reg_first = reg_queue;
367 else
368 reg->reg_last->Next = reg_queue;
369 reg->reg_last = reg_queue;
370
371 spin_unlock_irq(&reg->EP0VM_spin_lock);
372
373 /* Start EP0VM */
374 Wb35Reg_EP0VM_start(pHwData);
375
376 return true;
377 } else {
378 if (urb)
379 usb_free_urb(urb);
380 kfree(reg_queue);
381 return false;
382 }
383 }
384
385
386 void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
387 {
388 struct wb35_reg *reg = &pHwData->reg;
389
390 if (atomic_inc_return(&reg->RegFireCount) == 1) {
391 reg->EP0vm_state = VM_RUNNING;
392 Wb35Reg_EP0VM(pHwData);
393 } else
394 atomic_dec(&reg->RegFireCount);
395 }
396
397 void Wb35Reg_EP0VM(struct hw_data *pHwData)
398 {
399 struct wb35_reg *reg = &pHwData->reg;
400 struct urb *urb;
401 struct usb_ctrlrequest *dr;
402 u32 *pBuffer;
403 int ret = -1;
404 struct wb35_reg_queue *reg_queue;
405
406
407 if (reg->SyncIoPause)
408 goto cleanup;
409
410 if (pHwData->SurpriseRemove)
411 goto cleanup;
412
413 /* Get the register data and send to USB through Irp */
414 spin_lock_irq(&reg->EP0VM_spin_lock);
415 reg_queue = reg->reg_first;
416 spin_unlock_irq(&reg->EP0VM_spin_lock);
417
418 if (!reg_queue)
419 goto cleanup;
420
421 /* Get an Urb, send it */
422 urb = (struct urb *)reg_queue->urb;
423
424 dr = reg_queue->pUsbReq;
425 urb = reg_queue->urb;
426 pBuffer = reg_queue->pBuffer;
427 if (reg_queue->DIRECT == 1) /* output */
428 pBuffer = &reg_queue->VALUE;
429
430 usb_fill_control_urb(urb, pHwData->udev,
431 REG_DIRECTION(pHwData->udev, reg_queue),
432 (u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
433 Wb35Reg_EP0VM_complete, (void *)pHwData);
434
435 reg->EP0vm_state = VM_RUNNING;
436
437 ret = usb_submit_urb(urb, GFP_ATOMIC);
438
439 if (ret < 0) {
440 pr_debug("EP0 Irp sending error\n");
441 goto cleanup;
442 }
443 return;
444
445 cleanup:
446 reg->EP0vm_state = VM_STOP;
447 atomic_dec(&reg->RegFireCount);
448 }
449
450
451 void Wb35Reg_EP0VM_complete(struct urb *urb)
452 {
453 struct hw_data *pHwData = (struct hw_data *)urb->context;
454 struct wb35_reg *reg = &pHwData->reg;
455 struct wb35_reg_queue *reg_queue;
456
457
458 /* Variable setting */
459 reg->EP0vm_state = VM_COMPLETED;
460 reg->EP0VM_status = urb->status;
461
462 if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
463 reg->EP0vm_state = VM_STOP;
464 atomic_dec(&reg->RegFireCount);
465 } else {
466 /* Complete to send, remove the URB from the first */
467 spin_lock_irq(&reg->EP0VM_spin_lock);
468 reg_queue = reg->reg_first;
469 if (reg_queue == reg->reg_last)
470 reg->reg_last = NULL;
471 reg->reg_first = reg->reg_first->Next;
472 spin_unlock_irq(&reg->EP0VM_spin_lock);
473
474 if (reg->EP0VM_status) {
475 pr_debug("EP0 IoCompleteRoutine return error\n");
476 reg->EP0vm_state = VM_STOP;
477 pHwData->SurpriseRemove = 1;
478 } else {
479 /* Success. Update the result */
480
481 /* Start the next send */
482 Wb35Reg_EP0VM(pHwData);
483 }
484
485 kfree(reg_queue);
486 }
487
488 usb_free_urb(urb);
489 }
490
491
492 void Wb35Reg_destroy(struct hw_data *pHwData)
493 {
494 struct wb35_reg *reg = &pHwData->reg;
495 struct urb *urb;
496 struct wb35_reg_queue *reg_queue;
497
498 Uxx_power_off_procedure(pHwData);
499
500 /* Wait for Reg operation completed */
501 do {
502 msleep(10); /* Delay for waiting function enter */
503 } while (reg->EP0vm_state != VM_STOP);
504 msleep(10); /* Delay for waiting function enter */
505
506 /* Release all the data in RegQueue */
507 spin_lock_irq(&reg->EP0VM_spin_lock);
508 reg_queue = reg->reg_first;
509 while (reg_queue) {
510 if (reg_queue == reg->reg_last)
511 reg->reg_last = NULL;
512 reg->reg_first = reg->reg_first->Next;
513
514 urb = reg_queue->urb;
515 spin_unlock_irq(&reg->EP0VM_spin_lock);
516 if (urb) {
517 usb_free_urb(urb);
518 kfree(reg_queue);
519 } else {
520 pr_debug("EP0 queue release error\n");
521 }
522 spin_lock_irq(&reg->EP0VM_spin_lock);
523
524 reg_queue = reg->reg_first;
525 }
526 spin_unlock_irq(&reg->EP0VM_spin_lock);
527 }
528
529 /*
530 * =======================================================================
531 * The function can be run in passive-level only.
532 * =========================================================================
533 */
534 unsigned char Wb35Reg_initial(struct hw_data *pHwData)
535 {
536 struct wb35_reg *reg = &pHwData->reg;
537 u32 ltmp;
538 u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
539
540 /* Spin lock is acquired for read and write IRP command */
541 spin_lock_init(&reg->EP0VM_spin_lock);
542
543 /* Getting RF module type from EEPROM */
544 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
545 Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
546
547 /* Update RF module type and determine the PHY type by inf or EEPROM */
548 reg->EEPROMPhyType = (u8)(ltmp & 0xff);
549 /*
550 * 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
551 * 16V AL2230, 17 - AL7230, 18 - AL2230S
552 * 32 Reserved
553 * 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
554 */
555 if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
556 if ((reg->EEPROMPhyType == RF_MAXIM_2825) ||
557 (reg->EEPROMPhyType == RF_MAXIM_2827) ||
558 (reg->EEPROMPhyType == RF_MAXIM_2828) ||
559 (reg->EEPROMPhyType == RF_MAXIM_2829) ||
560 (reg->EEPROMPhyType == RF_MAXIM_V1) ||
561 (reg->EEPROMPhyType == RF_AIROHA_2230) ||
562 (reg->EEPROMPhyType == RF_AIROHA_2230S) ||
563 (reg->EEPROMPhyType == RF_AIROHA_7230) ||
564 (reg->EEPROMPhyType == RF_WB_242) ||
565 (reg->EEPROMPhyType == RF_WB_242_1))
566 pHwData->phy_type = reg->EEPROMPhyType;
567 }
568
569 /* Power On procedure running. The relative parameter will be set according to phy_type */
570 Uxx_power_on_procedure(pHwData);
571
572 /* Reading MAC address */
573 Uxx_ReadEthernetAddress(pHwData);
574
575 /* Read VCO trim for RF parameter */
576 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
577 Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
578
579 /* Read Antenna On/Off of software flag */
580 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
581 Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
582
583 /* Read TXVGA */
584 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
585 Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
586
587 /* Get Scan interval setting from EEPROM offset 0x1c */
588 Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
589 Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
590
591 /* Update Ethernet address */
592 memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
593
594 /* Update software variable */
595 pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
596 TxVga &= 0x000000ff;
597 pHwData->PowerIndexFromEEPROM = (u8)TxVga;
598 pHwData->VCO_trim = (u8)VCO_trim & 0xff;
599 if (pHwData->VCO_trim == 0xff)
600 pHwData->VCO_trim = 0x28;
601
602 reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
603 if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
604 reg->EEPROMRegion = REGION_AUTO;
605
606 /* For Get Tx VGA from EEPROM */
607 GetTxVgaFromEEPROM(pHwData);
608
609 /* Set Scan Interval */
610 pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
611 if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
612 pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
613
614 /* Initial register */
615 RFSynthesizer_initial(pHwData);
616
617 BBProcessor_initial(pHwData); /* Async write, must wait until complete */
618
619 Wb35Reg_phy_calibration(pHwData);
620
621 Mxx_initial(pHwData);
622 Dxx_initial(pHwData);
623
624 if (pHwData->SurpriseRemove)
625 return false;
626 else
627 return true; /* Initial fail */
628 }
629
630 /*
631 * ================================================================
632 * CardComputeCrc --
633 *
634 * Description:
635 * Runs the AUTODIN II CRC algorithm on buffer Buffer of length, Length.
636 *
637 * Arguments:
638 * Buffer - the input buffer
639 * Length - the length of Buffer
640 *
641 * Return Value:
642 * The 32-bit CRC value.
643 * ===================================================================
644 */
645 u32 CardComputeCrc(u8 *Buffer, u32 Length)
646 {
647 u32 Crc, Carry;
648 u32 i, j;
649 u8 CurByte;
650
651 Crc = 0xffffffff;
652
653 for (i = 0; i < Length; i++) {
654 CurByte = Buffer[i];
655 for (j = 0; j < 8; j++) {
656 Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
657 Crc <<= 1;
658 CurByte >>= 1;
659 if (Carry)
660 Crc = (Crc ^ 0x04c11db6) | Carry;
661 }
662 }
663 return Crc;
664 }
665
666
667 /*
668 * ==================================================================
669 * BitReverse --
670 * Reverse the bits in the input argument, dwData, which is
671 * regarded as a string of bits with the length, DataLength.
672 *
673 * Arguments:
674 * dwData :
675 * DataLength :
676 *
677 * Return:
678 * The converted value.
679 * ==================================================================
680 */
681 u32 BitReverse(u32 dwData, u32 DataLength)
682 {
683 u32 HalfLength, i, j;
684 u32 BitA, BitB;
685
686 if (DataLength <= 0)
687 return 0; /* No conversion is done. */
688 dwData = dwData & (0xffffffff >> (32 - DataLength));
689
690 HalfLength = DataLength / 2;
691 for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
692 BitA = GetBit(dwData, i);
693 BitB = GetBit(dwData, j);
694 if (BitA && !BitB) {
695 dwData = ClearBit(dwData, i);
696 dwData = SetBit(dwData, j);
697 } else if (!BitA && BitB) {
698 dwData = SetBit(dwData, i);
699 dwData = ClearBit(dwData, j);
700 } else {
701 /* Do nothing since these two bits are of the save values. */
702 }
703 }
704 return dwData;
705 }
706
707 void Wb35Reg_phy_calibration(struct hw_data *pHwData)
708 {
709 u32 BB3c, BB54;
710
711 if ((pHwData->phy_type == RF_WB_242) ||
712 (pHwData->phy_type == RF_WB_242_1)) {
713 phy_calibration_winbond(pHwData, 2412); /* Sync operation */
714 Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
715 Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
716
717 pHwData->BB3c_cal = BB3c;
718 pHwData->BB54_cal = BB54;
719
720 RFSynthesizer_initial(pHwData);
721 BBProcessor_initial(pHwData); /* Async operation */
722
723 Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
724 Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
725 }
726 }
727
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