module/zcommon/zfs_fletcher_superscalar4.c

   1 /*
   2  * Implement fast Fletcher4 using superscalar pipelines.
   3  *
   4  * Use regular C code to compute
   5  * Fletcher4 in four incremental 64-bit parallel accumulator streams,
   6  * and then combine the streams to form the final four checksum words.
   7  * This implementation is a derivative of the AVX SIMD implementation by
   8  * James Guilford and Jinshan Xiong from Intel (see zfs_fletcher_intel.c).
   9  *
  10  * Copyright (C) 2016 Romain Dolbeau.
  11  *
  12  * Authors:
  13  *      Romain Dolbeau <romain.dolbeau@atos.net>
  14  *
  15  * This software is available to you under a choice of one of two
  16  * licenses.  You may choose to be licensed under the terms of the GNU
  17  * General Public License (GPL) Version 2, available from the file
  18  * COPYING in the main directory of this source tree, or the
  19  * OpenIB.org BSD license below:
  20  *
  21  *     Redistribution and use in source and binary forms, with or
  22  *     without modification, are permitted provided that the following
  23  *     conditions are met:
  24  *
  25  *      - Redistributions of source code must retain the above
  26  *        copyright notice, this list of conditions and the following
  27  *        disclaimer.
  28  *
  29  *      - Redistributions in binary form must reproduce the above
  30  *        copyright notice, this list of conditions and the following
  31  *        disclaimer in the documentation and/or other materials
  32  *        provided with the distribution.
  33  *
  34  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  35  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  36  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  37  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  38  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  39  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  40  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  41  * SOFTWARE.
  42  */
  43
  44 #include <sys/param.h>
  45 #include <sys/byteorder.h>
  46 #include <sys/spa_checksum.h>
  47 #include <sys/string.h>
  48 #include <zfs_fletcher.h>
  49
  50 static void
  51 fletcher_4_superscalar4_init(fletcher_4_ctx_t *ctx)
  52 {
  53         memset(ctx->superscalar, 0, 4 * sizeof (zfs_fletcher_superscalar_t));
  54 }
  55
  56 static void
  57 fletcher_4_superscalar4_fini(fletcher_4_ctx_t *ctx, zio_cksum_t *zcp)
  58 {
  59         uint64_t A, B, C, D;
  60
  61         A = ctx->superscalar[0].v[0] + ctx->superscalar[0].v[1] +
  62             ctx->superscalar[0].v[2] + ctx->superscalar[0].v[3];
  63         B = 0 - ctx->superscalar[0].v[1] - 2 * ctx->superscalar[0].v[2] -
  64             3 * ctx->superscalar[0].v[3] + 4 * ctx->superscalar[1].v[0] +
  65             4 * ctx->superscalar[1].v[1] + 4 * ctx->superscalar[1].v[2] +
  66             4 * ctx->superscalar[1].v[3];
  67
  68         C = ctx->superscalar[0].v[2] + 3 * ctx->superscalar[0].v[3] -
  69             6 * ctx->superscalar[1].v[0] - 10 * ctx->superscalar[1].v[1] -
  70             14 * ctx->superscalar[1].v[2] - 18 * ctx->superscalar[1].v[3] +
  71             16 * ctx->superscalar[2].v[0] + 16 * ctx->superscalar[2].v[1] +
  72             16 * ctx->superscalar[2].v[2] + 16 * ctx->superscalar[2].v[3];
  73
  74         D = 0 - ctx->superscalar[0].v[3] + 4 * ctx->superscalar[1].v[0] +
  75             10 * ctx->superscalar[1].v[1] + 20 * ctx->superscalar[1].v[2] +
  76             34 * ctx->superscalar[1].v[3] - 48 * ctx->superscalar[2].v[0] -
  77             64 * ctx->superscalar[2].v[1] - 80 * ctx->superscalar[2].v[2] -
  78             96 * ctx->superscalar[2].v[3] + 64 * ctx->superscalar[3].v[0] +
  79             64 * ctx->superscalar[3].v[1] + 64 * ctx->superscalar[3].v[2] +
  80             64 * ctx->superscalar[3].v[3];
  81
  82         ZIO_SET_CHECKSUM(zcp, A, B, C, D);
  83 }
  84
  85 static void
  86 fletcher_4_superscalar4_native(fletcher_4_ctx_t *ctx,
  87     const void *buf, uint64_t size)
  88 {
  89         const uint32_t *ip = buf;
  90         const uint32_t *ipend = ip + (size / sizeof (uint32_t));
  91         uint64_t a, b, c, d;
  92         uint64_t a2, b2, c2, d2;
  93         uint64_t a3, b3, c3, d3;
  94         uint64_t a4, b4, c4, d4;
  95
  96         a = ctx->superscalar[0].v[0];
  97         b = ctx->superscalar[1].v[0];
  98         c = ctx->superscalar[2].v[0];
  99         d = ctx->superscalar[3].v[0];
 100         a2 = ctx->superscalar[0].v[1];
 101         b2 = ctx->superscalar[1].v[1];
 102         c2 = ctx->superscalar[2].v[1];
 103         d2 = ctx->superscalar[3].v[1];
 104         a3 = ctx->superscalar[0].v[2];
 105         b3 = ctx->superscalar[1].v[2];
 106         c3 = ctx->superscalar[2].v[2];
 107         d3 = ctx->superscalar[3].v[2];
 108         a4 = ctx->superscalar[0].v[3];
 109         b4 = ctx->superscalar[1].v[3];
 110         c4 = ctx->superscalar[2].v[3];
 111         d4 = ctx->superscalar[3].v[3];
 112
 113         do {
 114                 a += ip[0];
 115                 a2 += ip[1];
 116                 a3 += ip[2];
 117                 a4 += ip[3];
 118                 b += a;
 119                 b2 += a2;
 120                 b3 += a3;
 121                 b4 += a4;
 122                 c += b;
 123                 c2 += b2;
 124                 c3 += b3;
 125                 c4 += b4;
 126                 d += c;
 127                 d2 += c2;
 128                 d3 += c3;
 129                 d4 += c4;
 130         } while ((ip += 4) < ipend);
 131
 132         ctx->superscalar[0].v[0] = a;
 133         ctx->superscalar[1].v[0] = b;
 134         ctx->superscalar[2].v[0] = c;
 135         ctx->superscalar[3].v[0] = d;
 136         ctx->superscalar[0].v[1] = a2;
 137         ctx->superscalar[1].v[1] = b2;
 138         ctx->superscalar[2].v[1] = c2;
 139         ctx->superscalar[3].v[1] = d2;
 140         ctx->superscalar[0].v[2] = a3;
 141         ctx->superscalar[1].v[2] = b3;
 142         ctx->superscalar[2].v[2] = c3;
 143         ctx->superscalar[3].v[2] = d3;
 144         ctx->superscalar[0].v[3] = a4;
 145         ctx->superscalar[1].v[3] = b4;
 146         ctx->superscalar[2].v[3] = c4;
 147         ctx->superscalar[3].v[3] = d4;
 148 }
 149
 150 static void
 151 fletcher_4_superscalar4_byteswap(fletcher_4_ctx_t *ctx,
 152     const void *buf, uint64_t size)
 153 {
 154         const uint32_t *ip = buf;
 155         const uint32_t *ipend = ip + (size / sizeof (uint32_t));
 156         uint64_t a, b, c, d;
 157         uint64_t a2, b2, c2, d2;
 158         uint64_t a3, b3, c3, d3;
 159         uint64_t a4, b4, c4, d4;
 160
 161         a = ctx->superscalar[0].v[0];
 162         b = ctx->superscalar[1].v[0];
 163         c = ctx->superscalar[2].v[0];
 164         d = ctx->superscalar[3].v[0];
 165         a2 = ctx->superscalar[0].v[1];
 166         b2 = ctx->superscalar[1].v[1];
 167         c2 = ctx->superscalar[2].v[1];
 168         d2 = ctx->superscalar[3].v[1];
 169         a3 = ctx->superscalar[0].v[2];
 170         b3 = ctx->superscalar[1].v[2];
 171         c3 = ctx->superscalar[2].v[2];
 172         d3 = ctx->superscalar[3].v[2];
 173         a4 = ctx->superscalar[0].v[3];
 174         b4 = ctx->superscalar[1].v[3];
 175         c4 = ctx->superscalar[2].v[3];
 176         d4 = ctx->superscalar[3].v[3];
 177
 178         do {
 179                 a += BSWAP_32(ip[0]);
 180                 a2 += BSWAP_32(ip[1]);
 181                 a3 += BSWAP_32(ip[2]);
 182                 a4 += BSWAP_32(ip[3]);
 183                 b += a;
 184                 b2 += a2;
 185                 b3 += a3;
 186                 b4 += a4;
 187                 c += b;
 188                 c2 += b2;
 189                 c3 += b3;
 190                 c4 += b4;
 191                 d += c;
 192                 d2 += c2;
 193                 d3 += c3;
 194                 d4 += c4;
 195         } while ((ip += 4) < ipend);
 196
 197         ctx->superscalar[0].v[0] = a;
 198         ctx->superscalar[1].v[0] = b;
 199         ctx->superscalar[2].v[0] = c;
 200         ctx->superscalar[3].v[0] = d;
 201         ctx->superscalar[0].v[1] = a2;
 202         ctx->superscalar[1].v[1] = b2;
 203         ctx->superscalar[2].v[1] = c2;
 204         ctx->superscalar[3].v[1] = d2;
 205         ctx->superscalar[0].v[2] = a3;
 206         ctx->superscalar[1].v[2] = b3;
 207         ctx->superscalar[2].v[2] = c3;
 208         ctx->superscalar[3].v[2] = d3;
 209         ctx->superscalar[0].v[3] = a4;
 210         ctx->superscalar[1].v[3] = b4;
 211         ctx->superscalar[2].v[3] = c4;
 212         ctx->superscalar[3].v[3] = d4;
 213 }
 214
 215 static boolean_t fletcher_4_superscalar4_valid(void)
 216 {
 217         return (B_TRUE);
 218 }
 219
 220 const fletcher_4_ops_t fletcher_4_superscalar4_ops = {
 221         .init_native = fletcher_4_superscalar4_init,
 222         .compute_native = fletcher_4_superscalar4_native,
 223         .fini_native = fletcher_4_superscalar4_fini,
 224         .init_byteswap = fletcher_4_superscalar4_init,
 225         .compute_byteswap = fletcher_4_superscalar4_byteswap,
 226         .fini_byteswap = fletcher_4_superscalar4_fini,
 227         .valid = fletcher_4_superscalar4_valid,
 228         .uses_fpu = B_FALSE,
 229         .name = "superscalar4"
 230 };