module/zcommon/zfs_fletcher_avx512.c

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright (C) 2016 Gvozden Nešković. All rights reserved.
  23  */
  24
  25 #if defined(__x86_64) && defined(HAVE_AVX512F)
  26
  27 #include <sys/byteorder.h>
  28 #include <sys/frame.h>
  29 #include <sys/spa_checksum.h>
  30 #include <sys/strings.h>
  31 #include <sys/simd.h>
  32 #include <zfs_fletcher.h>
  33
  34 #ifdef __linux__
  35 #define __asm __asm__ __volatile__
  36 #endif
  37
  38 static void
  39 fletcher_4_avx512f_init(fletcher_4_ctx_t *ctx)
  40 {
  41         bzero(ctx->avx512, 4 * sizeof (zfs_fletcher_avx512_t));
  42 }
  43
  44 static void
  45 fletcher_4_avx512f_fini(fletcher_4_ctx_t *ctx, zio_cksum_t *zcp)
  46 {
  47         static const uint64_t
  48         CcA[] = {   0,   0,   1,   3,   6,  10,  15,  21 },
  49         CcB[] = {  28,  36,  44,  52,  60,  68,  76,  84 },
  50         DcA[] = {   0,   0,   0,   1,   4,  10,  20,  35 },
  51         DcB[] = {  56,  84, 120, 164, 216, 276, 344, 420 },
  52         DcC[] = { 448, 512, 576, 640, 704, 768, 832, 896 };
  53
  54         uint64_t A, B, C, D;
  55         uint64_t i;
  56
  57         A = ctx->avx512[0].v[0];
  58         B = 8 * ctx->avx512[1].v[0];
  59         C = 64 * ctx->avx512[2].v[0] - CcB[0] * ctx->avx512[1].v[0];
  60         D = 512 * ctx->avx512[3].v[0] - DcC[0] * ctx->avx512[2].v[0] +
  61             DcB[0] * ctx->avx512[1].v[0];
  62
  63         for (i = 1; i < 8; i++) {
  64                 A += ctx->avx512[0].v[i];
  65                 B += 8 * ctx->avx512[1].v[i] - i * ctx->avx512[0].v[i];
  66                 C += 64 * ctx->avx512[2].v[i] - CcB[i] * ctx->avx512[1].v[i] +
  67                     CcA[i] * ctx->avx512[0].v[i];
  68                 D += 512 * ctx->avx512[3].v[i] - DcC[i] * ctx->avx512[2].v[i] +
  69                     DcB[i] * ctx->avx512[1].v[i] - DcA[i] * ctx->avx512[0].v[i];
  70         }
  71
  72         ZIO_SET_CHECKSUM(zcp, A, B, C, D);
  73 }
  74
  75 #define FLETCHER_4_AVX512_RESTORE_CTX(ctx)                              \
  76 {                                                                       \
  77         __asm("vmovdqu64 %0, %%zmm0" :: "m" ((ctx)->avx512[0]));        \
  78         __asm("vmovdqu64 %0, %%zmm1" :: "m" ((ctx)->avx512[1]));        \
  79         __asm("vmovdqu64 %0, %%zmm2" :: "m" ((ctx)->avx512[2]));        \
  80         __asm("vmovdqu64 %0, %%zmm3" :: "m" ((ctx)->avx512[3]));        \
  81 }
  82
  83 #define FLETCHER_4_AVX512_SAVE_CTX(ctx)                                 \
  84 {                                                                       \
  85         __asm("vmovdqu64 %%zmm0, %0" : "=m" ((ctx)->avx512[0]));        \
  86         __asm("vmovdqu64 %%zmm1, %0" : "=m" ((ctx)->avx512[1]));        \
  87         __asm("vmovdqu64 %%zmm2, %0" : "=m" ((ctx)->avx512[2]));        \
  88         __asm("vmovdqu64 %%zmm3, %0" : "=m" ((ctx)->avx512[3]));        \
  89 }
  90
  91 static void
  92 fletcher_4_avx512f_native(fletcher_4_ctx_t *ctx, const void *buf, uint64_t size)
  93 {
  94         const uint32_t *ip = buf;
  95         const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
  96
  97         kfpu_begin();
  98
  99         FLETCHER_4_AVX512_RESTORE_CTX(ctx);
 100
 101         for (; ip < ipend; ip += 8) {
 102                 __asm("vpmovzxdq %0, %%zmm4"::"m" (*ip));
 103                 __asm("vpaddq %zmm4, %zmm0, %zmm0");
 104                 __asm("vpaddq %zmm0, %zmm1, %zmm1");
 105                 __asm("vpaddq %zmm1, %zmm2, %zmm2");
 106                 __asm("vpaddq %zmm2, %zmm3, %zmm3");
 107         }
 108
 109         FLETCHER_4_AVX512_SAVE_CTX(ctx);
 110
 111         kfpu_end();
 112 }
 113 STACK_FRAME_NON_STANDARD(fletcher_4_avx512f_native);
 114
 115 static void
 116 fletcher_4_avx512f_byteswap(fletcher_4_ctx_t *ctx, const void *buf,
 117     uint64_t size)
 118 {
 119         static const uint64_t byteswap_mask = 0xFFULL;
 120         const uint32_t *ip = buf;
 121         const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
 122
 123         kfpu_begin();
 124
 125         FLETCHER_4_AVX512_RESTORE_CTX(ctx);
 126
 127         __asm("vpbroadcastq %0, %%zmm8" :: "r" (byteswap_mask));
 128         __asm("vpsllq $8, %zmm8, %zmm9");
 129         __asm("vpsllq $16, %zmm8, %zmm10");
 130         __asm("vpsllq $24, %zmm8, %zmm11");
 131
 132         for (; ip < ipend; ip += 8) {
 133                 __asm("vpmovzxdq %0, %%zmm5"::"m" (*ip));
 134
 135                 __asm("vpsrlq $24, %zmm5, %zmm6");
 136                 __asm("vpandd %zmm8, %zmm6, %zmm6");
 137                 __asm("vpsrlq $8, %zmm5, %zmm7");
 138                 __asm("vpandd %zmm9, %zmm7, %zmm7");
 139                 __asm("vpord %zmm6, %zmm7, %zmm4");
 140                 __asm("vpsllq $8, %zmm5, %zmm6");
 141                 __asm("vpandd %zmm10, %zmm6, %zmm6");
 142                 __asm("vpord %zmm6, %zmm4, %zmm4");
 143                 __asm("vpsllq $24, %zmm5, %zmm5");
 144                 __asm("vpandd %zmm11, %zmm5, %zmm5");
 145                 __asm("vpord %zmm5, %zmm4, %zmm4");
 146
 147                 __asm("vpaddq %zmm4, %zmm0, %zmm0");
 148                 __asm("vpaddq %zmm0, %zmm1, %zmm1");
 149                 __asm("vpaddq %zmm1, %zmm2, %zmm2");
 150                 __asm("vpaddq %zmm2, %zmm3, %zmm3");
 151         }
 152
 153         FLETCHER_4_AVX512_SAVE_CTX(ctx)
 154
 155         kfpu_end();
 156 }
 157 STACK_FRAME_NON_STANDARD(fletcher_4_avx512f_byteswap);
 158
 159 static boolean_t
 160 fletcher_4_avx512f_valid(void)
 161 {
 162         return (kfpu_allowed() && zfs_avx512f_available());
 163 }
 164
 165 const fletcher_4_ops_t fletcher_4_avx512f_ops = {
 166         .init_native = fletcher_4_avx512f_init,
 167         .fini_native = fletcher_4_avx512f_fini,
 168         .compute_native = fletcher_4_avx512f_native,
 169         .init_byteswap = fletcher_4_avx512f_init,
 170         .fini_byteswap = fletcher_4_avx512f_fini,
 171         .compute_byteswap = fletcher_4_avx512f_byteswap,
 172         .valid = fletcher_4_avx512f_valid,
 173         .name = "avx512f"
 174 };
 175
 176 #if defined(HAVE_AVX512BW)
 177 static void
 178 fletcher_4_avx512bw_byteswap(fletcher_4_ctx_t *ctx, const void *buf,
 179     uint64_t size)
 180 {
 181         static const zfs_fletcher_avx512_t mask = {
 182                 .v = { 0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B,
 183                 0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B,
 184                 0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B,
 185                 0xFFFFFFFF00010203, 0xFFFFFFFF08090A0B }
 186         };
 187         const uint32_t *ip = buf;
 188         const uint32_t *ipend = (uint32_t *)((uint8_t *)ip + size);
 189
 190         kfpu_begin();
 191
 192         FLETCHER_4_AVX512_RESTORE_CTX(ctx);
 193
 194         __asm("vmovdqu64 %0, %%zmm5" :: "m" (mask));
 195
 196         for (; ip < ipend; ip += 8) {
 197                 __asm("vpmovzxdq %0, %%zmm4"::"m" (*ip));
 198
 199                 __asm("vpshufb %zmm5, %zmm4, %zmm4");
 200
 201                 __asm("vpaddq %zmm4, %zmm0, %zmm0");
 202                 __asm("vpaddq %zmm0, %zmm1, %zmm1");
 203                 __asm("vpaddq %zmm1, %zmm2, %zmm2");
 204                 __asm("vpaddq %zmm2, %zmm3, %zmm3");
 205         }
 206
 207         FLETCHER_4_AVX512_SAVE_CTX(ctx)
 208
 209         kfpu_end();
 210 }
 211 STACK_FRAME_NON_STANDARD(fletcher_4_avx512bw_byteswap);
 212
 213 const fletcher_4_ops_t fletcher_4_avx512bw_ops = {
 214         .init_native = fletcher_4_avx512f_init,
 215         .fini_native = fletcher_4_avx512f_fini,
 216         .compute_native = fletcher_4_avx512f_native,
 217         .init_byteswap = fletcher_4_avx512f_init,
 218         .fini_byteswap = fletcher_4_avx512f_fini,
 219         .compute_byteswap = fletcher_4_avx512bw_byteswap,
 220         .valid = fletcher_4_avx512f_valid,
 221         .name = "avx512bw"
 222 };
 223 #endif
 224
 225 #endif /* defined(__x86_64) && defined(HAVE_AVX512F) */