[zpu.git] / zpu / hdl / zealot / fpga / altium-livedesign-xc3s1000 / synthesis_config / altium-livedesign-xc3s1000.ucf
| blob | ba22ee95fe75f9eba92a465ca7bcb31f735904e6 |
1 ############################################################
2 # Altium Livedesign Evaluation Board constraints file
3 #
4 # Familiy: Spartan-3
5 # Device: XC3S1000
6 # Package: FG456C
7 # Speed: -4
8 #
9 # all banks are powered with 3.3V
10 #
11 # config pins (M2, M1, M0): 101
13 ############################################################
14 ## clock/timing constraints
15 ############################################################
17 NET "clk_50" period = 50 MHz ;
20 ############################################################
21 ## pin placement constraints
22 ############################################################
24 NET "clk_50" LOC = AA12 | IOSTANDARD = LVCMOS33;
25 NET "reset_n" LOC = Y17 | IOSTANDARD = LVCMOS33; # low active
27 # Soft JTAG
28 NET "soft_tdo" LOC = D22 | IOSTANDARD = LVCMOS33;
29 NET "soft_tms" LOC = E21 | IOSTANDARD = LVCMOS33;
30 NET "soft_tdi" LOC = E22 | IOSTANDARD = LVCMOS33;
31 NET "soft_tck" LOC = F21 | IOSTANDARD = LVCMOS33;
33 # SRAM 0
34 NET "sram0_a<0>" LOC = L6 | IOSTANDARD = LVCMOS33;
35 NET "sram0_a<1>" LOC = K4 | IOSTANDARD = LVCMOS33;
36 NET "sram0_a<2>" LOC = H5 | IOSTANDARD = LVCMOS33;
37 NET "sram0_a<3>" LOC = G6 | IOSTANDARD = LVCMOS33;
38 NET "sram0_a<4>" LOC = F3 | IOSTANDARD = LVCMOS33;
39 NET "sram0_a<5>" LOC = G1 | IOSTANDARD = LVCMOS33;
40 NET "sram0_a<6>" LOC = G2 | IOSTANDARD = LVCMOS33;
41 NET "sram0_a<7>" LOC = K3 | IOSTANDARD = LVCMOS33;
42 NET "sram0_a<8>" LOC = T2 | IOSTANDARD = LVCMOS33;
43 NET "sram0_a<9>" LOC = T1 | IOSTANDARD = LVCMOS33;
44 NET "sram0_a<10>" LOC = U2 | IOSTANDARD = LVCMOS33;
45 NET "sram0_a<11>" LOC = V3 | IOSTANDARD = LVCMOS33;
46 NET "sram0_a<12>" LOC = V1 | IOSTANDARD = LVCMOS33;
47 NET "sram0_a<13>" LOC = W1 | IOSTANDARD = LVCMOS33;
48 NET "sram0_a<14>" LOC = V2 | IOSTANDARD = LVCMOS33;
49 NET "sram0_a<15>" LOC = V5 | IOSTANDARD = LVCMOS33;
50 NET "sram0_a<16>" LOC = V4 | IOSTANDARD = LVCMOS33;
51 NET "sram0_a<17>" LOC = U5 | IOSTANDARD = LVCMOS33;
52 NET "sram0_a<18>" LOC = U6 | IOSTANDARD = LVCMOS33; # n.c.
53 NET "sram0_d<0>" LOC = L4 | IOSTANDARD = LVCMOS33;
54 NET "sram0_d<1>" LOC = L3 | IOSTANDARD = LVCMOS33;
55 NET "sram0_d<2>" LOC = M5 | IOSTANDARD = LVCMOS33;
56 NET "sram0_d<3>" LOC = M4 | IOSTANDARD = LVCMOS33;
57 NET "sram0_d<4>" LOC = M3 | IOSTANDARD = LVCMOS33;
58 NET "sram0_d<5>" LOC = N4 | IOSTANDARD = LVCMOS33;
59 NET "sram0_d<6>" LOC = N3 | IOSTANDARD = LVCMOS33;
60 NET "sram0_d<7>" LOC = T5 | IOSTANDARD = LVCMOS33;
61 NET "sram0_d<8>" LOC = T4 | IOSTANDARD = LVCMOS33;
62 NET "sram0_d<9>" LOC = T6 | IOSTANDARD = LVCMOS33;
63 NET "sram0_d<10>" LOC = M6 | IOSTANDARD = LVCMOS33;
64 NET "sram0_d<11>" LOC = N2 | IOSTANDARD = LVCMOS33;
65 NET "sram0_d<12>" LOC = N1 | IOSTANDARD = LVCMOS33;
66 NET "sram0_d<13>" LOC = M2 | IOSTANDARD = LVCMOS33;
67 NET "sram0_d<14>" LOC = M1 | IOSTANDARD = LVCMOS33;
68 NET "sram0_d<15>" LOC = L2 | IOSTANDARD = LVCMOS33;
69 NET "sram0_cs_n" LOC = L5 | IOSTANDARD = LVCMOS33;
70 NET "sram0_lb_n" LOC = L1 | IOSTANDARD = LVCMOS33;
71 NET "sram0_ub_n" LOC = K2 | IOSTANDARD = LVCMOS33;
72 NET "sram0_we_n" LOC = U4 | IOSTANDARD = LVCMOS33;
73 NET "sram0_oe_n" LOC = K1 | IOSTANDARD = LVCMOS33;
75 # SRAM 1
76 NET "sram1_a<0>" LOC = K21 | IOSTANDARD = LVCMOS33;
77 NET "sram1_a<1>" LOC = K22 | IOSTANDARD = LVCMOS33;
78 NET "sram1_a<2>" LOC = K20 | IOSTANDARD = LVCMOS33;
79 NET "sram1_a<3>" LOC = G21 | IOSTANDARD = LVCMOS33;
80 NET "sram1_a<4>" LOC = G22 | IOSTANDARD = LVCMOS33;
81 NET "sram1_a<5>" LOC = M17 | IOSTANDARD = LVCMOS33;
82 NET "sram1_a<6>" LOC = L18 | IOSTANDARD = LVCMOS33;
83 NET "sram1_a<7>" LOC = K19 | IOSTANDARD = LVCMOS33;
84 NET "sram1_a<8>" LOC = V19 | IOSTANDARD = LVCMOS33;
85 NET "sram1_a<9>" LOC = W20 | IOSTANDARD = LVCMOS33;
86 NET "sram1_a<10>" LOC = W19 | IOSTANDARD = LVCMOS33;
87 NET "sram1_a<11>" LOC = Y20 | IOSTANDARD = LVCMOS33;
88 NET "sram1_a<12>" LOC = Y21 | IOSTANDARD = LVCMOS33;
89 NET "sram1_a<13>" LOC = Y22 | IOSTANDARD = LVCMOS33;
90 NET "sram1_a<14>" LOC = W21 | IOSTANDARD = LVCMOS33;
91 NET "sram1_a<15>" LOC = W22 | IOSTANDARD = LVCMOS33;
92 NET "sram1_a<16>" LOC = V21 | IOSTANDARD = LVCMOS33;
93 NET "sram1_a<17>" LOC = V22 | IOSTANDARD = LVCMOS33;
94 NET "sram1_a<18>" LOC = V20 | IOSTANDARD = LVCMOS33; # n.c.
95 NET "sram1_d<0>" LOC = L21 | IOSTANDARD = LVCMOS33;
96 NET "sram1_d<1>" LOC = M22 | IOSTANDARD = LVCMOS33;
97 NET "sram1_d<2>" LOC = M21 | IOSTANDARD = LVCMOS33;
98 NET "sram1_d<3>" LOC = N22 | IOSTANDARD = LVCMOS33;
99 NET "sram1_d<4>" LOC = N21 | IOSTANDARD = LVCMOS33;
100 NET "sram1_d<5>" LOC = U20 | IOSTANDARD = LVCMOS33;
101 NET "sram1_d<6>" LOC = T22 | IOSTANDARD = LVCMOS33;
102 NET "sram1_d<7>" LOC = T21 | IOSTANDARD = LVCMOS33;
103 NET "sram1_d<8>" LOC = V18 | IOSTANDARD = LVCMOS33;
104 NET "sram1_d<9>" LOC = U19 | IOSTANDARD = LVCMOS33;
105 NET "sram1_d<10>" LOC = U18 | IOSTANDARD = LVCMOS33;
106 NET "sram1_d<11>" LOC = T18 | IOSTANDARD = LVCMOS33;
107 NET "sram1_d<12>" LOC = R18 | IOSTANDARD = LVCMOS33;
108 NET "sram1_d<13>" LOC = T17 | IOSTANDARD = LVCMOS33;
109 NET "sram1_d<14>" LOC = M18 | IOSTANDARD = LVCMOS33;
110 NET "sram1_d<15>" LOC = M20 | IOSTANDARD = LVCMOS33;
111 NET "sram1_cs_n" LOC = L22 | IOSTANDARD = LVCMOS33;
112 NET "sram1_lb_n" LOC = M19 | IOSTANDARD = LVCMOS33;
113 NET "sram1_ub_n" LOC = L20 | IOSTANDARD = LVCMOS33;
114 NET "sram1_we_n" LOC = U21 | IOSTANDARD = LVCMOS33;
115 NET "sram1_oe_n" LOC = L19 | IOSTANDARD = LVCMOS33;
117 # RS232
118 NET "rs232_rx" LOC = A5 | IOSTANDARD = LVCMOS33;
119 NET "rs232_tx" LOC = F7 | IOSTANDARD = LVCMOS33;
120 NET "rs232_cts" LOC = F2 | IOSTANDARD = LVCMOS33;
121 NET "rs232_rts" LOC = E1 | IOSTANDARD = LVCMOS33;
123 # 2x PS2 connectors
124 NET "mouse_clk" LOC = L17 | IOSTANDARD = LVCMOS33;
125 NET "mouse_data" LOC = G18 | IOSTANDARD = LVCMOS33;
126 NET "kbd_clk" LOC = F20 | IOSTANDARD = LVCMOS33;
127 NET "kbd_data" LOC = G19 | IOSTANDARD = LVCMOS33;
130 # VGA output (2**9 = 512 colors)
131 NET "vga_blue<7>" LOC = E14 | IOSTANDARD = LVCMOS33;
132 NET "vga_blue<6>" LOC = A13 | IOSTANDARD = LVCMOS33;
133 NET "vga_blue<5>" LOC = C13 | IOSTANDARD = LVCMOS33;
134 NET "vga_green<7>" LOC = E11 | IOSTANDARD = LVCMOS33;
135 NET "vga_green<6>" LOC = C11 | IOSTANDARD = LVCMOS33;
136 NET "vga_green<5>" LOC = D10 | IOSTANDARD = LVCMOS33;
137 NET "vga_red<7>" LOC = D6 | IOSTANDARD = LVCMOS33;
138 NET "vga_red<6>" LOC = D7 | IOSTANDARD = LVCMOS33;
139 NET "vga_red<5>" LOC = D9 | IOSTANDARD = LVCMOS33;
140 NET "vga_hsync" LOC = A8 | IOSTANDARD = LVCMOS33;
141 NET "vga_vsync" LOC = B14 | IOSTANDARD = LVCMOS33;
144 # Stereo Audio out
145 NET "audio_r" LOC = U3 | IOSTANDARD = LVCMOS33;
146 NET "audio_l" LOC = W3 | IOSTANDARD = LVCMOS33;
149 # GPIO DIP switches 7..0 left..right, low active
150 NET "switch_n<0>" LOC = Y6 | IOSTANDARD = LVCMOS33;
151 NET "switch_n<1>" LOC = V6 | IOSTANDARD = LVCMOS33;
152 NET "switch_n<2>" LOC = U7 | IOSTANDARD = LVCMOS33;
153 NET "switch_n<3>" LOC = AA4 | IOSTANDARD = LVCMOS33;
154 NET "switch_n<4>" LOC = AB4 | IOSTANDARD = LVCMOS33;
155 NET "switch_n<5>" LOC = AA5 | IOSTANDARD = LVCMOS33;
156 NET "switch_n<6>" LOC = AB5 | IOSTANDARD = LVCMOS33;
157 NET "switch_n<7>" LOC = AA6 | IOSTANDARD = LVCMOS33;
159 # GPIO push buttons, low active
160 NET "button_n<5>" LOC = C21 | IOSTANDARD = LVCMOS33;
161 NET "button_n<4>" LOC = B20 | IOSTANDARD = LVCMOS33;
162 NET "button_n<3>" LOC = A15 | IOSTANDARD = LVCMOS33;
163 NET "button_n<2>" LOC = B6 | IOSTANDARD = LVCMOS33;
164 NET "button_n<1>" LOC = C1 | IOSTANDARD = LVCMOS33;
165 NET "button_n<0>" LOC = D1 | IOSTANDARD = LVCMOS33;
167 # GPIO LEDs
168 NET "led<7>" LOC = W6 | IOSTANDARD = LVCMOS33;
169 NET "led<6>" LOC = Y5 | IOSTANDARD = LVCMOS33;
170 NET "led<5>" LOC = W5 | IOSTANDARD = LVCMOS33;
171 NET "led<4>" LOC = W4 | IOSTANDARD = LVCMOS33;
172 NET "led<3>" LOC = Y3 | IOSTANDARD = LVCMOS33;
173 NET "led<2>" LOC = Y2 | IOSTANDARD = LVCMOS33;
174 NET "led<1>" LOC = Y1 | IOSTANDARD = LVCMOS33;
175 NET "led<0>" LOC = W2 | IOSTANDARD = LVCMOS33;
177 # seven segment display (5=left 0=right)
178 #
179 # segment assignment:
180 # .ABCDEFG
181 # 76543210
182 NET "dig0_seg<7>" LOC = E20 | IOSTANDARD = LVCMOS33;
183 NET "dig0_seg<6>" LOC = C22 | IOSTANDARD = LVCMOS33;
184 NET "dig0_seg<5>" LOC = E18 | IOSTANDARD = LVCMOS33;
185 NET "dig0_seg<4>" LOC = D20 | IOSTANDARD = LVCMOS33;
186 NET "dig0_seg<3>" LOC = D21 | IOSTANDARD = LVCMOS33;
187 NET "dig0_seg<2>" LOC = E19 | IOSTANDARD = LVCMOS33;
188 NET "dig0_seg<1>" LOC = G17 | IOSTANDARD = LVCMOS33;
189 NET "dig0_seg<0>" LOC = F19 | IOSTANDARD = LVCMOS33;
191 NET "dig1_seg<7>" LOC = F17 | IOSTANDARD = LVCMOS33;
192 NET "dig1_seg<6>" LOC = D18 | IOSTANDARD = LVCMOS33;
193 NET "dig1_seg<5>" LOC = B19 | IOSTANDARD = LVCMOS33;
194 NET "dig1_seg<4>" LOC = C18 | IOSTANDARD = LVCMOS33;
195 NET "dig1_seg<3>" LOC = C19 | IOSTANDARD = LVCMOS33;
196 NET "dig1_seg<2>" LOC = C20 | IOSTANDARD = LVCMOS33;
197 NET "dig1_seg<1>" LOC = F18 | IOSTANDARD = LVCMOS33;
198 NET "dig1_seg<0>" LOC = D19 | IOSTANDARD = LVCMOS33;
200 NET "dig2_seg<7>" LOC = A19 | IOSTANDARD = LVCMOS33;
201 NET "dig2_seg<6>" LOC = E17 | IOSTANDARD = LVCMOS33;
202 NET "dig2_seg<5>" LOC = C17 | IOSTANDARD = LVCMOS33;
203 NET "dig2_seg<4>" LOC = D17 | IOSTANDARD = LVCMOS33;
204 NET "dig2_seg<3>" LOC = B15 | IOSTANDARD = LVCMOS33;
205 NET "dig2_seg<2>" LOC = A18 | IOSTANDARD = LVCMOS33;
206 NET "dig2_seg<1>" LOC = B18 | IOSTANDARD = LVCMOS33;
207 NET "dig2_seg<0>" LOC = B17 | IOSTANDARD = LVCMOS33;
209 NET "dig3_seg<7>" LOC = D15 | IOSTANDARD = LVCMOS33;
210 NET "dig3_seg<6>" LOC = E13 | IOSTANDARD = LVCMOS33;
211 NET "dig3_seg<5>" LOC = B13 | IOSTANDARD = LVCMOS33;
212 NET "dig3_seg<4>" LOC = D13 | IOSTANDARD = LVCMOS33;
213 NET "dig3_seg<3>" LOC = D14 | IOSTANDARD = LVCMOS33;
214 NET "dig3_seg<2>" LOC = A14 | IOSTANDARD = LVCMOS33;
215 NET "dig3_seg<1>" LOC = E16 | IOSTANDARD = LVCMOS33;
216 NET "dig3_seg<0>" LOC = E15 | IOSTANDARD = LVCMOS33;
218 NET "dig4_seg<7>" LOC = D11 | IOSTANDARD = LVCMOS33;
219 NET "dig4_seg<6>" LOC = E9 | IOSTANDARD = LVCMOS33;
220 NET "dig4_seg<5>" LOC = A10 | IOSTANDARD = LVCMOS33;
221 NET "dig4_seg<4>" LOC = B9 | IOSTANDARD = LVCMOS33;
222 NET "dig4_seg<3>" LOC = A9 | IOSTANDARD = LVCMOS33;
223 NET "dig4_seg<2>" LOC = C10 | IOSTANDARD = LVCMOS33;
224 NET "dig4_seg<1>" LOC = A12 | IOSTANDARD = LVCMOS33;
225 NET "dig4_seg<0>" LOC = B10 | IOSTANDARD = LVCMOS33;
227 NET "dig5_seg<7>" LOC = C7 | IOSTANDARD = LVCMOS33;
228 NET "dig5_seg<6>" LOC = A4 | IOSTANDARD = LVCMOS33;
229 NET "dig5_seg<5>" LOC = B5 | IOSTANDARD = LVCMOS33;
230 NET "dig5_seg<4>" LOC = E6 | IOSTANDARD = LVCMOS33;
231 NET "dig5_seg<3>" LOC = C5 | IOSTANDARD = LVCMOS33;
232 NET "dig5_seg<2>" LOC = E7 | IOSTANDARD = LVCMOS33;
233 NET "dig5_seg<1>" LOC = B8 | IOSTANDARD = LVCMOS33;
234 NET "dig5_seg<0>" LOC = C6 | IOSTANDARD = LVCMOS33;
237 # Header A (left)
238 NET "header_a<2>" LOC = V7 | IOSTANDARD = LVCMOS33;
239 NET "header_a<3>" LOC = AA8 | IOSTANDARD = LVCMOS33;
240 NET "header_a<4>" LOC = AB8 | IOSTANDARD = LVCMOS33;
241 NET "header_a<5>" LOC = V8 | IOSTANDARD = LVCMOS33;
242 NET "header_a<6>" LOC = Y10 | IOSTANDARD = LVCMOS33;
243 NET "header_a<7>" LOC = V9 | IOSTANDARD = LVCMOS33;
244 NET "header_a<8>" LOC = W9 | IOSTANDARD = LVCMOS33;
245 NET "header_a<9>" LOC = AA10 | IOSTANDARD = LVCMOS33;
246 NET "header_a<10>" LOC = AB10 | IOSTANDARD = LVCMOS33;
247 NET "header_a<11>" LOC = W10 | IOSTANDARD = LVCMOS33;
248 NET "header_a<12>" LOC = AB11 | IOSTANDARD = LVCMOS33;
249 NET "header_a<13>" LOC = U11 | IOSTANDARD = LVCMOS33;
250 NET "header_a<14>" LOC = AB13 | IOSTANDARD = LVCMOS33;
251 NET "header_a<15>" LOC = AA13 | IOSTANDARD = LVCMOS33;
252 NET "header_a<16>" LOC = V10 | IOSTANDARD = LVCMOS33;
253 NET "header_a<17>" LOC = U10 | IOSTANDARD = LVCMOS33;
254 NET "header_a<18>" LOC = W13 | IOSTANDARD = LVCMOS33;
255 NET "header_a<19>" LOC = Y13 | IOSTANDARD = LVCMOS33;
257 # Header B (right)
258 NET "header_b<2>" LOC = V14 | IOSTANDARD = LVCMOS33;
259 NET "header_b<3>" LOC = V13 | IOSTANDARD = LVCMOS33;
260 NET "header_b<4>" LOC = AA15 | IOSTANDARD = LVCMOS33;
261 NET "header_b<5>" LOC = W14 | IOSTANDARD = LVCMOS33;
262 NET "header_b<6>" LOC = AB15 | IOSTANDARD = LVCMOS33;
263 NET "header_b<7>" LOC = Y16 | IOSTANDARD = LVCMOS33;
264 NET "header_b<8>" LOC = AA17 | IOSTANDARD = LVCMOS33;
265 NET "header_b<9>" LOC = AA18 | IOSTANDARD = LVCMOS33;
266 NET "header_b<10>" LOC = AB18 | IOSTANDARD = LVCMOS33;
267 NET "header_b<11>" LOC = Y18 | IOSTANDARD = LVCMOS33;
268 NET "header_b<12>" LOC = Y19 | IOSTANDARD = LVCMOS33;
269 NET "header_b<13>" LOC = AB20 | IOSTANDARD = LVCMOS33;
270 NET "header_b<14>" LOC = AA20 | IOSTANDARD = LVCMOS33;
271 NET "header_b<15>" LOC = U16 | IOSTANDARD = LVCMOS33;
272 NET "header_b<16>" LOC = V16 | IOSTANDARD = LVCMOS33;
273 NET "header_b<17>" LOC = V17 | IOSTANDARD = LVCMOS33;
274 NET "header_b<18>" LOC = W16 | IOSTANDARD = LVCMOS33;
275 NET "header_b<19>" LOC = W17 | IOSTANDARD = LVCMOS33;
277 # usused pins
278 CONFIG PROHIBIT = A3;
279 CONFIG PROHIBIT = A7;
280 CONFIG PROHIBIT = A11;
281 CONFIG PROHIBIT = A16;
282 CONFIG PROHIBIT = AA3;
283 CONFIG PROHIBIT = AA7;
284 CONFIG PROHIBIT = AA9;
285 CONFIG PROHIBIT = AA11;
286 CONFIG PROHIBIT = AA14;
287 CONFIG PROHIBIT = AA16;
288 CONFIG PROHIBIT = AA19;
289 CONFIG PROHIBIT = AB7;
290 CONFIG PROHIBIT = AB9;
291 CONFIG PROHIBIT = AB12;
292 CONFIG PROHIBIT = AB14;
293 CONFIG PROHIBIT = AB16;
294 CONFIG PROHIBIT = AB19;
295 CONFIG PROHIBIT = B4;
296 CONFIG PROHIBIT = B7;
297 CONFIG PROHIBIT = B12;
298 CONFIG PROHIBIT = B11;
299 CONFIG PROHIBIT = B16;
300 CONFIG PROHIBIT = C2;
301 CONFIG PROHIBIT = C3;
302 CONFIG PROHIBIT = C4;
303 CONFIG PROHIBIT = C12;
304 CONFIG PROHIBIT = C16;
305 CONFIG PROHIBIT = D2;
306 CONFIG PROHIBIT = D3;
307 CONFIG PROHIBIT = D4;
308 CONFIG PROHIBIT = D5;
309 CONFIG PROHIBIT = D8;
310 CONFIG PROHIBIT = D12;
311 CONFIG PROHIBIT = D16;
312 CONFIG PROHIBIT = E2;
313 CONFIG PROHIBIT = E3;
314 CONFIG PROHIBIT = E8;
315 CONFIG PROHIBIT = E4;
316 CONFIG PROHIBIT = E5;
317 CONFIG PROHIBIT = F4;
318 CONFIG PROHIBIT = E10;
319 CONFIG PROHIBIT = E12;
320 CONFIG PROHIBIT = F12;
321 CONFIG PROHIBIT = F5;
322 CONFIG PROHIBIT = F13;
323 CONFIG PROHIBIT = F6;
324 CONFIG PROHIBIT = F9;
325 CONFIG PROHIBIT = F10;
326 CONFIG PROHIBIT = F16;
327 CONFIG PROHIBIT = F11;
328 CONFIG PROHIBIT = F14;
329 CONFIG PROHIBIT = G3;
330 CONFIG PROHIBIT = G4;
331 CONFIG PROHIBIT = G5;
332 CONFIG PROHIBIT = G20;
333 CONFIG PROHIBIT = H1;
334 CONFIG PROHIBIT = H2;
335 CONFIG PROHIBIT = H4;
336 CONFIG PROHIBIT = H18;
337 CONFIG PROHIBIT = H19;
338 CONFIG PROHIBIT = H21;
339 CONFIG PROHIBIT = H22;
340 CONFIG PROHIBIT = J1;
341 CONFIG PROHIBIT = J2;
342 CONFIG PROHIBIT = J4;
343 CONFIG PROHIBIT = J5;
344 CONFIG PROHIBIT = J6;
345 CONFIG PROHIBIT = J17;
346 CONFIG PROHIBIT = J18;
347 CONFIG PROHIBIT = J19;
348 CONFIG PROHIBIT = J21;
349 CONFIG PROHIBIT = J22;
350 CONFIG PROHIBIT = K5;
351 CONFIG PROHIBIT = K6;
352 CONFIG PROHIBIT = K17;
353 CONFIG PROHIBIT = K18;
354 CONFIG PROHIBIT = N5;
355 CONFIG PROHIBIT = N6;
356 CONFIG PROHIBIT = N17;
357 CONFIG PROHIBIT = N18;
358 CONFIG PROHIBIT = N19;
359 CONFIG PROHIBIT = N20;
360 CONFIG PROHIBIT = P1;
361 CONFIG PROHIBIT = P2;
362 CONFIG PROHIBIT = P4;
363 CONFIG PROHIBIT = P5;
364 CONFIG PROHIBIT = P6;
365 CONFIG PROHIBIT = P17;
366 CONFIG PROHIBIT = P18;
367 CONFIG PROHIBIT = P19;
368 CONFIG PROHIBIT = P21;
369 CONFIG PROHIBIT = P22;
370 CONFIG PROHIBIT = R1;
371 CONFIG PROHIBIT = R2;
372 CONFIG PROHIBIT = R4;
373 CONFIG PROHIBIT = R5;
374 CONFIG PROHIBIT = R19;
375 CONFIG PROHIBIT = R21;
376 CONFIG PROHIBIT = R22;
377 CONFIG PROHIBIT = T3;
378 CONFIG PROHIBIT = T19;
379 CONFIG PROHIBIT = T20;
380 CONFIG PROHIBIT = U9;
381 CONFIG PROHIBIT = U12;
382 CONFIG PROHIBIT = U13;
383 CONFIG PROHIBIT = U14;
384 CONFIG PROHIBIT = U17;
385 CONFIG PROHIBIT = V11;
386 CONFIG PROHIBIT = V12;
387 CONFIG PROHIBIT = V15;
388 CONFIG PROHIBIT = W7;
389 CONFIG PROHIBIT = W8;
390 CONFIG PROHIBIT = W11;
391 CONFIG PROHIBIT = W12;
392 CONFIG PROHIBIT = W15;
393 CONFIG PROHIBIT = W18;
394 CONFIG PROHIBIT = Y4;
395 CONFIG PROHIBIT = Y7;
396 CONFIG PROHIBIT = Y11;
397 CONFIG PROHIBIT = Y12;