zpu/hdl/zpu4/src/io.vhd

   1 library ieee;
   2 use ieee.std_logic_1164.all;
   3 use ieee.numeric_std.all;
   4
   5 use std.textio.all;
   6
   7 library work;
   8 use work.zpu_config.all;
   9 use work.zpupkg.all;
  10 use work.txt_util.all;
  11
  12
  13 entity zpu_io is
  14     generic (
  15         log_file : string := "log.txt"
  16         );
  17     port(
  18         clk         : in  std_logic;
  19         areset      : in  std_logic;
  20         busy        : out std_logic;
  21         writeEnable : in  std_logic;
  22         readEnable  : in  std_logic;
  23         write       : in  std_logic_vector(wordSize-1 downto 0);
  24         read        : out std_logic_vector(wordSize-1 downto 0);
  25         addr        : in  std_logic_vector(maxAddrBit downto minAddrBit)
  26         );
  27 end entity zpu_io;
  28
  29
  30 architecture behave of zpu_io is
  31
  32     signal   timer_read  : std_logic_vector(7 downto 0);
  33     signal   timer_we    : std_logic;
  34     --
  35     signal   serving     : std_logic;
  36     --
  37     file l_file          : text open write_mode is log_file;
  38     constant lowAddrBits : std_logic_vector(minAddrBit-1 downto 0) := (others => '0');
  39     constant tx_full     : std_logic                               := '0';
  40     constant rx_empty    : std_logic                               := '1';
  41
  42 begin
  43
  44
  45     timerinst : timer
  46         port map (
  47             clk    => clk,
  48             areset => areset,
  49             we     => timer_we,
  50             din    => write(7 downto 0),
  51             adr    => addr(4 downto 2),
  52             dout   => timer_read
  53             );
  54
  55     busy     <= writeEnable or readEnable;
  56     timer_we <= writeEnable and addr(12);
  57
  58     process(areset, clk)
  59         variable taddr    : std_logic_vector(maxAddrBit downto 0);
  60         -- pragma translate_off
  61         variable line_out : line := new string'("");
  62         variable char     : character;
  63         -- pragma translate_on
  64     begin
  65         taddr                               := (others => '0');
  66         taddr(maxAddrBit downto minAddrBit) := addr;
  67
  68         if (areset = '1') then
  69         elsif (clk'event and clk = '1') then
  70             if writeEnable = '1' then
  71                 -- external interface (fixed address)
  72                 --<JK> extend compare to avoid waring messages
  73                 if ("1" & addr & lowAddrBits) = x"80a000c" then
  74                     -- Write to UART
  75                     report "Write to UART[0]" & " :0x" & hstr(write);
  76                     -- pragma translate_off
  77                     char := character'val(to_integer(unsigned(write)));
  78                     if char = lf then
  79                         std.textio.writeline(l_file, line_out);
  80                     else
  81                         std.textio.write(line_out, char);
  82                     end if;
  83                     -- pragma translate_on
  84
  85                 elsif addr(12) = '1' then
  86                     report "Write to TIMER" & " :0x" & hstr(write);
  87
  88                 else
  89
  90                     report "Illegal IO write @" & "0x" & hstr(taddr) severity warning;
  91                 end if;
  92
  93             end if;
  94             read <= (others => '0');
  95             if (readEnable = '1') then
  96                 --<JK> extend compare to avoid waring messages
  97                 if ("1" & addr & lowAddrBits) = x"80a000c" then
  98                     report "Read UART[0]";
  99                     read(8) <= not tx_full;            -- output fifo not full
 100                     read(9) <= not rx_empty;           -- receiver not empty
 101                 elsif ("1" & addr & lowAddrBits) = x"80a0010" then
 102                     report "Read UART[1]";
 103                     read(8)          <= not rx_empty;  -- receiver not empty
 104                     read(7 downto 0) <= (others => '0');
 105                 elsif addr(12) = '1' then
 106                     report "Read TIMER";
 107                     read(7 downto 0) <= timer_read;
 108                 elsif addr(11) = '1' then
 109                     report "Read ZPU Freq";
 110                     read(7 downto 0) <= ZPU_Frequency;
 111                 else
 112                     report "Illegal IO read @" & "0x" & hstr(taddr) severity warning;
 113                 end if;
 114             end if;
 115         end if;
 116     end process;
 117
 118 end architecture behave;
 119