toolchain/binutils/opcodes/ia64-opc-x.c

   1 /* ia64-opc-x.c -- IA-64 `X' opcode table.
   2    Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
   3    Contributed by Timothy Wall <twall@cygnus.com>
   4
   5    This file is part of GDB, GAS, and the GNU binutils.
   6
   7    GDB, GAS, and the GNU binutils are free software; you can redistribute
   8    them and/or modify them under the terms of the GNU General Public
   9    License as published by the Free Software Foundation; either version
  10    2, or (at your option) any later version.
  11
  12    GDB, GAS, and the GNU binutils are distributed in the hope that they
  13    will be useful, but WITHOUT ANY WARRANTY; without even the implied
  14    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  15    the GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this file; see the file COPYING.  If not, write to the
  19    Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA
  20    02111-1307, USA.  */
  21
  22 #include "ia64-opc.h"
  23
  24 /* Identify the specific X-unit type.  */
  25 #define X0      IA64_TYPE_X, 0
  26 #define X       IA64_TYPE_X, 1
  27
  28 /* Instruction bit fields:  */
  29 #define bBtype(x)       (((ia64_insn) ((x) & 0x7)) << 6)
  30 #define bD(x)           (((ia64_insn) ((x) & 0x1)) << 35)
  31 #define bPa(x)          (((ia64_insn) ((x) & 0x1)) << 12)
  32 #define bPr(x)          (((ia64_insn) ((x) & 0x3f)) << 0)
  33 #define bVc(x)          (((ia64_insn) ((x) & 0x1)) << 20)
  34 #define bWha(x)         (((ia64_insn) ((x) & 0x3)) << 33)
  35 #define bX3(x)          (((ia64_insn) ((x) & 0x7)) << 33)
  36 #define bX6(x)          (((ia64_insn) ((x) & 0x3f)) << 27)
  37 #define bY(x)           (((ia64_insn) ((x) & 0x1)) << 26)
  38
  39 #define mBtype          bBtype (-1)
  40 #define mD              bD (-1)
  41 #define mPa             bPa (-1)
  42 #define mPr             bPr (-1)
  43 #define mVc             bVc (-1)
  44 #define mWha            bWha (-1)
  45 #define mX3             bX3 (-1)
  46 #define mX6             bX6 (-1)
  47 #define mY              bY (-1)
  48
  49 #define OpX3X6(a,b,c)           (bOp (a) | bX3 (b) | bX6(c)), \
  50                                 (mOp | mX3 | mX6)
  51 #define OpX3X6Y(a,b,c,d)        (bOp (a) | bX3 (b) | bX6(c) | bY(d)), \
  52                                 (mOp | mX3 | mX6 | mY)
  53 #define OpVc(a,b)               (bOp (a) | bVc (b)), (mOp | mVc)
  54 #define OpPaWhaD(a,b,c,d) \
  55         (bOp (a) | bPa (b) | bWha (c) | bD (d)), (mOp | mPa | mWha | mD)
  56 #define OpBtypePaWhaD(a,b,c,d,e) \
  57         (bOp (a) | bBtype (b) | bPa (c) | bWha (d) | bD (e)), \
  58         (mOp | mBtype | mPa | mWha | mD)
  59 #define OpBtypePaWhaDPr(a,b,c,d,e,f) \
  60         (bOp (a) | bBtype (b) | bPa (c) | bWha (d) | bD (e) | bPr (f)), \
  61         (mOp | mBtype | mPa | mWha | mD | mPr)
  62
  63 struct ia64_opcode ia64_opcodes_x[] =
  64   {
  65     {"break.x", X0, OpX3X6 (0, 0, 0x00), {IMMU62}, 0, 0, NULL},
  66     {"nop.x",   X0, OpX3X6Y (0, 0, 0x01, 0), {IMMU62}, 0, 0, NULL},
  67     {"hint.x",  X0, OpX3X6Y (0, 0, 0x01, 1), {IMMU62}, 0, 0, NULL},
  68     {"movl",    X,  OpVc (6, 0), {R1, IMMU64}, 0, 0, NULL},
  69 #define BRL(a,b) \
  70       X0, OpBtypePaWhaDPr (0xC, 0, a, 0, b, 0), {TGT64}, PSEUDO, 0, NULL
  71     {"brl.few",         BRL (0, 0)},
  72     {"brl",             BRL (0, 0)},
  73     {"brl.few.clr",     BRL (0, 1)},
  74     {"brl.clr",         BRL (0, 1)},
  75     {"brl.many",        BRL (1, 0)},
  76     {"brl.many.clr",    BRL (1, 1)},
  77 #undef BRL
  78 #define BRL(a,b,c) \
  79       X0, OpBtypePaWhaD (0xC, 0, a, b, c), {TGT64}, 0, 0, NULL
  80 #define BRLP(a,b,c) \
  81       X0, OpBtypePaWhaD (0xC, 0, a, b, c), {TGT64}, PSEUDO, 0, NULL
  82     {"brl.cond.sptk.few",       BRL (0, 0, 0)},
  83     {"brl.cond.sptk",           BRLP (0, 0, 0)},
  84     {"brl.cond.sptk.few.clr",   BRL (0, 0, 1)},
  85     {"brl.cond.sptk.clr",       BRLP (0, 0, 1)},
  86     {"brl.cond.spnt.few",       BRL (0, 1, 0)},
  87     {"brl.cond.spnt",           BRLP (0, 1, 0)},
  88     {"brl.cond.spnt.few.clr",   BRL (0, 1, 1)},
  89     {"brl.cond.spnt.clr",       BRLP (0, 1, 1)},
  90     {"brl.cond.dptk.few",       BRL (0, 2, 0)},
  91     {"brl.cond.dptk",           BRLP (0, 2, 0)},
  92     {"brl.cond.dptk.few.clr",   BRL (0, 2, 1)},
  93     {"brl.cond.dptk.clr",       BRLP (0, 2, 1)},
  94     {"brl.cond.dpnt.few",       BRL (0, 3, 0)},
  95     {"brl.cond.dpnt",           BRLP (0, 3, 0)},
  96     {"brl.cond.dpnt.few.clr",   BRL (0, 3, 1)},
  97     {"brl.cond.dpnt.clr",       BRLP (0, 3, 1)},
  98     {"brl.cond.sptk.many",      BRL (1, 0, 0)},
  99     {"brl.cond.sptk.many.clr",  BRL (1, 0, 1)},
 100     {"brl.cond.spnt.many",      BRL (1, 1, 0)},
 101     {"brl.cond.spnt.many.clr",  BRL (1, 1, 1)},
 102     {"brl.cond.dptk.many",      BRL (1, 2, 0)},
 103     {"brl.cond.dptk.many.clr",  BRL (1, 2, 1)},
 104     {"brl.cond.dpnt.many",      BRL (1, 3, 0)},
 105     {"brl.cond.dpnt.many.clr",  BRL (1, 3, 1)},
 106     {"brl.sptk.few",            BRL (0, 0, 0)},
 107     {"brl.sptk",                BRLP (0, 0, 0)},
 108     {"brl.sptk.few.clr",        BRL (0, 0, 1)},
 109     {"brl.sptk.clr",            BRLP (0, 0, 1)},
 110     {"brl.spnt.few",            BRL (0, 1, 0)},
 111     {"brl.spnt",                BRLP (0, 1, 0)},
 112     {"brl.spnt.few.clr",        BRL (0, 1, 1)},
 113     {"brl.spnt.clr",            BRLP (0, 1, 1)},
 114     {"brl.dptk.few",            BRL (0, 2, 0)},
 115     {"brl.dptk",                BRLP (0, 2, 0)},
 116     {"brl.dptk.few.clr",        BRL (0, 2, 1)},
 117     {"brl.dptk.clr",            BRLP (0, 2, 1)},
 118     {"brl.dpnt.few",            BRL (0, 3, 0)},
 119     {"brl.dpnt",                BRLP (0, 3, 0)},
 120     {"brl.dpnt.few.clr",        BRL (0, 3, 1)},
 121     {"brl.dpnt.clr",            BRLP (0, 3, 1)},
 122     {"brl.sptk.many",           BRL (1, 0, 0)},
 123     {"brl.sptk.many.clr",       BRL (1, 0, 1)},
 124     {"brl.spnt.many",           BRL (1, 1, 0)},
 125     {"brl.spnt.many.clr",       BRL (1, 1, 1)},
 126     {"brl.dptk.many",           BRL (1, 2, 0)},
 127     {"brl.dptk.many.clr",       BRL (1, 2, 1)},
 128     {"brl.dpnt.many",           BRL (1, 3, 0)},
 129     {"brl.dpnt.many.clr",       BRL (1, 3, 1)},
 130 #undef BRL
 131 #undef BRLP
 132 #define BRL(a,b,c) X, OpPaWhaD (0xD, a, b, c), {B1, TGT64}, 0, 0, NULL
 133 #define BRLP(a,b,c) X, OpPaWhaD (0xD, a, b, c), {B1, TGT64}, PSEUDO, 0, NULL
 134     {"brl.call.sptk.few",       BRL (0, 0, 0)},
 135     {"brl.call.sptk",           BRLP (0, 0, 0)},
 136     {"brl.call.sptk.few.clr",   BRL (0, 0, 1)},
 137     {"brl.call.sptk.clr",       BRLP (0, 0, 1)},
 138     {"brl.call.spnt.few",       BRL (0, 1, 0)},
 139     {"brl.call.spnt",           BRLP (0, 1, 0)},
 140     {"brl.call.spnt.few.clr",   BRL (0, 1, 1)},
 141     {"brl.call.spnt.clr",       BRLP (0, 1, 1)},
 142     {"brl.call.dptk.few",       BRL (0, 2, 0)},
 143     {"brl.call.dptk",           BRLP (0, 2, 0)},
 144     {"brl.call.dptk.few.clr",   BRL (0, 2, 1)},
 145     {"brl.call.dptk.clr",       BRLP (0, 2, 1)},
 146     {"brl.call.dpnt.few",       BRL (0, 3, 0)},
 147     {"brl.call.dpnt",           BRLP (0, 3, 0)},
 148     {"brl.call.dpnt.few.clr",   BRL (0, 3, 1)},
 149     {"brl.call.dpnt.clr",       BRLP (0, 3, 1)},
 150     {"brl.call.sptk.many",      BRL (1, 0, 0)},
 151     {"brl.call.sptk.many.clr",  BRL (1, 0, 1)},
 152     {"brl.call.spnt.many",      BRL (1, 1, 0)},
 153     {"brl.call.spnt.many.clr",  BRL (1, 1, 1)},
 154     {"brl.call.dptk.many",      BRL (1, 2, 0)},
 155     {"brl.call.dptk.many.clr",  BRL (1, 2, 1)},
 156     {"brl.call.dpnt.many",      BRL (1, 3, 0)},
 157     {"brl.call.dpnt.many.clr",  BRL (1, 3, 1)},
 158 #undef BRL
 159 #undef BRLP
 160     {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
 161   };
 162
 163 #undef X0
 164 #undef X
 165
 166 #undef bBtype
 167 #undef bD
 168 #undef bPa
 169 #undef bPr
 170 #undef bVc
 171 #undef bWha
 172 #undef bX3
 173 #undef bX6
 174
 175 #undef mBtype
 176 #undef mD
 177 #undef mPa
 178 #undef mPr
 179 #undef mVc
 180 #undef mWha
 181 #undef mX3
 182 #undef mX6
 183
 184 #undef OpX3X6
 185 #undef OpVc
 186 #undef OpPaWhaD
 187 #undef OpBtypePaWhaD
 188 #undef OpBtypePaWhaDPr