toolchain/binutils/opcodes/zpu-opc.c

   1 /* zpu-opc.c -- Motorola 68HC11 & 68HC12 opcode list
   2    Copyright 1999, 2000, 2002 Free Software Foundation, Inc.
   3    Written by Stephane Carrez (stcarrez@nerim.fr)
   4
   5 This file is part of GDB, GAS, and the GNU binutils.
   6
   7 GDB, GAS, and the GNU binutils are free software; you can redistribute
   8 them and/or modify them under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either version
  10 2, or (at your option) any later version.
  11
  12 GDB, GAS, and the GNU binutils are distributed in the hope that they
  13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  15 the GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this file; see the file COPYING.  If not, write to the Free
  19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20 */
  21
  22 #include <stdio.h>
  23 #include "ansidecl.h"
  24 #include "opcode/zpu.h"
  25
  26 #define TABLE_SIZE(X)       (sizeof(X) / sizeof(X[0]))
  27
  28 const struct zpu_opcode zpu_opcodes[]={
  29         {ZPU_breakpoint,                "breakpoint",           ADDR_IMPLIED},
  30         {ZPU_push_pc,                   "pushpc",                       ADDR_IMPLIED},
  31         {ZPU_or,                                "or",                           ADDR_IMPLIED},
  32         {ZPU_not,                               "not",                          ADDR_IMPLIED},
  33         {ZPU_load,                              "load",                         ADDR_IMPLIED},
  34         {ZPU_store,                             "store",                        ADDR_IMPLIED},
  35         {ZPU_pop_pc,                    "poppc",                        ADDR_IMPLIED},
  36         {ZPU_flip,                              "flip",                         ADDR_IMPLIED},
  37         {ZPU_add,                               "add",                          ADDR_IMPLIED},
  38         {ZPU_push_sp,                   "pushsp",                       ADDR_IMPLIED},
  39         {ZPU_pop_sp,                    "popsp",                        ADDR_IMPLIED},
  40         {ZPU_nop,                               "nop",                          ADDR_IMPLIED},
  41         {ZPU_and,                               "and",                          ADDR_IMPLIED},
  42
  43         {ZPU_loadsp,                    "loadsp",                       ADDR_IMMEDIATE},
  44         {ZPU_storesp,                   "storesp",                      ADDR_IMMEDIATE},
  45
  46         {ZPU_loadb,                             "loadb",                        ADDR_IMPLIED},
  47         {ZPU_storeb,                    "storeb",                       ADDR_IMPLIED},
  48         {ZPU_loadh,                             "loadh",                        ADDR_IMPLIED},
  49         {ZPU_storeh,                    "storeh",                       ADDR_IMPLIED},
  50
  51         {ZPU_lessthan,                  "lessthan",                     ADDR_IMPLIED},
  52         {ZPU_lessthanorequal,   "lessthanorequal",      ADDR_IMPLIED},
  53         {ZPU_ulessthan,                 "ulessthan",            ADDR_IMPLIED},
  54         {ZPU_ulessthanorequal,  "ulessthanorequal",     ADDR_IMPLIED},
  55
  56         {ZPU_mult,                              "mult",                         ADDR_IMPLIED},
  57         {ZPU_halfmult,                  "halfmult"      ,               ADDR_IMPLIED},
  58         {ZPU_swap,                              "swap",                         ADDR_IMPLIED},
  59         {ZPU_div,                               "div",                          ADDR_IMPLIED},
  60         {ZPU_mod,                               "mod",                          ADDR_IMPLIED},
  61         {ZPU_eqbranch,                  "eqbranch",                     ADDR_IMPLIED},
  62         {ZPU_neqbranch,                 "neqbranch",            ADDR_IMPLIED},
  63
  64         {ZPU_poppcrel,                  "poppcrel",                     ADDR_IMPLIED},
  65
  66         {ZPU_config,                    "config",                       ADDR_IMPLIED},
  67         {ZPU_movebyte,                  "movebyte",                     ADDR_IMPLIED},
  68         {ZPU_syscall,                   "syscall",                      ADDR_IMPLIED},
  69         {ZPU_pushspadd,                 "pushspadd",            ADDR_IMPLIED},
  70         {ZPU_callpcrel,                 "callpcrel",            ADDR_IMPLIED},
  71
  72         {ZPU_lshiftright,               "lshiftright",          ADDR_IMPLIED},
  73         {ZPU_ashiftleft,                "ashiftleft",           ADDR_IMPLIED},
  74
  75         {ZPU_ashiftright,               "ashiftright",          ADDR_IMPLIED},
  76
  77         {ZPU_call,                              "call",                         ADDR_IMPLIED},
  78
  79         {ZPU_eq,                                "eq",                           ADDR_IMPLIED},
  80
  81         {ZPU_neq,                               "neq",                          ADDR_IMPLIED},
  82
  83         {ZPU_neg,                               "neg",                          ADDR_IMPLIED},
  84
  85         {ZPU_impcrel,                   "impcrel",                      ADDR_PCREL},
  86
  87         {ZPU_sub,                               "sub",                          ADDR_IMPLIED},
  88
  89         {ZPU_addsp,                             "addsp",                        ADDR_IMMEDIATE},
  90
  91         {ZPU_xor,                               "xor",                          ADDR_IMPLIED},
  92
  93
  94         {ZPU_im,                                "im",                           ADDR_IMMEDIATE},
  95
  96         {ZPU_im14,                              "im14",                         ADDR_IMMEDIATE},
  97
  98 };
  99
 100
 101 const int zpu_num_opcodes = TABLE_SIZE (zpu_opcodes);
 102
 103