1 /* m32r exception, interrupt, and trap (EIT) support
2 Copyright (C) 1998, 2003 Free Software Foundation, Inc.
3 Contributed by Renesas.
5 This file is part of GDB, the GNU debugger.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
23 #include "targ-vals.h"
32 #include <sys/resource.h>
33 #include <sys/sysinfo.h>
36 #include <sys/timeb.h>
37 #include <sys/timex.h>
38 #include <sys/types.h>
40 #include <sys/utsname.h>
42 #include <linux/module.h>
43 #include <linux/sysctl.h>
44 #include <linux/types.h>
45 #include <linux/unistd.h>
47 #define TRAP_ELF_SYSCALL 0
48 #define TRAP_LINUX_SYSCALL 2
49 #define TRAP_FLUSH_CACHE 12
51 /* The semantic code invokes this for invalid (unrecognized) instructions. */
54 sim_engine_invalid_insn (SIM_CPU
*current_cpu
, IADDR cia
, SEM_PC vpc
)
56 SIM_DESC sd
= CPU_STATE (current_cpu
);
59 if (STATE_ENVIRONMENT (sd
) == OPERATING_ENVIRONMENT
)
61 h_bsm_set (current_cpu
, h_sm_get (current_cpu
));
62 h_bie_set (current_cpu
, h_ie_get (current_cpu
));
63 h_bcond_set (current_cpu
, h_cond_get (current_cpu
));
65 h_ie_set (current_cpu
, 0);
66 h_cond_set (current_cpu
, 0);
68 h_bpc_set (current_cpu
, cia
);
70 sim_engine_restart (CPU_STATE (current_cpu
), current_cpu
, NULL
,
75 sim_engine_halt (sd
, current_cpu
, NULL
, cia
, sim_stopped
, SIM_SIGILL
);
79 /* Process an address exception. */
82 m32r_core_signal (SIM_DESC sd
, SIM_CPU
*current_cpu
, sim_cia cia
,
83 unsigned int map
, int nr_bytes
, address_word addr
,
84 transfer_type transfer
, sim_core_signals sig
)
86 if (STATE_ENVIRONMENT (sd
) == OPERATING_ENVIRONMENT
)
88 m32rbf_h_cr_set (current_cpu
, H_CR_BBPC
,
89 m32rbf_h_cr_get (current_cpu
, H_CR_BPC
));
90 if (MACH_NUM (CPU_MACH (current_cpu
)) == MACH_M32R
)
92 m32rbf_h_bpsw_set (current_cpu
, m32rbf_h_psw_get (current_cpu
));
94 m32rbf_h_psw_set (current_cpu
, m32rbf_h_psw_get (current_cpu
) & 0x80);
96 else if (MACH_NUM (CPU_MACH (current_cpu
)) == MACH_M32RX
)
98 m32rxf_h_bpsw_set (current_cpu
, m32rxf_h_psw_get (current_cpu
));
100 m32rxf_h_psw_set (current_cpu
, m32rxf_h_psw_get (current_cpu
) & 0x80);
104 m32r2f_h_bpsw_set (current_cpu
, m32r2f_h_psw_get (current_cpu
));
106 m32r2f_h_psw_set (current_cpu
, m32r2f_h_psw_get (current_cpu
) & 0x80);
108 m32rbf_h_cr_set (current_cpu
, H_CR_BPC
, cia
);
110 sim_engine_restart (CPU_STATE (current_cpu
), current_cpu
, NULL
,
114 sim_core_signal (sd
, current_cpu
, cia
, map
, nr_bytes
, addr
,
118 /* Read/write functions for system call interface. */
121 syscall_read_mem (host_callback
*cb
, struct cb_syscall
*sc
,
122 unsigned long taddr
, char *buf
, int bytes
)
124 SIM_DESC sd
= (SIM_DESC
) sc
->p1
;
125 SIM_CPU
*cpu
= (SIM_CPU
*) sc
->p2
;
127 return sim_core_read_buffer (sd
, cpu
, read_map
, buf
, taddr
, bytes
);
131 syscall_write_mem (host_callback
*cb
, struct cb_syscall
*sc
,
132 unsigned long taddr
, const char *buf
, int bytes
)
134 SIM_DESC sd
= (SIM_DESC
) sc
->p1
;
135 SIM_CPU
*cpu
= (SIM_CPU
*) sc
->p2
;
137 return sim_core_write_buffer (sd
, cpu
, write_map
, buf
, taddr
, bytes
);
140 /* Translate target's address to host's address. */
143 t2h_addr (host_callback
*cb
, struct cb_syscall
*sc
,
146 extern sim_core_trans_addr (SIM_DESC
, sim_cpu
*, unsigned, address_word
);
148 SIM_DESC sd
= (SIM_DESC
) sc
->p1
;
149 SIM_CPU
*cpu
= (SIM_CPU
*) sc
->p2
;
154 return sim_core_trans_addr (sd
, cpu
, read_map
, taddr
);
158 conv_endian (unsigned int tvalue
)
161 unsigned int t1
, t2
, t3
, t4
;
163 if (CURRENT_HOST_BYTE_ORDER
== LITTLE_ENDIAN
)
165 t1
= tvalue
& 0xff000000;
166 t2
= tvalue
& 0x00ff0000;
167 t3
= tvalue
& 0x0000ff00;
168 t4
= tvalue
& 0x000000ff;
181 static unsigned short
182 conv_endian16 (unsigned short tvalue
)
184 unsigned short hvalue
;
185 unsigned short t1
, t2
;
187 if (CURRENT_HOST_BYTE_ORDER
== LITTLE_ENDIAN
)
189 t1
= tvalue
& 0xff00;
190 t2
= tvalue
& 0x00ff;
202 translate_endian(void *addr
, size_t size
)
204 unsigned int *p
= (unsigned int *) addr
;
207 for (i
= 0; i
<= size
- 4; i
+= 4,p
++)
208 *p
= conv_endian(*p
);
211 *((unsigned short *) p
) = conv_endian16(*((unsigned short *) p
));
215 The result is the pc address to continue at.
216 Preprocessing like saving the various registers has already been done. */
219 m32r_trap (SIM_CPU
*current_cpu
, PCADDR pc
, int num
)
221 SIM_DESC sd
= CPU_STATE (current_cpu
);
222 host_callback
*cb
= STATE_CALLBACK (sd
);
224 #ifdef SIM_HAVE_BREAKPOINTS
225 /* Check for breakpoints "owned" by the simulator first, regardless
227 if (num
== TRAP_BREAKPOINT
)
229 /* First try sim-break.c. If it's a breakpoint the simulator "owns"
230 it doesn't return. Otherwise it returns and let's us try. */
231 sim_handle_breakpoint (sd
, current_cpu
, pc
);
238 case TRAP_ELF_SYSCALL
:
242 CB_SYSCALL_INIT (&s
);
243 s
.func
= m32rbf_h_gr_get (current_cpu
, 0);
244 s
.arg1
= m32rbf_h_gr_get (current_cpu
, 1);
245 s
.arg2
= m32rbf_h_gr_get (current_cpu
, 2);
246 s
.arg3
= m32rbf_h_gr_get (current_cpu
, 3);
248 if (s
.func
== TARGET_SYS_exit
)
250 sim_engine_halt (sd
, current_cpu
, NULL
, pc
, sim_exited
, s
.arg1
);
254 s
.p2
= (PTR
) current_cpu
;
255 s
.read_mem
= syscall_read_mem
;
256 s
.write_mem
= syscall_write_mem
;
258 m32rbf_h_gr_set (current_cpu
, 2, s
.errcode
);
259 m32rbf_h_gr_set (current_cpu
, 0, s
.result
);
260 m32rbf_h_gr_set (current_cpu
, 1, s
.result2
);
264 case TRAP_LINUX_SYSCALL
:
267 unsigned int func
, arg1
, arg2
, arg3
, arg4
, arg5
, arg6
, arg7
;
268 int result
, result2
, errcode
;
270 if (STATE_ENVIRONMENT (sd
) == OPERATING_ENVIRONMENT
)
272 /* The new pc is the trap vector entry.
273 We assume there's a branch there to some handler.
274 Use cr5 as EVB (EIT Vector Base) register. */
275 USI new_pc
= m32rbf_h_cr_get (current_cpu
, 5) + 0x40 + num
* 4;
279 func
= m32rbf_h_gr_get (current_cpu
, 7);
280 arg1
= m32rbf_h_gr_get (current_cpu
, 0);
281 arg2
= m32rbf_h_gr_get (current_cpu
, 1);
282 arg3
= m32rbf_h_gr_get (current_cpu
, 2);
283 arg4
= m32rbf_h_gr_get (current_cpu
, 3);
284 arg5
= m32rbf_h_gr_get (current_cpu
, 4);
285 arg6
= m32rbf_h_gr_get (current_cpu
, 5);
286 arg7
= m32rbf_h_gr_get (current_cpu
, 6);
288 CB_SYSCALL_INIT (&s
);
295 s
.p2
= (PTR
) current_cpu
;
296 s
.read_mem
= syscall_read_mem
;
297 s
.write_mem
= syscall_write_mem
;
306 sim_engine_halt (sd
, current_cpu
, NULL
, pc
, sim_exited
, arg1
);
310 result
= read(arg1
, t2h_addr(cb
, &s
, arg2
), arg3
);
315 result
= write(arg1
, t2h_addr(cb
, &s
, arg2
), arg3
);
320 result
= open((char *) t2h_addr(cb
, &s
, arg1
), arg2
, arg3
);
325 result
= close(arg1
);
330 result
= creat((char *) t2h_addr(cb
, &s
, arg1
), arg2
);
335 result
= link((char *) t2h_addr(cb
, &s
, arg1
),
336 (char *) t2h_addr(cb
, &s
, arg2
));
341 result
= unlink((char *) t2h_addr(cb
, &s
, arg1
));
346 result
= chdir((char *) t2h_addr(cb
, &s
, arg1
));
356 result
= (int) time(NULL
);
361 result
= (int) time(&t
);
367 translate_endian((void *) &t
, sizeof(t
));
368 if ((s
.write_mem
) (cb
, &s
, arg1
, (char *) &t
, sizeof(t
)) != sizeof(t
))
378 result
= mknod((char *) t2h_addr(cb
, &s
, arg1
),
379 (mode_t
) arg2
, (dev_t
) arg3
);
384 result
= chmod((char *) t2h_addr(cb
, &s
, arg1
), (mode_t
) arg2
);
389 result
= lchown((char *) t2h_addr(cb
, &s
, arg1
),
390 (uid_t
) arg2
, (gid_t
) arg3
);
395 result
= (int) lseek(arg1
, (off_t
) arg2
, arg3
);
415 result
= utime((char *) t2h_addr(cb
, &s
, arg1
), NULL
);
420 buf
= *((struct utimbuf
*) t2h_addr(cb
, &s
, arg2
));
421 translate_endian((void *) &buf
, sizeof(buf
));
422 result
= utime((char *) t2h_addr(cb
, &s
, arg1
), &buf
);
429 result
= access((char *) t2h_addr(cb
, &s
, arg1
), arg2
);
443 t
.time
= conv_endian(t
.time
);
444 t
.millitm
= conv_endian16(t
.millitm
);
445 t
.timezone
= conv_endian16(t
.timezone
);
446 t
.dstflag
= conv_endian16(t
.dstflag
);
447 if ((s
.write_mem
) (cb
, &s
, arg1
, (char *) &t
, sizeof(t
))
461 result
= rename((char *) t2h_addr(cb
, &s
, arg1
),
462 (char *) t2h_addr(cb
, &s
, arg2
));
467 result
= mkdir((char *) t2h_addr(cb
, &s
, arg1
), arg2
);
472 result
= rmdir((char *) t2h_addr(cb
, &s
, arg1
));
482 result
= brk((void *) arg1
);
503 result
= ioctl(arg1
, arg2
, arg3
);
508 result
= fcntl(arg1
, arg2
, arg3
);
516 result
= ustat(arg1
, &ubuf
);
522 ubuf
.f_tfree
= conv_endian(ubuf
.f_tfree
);
523 ubuf
.f_tinode
= conv_endian(ubuf
.f_tinode
);
524 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &ubuf
, sizeof(ubuf
))
534 result
= dup2(arg1
, arg2
);
552 result
= getrlimit(arg1
, &rlim
);
558 translate_endian((void *) &rlim
, sizeof(rlim
));
559 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &rlim
, sizeof(rlim
))
572 result
= getrusage(arg1
, &usage
);
578 translate_endian((void *) &usage
, sizeof(usage
));
579 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &usage
, sizeof(usage
))
588 case __NR_gettimeofday
:
593 result
= gettimeofday(&tv
, &tz
);
599 translate_endian((void *) &tv
, sizeof(tv
));
600 if ((s
.write_mem
) (cb
, &s
, arg1
, (char *) &tv
, sizeof(tv
))
607 translate_endian((void *) &tz
, sizeof(tz
));
608 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &tz
, sizeof(tz
))
622 list
= (gid_t
*) malloc(arg1
* sizeof(gid_t
));
624 result
= getgroups(arg1
, list
);
630 translate_endian((void *) list
, arg1
* sizeof(gid_t
));
632 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) list
, arg1
* sizeof(gid_t
))
633 != arg1
* sizeof(gid_t
))
653 struct timeval
*ttimeoutp
;
654 struct timeval timeout
;
658 treadfdsp
= (fd_set
*) arg2
;
659 if (treadfdsp
!= NULL
)
661 readfds
= *((fd_set
*) t2h_addr(cb
, &s
, (unsigned int) treadfdsp
));
662 translate_endian((void *) &readfds
, sizeof(readfds
));
663 hreadfdsp
= &readfds
;
668 twritefdsp
= (fd_set
*) arg3
;
669 if (twritefdsp
!= NULL
)
671 writefds
= *((fd_set
*) t2h_addr(cb
, &s
, (unsigned int) twritefdsp
));
672 translate_endian((void *) &writefds
, sizeof(writefds
));
673 hwritefdsp
= &writefds
;
678 texceptfdsp
= (fd_set
*) arg4
;
679 if (texceptfdsp
!= NULL
)
681 exceptfds
= *((fd_set
*) t2h_addr(cb
, &s
, (unsigned int) texceptfdsp
));
682 translate_endian((void *) &exceptfds
, sizeof(exceptfds
));
683 hexceptfdsp
= &exceptfds
;
688 ttimeoutp
= (struct timeval
*) arg5
;
689 timeout
= *((struct timeval
*) t2h_addr(cb
, &s
, (unsigned int) ttimeoutp
));
690 translate_endian((void *) &timeout
, sizeof(timeout
));
692 result
= select(n
, hreadfdsp
, hwritefdsp
, hexceptfdsp
, &timeout
);
698 if (treadfdsp
!= NULL
)
700 translate_endian((void *) &readfds
, sizeof(readfds
));
701 if ((s
.write_mem
) (cb
, &s
, (unsigned long) treadfdsp
,
702 (char *) &readfds
, sizeof(readfds
)) != sizeof(readfds
))
709 if (twritefdsp
!= NULL
)
711 translate_endian((void *) &writefds
, sizeof(writefds
));
712 if ((s
.write_mem
) (cb
, &s
, (unsigned long) twritefdsp
,
713 (char *) &writefds
, sizeof(writefds
)) != sizeof(writefds
))
720 if (texceptfdsp
!= NULL
)
722 translate_endian((void *) &exceptfds
, sizeof(exceptfds
));
723 if ((s
.write_mem
) (cb
, &s
, (unsigned long) texceptfdsp
,
724 (char *) &exceptfds
, sizeof(exceptfds
)) != sizeof(exceptfds
))
731 translate_endian((void *) &timeout
, sizeof(timeout
));
732 if ((s
.write_mem
) (cb
, &s
, (unsigned long) ttimeoutp
,
733 (char *) &timeout
, sizeof(timeout
)) != sizeof(timeout
))
742 result
= symlink((char *) t2h_addr(cb
, &s
, arg1
),
743 (char *) t2h_addr(cb
, &s
, arg2
));
748 result
= readlink((char *) t2h_addr(cb
, &s
, arg1
),
749 (char *) t2h_addr(cb
, &s
, arg2
),
755 result
= (int) readdir((DIR *) t2h_addr(cb
, &s
, arg1
));
762 result
= (int) mmap((void *) t2h_addr(cb
, &s
, arg1
),
763 arg2
, arg3
, arg4
, arg5
, arg6
);
768 sim_core_attach (sd
, NULL
,
769 0, access_read_write_exec
, 0,
770 result
, arg2
, 0, NULL
, NULL
);
779 int prot
, flags
, fildes
;
782 addr
= *((void **) t2h_addr(cb
, &s
, arg1
));
783 len
= *((size_t *) t2h_addr(cb
, &s
, arg1
+ 4));
784 prot
= *((int *) t2h_addr(cb
, &s
, arg1
+ 8));
785 flags
= *((int *) t2h_addr(cb
, &s
, arg1
+ 12));
786 fildes
= *((int *) t2h_addr(cb
, &s
, arg1
+ 16));
787 off
= *((off_t
*) t2h_addr(cb
, &s
, arg1
+ 20));
789 addr
= (void *) conv_endian((unsigned int) addr
);
790 len
= conv_endian(len
);
791 prot
= conv_endian(prot
);
792 flags
= conv_endian(flags
);
793 fildes
= conv_endian(fildes
);
794 off
= conv_endian(off
);
796 //addr = (void *) t2h_addr(cb, &s, (unsigned int) addr);
797 result
= (int) mmap(addr
, len
, prot
, flags
, fildes
, off
);
804 if (sim_core_read_buffer (sd
, NULL
, read_map
, &c
, result
, 1) == 0)
805 sim_core_attach (sd
, NULL
,
806 0, access_read_write_exec
, 0,
807 result
, len
, 0, NULL
, NULL
);
814 result
= munmap((void *)arg1
, arg2
);
818 sim_core_detach (sd
, NULL
, 0, arg2
, result
);
824 result
= truncate((char *) t2h_addr(cb
, &s
, arg1
), arg2
);
829 result
= ftruncate(arg1
, arg2
);
834 result
= fchmod(arg1
, arg2
);
839 result
= fchown(arg1
, arg2
, arg3
);
845 struct statfs statbuf
;
847 result
= statfs((char *) t2h_addr(cb
, &s
, arg1
), &statbuf
);
853 translate_endian((void *) &statbuf
, sizeof(statbuf
));
854 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &statbuf
, sizeof(statbuf
))
865 struct statfs statbuf
;
867 result
= fstatfs(arg1
, &statbuf
);
873 translate_endian((void *) &statbuf
, sizeof(statbuf
));
874 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &statbuf
, sizeof(statbuf
))
884 result
= syslog(arg1
, (char *) t2h_addr(cb
, &s
, arg2
));
890 struct itimerval value
, ovalue
;
892 value
= *((struct itimerval
*) t2h_addr(cb
, &s
, arg2
));
893 translate_endian((void *) &value
, sizeof(value
));
897 result
= setitimer(arg1
, &value
, NULL
);
902 result
= setitimer(arg1
, &value
, &ovalue
);
908 translate_endian((void *) &ovalue
, sizeof(ovalue
));
909 if ((s
.write_mem
) (cb
, &s
, arg3
, (char *) &ovalue
, sizeof(ovalue
))
921 struct itimerval value
;
923 result
= getitimer(arg1
, &value
);
929 translate_endian((void *) &value
, sizeof(value
));
930 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &value
, sizeof(value
))
945 result
= stat((char *) t2h_addr(cb
, &s
, arg1
), &statbuf
);
950 buflen
= cb_host_to_target_stat (cb
, NULL
, NULL
);
951 buf
= xmalloc (buflen
);
952 if (cb_host_to_target_stat (cb
, &statbuf
, buf
) != buflen
)
954 /* The translation failed. This is due to an internal
955 host program error, not the target's fault. */
961 if ((s
.write_mem
) (cb
, &s
, arg2
, buf
, buflen
) != buflen
)
978 result
= lstat((char *) t2h_addr(cb
, &s
, arg1
), &statbuf
);
983 buflen
= cb_host_to_target_stat (cb
, NULL
, NULL
);
984 buf
= xmalloc (buflen
);
985 if (cb_host_to_target_stat (cb
, &statbuf
, buf
) != buflen
)
987 /* The translation failed. This is due to an internal
988 host program error, not the target's fault. */
994 if ((s
.write_mem
) (cb
, &s
, arg2
, buf
, buflen
) != buflen
)
1009 struct stat statbuf
;
1011 result
= fstat(arg1
, &statbuf
);
1016 buflen
= cb_host_to_target_stat (cb
, NULL
, NULL
);
1017 buf
= xmalloc (buflen
);
1018 if (cb_host_to_target_stat (cb
, &statbuf
, buf
) != buflen
)
1020 /* The translation failed. This is due to an internal
1021 host program error, not the target's fault. */
1027 if ((s
.write_mem
) (cb
, &s
, arg2
, buf
, buflen
) != buflen
)
1040 struct sysinfo info
;
1042 result
= sysinfo(&info
);
1048 info
.uptime
= conv_endian(info
.uptime
);
1049 info
.loads
[0] = conv_endian(info
.loads
[0]);
1050 info
.loads
[1] = conv_endian(info
.loads
[1]);
1051 info
.loads
[2] = conv_endian(info
.loads
[2]);
1052 info
.totalram
= conv_endian(info
.totalram
);
1053 info
.freeram
= conv_endian(info
.freeram
);
1054 info
.sharedram
= conv_endian(info
.sharedram
);
1055 info
.bufferram
= conv_endian(info
.bufferram
);
1056 info
.totalswap
= conv_endian(info
.totalswap
);
1057 info
.freeswap
= conv_endian(info
.freeswap
);
1058 info
.procs
= conv_endian16(info
.procs
);
1059 #if LINUX_VERSION_CODE >= 0x20400
1060 info
.totalhigh
= conv_endian(info
.totalhigh
);
1061 info
.freehigh
= conv_endian(info
.freehigh
);
1062 info
.mem_unit
= conv_endian(info
.mem_unit
);
1064 if ((s
.write_mem
) (cb
, &s
, arg1
, (char *) &info
, sizeof(info
))
1076 result
= ipc(arg1
, arg2
, arg3
, arg4
,
1077 (void *) t2h_addr(cb
, &s
, arg5
), arg6
);
1084 result
= fsync(arg1
);
1089 /* utsname contains only arrays of char, so it is not necessary
1090 to translate endian. */
1091 result
= uname((struct utsname
*) t2h_addr(cb
, &s
, arg1
));
1099 result
= adjtimex(&buf
);
1105 translate_endian((void *) &buf
, sizeof(buf
));
1106 if ((s
.write_mem
) (cb
, &s
, arg1
, (char *) &buf
, sizeof(buf
))
1116 result
= mprotect((void *) arg1
, arg2
, arg3
);
1120 case __NR_get_kernel_syms
:
1122 struct kernel_sym table
;
1124 result
= get_kernel_syms(&table
);
1130 table
.value
= conv_endian(table
.value
);
1131 if ((s
.write_mem
) (cb
, &s
, arg1
, (char *) &table
, sizeof(table
))
1141 result
= fchdir(arg1
);
1146 result
= setfsuid(arg1
);
1151 result
= setfsgid(arg1
);
1160 result
= _llseek(arg1
, arg2
, arg3
, &buf
, arg5
);
1166 translate_endian((void *) &buf
, sizeof(buf
));
1167 if ((s
.write_mem
) (cb
, &s
, t2h_addr(cb
, &s
, arg4
),
1168 (char *) &buf
, sizeof(buf
)) != sizeof(buf
))
1180 result
= getdents(arg1
, &dir
, arg3
);
1186 dir
.d_ino
= conv_endian(dir
.d_ino
);
1187 dir
.d_off
= conv_endian(dir
.d_off
);
1188 dir
.d_reclen
= conv_endian16(dir
.d_reclen
);
1189 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &dir
, sizeof(dir
))
1200 result
= flock(arg1
, arg2
);
1205 result
= msync((void *) arg1
, arg2
, arg3
);
1211 struct iovec vector
;
1213 vector
= *((struct iovec
*) t2h_addr(cb
, &s
, arg2
));
1214 translate_endian((void *) &vector
, sizeof(vector
));
1216 result
= readv(arg1
, &vector
, arg3
);
1223 struct iovec vector
;
1225 vector
= *((struct iovec
*) t2h_addr(cb
, &s
, arg2
));
1226 translate_endian((void *) &vector
, sizeof(vector
));
1228 result
= writev(arg1
, &vector
, arg3
);
1233 case __NR_fdatasync
:
1234 result
= fdatasync(arg1
);
1239 result
= mlock((void *) t2h_addr(cb
, &s
, arg1
), arg2
);
1244 result
= munlock((void *) t2h_addr(cb
, &s
, arg1
), arg2
);
1248 case __NR_nanosleep
:
1250 struct timespec req
, rem
;
1252 req
= *((struct timespec
*) t2h_addr(cb
, &s
, arg2
));
1253 translate_endian((void *) &req
, sizeof(req
));
1255 result
= nanosleep(&req
, &rem
);
1261 translate_endian((void *) &rem
, sizeof(rem
));
1262 if ((s
.write_mem
) (cb
, &s
, arg2
, (char *) &rem
, sizeof(rem
))
1271 case __NR_mremap
: /* FIXME */
1272 result
= (int) mremap((void *) t2h_addr(cb
, &s
, arg1
), arg2
, arg3
, arg4
);
1276 case __NR_getresuid
:
1278 uid_t ruid
, euid
, suid
;
1280 result
= getresuid(&ruid
, &euid
, &suid
);
1286 *((uid_t
*) t2h_addr(cb
, &s
, arg1
)) = conv_endian(ruid
);
1287 *((uid_t
*) t2h_addr(cb
, &s
, arg2
)) = conv_endian(euid
);
1288 *((uid_t
*) t2h_addr(cb
, &s
, arg3
)) = conv_endian(suid
);
1296 ufds
= *((struct pollfd
*) t2h_addr(cb
, &s
, arg1
));
1297 ufds
.fd
= conv_endian(ufds
.fd
);
1298 ufds
.events
= conv_endian16(ufds
.events
);
1299 ufds
.revents
= conv_endian16(ufds
.revents
);
1301 result
= poll(&ufds
, arg2
, arg3
);
1306 case __NR_getresgid
:
1308 uid_t rgid
, egid
, sgid
;
1310 result
= getresgid(&rgid
, &egid
, &sgid
);
1316 *((uid_t
*) t2h_addr(cb
, &s
, arg1
)) = conv_endian(rgid
);
1317 *((uid_t
*) t2h_addr(cb
, &s
, arg2
)) = conv_endian(egid
);
1318 *((uid_t
*) t2h_addr(cb
, &s
, arg3
)) = conv_endian(sgid
);
1323 result
= pread(arg1
, (void *) t2h_addr(cb
, &s
, arg2
), arg3
, arg4
);
1328 result
= pwrite(arg1
, (void *) t2h_addr(cb
, &s
, arg2
), arg3
, arg4
);
1333 result
= chown((char *) t2h_addr(cb
, &s
, arg1
), arg2
, arg3
);
1338 result
= (int) getcwd((char *) t2h_addr(cb
, &s
, arg1
), arg2
);
1346 offset
= *((off_t
*) t2h_addr(cb
, &s
, arg3
));
1347 offset
= conv_endian(offset
);
1349 result
= sendfile(arg1
, arg2
, &offset
, arg3
);
1355 *((off_t
*) t2h_addr(cb
, &s
, arg3
)) = conv_endian(offset
);
1366 m32rbf_h_gr_set (current_cpu
, 0, -errcode
);
1368 m32rbf_h_gr_set (current_cpu
, 0, result
);
1372 case TRAP_BREAKPOINT
:
1373 sim_engine_halt (sd
, current_cpu
, NULL
, pc
,
1374 sim_stopped
, SIM_SIGTRAP
);
1377 case TRAP_FLUSH_CACHE
:
1383 /* Use cr5 as EVB (EIT Vector Base) register. */
1384 USI new_pc
= m32rbf_h_cr_get (current_cpu
, 5) + 0x40 + num
* 4;
1389 /* Fake an "rte" insn. */
1390 /* FIXME: Should duplicate all of rte processing. */
1391 return (pc
& -4) + 4;