toolchain/binutils/include/opcode/hppa.h

   1 /* Table of opcodes for the PA-RISC.
   2    Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
   3    2001, 2002
   4    Free Software Foundation, Inc.
   5
   6    Contributed by the Center for Software Science at the
   7    University of Utah (pa-gdb-bugs@cs.utah.edu).
   8
   9 This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
  10
  11 GAS/GDB is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 1, or (at your option)
  14 any later version.
  15
  16 GAS/GDB is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with GAS or GDB; see the file COPYING.  If not, write to
  23 the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  24
  25 #if !defined(__STDC__) && !defined(const)
  26 #define const
  27 #endif
  28
  29 /*
  30  * Structure of an opcode table entry.
  31  */
  32
  33 /* There are two kinds of delay slot nullification: normal which is
  34  * controled by the nullification bit, and conditional, which depends
  35  * on the direction of the branch and its success or failure.
  36  *
  37  * NONE is unfortunately #defined in the hiux system include files.
  38  * #undef it away.
  39  */
  40 #undef NONE
  41 struct pa_opcode
  42 {
  43     const char *name;
  44     unsigned long int match;    /* Bits that must be set...  */
  45     unsigned long int mask;     /* ... in these bits. */
  46     char *args;
  47     enum pa_arch arch;
  48     char flags;
  49 };
  50
  51 /* Enable/disable strict syntax checking.  Not currently used, but will
  52    be necessary for PA2.0 support in the future.  */
  53 #define FLAG_STRICT 0x1
  54
  55 /*
  56    All hppa opcodes are 32 bits.
  57
  58    The match component is a mask saying which bits must match a
  59    particular opcode in order for an instruction to be an instance
  60    of that opcode.
  61
  62    The args component is a string containing one character for each operand of
  63    the instruction.  Characters used as a prefix allow any second character to
  64    be used without conflicting with the main operand characters.
  65
  66    Bit positions in this description follow HP usage of lsb = 31,
  67    "at" is lsb of field.
  68
  69    In the args field, the following characters must match exactly:
  70
  71         '+,() '
  72
  73    In the args field, the following characters are unused:
  74
  75         '  "         -  /   34 6789:;    '
  76         '@  C         M             [\]  '
  77         '`    e g                     }  '
  78
  79    Here are all the characters:
  80
  81         ' !"#$%&'()*+-,./0123456789:;<=>?'
  82         '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
  83         '`abcdefghijklmnopqrstuvwxyz{|}~ '
  84
  85 Kinds of operands:
  86    x    integer register field at 15.
  87    b    integer register field at 10.
  88    t    integer register field at 31.
  89    a    integer register field at 10 and 15 (for PERMH)
  90    5    5 bit immediate at 15.
  91    s    2 bit space specifier at 17.
  92    S    3 bit space specifier at 18.
  93    V    5 bit immediate value at 31
  94    i    11 bit immediate value at 31
  95    j    14 bit immediate value at 31
  96    k    21 bit immediate value at 31
  97    l    16 bit immediate value at 31 (wide mode only, unusual encoding).
  98    n    nullification for branch instructions
  99    N    nullification for spop and copr instructions
 100    w    12 bit branch displacement
 101    W    17 bit branch displacement (PC relative)
 102    X    22 bit branch displacement (PC relative)
 103    z    17 bit branch displacement (just a number, not an address)
 104
 105 Also these:
 106
 107    .    2 bit shift amount at 25
 108    *    4 bit shift amount at 25
 109    p    5 bit shift count at 26 (to support the SHD instruction) encoded as
 110         31-p
 111    ~    6 bit shift count at 20,22:26 encoded as 63-~.
 112    P    5 bit bit position at 26
 113    q    6 bit bit position at 20,22:26
 114    T    5 bit field length at 31 (encoded as 32-T)
 115    %    6 bit field length at 23,27:31 (variable extract/deposit)
 116    |    6 bit field length at 19,27:31 (fixed extract/deposit)
 117    A    13 bit immediate at 18 (to support the BREAK instruction)
 118    ^    like b, but describes a control register
 119    !    sar (cr11) register
 120    D    26 bit immediate at 31 (to support the DIAG instruction)
 121    $    9 bit immediate at 28 (to support POPBTS)
 122
 123    v    3 bit Special Function Unit identifier at 25
 124    O    20 bit Special Function Unit operation split between 15 bits at 20
 125         and 5 bits at 31
 126    o    15 bit Special Function Unit operation at 20
 127    2    22 bit Special Function Unit operation split between 17 bits at 20
 128         and 5 bits at 31
 129    1    15 bit Special Function Unit operation split between 10 bits at 20
 130         and 5 bits at 31
 131    0    10 bit Special Function Unit operation split between 5 bits at 20
 132         and 5 bits at 31
 133    u    3 bit coprocessor unit identifier at 25
 134    F    Source Floating Point Operand Format Completer encoded 2 bits at 20
 135    I    Source Floating Point Operand Format Completer encoded 1 bits at 20
 136         (for 0xe format FP instructions)
 137    G    Destination Floating Point Operand Format Completer encoded 2 bits at 18
 138    H    Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
 139         (very similar to 'F')
 140
 141    r    5 bit immediate value at 31 (for the break instruction)
 142         (very similar to V above, except the value is unsigned instead of
 143         low_sign_ext)
 144    R    5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
 145         (same as r above, except the value is in a different location)
 146    U    10 bit immediate value at 15 (for SSM, RSM on pa2.0)
 147    Q    5 bit immediate value at 10 (a bit position specified in
 148         the bb instruction. It's the same as r above, except the
 149         value is in a different location)
 150    B    5 bit immediate value at 10 (a bit position specified in
 151         the bb instruction. Similar to Q, but 64 bit handling is
 152         different.
 153    Z    %r1 -- implicit target of addil instruction.
 154    L    ,%r2 completer for new syntax branch
 155    {    Source format completer for fcnv
 156    _    Destination format completer for fcnv
 157    h    cbit for fcmp
 158    =    gfx tests for ftest
 159    d    14 bit offset for single precision FP long load/store.
 160    #    14 bit offset for double precision FP load long/store.
 161    J    Yet another 14 bit offset for load/store with ma,mb completers.
 162    K    Yet another 14 bit offset for load/store with ma,mb completers.
 163    y    16 bit offset for word aligned load/store (PA2.0 wide).
 164    &    16 bit offset for dword aligned load/store (PA2.0 wide).
 165    <    16 bit offset for load/store with ma,mb completers (PA2.0 wide).
 166    >    16 bit offset for load/store with ma,mb completers (PA2.0 wide).
 167    Y    %sr0,%r31 -- implicit target of be,l instruction.
 168    @    implicit immediate value of 0
 169
 170 Completer operands all have 'c' as the prefix:
 171
 172    cx   indexed load completer.
 173    cX   indexed load completer.  Like cx, but emits a space after
 174         in disassembler.
 175    cm   short load and store completer.
 176    cM   short load and store completer.  Like cm, but emits a space
 177         after in disassembler.
 178    cq   long load and store completer (like cm, but inserted into a
 179         different location in the target instruction).
 180    cs   store bytes short completer.
 181    cA   store bytes short completer.  Like cs, but emits a space
 182         after in disassembler.
 183    ce   long load/store completer for LDW/STW with a different encoding than the
 184         others
 185    cc   load cache control hint
 186    cd   load and clear cache control hint
 187    cC   store cache control hint
 188    co   ordered access
 189
 190    cp   branch link and push completer
 191    cP   branch pop completer
 192    cl   branch link completer
 193    cg   branch gate completer
 194
 195    cw   read/write completer for PROBE
 196    cW   wide completer for MFCTL
 197    cL   local processor completer for cache control
 198    cZ   System Control Completer (to support LPA, LHA, etc.)
 199
 200    ci   correction completer for DCOR
 201    ca   add completer
 202    cy   32 bit add carry completer
 203    cY   64 bit add carry completer
 204    cv   signed overflow trap completer
 205    ct   trap on condition completer for ADDI, SUB
 206    cT   trap on condition completer for UADDCM
 207    cb   32 bit borrow completer for SUB
 208    cB   64 bit borrow completer for SUB
 209
 210    ch   left/right half completer
 211    cH   signed/unsigned saturation completer
 212    cS   signed/unsigned completer at 21
 213    cz   zero/sign extension completer.
 214    c*   permutation completer
 215
 216 Condition operands all have '?' as the prefix:
 217
 218    ?f   Floating point compare conditions (encoded as 5 bits at 31)
 219
 220    ?a   add conditions
 221    ?A   64 bit add conditions
 222    ?@   add branch conditions followed by nullify
 223    ?d   non-negated add branch conditions
 224    ?D   negated add branch conditions
 225    ?w   wide mode non-negated add branch conditions
 226    ?W   wide mode negated add branch conditions
 227
 228    ?s   compare/subtract conditions
 229    ?S   64 bit compare/subtract conditions
 230    ?t   non-negated compare and branch conditions
 231    ?n   32 bit compare and branch conditions followed by nullify
 232    ?N   64 bit compare and branch conditions followed by nullify
 233    ?Q   64 bit compare and branch conditions for CMPIB instruction
 234
 235    ?l   logical conditions
 236    ?L   64 bit logical conditions
 237
 238    ?b   branch on bit conditions
 239    ?B   64 bit branch on bit conditions
 240
 241    ?x   shift/extract/deposit conditions
 242    ?X   64 bit shift/extract/deposit conditions
 243    ?y   shift/extract/deposit conditions followed by nullify for conditional
 244         branches
 245
 246    ?u   unit conditions
 247    ?U   64 bit unit conditions
 248
 249 Floating point registers all have 'f' as a prefix:
 250
 251    ft   target register at 31
 252    fT   target register with L/R halves at 31
 253    fa   operand 1 register at 10
 254    fA   operand 1 register with L/R halves at 10
 255    fX   Same as fA, except prints a space before register during disasm
 256    fb   operand 2 register at 15
 257    fB   operand 2 register with L/R halves at 15
 258    fC   operand 3 register with L/R halves at 16:18,21:23
 259    fe   Like fT, but encoding is different.
 260    fE   Same as fe, except prints a space before register during disasm.
 261    fx   target register at 15 (only for PA 2.0 long format FLDD/FSTD).
 262
 263 Float registers for fmpyadd and fmpysub:
 264
 265    fi   mult operand 1 register at 10
 266    fj   mult operand 2 register at 15
 267    fk   mult target register at 20
 268    fl   add/sub operand register at 25
 269    fm   add/sub target register at 31
 270
 271 */
 272
 273
 274 #if 0
 275 /* List of characters not to put a space after.  Note that
 276    "," is included, as the "spopN" operations use literal
 277    commas in their completer sections.  */
 278 static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
 279 #endif
 280
 281 /* The order of the opcodes in this table is significant:
 282
 283    * The assembler requires that all instances of the same mnemonic must be
 284    consecutive.  If they aren't, the assembler will bomb at runtime.
 285
 286    * The disassembler should not care about the order of the opcodes.  */
 287
 288 static const struct pa_opcode pa_opcodes[] =
 289 {
 290
 291 /* Pseudo-instructions.  */
 292
 293 { "ldi",        0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */
 294 { "ldi",        0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */
 295
 296 { "cmpib",      0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT},
 297 { "cmpib",      0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT},
 298 { "comib",      0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 299 /* This entry is for the disassembler only.  It will never be used by
 300    assembler.  */
 301 { "comib",      0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/
 302 { "cmpb",       0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT},
 303 { "cmpb",       0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT},
 304 { "comb",       0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 305 /* This entry is for the disassembler only.  It will never be used by
 306    assembler.  */
 307 { "comb",       0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */
 308 { "addb",       0xa0000000, 0xf4000000, "?Wnx,b,w", pa20w, FLAG_STRICT},
 309 { "addb",       0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */
 310 /* This entry is for the disassembler only.  It will never be used by
 311    assembler.  */
 312 { "addb",       0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0},
 313 { "addib",      0xa4000000, 0xf4000000, "?Wn5,b,w", pa20w, FLAG_STRICT},
 314 { "addib",      0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 315 /* This entry is for the disassembler only.  It will never be used by
 316    assembler.  */
 317 { "addib",      0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/
 318 { "nop",        0x08000240, 0xffffffff, "", pa10, 0},      /* or 0,0,0 */
 319 { "copy",       0x08000240, 0xffe0ffe0, "x,t", pa10, 0},   /* or r,0,t */
 320 { "mtsar",      0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */
 321
 322 /* Loads and Stores for integer registers.  */
 323
 324 { "ldd",        0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 325 { "ldd",        0x0c0010e0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 326 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT},
 327 { "ldd",        0x0c0000c0, 0xfc0013c0, "cxccx(b),t", pa20, FLAG_STRICT},
 328 { "ldd",        0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT},
 329 { "ldd",        0x0c0010c0, 0xfc0013c0, "cmcc5(b),t", pa20, FLAG_STRICT},
 330 { "ldd",        0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT},
 331 { "ldd",        0x50000000, 0xfc000002, "cq#(b),x", pa20, FLAG_STRICT},
 332 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 333 { "ldw",        0x0c000080, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 334 { "ldw",        0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 335 { "ldw",        0x0c001080, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 336 { "ldw",        0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 337 { "ldw",        0x0c0010a0, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 338 { "ldw",        0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT},
 339 { "ldw",        0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT},
 340 { "ldw",        0x4c000000, 0xfc000000, "ceJ(b),x", pa10, FLAG_STRICT},
 341 { "ldw",        0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT},
 342 { "ldw",        0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT},
 343 { "ldw",        0x5c000004, 0xfc000006, "ceK(b),x", pa20, FLAG_STRICT},
 344 { "ldw",        0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 345 { "ldw",        0x48000000, 0xfc000000, "j(s,b),x", pa10, 0},
 346 { "ldw",        0x48000000, 0xfc000000, "j(b),x", pa10, 0},
 347 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 348 { "ldh",        0x0c000040, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 349 { "ldh",        0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 350 { "ldh",        0x0c001040, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 351 { "ldh",        0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 352 { "ldh",        0x0c001060, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 353 { "ldh",        0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 354 { "ldh",        0x44000000, 0xfc000000, "j(s,b),x", pa10, 0},
 355 { "ldh",        0x44000000, 0xfc000000, "j(b),x", pa10, 0},
 356 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa10, FLAG_STRICT},
 357 { "ldb",        0x0c000000, 0xfc0013c0, "cxccx(b),t", pa10, FLAG_STRICT},
 358 { "ldb",        0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa10, FLAG_STRICT},
 359 { "ldb",        0x0c001000, 0xfc0013c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 360 { "ldb",        0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT},
 361 { "ldb",        0x0c001020, 0xfc1f33e0, "cocc@(b),t", pa20, FLAG_STRICT},
 362 { "ldb",        0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT},
 363 { "ldb",        0x40000000, 0xfc000000, "j(s,b),x", pa10, 0},
 364 { "ldb",        0x40000000, 0xfc000000, "j(b),x", pa10, 0},
 365 { "std",        0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 366 { "std",        0x0c0012e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 367 { "std",        0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
 368 { "std",        0x0c0012c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
 369 { "std",        0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT},
 370 { "std",        0x70000000, 0xfc000002, "cqx,#(b)", pa20, FLAG_STRICT},
 371 { "stw",        0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 372 { "stw",        0x0c001280, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 373 { "stw",        0x0c0012a0, 0xfc0013ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 374 { "stw",        0x0c0012a0, 0xfc0013ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 375 { "stw",        0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT},
 376 { "stw",        0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT},
 377 { "stw",        0x6c000000, 0xfc000000, "cex,J(b)", pa10, FLAG_STRICT},
 378 { "stw",        0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT},
 379 { "stw",        0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT},
 380 { "stw",        0x7c000004, 0xfc000006, "cex,K(b)", pa20, FLAG_STRICT},
 381 { "stw",        0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 382 { "stw",        0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 383 { "stw",        0x68000000, 0xfc000000, "x,j(b)", pa10, 0},
 384 { "sth",        0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 385 { "sth",        0x0c001240, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 386 { "sth",        0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 387 { "sth",        0x0c001260, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 388 { "sth",        0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 389 { "sth",        0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 390 { "sth",        0x64000000, 0xfc000000, "x,j(b)", pa10, 0},
 391 { "stb",        0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa10, FLAG_STRICT},
 392 { "stb",        0x0c001200, 0xfc0013c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 393 { "stb",        0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 394 { "stb",        0x0c001220, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 395 { "stb",        0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT},
 396 { "stb",        0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 397 { "stb",        0x60000000, 0xfc000000, "x,j(b)", pa10, 0},
 398 { "ldwm",       0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0},
 399 { "ldwm",       0x4c000000, 0xfc000000, "j(b),x", pa10, 0},
 400 { "stwm",       0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0},
 401 { "stwm",       0x6c000000, 0xfc000000, "x,j(b)", pa10, 0},
 402 { "ldwx",       0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
 403 { "ldwx",       0x0c000080, 0xfc001fc0, "cXx(b),t", pa10, 0},
 404 { "ldhx",       0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
 405 { "ldhx",       0x0c000040, 0xfc001fc0, "cXx(b),t", pa10, 0},
 406 { "ldbx",       0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
 407 { "ldbx",       0x0c000000, 0xfc001fc0, "cXx(b),t", pa10, 0},
 408 { "ldwa",       0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa10, FLAG_STRICT},
 409 { "ldwa",       0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa10, FLAG_STRICT},
 410 { "ldwa",       0x0c0011a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
 411 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa10, FLAG_STRICT},
 412 { "ldcw",       0x0c0001c0, 0xfc0013c0, "cxcdx(b),t", pa10, FLAG_STRICT},
 413 { "ldcw",       0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa10, FLAG_STRICT},
 414 { "ldcw",       0x0c0011c0, 0xfc0013c0, "cmcd5(b),t", pa10, FLAG_STRICT},
 415 { "stwa",       0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa10, FLAG_STRICT},
 416 { "stwa",       0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 417 { "stby",       0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa10, FLAG_STRICT},
 418 { "stby",       0x0c001300, 0xfc0013c0, "cscCx,V(b)", pa10, FLAG_STRICT},
 419 { "ldda",       0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT},
 420 { "ldda",       0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT},
 421 { "ldda",       0x0c001120, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT},
 422 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT},
 423 { "ldcd",       0x0c000140, 0xfc0013c0, "cxcdx(b),t", pa20, FLAG_STRICT},
 424 { "ldcd",       0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT},
 425 { "ldcd",       0x0c001140, 0xfc0013c0, "cmcd5(b),t", pa20, FLAG_STRICT},
 426 { "stda",       0x0c0013e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT},
 427 { "stda",       0x0c0013e0, 0xfc0033ff, "cocCx,@(b)", pa20, FLAG_STRICT},
 428 { "stda",       0x0c0013c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT},
 429 { "stda",       0x0c0013c0, 0xfc0013c0, "cmcCx,V(b)", pa20, FLAG_STRICT},
 430 { "ldwax",      0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0},
 431 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0},
 432 { "ldcwx",      0x0c0001c0, 0xfc001fc0, "cXx(b),t", pa10, 0},
 433 { "ldws",       0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
 434 { "ldws",       0x0c001080, 0xfc001fc0, "cM5(b),t", pa10, 0},
 435 { "ldhs",       0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
 436 { "ldhs",       0x0c001040, 0xfc001fc0, "cM5(b),t", pa10, 0},
 437 { "ldbs",       0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
 438 { "ldbs",       0x0c001000, 0xfc001fc0, "cM5(b),t", pa10, 0},
 439 { "ldwas",      0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0},
 440 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0},
 441 { "ldcws",      0x0c0011c0, 0xfc001fc0, "cM5(b),t", pa10, 0},
 442 { "stws",       0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
 443 { "stws",       0x0c001280, 0xfc001fc0, "cMx,V(b)", pa10, 0},
 444 { "sths",       0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
 445 { "sths",       0x0c001240, 0xfc001fc0, "cMx,V(b)", pa10, 0},
 446 { "stbs",       0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0},
 447 { "stbs",       0x0c001200, 0xfc001fc0, "cMx,V(b)", pa10, 0},
 448 { "stwas",      0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0},
 449 { "stdby",      0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT},
 450 { "stdby",      0x0c001340, 0xfc0013c0, "cscCx,V(b)", pa20, FLAG_STRICT},
 451 { "stbys",      0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0},
 452 { "stbys",      0x0c001300, 0xfc001fc0, "cAx,V(b)", pa10, 0},
 453
 454 /* Immediate instructions.  */
 455 { "ldo",        0x34000000, 0xfc000000, "l(b),x", pa20w, 0},
 456 { "ldo",        0x34000000, 0xfc00c000, "j(b),x", pa10, 0},
 457 { "ldil",       0x20000000, 0xfc000000, "k,b", pa10, 0},
 458 { "addil",      0x28000000, 0xfc000000, "k,b,Z", pa10, 0},
 459 { "addil",      0x28000000, 0xfc000000, "k,b", pa10, 0},
 460
 461 /* Branching instructions.  */
 462 { "b",          0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT},
 463 { "b",          0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT},
 464 { "b",          0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT},
 465 { "b",          0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT},
 466 { "b",          0xe8000000, 0xffe0e000, "nW", pa10, 0},  /* b,l foo,r0 */
 467 { "bl",         0xe8000000, 0xfc00e000, "nW,b", pa10, 0},
 468 { "gate",       0xe8002000, 0xfc00e000, "nW,b", pa10, 0},
 469 { "blr",        0xe8004000, 0xfc00e001, "nx,b", pa10, 0},
 470 { "bv",         0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0},
 471 { "bv",         0xe800c000, 0xfc00fffd, "n(b)", pa10, 0},
 472 { "bve",        0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT},
 473 { "bve",        0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT},
 474 { "bve",        0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT},
 475 { "bve",        0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 476 { "be",         0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT},
 477 { "be",         0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT},
 478 { "be",         0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0},
 479 { "be",         0xe0000000, 0xfc000000, "nz(b)", pa10, 0},
 480 { "ble",        0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0},
 481 { "movb",       0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0},
 482 { "movib",      0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0},
 483 { "combt",      0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 484 { "combf",      0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0},
 485 { "comibt",     0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 486 { "comibf",     0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0},
 487 { "addbt",      0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 488 { "addbf",      0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 489 { "addibt",     0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 490 { "addibf",     0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 491 { "bb",         0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT},
 492 { "bb",         0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0},
 493 { "bb",         0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT},
 494 { "bb",         0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT},
 495 { "bvb",        0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
 496 { "clrbts",     0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
 497 { "popbts",     0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},
 498 { "pushnom",    0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT},
 499 { "pushbts",    0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 500
 501 /* Computation Instructions.  */
 502
 503 { "cmpclr",     0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT},
 504 { "cmpclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT},
 505 { "comclr",     0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0},
 506 { "or",         0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 507 { "or",         0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0},
 508 { "xor",        0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 509 { "xor",        0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0},
 510 { "and",        0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 511 { "and",        0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0},
 512 { "andcm",      0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT},
 513 { "andcm",      0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0},
 514 { "uxor",       0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT},
 515 { "uxor",       0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0},
 516 { "uaddcm",     0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT},
 517 { "uaddcm",     0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT},
 518 { "uaddcm",     0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0},
 519 { "uaddcmt",    0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0},
 520 { "dcor",       0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT},
 521 { "dcor",       0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT},
 522 { "dcor",       0x08000b80, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 523 { "idcor",      0x08000bc0, 0xfc1f0fe0, "?ub,t",   pa10, 0},
 524 { "addi",       0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT},
 525 { "addi",       0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT},
 526 { "addi",       0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0},
 527 { "addio",      0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
 528 { "addit",      0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
 529 { "addito",     0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
 530 { "add",        0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
 531 { "add",        0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
 532 { "add",        0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
 533 { "add",        0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
 534 { "add",        0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
 535 { "addl",       0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 536 { "addo",       0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 537 { "addc",       0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
 538 { "addco",      0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
 539 { "sub",        0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
 540 { "sub",        0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
 541 { "sub",        0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
 542 { "sub",        0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
 543 { "sub",        0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
 544 { "sub",        0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
 545 { "sub",        0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
 546 { "subo",       0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 547 { "subb",       0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0},
 548 { "subbo",      0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0},
 549 { "subt",       0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 550 { "subto",      0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0},
 551 { "ds",         0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0},
 552 { "subi",       0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT},
 553 { "subi",       0x94000000, 0xfc000800, "?si,b,x", pa10, 0},
 554 { "subio",      0x94000800, 0xfc000800, "?si,b,x", pa10, 0},
 555 { "cmpiclr",    0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT},
 556 { "cmpiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT},
 557 { "comiclr",    0x90000000, 0xfc000800, "?si,b,x", pa10, 0},
 558 { "shladd",     0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT},
 559 { "shladd",     0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT},
 560 { "sh1add",     0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0},
 561 { "sh1addl",    0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 562 { "sh1addo",    0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0},
 563 { "sh2add",     0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0},
 564 { "sh2addl",    0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 565 { "sh2addo",    0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0},
 566 { "sh3add",     0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 567 { "sh3addl",    0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 568 { "sh3addo",    0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0},
 569
 570 /* Subword Operation Instructions.  */
 571
 572 { "hadd",       0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 573 { "havg",       0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT},
 574 { "hshl",       0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT},
 575 { "hshladd",    0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 576 { "hshr",       0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT},
 577 { "hshradd",    0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT},
 578 { "hsub",       0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT},
 579 { "mixh",       0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 580 { "mixw",       0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT},
 581 { "permh",      0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT},
 582
 583
 584 /* Extract and Deposit Instructions.  */
 585
 586 { "shrpd",      0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT},
 587 { "shrpd",      0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT},
 588 { "shrpw",      0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT},
 589 { "shrpw",      0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT},
 590 { "vshd",       0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0},
 591 { "shd",        0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0},
 592 { "extrd",      0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT},
 593 { "extrd",      0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT},
 594 { "extrw",      0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT},
 595 { "extrw",      0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT},
 596 { "vextru",     0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0},
 597 { "vextrs",     0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0},
 598 { "extru",      0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 599 { "extrs",      0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0},
 600 { "depd",       0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT},
 601 { "depd",       0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT},
 602 { "depdi",      0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT},
 603 { "depdi",      0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT},
 604 { "depw",       0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT},
 605 { "depw",       0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT},
 606 { "depwi",      0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT},
 607 { "depwi",      0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT},
 608 { "zvdep",      0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0},
 609 { "vdep",       0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0},
 610 { "zdep",       0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 611 { "dep",        0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0},
 612 { "zvdepi",     0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0},
 613 { "vdepi",      0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0},
 614 { "zdepi",      0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 615 { "depi",       0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0},
 616
 617 /* System Control Instructions.  */
 618
 619 { "break",      0x00000000, 0xfc001fe0, "r,A", pa10, 0},
 620 { "rfi",        0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT},
 621 { "rfi",        0x00000c00, 0xffffffff, "", pa10, 0},
 622 { "rfir",       0x00000ca0, 0xffffffff, "", pa11, 0},
 623 { "ssm",        0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 624 { "ssm",        0x00000d60, 0xffe0ffe0, "R,t", pa10, 0},
 625 { "rsm",        0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT},
 626 { "rsm",        0x00000e60, 0xffe0ffe0, "R,t", pa10, 0},
 627 { "mtsm",       0x00001860, 0xffe0ffff, "x", pa10, 0},
 628 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0},
 629 { "ldsid",      0x000010a0, 0xfc1f3fe0, "(b),t", pa10, 0},
 630 { "mtsp",       0x00001820, 0xffe01fff, "x,S", pa10, 0},
 631 { "mtctl",      0x00001840, 0xfc00ffff, "x,^", pa10, 0},
 632 { "mtsarcm",    0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT},
 633 { "mfia",       0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT},
 634 { "mfsp",       0x000004a0, 0xffff1fe0, "S,t", pa10, 0},
 635 { "mfctl",      0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT},
 636 { "mfctl",      0x000008a0, 0xfc1fffe0, "^,t", pa10, 0},
 637 { "sync",       0x00000400, 0xffffffff, "", pa10, 0},
 638 { "syncdma",    0x00100400, 0xffffffff, "", pa10, 0},
 639 { "probe",      0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT},
 640 { "probe",      0x04001180, 0xfc003fa0, "cw(b),x,t", pa10, FLAG_STRICT},
 641 { "probei",     0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT},
 642 { "probei",     0x04003180, 0xfc003fa0, "cw(b),R,t", pa10, FLAG_STRICT},
 643 { "prober",     0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 644 { "prober",     0x04001180, 0xfc003fe0, "(b),x,t", pa10, 0},
 645 { "proberi",    0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 646 { "proberi",    0x04003180, 0xfc003fe0, "(b),R,t", pa10, 0},
 647 { "probew",     0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0},
 648 { "probew",     0x040011c0, 0xfc003fe0, "(b),x,t", pa10, 0},
 649 { "probewi",    0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0},
 650 { "probewi",    0x040031c0, 0xfc003fe0, "(b),R,t", pa10, 0},
 651 { "lpa",        0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 652 { "lpa",        0x04001340, 0xfc003fc0, "cZx(b),t", pa10, 0},
 653 { "lha",        0x04001300, 0xfc003fc0, "cZx(s,b),t", pa10, 0},
 654 { "lha",        0x04001300, 0xfc003fc0, "cZx(b),t", pa10, 0},
 655 { "lci",        0x04001300, 0xfc003fe0, "x(s,b),t", pa10, 0},
 656 { "lci",        0x04001300, 0xfc003fe0, "x(b),t", pa10, 0},
 657 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT},
 658 { "pdtlb",      0x04001600, 0xfc003fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 659 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 660 { "pdtlb",      0x04001200, 0xfc003fdf, "cZx(b)", pa10, 0},
 661 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT},
 662 { "pitlb",      0x04000600, 0xfc001fdf, "cLcZx(b)", pa20, FLAG_STRICT},
 663 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 664 { "pitlb",      0x04000200, 0xfc001fdf, "cZx(b)", pa10, 0},
 665 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 666 { "pdtlbe",     0x04001240, 0xfc003fdf, "cZx(b)", pa10, 0},
 667 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 668 { "pitlbe",     0x04000240, 0xfc001fdf, "cZx(b)", pa10, 0},
 669 { "idtlba",     0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0},
 670 { "idtlba",     0x04001040, 0xfc003fff, "x,(b)", pa10, 0},
 671 { "iitlba",     0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0},
 672 { "iitlba",     0x04000040, 0xfc001fff, "x,(b)", pa10, 0},
 673 { "idtlbp",     0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0},
 674 { "idtlbp",     0x04001000, 0xfc003fff, "x,(b)", pa10, 0},
 675 { "iitlbp",     0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0},
 676 { "iitlbp",     0x04000000, 0xfc001fff, "x,(b)", pa10, 0},
 677 { "pdc",        0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 678 { "pdc",        0x04001380, 0xfc003fdf, "cZx(b)", pa10, 0},
 679 { "fdc",        0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 680 { "fdc",        0x04001280, 0xfc003fdf, "cZx(b)", pa10, 0},
 681 { "fic",        0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 682 { "fic",        0x04000280, 0xfc001fdf, "cZx(b)", pa10, 0},
 683 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0},
 684 { "fdce",       0x040012c0, 0xfc003fdf, "cZx(b)", pa10, 0},
 685 { "fice",       0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0},
 686 { "fice",       0x040002c0, 0xfc001fdf, "cZx(b)", pa10, 0},
 687 { "diag",       0x14000000, 0xfc000000, "D", pa10, 0},
 688 { "idtlbt",     0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 689 { "iitlbt",     0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT},
 690
 691 /* These may be specific to certain versions of the PA.  Joel claimed
 692    they were 72000 (7200?) specific.  However, I'm almost certain the
 693    mtcpu/mfcpu were undocumented, but available in the older 700 machines.  */
 694 { "mtcpu",      0x14001600, 0xfc00ffff, "x,^", pa10, 0},
 695 { "mfcpu",      0x14001A00, 0xfc00ffff, "^,x", pa10, 0},
 696 { "tocen",      0x14403600, 0xffffffff, "", pa10, 0},
 697 { "tocdis",     0x14401620, 0xffffffff, "", pa10, 0},
 698 { "shdwgr",     0x14402600, 0xffffffff, "", pa10, 0},
 699 { "grshdw",     0x14400620, 0xffffffff, "", pa10, 0},
 700
 701 /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
 702    the Timex FPU or the Mustang ERS (not sure which) manual.  */
 703 { "gfw",        0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 704 { "gfw",        0x04001680, 0xfc003fdf, "cZx(b)", pa11, 0},
 705 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0},
 706 { "gfr",        0x04001a80, 0xfc003fdf, "cZx(b)", pa11, 0},
 707
 708 /* Floating Point Coprocessor Instructions.  */
 709
 710 { "fldw",       0x24000000, 0xfc001380, "cxccx(s,b),fT", pa10, FLAG_STRICT},
 711 { "fldw",       0x24000000, 0xfc001380, "cxccx(b),fT", pa10, FLAG_STRICT},
 712 { "fldw",       0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa10, FLAG_STRICT},
 713 { "fldw",       0x24001000, 0xfc001380, "cmcc5(b),fT", pa10, FLAG_STRICT},
 714 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT},
 715 { "fldw",       0x24001020, 0xfc1f33a0, "cocc@(b),fT", pa20, FLAG_STRICT},
 716 { "fldw",       0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT},
 717 { "fldw",       0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT},
 718 { "fldw",       0x5c000000, 0xfc000004, "d(b),fe", pa20, FLAG_STRICT},
 719 { "fldw",       0x58000000, 0xfc000000, "cJd(b),fe", pa20, FLAG_STRICT},
 720 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa10, FLAG_STRICT},
 721 { "fldd",       0x2c000000, 0xfc0013c0, "cxccx(b),ft", pa10, FLAG_STRICT},
 722 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa10, FLAG_STRICT},
 723 { "fldd",       0x2c001000, 0xfc0013c0, "cmcc5(b),ft", pa10, FLAG_STRICT},
 724 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT},
 725 { "fldd",       0x2c001020, 0xfc1f33e0, "cocc@(b),ft", pa20, FLAG_STRICT},
 726 { "fldd",       0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT},
 727 { "fldd",       0x50000002, 0xfc000002, "cq#(b),fx", pa20, FLAG_STRICT},
 728 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa10, FLAG_STRICT},
 729 { "fstw",       0x24000200, 0xfc001380, "cxcCfT,x(b)", pa10, FLAG_STRICT},
 730 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa10, FLAG_STRICT},
 731 { "fstw",       0x24001200, 0xfc001380, "cmcCfT,5(b)", pa10, FLAG_STRICT},
 732 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa10, FLAG_STRICT},
 733 { "fstw",       0x24001220, 0xfc1f33a0, "cocCfT,@(b)", pa10, FLAG_STRICT},
 734 { "fstw",       0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT},
 735 { "fstw",       0x78000000, 0xfc000000, "cJfe,y(b)", pa20w, FLAG_STRICT},
 736 { "fstw",       0x7c000000, 0xfc000004, "fe,d(b)", pa20, FLAG_STRICT},
 737 { "fstw",       0x78000000, 0xfc000000, "cJfe,d(b)", pa20, FLAG_STRICT},
 738 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa10, FLAG_STRICT},
 739 { "fstd",       0x2c000200, 0xfc0013c0, "cxcCft,x(b)", pa10, FLAG_STRICT},
 740 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa10, FLAG_STRICT},
 741 { "fstd",       0x2c001200, 0xfc0013c0, "cmcCft,5(b)", pa10, FLAG_STRICT},
 742 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa10, FLAG_STRICT},
 743 { "fstd",       0x2c001220, 0xfc1f33e0, "cocCft,@(b)", pa10, FLAG_STRICT},
 744 { "fstd",       0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT},
 745 { "fstd",       0x70000002, 0xfc000002, "cqfx,#(b)", pa20, FLAG_STRICT},
 746 { "fldwx",      0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0},
 747 { "fldwx",      0x24000000, 0xfc001f80, "cXx(b),fT", pa10, 0},
 748 { "flddx",      0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0},
 749 { "flddx",      0x2c000000, 0xfc001fc0, "cXx(b),ft", pa10, 0},
 750 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0},
 751 { "fstwx",      0x24000200, 0xfc001f80, "cxfT,x(b)", pa10, 0},
 752 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 753 { "fstdx",      0x2c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 754 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0},
 755 { "fstqx",      0x3c000200, 0xfc001fc0, "cxft,x(b)", pa10, 0},
 756 { "fldws",      0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0},
 757 { "fldws",      0x24001000, 0xfc001f80, "cm5(b),fT", pa10, 0},
 758 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0},
 759 { "fldds",      0x2c001000, 0xfc001fc0, "cm5(b),ft", pa10, 0},
 760 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0},
 761 { "fstws",      0x24001200, 0xfc001f80, "cmfT,5(b)", pa10, 0},
 762 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 763 { "fstds",      0x2c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 764 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0},
 765 { "fstqs",      0x3c001200, 0xfc001fc0, "cmft,5(b)", pa10, 0},
 766 { "fadd",       0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 767 { "fadd",       0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 768 { "fsub",       0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 769 { "fsub",       0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 770 { "fmpy",       0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 771 { "fmpy",       0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 772 { "fdiv",       0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 773 { "fdiv",       0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0},
 774 { "fsqrt",      0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 775 { "fsqrt",      0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0},
 776 { "fabs",       0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 777 { "fabs",       0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0},
 778 { "frem",       0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0},
 779 { "frem",       0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0},
 780 { "frnd",       0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 781 { "frnd",       0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0},
 782 { "fcpy",       0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0},
 783 { "fcpy",       0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0},
 784 { "fcnvff",     0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 785 { "fcnvff",     0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 786 { "fcnvxf",     0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 787 { "fcnvxf",     0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 788 { "fcnvfx",     0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 789 { "fcnvfx",     0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 790 { "fcnvfxt",    0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0},
 791 { "fcnvfxt",    0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0},
 792 { "fmpyfadd",   0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 793 { "fmpynfadd",  0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT},
 794 { "fneg",       0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 795 { "fneg",       0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 796 { "fnegabs",    0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT},
 797 { "fnegabs",    0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT},
 798 { "fcnv",       0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT},
 799 { "fcnv",       0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT},
 800 { "fcmp",       0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT},
 801 { "fcmp",       0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT},
 802 { "fcmp",       0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0},
 803 { "fcmp",       0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0},
 804 { "xmpyu",      0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0},
 805 { "fmpyadd",    0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 806 { "fmpysub",    0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0},
 807 { "ftest",      0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT},
 808 { "ftest",      0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT},
 809 { "ftest",      0x30002420, 0xffffffff, "", pa10, 0},
 810 { "fid",        0x30000000, 0xffffffff, "", pa11, 0},
 811
 812 /* Performance Monitor Instructions.  */
 813
 814 { "pmdis",      0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT},
 815 { "pmenb",      0x30000680, 0xffffffff, "", pa20, FLAG_STRICT},
 816
 817 /* Assist Instructions.  */
 818
 819 { "spop0",      0x10000000, 0xfc000600, "v,ON", pa10, 0},
 820 { "spop1",      0x10000200, 0xfc000600, "v,oNt", pa10, 0},
 821 { "spop2",      0x10000400, 0xfc000600, "v,1Nb", pa10, 0},
 822 { "spop3",      0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0},
 823 { "copr",       0x30000000, 0xfc000000, "u,2N", pa10, 0},
 824 { "cldwx",      0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
 825 { "cldwx",      0x24000000, 0xfc001e00, "ucXx(b),t", pa10, 0},
 826 { "clddx",      0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0},
 827 { "clddx",      0x2c000000, 0xfc001e00, "ucXx(b),t", pa10, 0},
 828 { "cstwx",      0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
 829 { "cstwx",      0x24000200, 0xfc001e00, "ucXt,x(b)", pa10, 0},
 830 { "cstdx",      0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0},
 831 { "cstdx",      0x2c000200, 0xfc001e00, "ucXt,x(b)", pa10, 0},
 832 { "cldws",      0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
 833 { "cldws",      0x24001000, 0xfc001e00, "ucM5(b),t", pa10, 0},
 834 { "cldds",      0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0},
 835 { "cldds",      0x2c001000, 0xfc001e00, "ucM5(b),t", pa10, 0},
 836 { "cstws",      0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0},
 837 { "cstws",      0x24001200, 0xfc001e00, "ucMt,5(b)", pa10, 0},
 838 { "cstds",      0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0},
 839 { "cstds",      0x2c001200, 0xfc001e00, "ucMt,5(b)", pa10, 0},
 840 { "cldw",       0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
 841 { "cldw",       0x24000000, 0xfc001e00, "ucXx(b),t", pa10, FLAG_STRICT},
 842 { "cldw",       0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
 843 { "cldw",       0x24001000, 0xfc001e00, "ucM5(b),t", pa10, FLAG_STRICT},
 844 { "cldd",       0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT},
 845 { "cldd",       0x2c000000, 0xfc001e00, "ucXx(b),t", pa10, FLAG_STRICT},
 846 { "cldd",       0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT},
 847 { "cldd",       0x2c001000, 0xfc001e00, "ucM5(b),t", pa20, FLAG_STRICT},
 848 { "cstw",       0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
 849 { "cstw",       0x24000200, 0xfc001e00, "ucXt,x(b)", pa10, FLAG_STRICT},
 850 { "cstw",       0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
 851 { "cstw",       0x24001200, 0xfc001e00, "ucMt,5(b)", pa10, FLAG_STRICT},
 852 { "cstd",       0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT},
 853 { "cstd",       0x2c000200, 0xfc001e00, "ucXt,x(b)", pa10, FLAG_STRICT},
 854 { "cstd",       0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT},
 855 { "cstd",       0x2c001200, 0xfc001e00, "ucMt,5(b)", pa10, FLAG_STRICT},
 856
 857 /* More pseudo instructions which must follow the main table.  */
 858 { "call",       0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT},
 859 { "call",       0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT},
 860 { "ret",        0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT},
 861
 862 };
 863
 864 #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0]))
 865
 866 /* SKV 12/18/92. Added some denotations for various operands.  */
 867
 868 #define PA_IMM11_AT_31 'i'
 869 #define PA_IMM14_AT_31 'j'
 870 #define PA_IMM21_AT_31 'k'
 871 #define PA_DISP12 'w'
 872 #define PA_DISP17 'W'
 873
 874 #define N_HPPA_OPERAND_FORMATS 5