fixes for host gcc 4.6.1
[zpugcc/jano.git] / toolchain / binutils / include / opcode / zpu.h
blobae740f3d8eef363d4a56197f5f2919b7e6165701
1 /* zpu.h -- Header file for Zylin ZPU opcode table
2 Copyright 1999, 2000, 2002, 2003 Free Software Foundation, Inc.
3 Written by Stephane Carrez (stcarrez@nerim.fr)
5 This file is part of GDB, GAS, and the GNU binutils.
7 GDB, GAS, and the GNU binutils are free software; you can redistribute
8 them and/or modify them under the terms of the GNU General Public
9 License as published by the Free Software Foundation; either version
10 1, or (at your option) any later version.
12 GDB, GAS, and the GNU binutils are distributed in the hope that they
13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
15 the GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 #ifndef _OPCODE_ZPU_H
22 #define _OPCODE_ZPU_H
25 enum ZPU_ADDRMODE
27 ADDR_IMPLIED=1,
28 ADDR_IMMEDIATE,
29 ADDR_PCREL,
33 enum ZPU_OPCODE
35 ZPU_breakpoint=0,
36 ZPU_push_pc=59,
37 ZPU_pop_pc=4,
38 ZPU_load=8,
39 ZPU_store=12,
40 ZPU_push_sp=2,
41 ZPU_pop_sp=13,
43 ZPU_add=5,
44 ZPU_and=6,
45 ZPU_or=7,
47 ZPU_not=9,
48 ZPU_flip=10,
49 ZPU_nop=11,
51 ZPU_addsp=16,
53 ZPU_loadh=34,
54 ZPU_storeh=35,
55 ZPU_lessthan=36,
56 ZPU_lessthanorequal=37,
57 ZPU_ulessthan=38,
58 ZPU_ulessthanorequal=39,
59 ZPU_swap=40,
60 ZPU_mult=41,
61 ZPU_lshiftright=42,
62 ZPU_ashiftleft=43,
63 ZPU_ashiftright=44,
64 ZPU_call=45,
65 ZPU_eq=46,
66 ZPU_neq=47,
67 ZPU_neg=48,
68 ZPU_sub=49,
69 ZPU_xor=50,
70 ZPU_loadb=51,
71 ZPU_storeb=52,
72 ZPU_div=53,
73 ZPU_mod=54,
74 ZPU_eqbranch=55,
75 ZPU_neqbranch=56,
76 ZPU_poppcrel=57,
77 ZPU_config=58,
78 ZPU_movebyte=59,
79 ZPU_syscall=60,
80 ZPU_pushspadd=61,
81 ZPU_halfmult=62,
82 ZPU_callpcrel=63,
84 ZPU_impcrel=0, /* not an opcode, translates to IM instructions */
86 ZPU_storesp=64, /* 32 instructions */
88 ZPU_loadsp=64+32, /* 32 instructions */
91 ZPU_im=0x80,
92 ZPU_im14=0, /* nonrelaxable 14 bit immediate */
96 struct zpu_opcode
98 enum ZPU_OPCODE code;
99 char *name;
100 enum ZPU_ADDRMODE amode;
104 /* The opcode table. The table contains all the opcodes (all pages).
105 You can't rely on the order. */
106 extern const struct zpu_opcode zpu_opcodes[];
107 extern const int zpu_num_opcodes;
109 #endif /* _OPCODE_ZPU_H */