3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
34 #include "libiberty.h"
39 static const CGEN_ATTR_ENTRY bool_attr
[] =
46 static const CGEN_ATTR_ENTRY MACH_attr
[] =
48 { "base", MACH_BASE
},
50 { "fr550", MACH_FR550
},
51 { "fr500", MACH_FR500
},
52 { "fr400", MACH_FR400
},
53 { "tomcat", MACH_TOMCAT
},
54 { "simple", MACH_SIMPLE
},
59 static const CGEN_ATTR_ENTRY ISA_attr
[] =
66 static const CGEN_ATTR_ENTRY UNIT_attr
[] =
74 { "IALL", UNIT_IALL
},
77 { "FM01", UNIT_FM01
},
80 { "FMALL", UNIT_FMALL
},
81 { "FMLOW", UNIT_FMLOW
},
86 { "MULT_DIV", UNIT_MULT_DIV
},
87 { "IACC", UNIT_IACC
},
88 { "LOAD", UNIT_LOAD
},
89 { "STORE", UNIT_STORE
},
90 { "SCAN", UNIT_SCAN
},
91 { "DCPL", UNIT_DCPL
},
92 { "MDUALACC", UNIT_MDUALACC
},
93 { "MCLRACC_1", UNIT_MCLRACC_1
},
94 { "NUM_UNITS", UNIT_NUM_UNITS
},
98 static const CGEN_ATTR_ENTRY FR400_MAJOR_attr
[] =
100 { "NONE", FR400_MAJOR_NONE
},
101 { "I_1", FR400_MAJOR_I_1
},
102 { "I_2", FR400_MAJOR_I_2
},
103 { "I_3", FR400_MAJOR_I_3
},
104 { "I_4", FR400_MAJOR_I_4
},
105 { "I_5", FR400_MAJOR_I_5
},
106 { "B_1", FR400_MAJOR_B_1
},
107 { "B_2", FR400_MAJOR_B_2
},
108 { "B_3", FR400_MAJOR_B_3
},
109 { "B_4", FR400_MAJOR_B_4
},
110 { "B_5", FR400_MAJOR_B_5
},
111 { "B_6", FR400_MAJOR_B_6
},
112 { "C_1", FR400_MAJOR_C_1
},
113 { "C_2", FR400_MAJOR_C_2
},
114 { "M_1", FR400_MAJOR_M_1
},
115 { "M_2", FR400_MAJOR_M_2
},
119 static const CGEN_ATTR_ENTRY FR500_MAJOR_attr
[] =
121 { "NONE", FR500_MAJOR_NONE
},
122 { "I_1", FR500_MAJOR_I_1
},
123 { "I_2", FR500_MAJOR_I_2
},
124 { "I_3", FR500_MAJOR_I_3
},
125 { "I_4", FR500_MAJOR_I_4
},
126 { "I_5", FR500_MAJOR_I_5
},
127 { "I_6", FR500_MAJOR_I_6
},
128 { "B_1", FR500_MAJOR_B_1
},
129 { "B_2", FR500_MAJOR_B_2
},
130 { "B_3", FR500_MAJOR_B_3
},
131 { "B_4", FR500_MAJOR_B_4
},
132 { "B_5", FR500_MAJOR_B_5
},
133 { "B_6", FR500_MAJOR_B_6
},
134 { "C_1", FR500_MAJOR_C_1
},
135 { "C_2", FR500_MAJOR_C_2
},
136 { "F_1", FR500_MAJOR_F_1
},
137 { "F_2", FR500_MAJOR_F_2
},
138 { "F_3", FR500_MAJOR_F_3
},
139 { "F_4", FR500_MAJOR_F_4
},
140 { "F_5", FR500_MAJOR_F_5
},
141 { "F_6", FR500_MAJOR_F_6
},
142 { "F_7", FR500_MAJOR_F_7
},
143 { "F_8", FR500_MAJOR_F_8
},
144 { "M_1", FR500_MAJOR_M_1
},
145 { "M_2", FR500_MAJOR_M_2
},
146 { "M_3", FR500_MAJOR_M_3
},
147 { "M_4", FR500_MAJOR_M_4
},
148 { "M_5", FR500_MAJOR_M_5
},
149 { "M_6", FR500_MAJOR_M_6
},
150 { "M_7", FR500_MAJOR_M_7
},
151 { "M_8", FR500_MAJOR_M_8
},
155 static const CGEN_ATTR_ENTRY FR550_MAJOR_attr
[] =
157 { "NONE", FR550_MAJOR_NONE
},
158 { "I_1", FR550_MAJOR_I_1
},
159 { "I_2", FR550_MAJOR_I_2
},
160 { "I_3", FR550_MAJOR_I_3
},
161 { "I_4", FR550_MAJOR_I_4
},
162 { "I_5", FR550_MAJOR_I_5
},
163 { "I_6", FR550_MAJOR_I_6
},
164 { "I_7", FR550_MAJOR_I_7
},
165 { "I_8", FR550_MAJOR_I_8
},
166 { "B_1", FR550_MAJOR_B_1
},
167 { "B_2", FR550_MAJOR_B_2
},
168 { "B_3", FR550_MAJOR_B_3
},
169 { "B_4", FR550_MAJOR_B_4
},
170 { "B_5", FR550_MAJOR_B_5
},
171 { "B_6", FR550_MAJOR_B_6
},
172 { "C_1", FR550_MAJOR_C_1
},
173 { "C_2", FR550_MAJOR_C_2
},
174 { "F_1", FR550_MAJOR_F_1
},
175 { "F_2", FR550_MAJOR_F_2
},
176 { "F_3", FR550_MAJOR_F_3
},
177 { "F_4", FR550_MAJOR_F_4
},
178 { "M_1", FR550_MAJOR_M_1
},
179 { "M_2", FR550_MAJOR_M_2
},
180 { "M_3", FR550_MAJOR_M_3
},
181 { "M_4", FR550_MAJOR_M_4
},
182 { "M_5", FR550_MAJOR_M_5
},
186 const CGEN_ATTR_TABLE frv_cgen_ifield_attr_table
[] =
188 { "MACH", & MACH_attr
[0], & MACH_attr
[0] },
189 { "VIRTUAL", &bool_attr
[0], &bool_attr
[0] },
190 { "PCREL-ADDR", &bool_attr
[0], &bool_attr
[0] },
191 { "ABS-ADDR", &bool_attr
[0], &bool_attr
[0] },
192 { "RESERVED", &bool_attr
[0], &bool_attr
[0] },
193 { "SIGN-OPT", &bool_attr
[0], &bool_attr
[0] },
194 { "SIGNED", &bool_attr
[0], &bool_attr
[0] },
198 const CGEN_ATTR_TABLE frv_cgen_hardware_attr_table
[] =
200 { "MACH", & MACH_attr
[0], & MACH_attr
[0] },
201 { "VIRTUAL", &bool_attr
[0], &bool_attr
[0] },
202 { "CACHE-ADDR", &bool_attr
[0], &bool_attr
[0] },
203 { "PC", &bool_attr
[0], &bool_attr
[0] },
204 { "PROFILE", &bool_attr
[0], &bool_attr
[0] },
208 const CGEN_ATTR_TABLE frv_cgen_operand_attr_table
[] =
210 { "MACH", & MACH_attr
[0], & MACH_attr
[0] },
211 { "VIRTUAL", &bool_attr
[0], &bool_attr
[0] },
212 { "PCREL-ADDR", &bool_attr
[0], &bool_attr
[0] },
213 { "ABS-ADDR", &bool_attr
[0], &bool_attr
[0] },
214 { "SIGN-OPT", &bool_attr
[0], &bool_attr
[0] },
215 { "SIGNED", &bool_attr
[0], &bool_attr
[0] },
216 { "NEGATIVE", &bool_attr
[0], &bool_attr
[0] },
217 { "RELAX", &bool_attr
[0], &bool_attr
[0] },
218 { "SEM-ONLY", &bool_attr
[0], &bool_attr
[0] },
219 { "HASH-PREFIX", &bool_attr
[0], &bool_attr
[0] },
223 const CGEN_ATTR_TABLE frv_cgen_insn_attr_table
[] =
225 { "MACH", & MACH_attr
[0], & MACH_attr
[0] },
226 { "UNIT", & UNIT_attr
[0], & UNIT_attr
[0] },
227 { "FR400-MAJOR", & FR400_MAJOR_attr
[0], & FR400_MAJOR_attr
[0] },
228 { "FR500-MAJOR", & FR500_MAJOR_attr
[0], & FR500_MAJOR_attr
[0] },
229 { "FR550-MAJOR", & FR550_MAJOR_attr
[0], & FR550_MAJOR_attr
[0] },
230 { "ALIAS", &bool_attr
[0], &bool_attr
[0] },
231 { "VIRTUAL", &bool_attr
[0], &bool_attr
[0] },
232 { "UNCOND-CTI", &bool_attr
[0], &bool_attr
[0] },
233 { "COND-CTI", &bool_attr
[0], &bool_attr
[0] },
234 { "SKIP-CTI", &bool_attr
[0], &bool_attr
[0] },
235 { "DELAY-SLOT", &bool_attr
[0], &bool_attr
[0] },
236 { "RELAXABLE", &bool_attr
[0], &bool_attr
[0] },
237 { "RELAXED", &bool_attr
[0], &bool_attr
[0] },
238 { "NO-DIS", &bool_attr
[0], &bool_attr
[0] },
239 { "PBB", &bool_attr
[0], &bool_attr
[0] },
240 { "PRIVILEGED", &bool_attr
[0], &bool_attr
[0] },
241 { "NON-EXCEPTING", &bool_attr
[0], &bool_attr
[0] },
242 { "CONDITIONAL", &bool_attr
[0], &bool_attr
[0] },
243 { "FR-ACCESS", &bool_attr
[0], &bool_attr
[0] },
244 { "PRESERVE-OVF", &bool_attr
[0], &bool_attr
[0] },
248 /* Instruction set variants. */
250 static const CGEN_ISA frv_cgen_isa_table
[] = {
251 { "frv", 32, 32, 32, 32 },
255 /* Machine variants. */
257 static const CGEN_MACH frv_cgen_mach_table
[] = {
258 { "frv", "frv", MACH_FRV
, 0 },
259 { "fr550", "fr550", MACH_FR550
, 0 },
260 { "fr500", "fr500", MACH_FR500
, 0 },
261 { "tomcat", "tomcat", MACH_TOMCAT
, 0 },
262 { "fr400", "fr400", MACH_FR400
, 0 },
263 { "simple", "simple", MACH_SIMPLE
, 0 },
267 static CGEN_KEYWORD_ENTRY frv_cgen_opval_gr_names_entries
[] =
269 { "sp", 1, {0, {0}}, 0, 0 },
270 { "fp", 2, {0, {0}}, 0, 0 },
271 { "gr0", 0, {0, {0}}, 0, 0 },
272 { "gr1", 1, {0, {0}}, 0, 0 },
273 { "gr2", 2, {0, {0}}, 0, 0 },
274 { "gr3", 3, {0, {0}}, 0, 0 },
275 { "gr4", 4, {0, {0}}, 0, 0 },
276 { "gr5", 5, {0, {0}}, 0, 0 },
277 { "gr6", 6, {0, {0}}, 0, 0 },
278 { "gr7", 7, {0, {0}}, 0, 0 },
279 { "gr8", 8, {0, {0}}, 0, 0 },
280 { "gr9", 9, {0, {0}}, 0, 0 },
281 { "gr10", 10, {0, {0}}, 0, 0 },
282 { "gr11", 11, {0, {0}}, 0, 0 },
283 { "gr12", 12, {0, {0}}, 0, 0 },
284 { "gr13", 13, {0, {0}}, 0, 0 },
285 { "gr14", 14, {0, {0}}, 0, 0 },
286 { "gr15", 15, {0, {0}}, 0, 0 },
287 { "gr16", 16, {0, {0}}, 0, 0 },
288 { "gr17", 17, {0, {0}}, 0, 0 },
289 { "gr18", 18, {0, {0}}, 0, 0 },
290 { "gr19", 19, {0, {0}}, 0, 0 },
291 { "gr20", 20, {0, {0}}, 0, 0 },
292 { "gr21", 21, {0, {0}}, 0, 0 },
293 { "gr22", 22, {0, {0}}, 0, 0 },
294 { "gr23", 23, {0, {0}}, 0, 0 },
295 { "gr24", 24, {0, {0}}, 0, 0 },
296 { "gr25", 25, {0, {0}}, 0, 0 },
297 { "gr26", 26, {0, {0}}, 0, 0 },
298 { "gr27", 27, {0, {0}}, 0, 0 },
299 { "gr28", 28, {0, {0}}, 0, 0 },
300 { "gr29", 29, {0, {0}}, 0, 0 },
301 { "gr30", 30, {0, {0}}, 0, 0 },
302 { "gr31", 31, {0, {0}}, 0, 0 },
303 { "gr32", 32, {0, {0}}, 0, 0 },
304 { "gr33", 33, {0, {0}}, 0, 0 },
305 { "gr34", 34, {0, {0}}, 0, 0 },
306 { "gr35", 35, {0, {0}}, 0, 0 },
307 { "gr36", 36, {0, {0}}, 0, 0 },
308 { "gr37", 37, {0, {0}}, 0, 0 },
309 { "gr38", 38, {0, {0}}, 0, 0 },
310 { "gr39", 39, {0, {0}}, 0, 0 },
311 { "gr40", 40, {0, {0}}, 0, 0 },
312 { "gr41", 41, {0, {0}}, 0, 0 },
313 { "gr42", 42, {0, {0}}, 0, 0 },
314 { "gr43", 43, {0, {0}}, 0, 0 },
315 { "gr44", 44, {0, {0}}, 0, 0 },
316 { "gr45", 45, {0, {0}}, 0, 0 },
317 { "gr46", 46, {0, {0}}, 0, 0 },
318 { "gr47", 47, {0, {0}}, 0, 0 },
319 { "gr48", 48, {0, {0}}, 0, 0 },
320 { "gr49", 49, {0, {0}}, 0, 0 },
321 { "gr50", 50, {0, {0}}, 0, 0 },
322 { "gr51", 51, {0, {0}}, 0, 0 },
323 { "gr52", 52, {0, {0}}, 0, 0 },
324 { "gr53", 53, {0, {0}}, 0, 0 },
325 { "gr54", 54, {0, {0}}, 0, 0 },
326 { "gr55", 55, {0, {0}}, 0, 0 },
327 { "gr56", 56, {0, {0}}, 0, 0 },
328 { "gr57", 57, {0, {0}}, 0, 0 },
329 { "gr58", 58, {0, {0}}, 0, 0 },
330 { "gr59", 59, {0, {0}}, 0, 0 },
331 { "gr60", 60, {0, {0}}, 0, 0 },
332 { "gr61", 61, {0, {0}}, 0, 0 },
333 { "gr62", 62, {0, {0}}, 0, 0 },
334 { "gr63", 63, {0, {0}}, 0, 0 }
337 CGEN_KEYWORD frv_cgen_opval_gr_names
=
339 & frv_cgen_opval_gr_names_entries
[0],
344 static CGEN_KEYWORD_ENTRY frv_cgen_opval_fr_names_entries
[] =
346 { "fr0", 0, {0, {0}}, 0, 0 },
347 { "fr1", 1, {0, {0}}, 0, 0 },
348 { "fr2", 2, {0, {0}}, 0, 0 },
349 { "fr3", 3, {0, {0}}, 0, 0 },
350 { "fr4", 4, {0, {0}}, 0, 0 },
351 { "fr5", 5, {0, {0}}, 0, 0 },
352 { "fr6", 6, {0, {0}}, 0, 0 },
353 { "fr7", 7, {0, {0}}, 0, 0 },
354 { "fr8", 8, {0, {0}}, 0, 0 },
355 { "fr9", 9, {0, {0}}, 0, 0 },
356 { "fr10", 10, {0, {0}}, 0, 0 },
357 { "fr11", 11, {0, {0}}, 0, 0 },
358 { "fr12", 12, {0, {0}}, 0, 0 },
359 { "fr13", 13, {0, {0}}, 0, 0 },
360 { "fr14", 14, {0, {0}}, 0, 0 },
361 { "fr15", 15, {0, {0}}, 0, 0 },
362 { "fr16", 16, {0, {0}}, 0, 0 },
363 { "fr17", 17, {0, {0}}, 0, 0 },
364 { "fr18", 18, {0, {0}}, 0, 0 },
365 { "fr19", 19, {0, {0}}, 0, 0 },
366 { "fr20", 20, {0, {0}}, 0, 0 },
367 { "fr21", 21, {0, {0}}, 0, 0 },
368 { "fr22", 22, {0, {0}}, 0, 0 },
369 { "fr23", 23, {0, {0}}, 0, 0 },
370 { "fr24", 24, {0, {0}}, 0, 0 },
371 { "fr25", 25, {0, {0}}, 0, 0 },
372 { "fr26", 26, {0, {0}}, 0, 0 },
373 { "fr27", 27, {0, {0}}, 0, 0 },
374 { "fr28", 28, {0, {0}}, 0, 0 },
375 { "fr29", 29, {0, {0}}, 0, 0 },
376 { "fr30", 30, {0, {0}}, 0, 0 },
377 { "fr31", 31, {0, {0}}, 0, 0 },
378 { "fr32", 32, {0, {0}}, 0, 0 },
379 { "fr33", 33, {0, {0}}, 0, 0 },
380 { "fr34", 34, {0, {0}}, 0, 0 },
381 { "fr35", 35, {0, {0}}, 0, 0 },
382 { "fr36", 36, {0, {0}}, 0, 0 },
383 { "fr37", 37, {0, {0}}, 0, 0 },
384 { "fr38", 38, {0, {0}}, 0, 0 },
385 { "fr39", 39, {0, {0}}, 0, 0 },
386 { "fr40", 40, {0, {0}}, 0, 0 },
387 { "fr41", 41, {0, {0}}, 0, 0 },
388 { "fr42", 42, {0, {0}}, 0, 0 },
389 { "fr43", 43, {0, {0}}, 0, 0 },
390 { "fr44", 44, {0, {0}}, 0, 0 },
391 { "fr45", 45, {0, {0}}, 0, 0 },
392 { "fr46", 46, {0, {0}}, 0, 0 },
393 { "fr47", 47, {0, {0}}, 0, 0 },
394 { "fr48", 48, {0, {0}}, 0, 0 },
395 { "fr49", 49, {0, {0}}, 0, 0 },
396 { "fr50", 50, {0, {0}}, 0, 0 },
397 { "fr51", 51, {0, {0}}, 0, 0 },
398 { "fr52", 52, {0, {0}}, 0, 0 },
399 { "fr53", 53, {0, {0}}, 0, 0 },
400 { "fr54", 54, {0, {0}}, 0, 0 },
401 { "fr55", 55, {0, {0}}, 0, 0 },
402 { "fr56", 56, {0, {0}}, 0, 0 },
403 { "fr57", 57, {0, {0}}, 0, 0 },
404 { "fr58", 58, {0, {0}}, 0, 0 },
405 { "fr59", 59, {0, {0}}, 0, 0 },
406 { "fr60", 60, {0, {0}}, 0, 0 },
407 { "fr61", 61, {0, {0}}, 0, 0 },
408 { "fr62", 62, {0, {0}}, 0, 0 },
409 { "fr63", 63, {0, {0}}, 0, 0 }
412 CGEN_KEYWORD frv_cgen_opval_fr_names
=
414 & frv_cgen_opval_fr_names_entries
[0],
419 static CGEN_KEYWORD_ENTRY frv_cgen_opval_cpr_names_entries
[] =
421 { "cpr0", 0, {0, {0}}, 0, 0 },
422 { "cpr1", 1, {0, {0}}, 0, 0 },
423 { "cpr2", 2, {0, {0}}, 0, 0 },
424 { "cpr3", 3, {0, {0}}, 0, 0 },
425 { "cpr4", 4, {0, {0}}, 0, 0 },
426 { "cpr5", 5, {0, {0}}, 0, 0 },
427 { "cpr6", 6, {0, {0}}, 0, 0 },
428 { "cpr7", 7, {0, {0}}, 0, 0 },
429 { "cpr8", 8, {0, {0}}, 0, 0 },
430 { "cpr9", 9, {0, {0}}, 0, 0 },
431 { "cpr10", 10, {0, {0}}, 0, 0 },
432 { "cpr11", 11, {0, {0}}, 0, 0 },
433 { "cpr12", 12, {0, {0}}, 0, 0 },
434 { "cpr13", 13, {0, {0}}, 0, 0 },
435 { "cpr14", 14, {0, {0}}, 0, 0 },
436 { "cpr15", 15, {0, {0}}, 0, 0 },
437 { "cpr16", 16, {0, {0}}, 0, 0 },
438 { "cpr17", 17, {0, {0}}, 0, 0 },
439 { "cpr18", 18, {0, {0}}, 0, 0 },
440 { "cpr19", 19, {0, {0}}, 0, 0 },
441 { "cpr20", 20, {0, {0}}, 0, 0 },
442 { "cpr21", 21, {0, {0}}, 0, 0 },
443 { "cpr22", 22, {0, {0}}, 0, 0 },
444 { "cpr23", 23, {0, {0}}, 0, 0 },
445 { "cpr24", 24, {0, {0}}, 0, 0 },
446 { "cpr25", 25, {0, {0}}, 0, 0 },
447 { "cpr26", 26, {0, {0}}, 0, 0 },
448 { "cpr27", 27, {0, {0}}, 0, 0 },
449 { "cpr28", 28, {0, {0}}, 0, 0 },
450 { "cpr29", 29, {0, {0}}, 0, 0 },
451 { "cpr30", 30, {0, {0}}, 0, 0 },
452 { "cpr31", 31, {0, {0}}, 0, 0 },
453 { "cpr32", 32, {0, {0}}, 0, 0 },
454 { "cpr33", 33, {0, {0}}, 0, 0 },
455 { "cpr34", 34, {0, {0}}, 0, 0 },
456 { "cpr35", 35, {0, {0}}, 0, 0 },
457 { "cpr36", 36, {0, {0}}, 0, 0 },
458 { "cpr37", 37, {0, {0}}, 0, 0 },
459 { "cpr38", 38, {0, {0}}, 0, 0 },
460 { "cpr39", 39, {0, {0}}, 0, 0 },
461 { "cpr40", 40, {0, {0}}, 0, 0 },
462 { "cpr41", 41, {0, {0}}, 0, 0 },
463 { "cpr42", 42, {0, {0}}, 0, 0 },
464 { "cpr43", 43, {0, {0}}, 0, 0 },
465 { "cpr44", 44, {0, {0}}, 0, 0 },
466 { "cpr45", 45, {0, {0}}, 0, 0 },
467 { "cpr46", 46, {0, {0}}, 0, 0 },
468 { "cpr47", 47, {0, {0}}, 0, 0 },
469 { "cpr48", 48, {0, {0}}, 0, 0 },
470 { "cpr49", 49, {0, {0}}, 0, 0 },
471 { "cpr50", 50, {0, {0}}, 0, 0 },
472 { "cpr51", 51, {0, {0}}, 0, 0 },
473 { "cpr52", 52, {0, {0}}, 0, 0 },
474 { "cpr53", 53, {0, {0}}, 0, 0 },
475 { "cpr54", 54, {0, {0}}, 0, 0 },
476 { "cpr55", 55, {0, {0}}, 0, 0 },
477 { "cpr56", 56, {0, {0}}, 0, 0 },
478 { "cpr57", 57, {0, {0}}, 0, 0 },
479 { "cpr58", 58, {0, {0}}, 0, 0 },
480 { "cpr59", 59, {0, {0}}, 0, 0 },
481 { "cpr60", 60, {0, {0}}, 0, 0 },
482 { "cpr61", 61, {0, {0}}, 0, 0 },
483 { "cpr62", 62, {0, {0}}, 0, 0 },
484 { "cpr63", 63, {0, {0}}, 0, 0 }
487 CGEN_KEYWORD frv_cgen_opval_cpr_names
=
489 & frv_cgen_opval_cpr_names_entries
[0],
494 static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries
[] =
496 { "psr", 0, {0, {0}}, 0, 0 },
497 { "pcsr", 1, {0, {0}}, 0, 0 },
498 { "bpcsr", 2, {0, {0}}, 0, 0 },
499 { "tbr", 3, {0, {0}}, 0, 0 },
500 { "bpsr", 4, {0, {0}}, 0, 0 },
501 { "hsr0", 16, {0, {0}}, 0, 0 },
502 { "hsr1", 17, {0, {0}}, 0, 0 },
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1237 { "iamlr44", 1708, {0, {0}}, 0, 0 },
1238 { "iamlr45", 1709, {0, {0}}, 0, 0 },
1239 { "iamlr46", 1710, {0, {0}}, 0, 0 },
1240 { "iamlr47", 1711, {0, {0}}, 0, 0 },
1241 { "iamlr48", 1712, {0, {0}}, 0, 0 },
1242 { "iamlr49", 1713, {0, {0}}, 0, 0 },
1243 { "iamlr50", 1714, {0, {0}}, 0, 0 },
1244 { "iamlr51", 1715, {0, {0}}, 0, 0 },
1245 { "iamlr52", 1716, {0, {0}}, 0, 0 },
1246 { "iamlr53", 1717, {0, {0}}, 0, 0 },
1247 { "iamlr54", 1718, {0, {0}}, 0, 0 },
1248 { "iamlr55", 1719, {0, {0}}, 0, 0 },
1249 { "iamlr56", 1720, {0, {0}}, 0, 0 },
1250 { "iamlr57", 1721, {0, {0}}, 0, 0 },
1251 { "iamlr58", 1722, {0, {0}}, 0, 0 },
1252 { "iamlr59", 1723, {0, {0}}, 0, 0 },
1253 { "iamlr60", 1724, {0, {0}}, 0, 0 },
1254 { "iamlr61", 1725, {0, {0}}, 0, 0 },
1255 { "iamlr62", 1726, {0, {0}}, 0, 0 },
1256 { "iamlr63", 1727, {0, {0}}, 0, 0 },
1257 { "iampr0", 1728, {0, {0}}, 0, 0 },
1258 { "iampr1", 1729, {0, {0}}, 0, 0 },
1259 { "iampr2", 1730, {0, {0}}, 0, 0 },
1260 { "iampr3", 1731, {0, {0}}, 0, 0 },
1261 { "iampr4", 1732, {0, {0}}, 0, 0 },
1262 { "iampr5", 1733, {0, {0}}, 0, 0 },
1263 { "iampr6", 1734, {0, {0}}, 0, 0 },
1264 { "iampr7", 1735, {0, {0}}, 0, 0 },
1265 { "iampr8", 1736, {0, {0}}, 0, 0 },
1266 { "iampr9", 1737, {0, {0}}, 0, 0 },
1267 { "iampr10", 1738, {0, {0}}, 0, 0 },
1268 { "iampr11", 1739, {0, {0}}, 0, 0 },
1269 { "iampr12", 1740, {0, {0}}, 0, 0 },
1270 { "iampr13", 1741, {0, {0}}, 0, 0 },
1271 { "iampr14", 1742, {0, {0}}, 0, 0 },
1272 { "iampr15", 1743, {0, {0}}, 0, 0 },
1273 { "iampr16", 1744, {0, {0}}, 0, 0 },
1274 { "iampr17", 1745, {0, {0}}, 0, 0 },
1275 { "iampr18", 1746, {0, {0}}, 0, 0 },
1276 { "iampr19", 1747, {0, {0}}, 0, 0 },
1277 { "iampr20", 1748, {0, {0}}, 0, 0 },
1278 { "iampr21", 1749, {0, {0}}, 0, 0 },
1279 { "iampr22", 1750, {0, {0}}, 0, 0 },
1280 { "iampr23", 1751, {0, {0}}, 0, 0 },
1281 { "iampr24", 1752, {0, {0}}, 0, 0 },
1282 { "iampr25", 1753, {0, {0}}, 0, 0 },
1283 { "iampr26", 1754, {0, {0}}, 0, 0 },
1284 { "iampr27", 1755, {0, {0}}, 0, 0 },
1285 { "iampr28", 1756, {0, {0}}, 0, 0 },
1286 { "iampr29", 1757, {0, {0}}, 0, 0 },
1287 { "iampr30", 1758, {0, {0}}, 0, 0 },
1288 { "iampr31", 1759, {0, {0}}, 0, 0 },
1289 { "iampr32", 1760, {0, {0}}, 0, 0 },
1290 { "iampr33", 1761, {0, {0}}, 0, 0 },
1291 { "iampr34", 1762, {0, {0}}, 0, 0 },
1292 { "iampr35", 1763, {0, {0}}, 0, 0 },
1293 { "iampr36", 1764, {0, {0}}, 0, 0 },
1294 { "iampr37", 1765, {0, {0}}, 0, 0 },
1295 { "iampr38", 1766, {0, {0}}, 0, 0 },
1296 { "iampr39", 1767, {0, {0}}, 0, 0 },
1297 { "iampr40", 1768, {0, {0}}, 0, 0 },
1298 { "iampr41", 1769, {0, {0}}, 0, 0 },
1299 { "iampr42", 1770, {0, {0}}, 0, 0 },
1300 { "iampr43", 1771, {0, {0}}, 0, 0 },
1301 { "iampr44", 1772, {0, {0}}, 0, 0 },
1302 { "iampr45", 1773, {0, {0}}, 0, 0 },
1303 { "iampr46", 1774, {0, {0}}, 0, 0 },
1304 { "iampr47", 1775, {0, {0}}, 0, 0 },
1305 { "iampr48", 1776, {0, {0}}, 0, 0 },
1306 { "iampr49", 1777, {0, {0}}, 0, 0 },
1307 { "iampr50", 1778, {0, {0}}, 0, 0 },
1308 { "iampr51", 1779, {0, {0}}, 0, 0 },
1309 { "iampr52", 1780, {0, {0}}, 0, 0 },
1310 { "iampr53", 1781, {0, {0}}, 0, 0 },
1311 { "iampr54", 1782, {0, {0}}, 0, 0 },
1312 { "iampr55", 1783, {0, {0}}, 0, 0 },
1313 { "iampr56", 1784, {0, {0}}, 0, 0 },
1314 { "iampr57", 1785, {0, {0}}, 0, 0 },
1315 { "iampr58", 1786, {0, {0}}, 0, 0 },
1316 { "iampr59", 1787, {0, {0}}, 0, 0 },
1317 { "iampr60", 1788, {0, {0}}, 0, 0 },
1318 { "iampr61", 1789, {0, {0}}, 0, 0 },
1319 { "iampr62", 1790, {0, {0}}, 0, 0 },
1320 { "iampr63", 1791, {0, {0}}, 0, 0 },
1321 { "damlr0", 1792, {0, {0}}, 0, 0 },
1322 { "damlr1", 1793, {0, {0}}, 0, 0 },
1323 { "damlr2", 1794, {0, {0}}, 0, 0 },
1324 { "damlr3", 1795, {0, {0}}, 0, 0 },
1325 { "damlr4", 1796, {0, {0}}, 0, 0 },
1326 { "damlr5", 1797, {0, {0}}, 0, 0 },
1327 { "damlr6", 1798, {0, {0}}, 0, 0 },
1328 { "damlr7", 1799, {0, {0}}, 0, 0 },
1329 { "damlr8", 1800, {0, {0}}, 0, 0 },
1330 { "damlr9", 1801, {0, {0}}, 0, 0 },
1331 { "damlr10", 1802, {0, {0}}, 0, 0 },
1332 { "damlr11", 1803, {0, {0}}, 0, 0 },
1333 { "damlr12", 1804, {0, {0}}, 0, 0 },
1334 { "damlr13", 1805, {0, {0}}, 0, 0 },
1335 { "damlr14", 1806, {0, {0}}, 0, 0 },
1336 { "damlr15", 1807, {0, {0}}, 0, 0 },
1337 { "damlr16", 1808, {0, {0}}, 0, 0 },
1338 { "damlr17", 1809, {0, {0}}, 0, 0 },
1339 { "damlr18", 1810, {0, {0}}, 0, 0 },
1340 { "damlr19", 1811, {0, {0}}, 0, 0 },
1341 { "damlr20", 1812, {0, {0}}, 0, 0 },
1342 { "damlr21", 1813, {0, {0}}, 0, 0 },
1343 { "damlr22", 1814, {0, {0}}, 0, 0 },
1344 { "damlr23", 1815, {0, {0}}, 0, 0 },
1345 { "damlr24", 1816, {0, {0}}, 0, 0 },
1346 { "damlr25", 1817, {0, {0}}, 0, 0 },
1347 { "damlr26", 1818, {0, {0}}, 0, 0 },
1348 { "damlr27", 1819, {0, {0}}, 0, 0 },
1349 { "damlr28", 1820, {0, {0}}, 0, 0 },
1350 { "damlr29", 1821, {0, {0}}, 0, 0 },
1351 { "damlr30", 1822, {0, {0}}, 0, 0 },
1352 { "damlr31", 1823, {0, {0}}, 0, 0 },
1353 { "damlr32", 1824, {0, {0}}, 0, 0 },
1354 { "damlr33", 1825, {0, {0}}, 0, 0 },
1355 { "damlr34", 1826, {0, {0}}, 0, 0 },
1356 { "damlr35", 1827, {0, {0}}, 0, 0 },
1357 { "damlr36", 1828, {0, {0}}, 0, 0 },
1358 { "damlr37", 1829, {0, {0}}, 0, 0 },
1359 { "damlr38", 1830, {0, {0}}, 0, 0 },
1360 { "damlr39", 1831, {0, {0}}, 0, 0 },
1361 { "damlr40", 1832, {0, {0}}, 0, 0 },
1362 { "damlr41", 1833, {0, {0}}, 0, 0 },
1363 { "damlr42", 1834, {0, {0}}, 0, 0 },
1364 { "damlr43", 1835, {0, {0}}, 0, 0 },
1365 { "damlr44", 1836, {0, {0}}, 0, 0 },
1366 { "damlr45", 1837, {0, {0}}, 0, 0 },
1367 { "damlr46", 1838, {0, {0}}, 0, 0 },
1368 { "damlr47", 1839, {0, {0}}, 0, 0 },
1369 { "damlr48", 1840, {0, {0}}, 0, 0 },
1370 { "damlr49", 1841, {0, {0}}, 0, 0 },
1371 { "damlr50", 1842, {0, {0}}, 0, 0 },
1372 { "damlr51", 1843, {0, {0}}, 0, 0 },
1373 { "damlr52", 1844, {0, {0}}, 0, 0 },
1374 { "damlr53", 1845, {0, {0}}, 0, 0 },
1375 { "damlr54", 1846, {0, {0}}, 0, 0 },
1376 { "damlr55", 1847, {0, {0}}, 0, 0 },
1377 { "damlr56", 1848, {0, {0}}, 0, 0 },
1378 { "damlr57", 1849, {0, {0}}, 0, 0 },
1379 { "damlr58", 1850, {0, {0}}, 0, 0 },
1380 { "damlr59", 1851, {0, {0}}, 0, 0 },
1381 { "damlr60", 1852, {0, {0}}, 0, 0 },
1382 { "damlr61", 1853, {0, {0}}, 0, 0 },
1383 { "damlr62", 1854, {0, {0}}, 0, 0 },
1384 { "damlr63", 1855, {0, {0}}, 0, 0 },
1385 { "dampr0", 1856, {0, {0}}, 0, 0 },
1386 { "dampr1", 1857, {0, {0}}, 0, 0 },
1387 { "dampr2", 1858, {0, {0}}, 0, 0 },
1388 { "dampr3", 1859, {0, {0}}, 0, 0 },
1389 { "dampr4", 1860, {0, {0}}, 0, 0 },
1390 { "dampr5", 1861, {0, {0}}, 0, 0 },
1391 { "dampr6", 1862, {0, {0}}, 0, 0 },
1392 { "dampr7", 1863, {0, {0}}, 0, 0 },
1393 { "dampr8", 1864, {0, {0}}, 0, 0 },
1394 { "dampr9", 1865, {0, {0}}, 0, 0 },
1395 { "dampr10", 1866, {0, {0}}, 0, 0 },
1396 { "dampr11", 1867, {0, {0}}, 0, 0 },
1397 { "dampr12", 1868, {0, {0}}, 0, 0 },
1398 { "dampr13", 1869, {0, {0}}, 0, 0 },
1399 { "dampr14", 1870, {0, {0}}, 0, 0 },
1400 { "dampr15", 1871, {0, {0}}, 0, 0 },
1401 { "dampr16", 1872, {0, {0}}, 0, 0 },
1402 { "dampr17", 1873, {0, {0}}, 0, 0 },
1403 { "dampr18", 1874, {0, {0}}, 0, 0 },
1404 { "dampr19", 1875, {0, {0}}, 0, 0 },
1405 { "dampr20", 1876, {0, {0}}, 0, 0 },
1406 { "dampr21", 1877, {0, {0}}, 0, 0 },
1407 { "dampr22", 1878, {0, {0}}, 0, 0 },
1408 { "dampr23", 1879, {0, {0}}, 0, 0 },
1409 { "dampr24", 1880, {0, {0}}, 0, 0 },
1410 { "dampr25", 1881, {0, {0}}, 0, 0 },
1411 { "dampr26", 1882, {0, {0}}, 0, 0 },
1412 { "dampr27", 1883, {0, {0}}, 0, 0 },
1413 { "dampr28", 1884, {0, {0}}, 0, 0 },
1414 { "dampr29", 1885, {0, {0}}, 0, 0 },
1415 { "dampr30", 1886, {0, {0}}, 0, 0 },
1416 { "dampr31", 1887, {0, {0}}, 0, 0 },
1417 { "dampr32", 1888, {0, {0}}, 0, 0 },
1418 { "dampr33", 1889, {0, {0}}, 0, 0 },
1419 { "dampr34", 1890, {0, {0}}, 0, 0 },
1420 { "dampr35", 1891, {0, {0}}, 0, 0 },
1421 { "dampr36", 1892, {0, {0}}, 0, 0 },
1422 { "dampr37", 1893, {0, {0}}, 0, 0 },
1423 { "dampr38", 1894, {0, {0}}, 0, 0 },
1424 { "dampr39", 1895, {0, {0}}, 0, 0 },
1425 { "dampr40", 1896, {0, {0}}, 0, 0 },
1426 { "dampr41", 1897, {0, {0}}, 0, 0 },
1427 { "dampr42", 1898, {0, {0}}, 0, 0 },
1428 { "dampr43", 1899, {0, {0}}, 0, 0 },
1429 { "dampr44", 1900, {0, {0}}, 0, 0 },
1430 { "dampr45", 1901, {0, {0}}, 0, 0 },
1431 { "dampr46", 1902, {0, {0}}, 0, 0 },
1432 { "dampr47", 1903, {0, {0}}, 0, 0 },
1433 { "dampr48", 1904, {0, {0}}, 0, 0 },
1434 { "dampr49", 1905, {0, {0}}, 0, 0 },
1435 { "dampr50", 1906, {0, {0}}, 0, 0 },
1436 { "dampr51", 1907, {0, {0}}, 0, 0 },
1437 { "dampr52", 1908, {0, {0}}, 0, 0 },
1438 { "dampr53", 1909, {0, {0}}, 0, 0 },
1439 { "dampr54", 1910, {0, {0}}, 0, 0 },
1440 { "dampr55", 1911, {0, {0}}, 0, 0 },
1441 { "dampr56", 1912, {0, {0}}, 0, 0 },
1442 { "dampr57", 1913, {0, {0}}, 0, 0 },
1443 { "dampr58", 1914, {0, {0}}, 0, 0 },
1444 { "dampr59", 1915, {0, {0}}, 0, 0 },
1445 { "dampr60", 1916, {0, {0}}, 0, 0 },
1446 { "dampr61", 1917, {0, {0}}, 0, 0 },
1447 { "dampr62", 1918, {0, {0}}, 0, 0 },
1448 { "dampr63", 1919, {0, {0}}, 0, 0 },
1449 { "amcr", 1920, {0, {0}}, 0, 0 },
1450 { "stbar", 1921, {0, {0}}, 0, 0 },
1451 { "mmcr", 1922, {0, {0}}, 0, 0 },
1452 { "dcr", 2048, {0, {0}}, 0, 0 },
1453 { "brr", 2049, {0, {0}}, 0, 0 },
1454 { "nmar", 2050, {0, {0}}, 0, 0 },
1455 { "ibar0", 2052, {0, {0}}, 0, 0 },
1456 { "ibar1", 2053, {0, {0}}, 0, 0 },
1457 { "ibar2", 2054, {0, {0}}, 0, 0 },
1458 { "ibar3", 2055, {0, {0}}, 0, 0 },
1459 { "dbar0", 2056, {0, {0}}, 0, 0 },
1460 { "dbar1", 2057, {0, {0}}, 0, 0 },
1461 { "dbar2", 2058, {0, {0}}, 0, 0 },
1462 { "dbar3", 2059, {0, {0}}, 0, 0 },
1463 { "dbdr00", 2060, {0, {0}}, 0, 0 },
1464 { "dbdr01", 2061, {0, {0}}, 0, 0 },
1465 { "dbdr02", 2062, {0, {0}}, 0, 0 },
1466 { "dbdr03", 2063, {0, {0}}, 0, 0 },
1467 { "dbdr10", 2064, {0, {0}}, 0, 0 },
1468 { "dbdr11", 2065, {0, {0}}, 0, 0 },
1469 { "dbdr12", 2066, {0, {0}}, 0, 0 },
1470 { "dbdr13", 2067, {0, {0}}, 0, 0 },
1471 { "dbdr20", 2068, {0, {0}}, 0, 0 },
1472 { "dbdr21", 2069, {0, {0}}, 0, 0 },
1473 { "dbdr22", 2070, {0, {0}}, 0, 0 },
1474 { "dbdr23", 2071, {0, {0}}, 0, 0 },
1475 { "dbdr30", 2072, {0, {0}}, 0, 0 },
1476 { "dbdr31", 2073, {0, {0}}, 0, 0 },
1477 { "dbdr32", 2074, {0, {0}}, 0, 0 },
1478 { "dbdr33", 2075, {0, {0}}, 0, 0 },
1479 { "dbmr00", 2076, {0, {0}}, 0, 0 },
1480 { "dbmr01", 2077, {0, {0}}, 0, 0 },
1481 { "dbmr02", 2078, {0, {0}}, 0, 0 },
1482 { "dbmr03", 2079, {0, {0}}, 0, 0 },
1483 { "dbmr10", 2080, {0, {0}}, 0, 0 },
1484 { "dbmr11", 2081, {0, {0}}, 0, 0 },
1485 { "dbmr12", 2082, {0, {0}}, 0, 0 },
1486 { "dbmr13", 2083, {0, {0}}, 0, 0 },
1487 { "dbmr20", 2084, {0, {0}}, 0, 0 },
1488 { "dbmr21", 2085, {0, {0}}, 0, 0 },
1489 { "dbmr22", 2086, {0, {0}}, 0, 0 },
1490 { "dbmr23", 2087, {0, {0}}, 0, 0 },
1491 { "dbmr30", 2088, {0, {0}}, 0, 0 },
1492 { "dbmr31", 2089, {0, {0}}, 0, 0 },
1493 { "dbmr32", 2090, {0, {0}}, 0, 0 },
1494 { "dbmr33", 2091, {0, {0}}, 0, 0 },
1495 { "cpcfr", 2092, {0, {0}}, 0, 0 },
1496 { "cpcr", 2093, {0, {0}}, 0, 0 },
1497 { "cpsr", 2094, {0, {0}}, 0, 0 },
1498 { "cpesr0", 2096, {0, {0}}, 0, 0 },
1499 { "cpesr1", 2097, {0, {0}}, 0, 0 },
1500 { "cpemr0", 2098, {0, {0}}, 0, 0 },
1501 { "cpemr1", 2099, {0, {0}}, 0, 0 },
1502 { "ihsr8", 3848, {0, {0}}, 0, 0 }
1505 CGEN_KEYWORD frv_cgen_opval_spr_names
=
1507 & frv_cgen_opval_spr_names_entries
[0],
1512 static CGEN_KEYWORD_ENTRY frv_cgen_opval_accg_names_entries
[] =
1514 { "accg0", 0, {0, {0}}, 0, 0 },
1515 { "accg1", 1, {0, {0}}, 0, 0 },
1516 { "accg2", 2, {0, {0}}, 0, 0 },
1517 { "accg3", 3, {0, {0}}, 0, 0 },
1518 { "accg4", 4, {0, {0}}, 0, 0 },
1519 { "accg5", 5, {0, {0}}, 0, 0 },
1520 { "accg6", 6, {0, {0}}, 0, 0 },
1521 { "accg7", 7, {0, {0}}, 0, 0 },
1522 { "accg8", 8, {0, {0}}, 0, 0 },
1523 { "accg9", 9, {0, {0}}, 0, 0 },
1524 { "accg10", 10, {0, {0}}, 0, 0 },
1525 { "accg11", 11, {0, {0}}, 0, 0 },
1526 { "accg12", 12, {0, {0}}, 0, 0 },
1527 { "accg13", 13, {0, {0}}, 0, 0 },
1528 { "accg14", 14, {0, {0}}, 0, 0 },
1529 { "accg15", 15, {0, {0}}, 0, 0 },
1530 { "accg16", 16, {0, {0}}, 0, 0 },
1531 { "accg17", 17, {0, {0}}, 0, 0 },
1532 { "accg18", 18, {0, {0}}, 0, 0 },
1533 { "accg19", 19, {0, {0}}, 0, 0 },
1534 { "accg20", 20, {0, {0}}, 0, 0 },
1535 { "accg21", 21, {0, {0}}, 0, 0 },
1536 { "accg22", 22, {0, {0}}, 0, 0 },
1537 { "accg23", 23, {0, {0}}, 0, 0 },
1538 { "accg24", 24, {0, {0}}, 0, 0 },
1539 { "accg25", 25, {0, {0}}, 0, 0 },
1540 { "accg26", 26, {0, {0}}, 0, 0 },
1541 { "accg27", 27, {0, {0}}, 0, 0 },
1542 { "accg28", 28, {0, {0}}, 0, 0 },
1543 { "accg29", 29, {0, {0}}, 0, 0 },
1544 { "accg30", 30, {0, {0}}, 0, 0 },
1545 { "accg31", 31, {0, {0}}, 0, 0 },
1546 { "accg32", 32, {0, {0}}, 0, 0 },
1547 { "accg33", 33, {0, {0}}, 0, 0 },
1548 { "accg34", 34, {0, {0}}, 0, 0 },
1549 { "accg35", 35, {0, {0}}, 0, 0 },
1550 { "accg36", 36, {0, {0}}, 0, 0 },
1551 { "accg37", 37, {0, {0}}, 0, 0 },
1552 { "accg38", 38, {0, {0}}, 0, 0 },
1553 { "accg39", 39, {0, {0}}, 0, 0 },
1554 { "accg40", 40, {0, {0}}, 0, 0 },
1555 { "accg41", 41, {0, {0}}, 0, 0 },
1556 { "accg42", 42, {0, {0}}, 0, 0 },
1557 { "accg43", 43, {0, {0}}, 0, 0 },
1558 { "accg44", 44, {0, {0}}, 0, 0 },
1559 { "accg45", 45, {0, {0}}, 0, 0 },
1560 { "accg46", 46, {0, {0}}, 0, 0 },
1561 { "accg47", 47, {0, {0}}, 0, 0 },
1562 { "accg48", 48, {0, {0}}, 0, 0 },
1563 { "accg49", 49, {0, {0}}, 0, 0 },
1564 { "accg50", 50, {0, {0}}, 0, 0 },
1565 { "accg51", 51, {0, {0}}, 0, 0 },
1566 { "accg52", 52, {0, {0}}, 0, 0 },
1567 { "accg53", 53, {0, {0}}, 0, 0 },
1568 { "accg54", 54, {0, {0}}, 0, 0 },
1569 { "accg55", 55, {0, {0}}, 0, 0 },
1570 { "accg56", 56, {0, {0}}, 0, 0 },
1571 { "accg57", 57, {0, {0}}, 0, 0 },
1572 { "accg58", 58, {0, {0}}, 0, 0 },
1573 { "accg59", 59, {0, {0}}, 0, 0 },
1574 { "accg60", 60, {0, {0}}, 0, 0 },
1575 { "accg61", 61, {0, {0}}, 0, 0 },
1576 { "accg62", 62, {0, {0}}, 0, 0 },
1577 { "accg63", 63, {0, {0}}, 0, 0 }
1580 CGEN_KEYWORD frv_cgen_opval_accg_names
=
1582 & frv_cgen_opval_accg_names_entries
[0],
1587 static CGEN_KEYWORD_ENTRY frv_cgen_opval_acc_names_entries
[] =
1589 { "acc0", 0, {0, {0}}, 0, 0 },
1590 { "acc1", 1, {0, {0}}, 0, 0 },
1591 { "acc2", 2, {0, {0}}, 0, 0 },
1592 { "acc3", 3, {0, {0}}, 0, 0 },
1593 { "acc4", 4, {0, {0}}, 0, 0 },
1594 { "acc5", 5, {0, {0}}, 0, 0 },
1595 { "acc6", 6, {0, {0}}, 0, 0 },
1596 { "acc7", 7, {0, {0}}, 0, 0 },
1597 { "acc8", 8, {0, {0}}, 0, 0 },
1598 { "acc9", 9, {0, {0}}, 0, 0 },
1599 { "acc10", 10, {0, {0}}, 0, 0 },
1600 { "acc11", 11, {0, {0}}, 0, 0 },
1601 { "acc12", 12, {0, {0}}, 0, 0 },
1602 { "acc13", 13, {0, {0}}, 0, 0 },
1603 { "acc14", 14, {0, {0}}, 0, 0 },
1604 { "acc15", 15, {0, {0}}, 0, 0 },
1605 { "acc16", 16, {0, {0}}, 0, 0 },
1606 { "acc17", 17, {0, {0}}, 0, 0 },
1607 { "acc18", 18, {0, {0}}, 0, 0 },
1608 { "acc19", 19, {0, {0}}, 0, 0 },
1609 { "acc20", 20, {0, {0}}, 0, 0 },
1610 { "acc21", 21, {0, {0}}, 0, 0 },
1611 { "acc22", 22, {0, {0}}, 0, 0 },
1612 { "acc23", 23, {0, {0}}, 0, 0 },
1613 { "acc24", 24, {0, {0}}, 0, 0 },
1614 { "acc25", 25, {0, {0}}, 0, 0 },
1615 { "acc26", 26, {0, {0}}, 0, 0 },
1616 { "acc27", 27, {0, {0}}, 0, 0 },
1617 { "acc28", 28, {0, {0}}, 0, 0 },
1618 { "acc29", 29, {0, {0}}, 0, 0 },
1619 { "acc30", 30, {0, {0}}, 0, 0 },
1620 { "acc31", 31, {0, {0}}, 0, 0 },
1621 { "acc32", 32, {0, {0}}, 0, 0 },
1622 { "acc33", 33, {0, {0}}, 0, 0 },
1623 { "acc34", 34, {0, {0}}, 0, 0 },
1624 { "acc35", 35, {0, {0}}, 0, 0 },
1625 { "acc36", 36, {0, {0}}, 0, 0 },
1626 { "acc37", 37, {0, {0}}, 0, 0 },
1627 { "acc38", 38, {0, {0}}, 0, 0 },
1628 { "acc39", 39, {0, {0}}, 0, 0 },
1629 { "acc40", 40, {0, {0}}, 0, 0 },
1630 { "acc41", 41, {0, {0}}, 0, 0 },
1631 { "acc42", 42, {0, {0}}, 0, 0 },
1632 { "acc43", 43, {0, {0}}, 0, 0 },
1633 { "acc44", 44, {0, {0}}, 0, 0 },
1634 { "acc45", 45, {0, {0}}, 0, 0 },
1635 { "acc46", 46, {0, {0}}, 0, 0 },
1636 { "acc47", 47, {0, {0}}, 0, 0 },
1637 { "acc48", 48, {0, {0}}, 0, 0 },
1638 { "acc49", 49, {0, {0}}, 0, 0 },
1639 { "acc50", 50, {0, {0}}, 0, 0 },
1640 { "acc51", 51, {0, {0}}, 0, 0 },
1641 { "acc52", 52, {0, {0}}, 0, 0 },
1642 { "acc53", 53, {0, {0}}, 0, 0 },
1643 { "acc54", 54, {0, {0}}, 0, 0 },
1644 { "acc55", 55, {0, {0}}, 0, 0 },
1645 { "acc56", 56, {0, {0}}, 0, 0 },
1646 { "acc57", 57, {0, {0}}, 0, 0 },
1647 { "acc58", 58, {0, {0}}, 0, 0 },
1648 { "acc59", 59, {0, {0}}, 0, 0 },
1649 { "acc60", 60, {0, {0}}, 0, 0 },
1650 { "acc61", 61, {0, {0}}, 0, 0 },
1651 { "acc62", 62, {0, {0}}, 0, 0 },
1652 { "acc63", 63, {0, {0}}, 0, 0 }
1655 CGEN_KEYWORD frv_cgen_opval_acc_names
=
1657 & frv_cgen_opval_acc_names_entries
[0],
1662 static CGEN_KEYWORD_ENTRY frv_cgen_opval_iacc0_names_entries
[] =
1664 { "iacc0", 0, {0, {0}}, 0, 0 }
1667 CGEN_KEYWORD frv_cgen_opval_iacc0_names
=
1669 & frv_cgen_opval_iacc0_names_entries
[0],
1674 static CGEN_KEYWORD_ENTRY frv_cgen_opval_iccr_names_entries
[] =
1676 { "icc0", 0, {0, {0}}, 0, 0 },
1677 { "icc1", 1, {0, {0}}, 0, 0 },
1678 { "icc2", 2, {0, {0}}, 0, 0 },
1679 { "icc3", 3, {0, {0}}, 0, 0 }
1682 CGEN_KEYWORD frv_cgen_opval_iccr_names
=
1684 & frv_cgen_opval_iccr_names_entries
[0],
1689 static CGEN_KEYWORD_ENTRY frv_cgen_opval_fccr_names_entries
[] =
1691 { "fcc0", 0, {0, {0}}, 0, 0 },
1692 { "fcc1", 1, {0, {0}}, 0, 0 },
1693 { "fcc2", 2, {0, {0}}, 0, 0 },
1694 { "fcc3", 3, {0, {0}}, 0, 0 }
1697 CGEN_KEYWORD frv_cgen_opval_fccr_names
=
1699 & frv_cgen_opval_fccr_names_entries
[0],
1704 static CGEN_KEYWORD_ENTRY frv_cgen_opval_cccr_names_entries
[] =
1706 { "cc0", 0, {0, {0}}, 0, 0 },
1707 { "cc1", 1, {0, {0}}, 0, 0 },
1708 { "cc2", 2, {0, {0}}, 0, 0 },
1709 { "cc3", 3, {0, {0}}, 0, 0 },
1710 { "cc4", 4, {0, {0}}, 0, 0 },
1711 { "cc5", 5, {0, {0}}, 0, 0 },
1712 { "cc6", 6, {0, {0}}, 0, 0 },
1713 { "cc7", 7, {0, {0}}, 0, 0 }
1716 CGEN_KEYWORD frv_cgen_opval_cccr_names
=
1718 & frv_cgen_opval_cccr_names_entries
[0],
1723 static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_pack_entries
[] =
1725 { "", 1, {0, {0}}, 0, 0 },
1726 { ".p", 0, {0, {0}}, 0, 0 },
1727 { ".P", 0, {0, {0}}, 0, 0 }
1730 CGEN_KEYWORD frv_cgen_opval_h_pack
=
1732 & frv_cgen_opval_h_pack_entries
[0],
1737 static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_taken_entries
[] =
1739 { "", 2, {0, {0}}, 0, 0 },
1740 { "", 0, {0, {0}}, 0, 0 },
1741 { "", 1, {0, {0}}, 0, 0 },
1742 { "", 3, {0, {0}}, 0, 0 }
1745 CGEN_KEYWORD frv_cgen_opval_h_hint_taken
=
1747 & frv_cgen_opval_h_hint_taken_entries
[0],
1752 static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_not_taken_entries
[] =
1754 { "", 0, {0, {0}}, 0, 0 },
1755 { "", 1, {0, {0}}, 0, 0 },
1756 { "", 2, {0, {0}}, 0, 0 },
1757 { "", 3, {0, {0}}, 0, 0 }
1760 CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken
=
1762 & frv_cgen_opval_h_hint_not_taken_entries
[0],
1768 /* The hardware table. */
1770 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1771 #define A(a) (1 << CGEN_HW_##a)
1773 #define A(a) (1 << CGEN_HW_/**/a)
1776 const CGEN_HW_ENTRY frv_cgen_hw_table
[] =
1778 { "h-memory", HW_H_MEMORY
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1779 { "h-sint", HW_H_SINT
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1780 { "h-uint", HW_H_UINT
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1781 { "h-addr", HW_H_ADDR
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1782 { "h-iaddr", HW_H_IADDR
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1783 { "h-pc", HW_H_PC
, CGEN_ASM_NONE
, 0, { 0|A(PROFILE
)|A(PC
), { (1<<MACH_BASE
) } } },
1784 { "h-psr_imple", HW_H_PSR_IMPLE
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1785 { "h-psr_ver", HW_H_PSR_VER
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1786 { "h-psr_ice", HW_H_PSR_ICE
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1787 { "h-psr_nem", HW_H_PSR_NEM
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1788 { "h-psr_cm", HW_H_PSR_CM
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1789 { "h-psr_be", HW_H_PSR_BE
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1790 { "h-psr_esr", HW_H_PSR_ESR
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1791 { "h-psr_ef", HW_H_PSR_EF
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1792 { "h-psr_em", HW_H_PSR_EM
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1793 { "h-psr_pil", HW_H_PSR_PIL
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1794 { "h-psr_ps", HW_H_PSR_PS
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1795 { "h-psr_et", HW_H_PSR_ET
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1796 { "h-psr_s", HW_H_PSR_S
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1797 { "h-tbr_tba", HW_H_TBR_TBA
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1798 { "h-tbr_tt", HW_H_TBR_TT
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1799 { "h-bpsr_bs", HW_H_BPSR_BS
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1800 { "h-bpsr_bet", HW_H_BPSR_BET
, CGEN_ASM_NONE
, 0, { 0, { (1<<MACH_BASE
) } } },
1801 { "h-gr", HW_H_GR
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_gr_names
, { 0|A(PROFILE
), { (1<<MACH_BASE
) } } },
1802 { "h-gr_double", HW_H_GR_DOUBLE
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_gr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1803 { "h-gr_hi", HW_H_GR_HI
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_gr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1804 { "h-gr_lo", HW_H_GR_LO
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_gr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1805 { "h-fr", HW_H_FR
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(PROFILE
), { (1<<MACH_BASE
) } } },
1806 { "h-fr_double", HW_H_FR_DOUBLE
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1807 { "h-fr_int", HW_H_FR_INT
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1808 { "h-fr_hi", HW_H_FR_HI
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1809 { "h-fr_lo", HW_H_FR_LO
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1810 { "h-fr_0", HW_H_FR_0
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1811 { "h-fr_1", HW_H_FR_1
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1812 { "h-fr_2", HW_H_FR_2
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1813 { "h-fr_3", HW_H_FR_3
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1814 { "h-cpr", HW_H_CPR
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_cpr_names
, { 0|A(PROFILE
), { (1<<MACH_FRV
) } } },
1815 { "h-cpr_double", HW_H_CPR_DOUBLE
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_cpr_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_FRV
) } } },
1816 { "h-spr", HW_H_SPR
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_spr_names
, { 0|A(PROFILE
), { (1<<MACH_BASE
) } } },
1817 { "h-accg", HW_H_ACCG
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_accg_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1818 { "h-acc40S", HW_H_ACC40S
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_acc_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1819 { "h-acc40U", HW_H_ACC40U
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_acc_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_BASE
) } } },
1820 { "h-iacc0", HW_H_IACC0
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_iacc0_names
, { 0|A(VIRTUAL
)|A(PROFILE
), { (1<<MACH_FR400
) } } },
1821 { "h-iccr", HW_H_ICCR
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_iccr_names
, { 0|A(PROFILE
), { (1<<MACH_BASE
) } } },
1822 { "h-fccr", HW_H_FCCR
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_fccr_names
, { 0|A(PROFILE
), { (1<<MACH_BASE
) } } },
1823 { "h-cccr", HW_H_CCCR
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_cccr_names
, { 0|A(PROFILE
), { (1<<MACH_BASE
) } } },
1824 { "h-pack", HW_H_PACK
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_h_pack
, { 0, { (1<<MACH_BASE
) } } },
1825 { "h-hint-taken", HW_H_HINT_TAKEN
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_h_hint_taken
, { 0, { (1<<MACH_BASE
) } } },
1826 { "h-hint-not-taken", HW_H_HINT_NOT_TAKEN
, CGEN_ASM_KEYWORD
, (PTR
) & frv_cgen_opval_h_hint_not_taken
, { 0, { (1<<MACH_BASE
) } } },
1827 { 0, 0, CGEN_ASM_NONE
, 0, {0, {0}} }
1833 /* The instruction field table. */
1835 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1836 #define A(a) (1 << CGEN_IFLD_##a)
1838 #define A(a) (1 << CGEN_IFLD_/**/a)
1841 const CGEN_IFLD frv_cgen_ifld_table
[] =
1843 { FRV_F_NIL
, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE
) } } },
1844 { FRV_F_ANYOF
, "f-anyof", 0, 0, 0, 0, { 0, { (1<<MACH_BASE
) } } },
1845 { FRV_F_PACK
, "f-pack", 0, 32, 31, 1, { 0, { (1<<MACH_BASE
) } } },
1846 { FRV_F_OP
, "f-op", 0, 32, 24, 7, { 0, { (1<<MACH_BASE
) } } },
1847 { FRV_F_OPE1
, "f-ope1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE
) } } },
1848 { FRV_F_OPE2
, "f-ope2", 0, 32, 9, 4, { 0, { (1<<MACH_BASE
) } } },
1849 { FRV_F_OPE3
, "f-ope3", 0, 32, 15, 3, { 0, { (1<<MACH_BASE
) } } },
1850 { FRV_F_OPE4
, "f-ope4", 0, 32, 7, 2, { 0, { (1<<MACH_BASE
) } } },
1851 { FRV_F_GRI
, "f-GRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1852 { FRV_F_GRJ
, "f-GRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE
) } } },
1853 { FRV_F_GRK
, "f-GRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1854 { FRV_F_FRI
, "f-FRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1855 { FRV_F_FRJ
, "f-FRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE
) } } },
1856 { FRV_F_FRK
, "f-FRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1857 { FRV_F_CPRI
, "f-CPRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1858 { FRV_F_CPRJ
, "f-CPRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE
) } } },
1859 { FRV_F_CPRK
, "f-CPRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1860 { FRV_F_ACCGI
, "f-ACCGi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1861 { FRV_F_ACCGK
, "f-ACCGk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1862 { FRV_F_ACC40SI
, "f-ACC40Si", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1863 { FRV_F_ACC40UI
, "f-ACC40Ui", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1864 { FRV_F_ACC40SK
, "f-ACC40Sk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1865 { FRV_F_ACC40UK
, "f-ACC40Uk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1866 { FRV_F_CRI
, "f-CRi", 0, 32, 14, 3, { 0, { (1<<MACH_BASE
) } } },
1867 { FRV_F_CRJ
, "f-CRj", 0, 32, 2, 3, { 0, { (1<<MACH_BASE
) } } },
1868 { FRV_F_CRK
, "f-CRk", 0, 32, 27, 3, { 0, { (1<<MACH_BASE
) } } },
1869 { FRV_F_CCI
, "f-CCi", 0, 32, 11, 3, { 0, { (1<<MACH_BASE
) } } },
1870 { FRV_F_CRJ_INT
, "f-CRj_int", 0, 32, 26, 2, { 0, { (1<<MACH_BASE
) } } },
1871 { FRV_F_CRJ_FLOAT
, "f-CRj_float", 0, 32, 26, 2, { 0, { (1<<MACH_BASE
) } } },
1872 { FRV_F_ICCI_1
, "f-ICCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE
) } } },
1873 { FRV_F_ICCI_2
, "f-ICCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE
) } } },
1874 { FRV_F_ICCI_3
, "f-ICCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE
) } } },
1875 { FRV_F_FCCI_1
, "f-FCCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE
) } } },
1876 { FRV_F_FCCI_2
, "f-FCCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE
) } } },
1877 { FRV_F_FCCI_3
, "f-FCCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE
) } } },
1878 { FRV_F_FCCK
, "f-FCCk", 0, 32, 26, 2, { 0, { (1<<MACH_BASE
) } } },
1879 { FRV_F_EIR
, "f-eir", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1880 { FRV_F_S10
, "f-s10", 0, 32, 9, 10, { 0, { (1<<MACH_BASE
) } } },
1881 { FRV_F_S12
, "f-s12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE
) } } },
1882 { FRV_F_D12
, "f-d12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE
) } } },
1883 { FRV_F_U16
, "f-u16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE
) } } },
1884 { FRV_F_S16
, "f-s16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE
) } } },
1885 { FRV_F_S6
, "f-s6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE
) } } },
1886 { FRV_F_S6_1
, "f-s6_1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE
) } } },
1887 { FRV_F_U6
, "f-u6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE
) } } },
1888 { FRV_F_S5
, "f-s5", 0, 32, 4, 5, { 0, { (1<<MACH_BASE
) } } },
1889 { FRV_F_U12_H
, "f-u12-h", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1890 { FRV_F_U12_L
, "f-u12-l", 0, 32, 5, 6, { 0, { (1<<MACH_BASE
) } } },
1891 { FRV_F_U12
, "f-u12", 0, 0, 0, 0,{ 0|A(VIRTUAL
), { (1<<MACH_BASE
) } } },
1892 { FRV_F_INT_CC
, "f-int-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE
) } } },
1893 { FRV_F_FLT_CC
, "f-flt-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE
) } } },
1894 { FRV_F_COND
, "f-cond", 0, 32, 8, 1, { 0, { (1<<MACH_BASE
) } } },
1895 { FRV_F_CCOND
, "f-ccond", 0, 32, 12, 1, { 0, { (1<<MACH_BASE
) } } },
1896 { FRV_F_HINT
, "f-hint", 0, 32, 17, 2, { 0, { (1<<MACH_BASE
) } } },
1897 { FRV_F_LI
, "f-LI", 0, 32, 25, 1, { 0, { (1<<MACH_BASE
) } } },
1898 { FRV_F_LOCK
, "f-lock", 0, 32, 25, 1, { 0, { (1<<MACH_BASE
) } } },
1899 { FRV_F_DEBUG
, "f-debug", 0, 32, 25, 1, { 0, { (1<<MACH_BASE
) } } },
1900 { FRV_F_A
, "f-A", 0, 32, 17, 1, { 0, { (1<<MACH_BASE
) } } },
1901 { FRV_F_AE
, "f-ae", 0, 32, 25, 1, { 0, { (1<<MACH_BASE
) } } },
1902 { FRV_F_SPR_H
, "f-spr-h", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1903 { FRV_F_SPR_L
, "f-spr-l", 0, 32, 17, 6, { 0, { (1<<MACH_BASE
) } } },
1904 { FRV_F_SPR
, "f-spr", 0, 0, 0, 0,{ 0|A(VIRTUAL
), { (1<<MACH_BASE
) } } },
1905 { FRV_F_LABEL16
, "f-label16", 0, 32, 15, 16, { 0|A(PCREL_ADDR
), { (1<<MACH_BASE
) } } },
1906 { FRV_F_LABELH6
, "f-labelH6", 0, 32, 30, 6, { 0, { (1<<MACH_BASE
) } } },
1907 { FRV_F_LABELL18
, "f-labelL18", 0, 32, 17, 18, { 0, { (1<<MACH_BASE
) } } },
1908 { FRV_F_LABEL24
, "f-label24", 0, 0, 0, 0,{ 0|A(PCREL_ADDR
)|A(VIRTUAL
), { (1<<MACH_BASE
) } } },
1909 { FRV_F_ICCI_1_NULL
, "f-ICCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1910 { FRV_F_ICCI_2_NULL
, "f-ICCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1911 { FRV_F_ICCI_3_NULL
, "f-ICCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1912 { FRV_F_FCCI_1_NULL
, "f-FCCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1913 { FRV_F_FCCI_2_NULL
, "f-FCCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1914 { FRV_F_FCCI_3_NULL
, "f-FCCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1915 { FRV_F_RS_NULL
, "f-rs-null", 0, 32, 17, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1916 { FRV_F_GRI_NULL
, "f-GRi-null", 0, 32, 17, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1917 { FRV_F_GRJ_NULL
, "f-GRj-null", 0, 32, 5, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1918 { FRV_F_GRK_NULL
, "f-GRk-null", 0, 32, 30, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1919 { FRV_F_FRI_NULL
, "f-FRi-null", 0, 32, 17, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1920 { FRV_F_FRJ_NULL
, "f-FRj-null", 0, 32, 5, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1921 { FRV_F_ACCJ_NULL
, "f-ACCj-null", 0, 32, 5, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1922 { FRV_F_RD_NULL
, "f-rd-null", 0, 32, 30, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1923 { FRV_F_COND_NULL
, "f-cond-null", 0, 32, 30, 4, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1924 { FRV_F_CCOND_NULL
, "f-ccond-null", 0, 32, 12, 1, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1925 { FRV_F_S12_NULL
, "f-s12-null", 0, 32, 11, 12, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1926 { FRV_F_LABEL16_NULL
, "f-label16-null", 0, 32, 15, 16, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1927 { FRV_F_MISC_NULL_1
, "f-misc-null-1", 0, 32, 30, 5, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1928 { FRV_F_MISC_NULL_2
, "f-misc-null-2", 0, 32, 11, 6, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1929 { FRV_F_MISC_NULL_3
, "f-misc-null-3", 0, 32, 11, 4, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1930 { FRV_F_MISC_NULL_4
, "f-misc-null-4", 0, 32, 17, 2, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1931 { FRV_F_MISC_NULL_5
, "f-misc-null-5", 0, 32, 17, 16, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1932 { FRV_F_MISC_NULL_6
, "f-misc-null-6", 0, 32, 30, 3, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1933 { FRV_F_MISC_NULL_7
, "f-misc-null-7", 0, 32, 17, 3, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1934 { FRV_F_MISC_NULL_8
, "f-misc-null-8", 0, 32, 5, 3, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1935 { FRV_F_MISC_NULL_9
, "f-misc-null-9", 0, 32, 5, 4, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1936 { FRV_F_MISC_NULL_10
, "f-misc-null-10", 0, 32, 16, 5, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1937 { FRV_F_MISC_NULL_11
, "f-misc-null-11", 0, 32, 5, 1, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1938 { FRV_F_LI_OFF
, "f-LI-off", 0, 32, 25, 1, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1939 { FRV_F_LI_ON
, "f-LI-on", 0, 32, 25, 1, { 0|A(RESERVED
), { (1<<MACH_BASE
) } } },
1940 { 0, 0, 0, 0, 0, 0, {0, {0}} }
1947 /* multi ifield declarations */
1949 const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD
[];
1950 const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD
[];
1951 const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD
[];
1954 /* multi ifield definitions */
1956 const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD
[] =
1958 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_U12_H
] } },
1959 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_U12_L
] } },
1960 { 0, { (const PTR
) 0 } }
1962 const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD
[] =
1964 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_SPR_H
] } },
1965 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_SPR_L
] } },
1966 { 0, { (const PTR
) 0 } }
1968 const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD
[] =
1970 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_LABELH6
] } },
1971 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_LABELL18
] } },
1972 { 0, { (const PTR
) 0 } }
1975 /* The operand table. */
1977 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1978 #define A(a) (1 << CGEN_OPERAND_##a)
1980 #define A(a) (1 << CGEN_OPERAND_/**/a)
1982 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1983 #define OPERAND(op) FRV_OPERAND_##op
1985 #define OPERAND(op) FRV_OPERAND_/**/op
1988 const CGEN_OPERAND frv_cgen_operand_table
[] =
1990 /* pc: program counter */
1991 { "pc", FRV_OPERAND_PC
, HW_H_PC
, 0, 0,
1992 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_NIL
] } },
1993 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
1994 /* pack: packing bit */
1995 { "pack", FRV_OPERAND_PACK
, HW_H_PACK
, 31, 1,
1996 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_PACK
] } },
1997 { 0, { (1<<MACH_BASE
) } } },
1998 /* GRi: source register 1 */
1999 { "GRi", FRV_OPERAND_GRI
, HW_H_GR
, 17, 6,
2000 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_GRI
] } },
2001 { 0, { (1<<MACH_BASE
) } } },
2002 /* GRj: source register 2 */
2003 { "GRj", FRV_OPERAND_GRJ
, HW_H_GR
, 5, 6,
2004 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_GRJ
] } },
2005 { 0, { (1<<MACH_BASE
) } } },
2006 /* GRk: destination register */
2007 { "GRk", FRV_OPERAND_GRK
, HW_H_GR
, 30, 6,
2008 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_GRK
] } },
2009 { 0, { (1<<MACH_BASE
) } } },
2010 /* GRkhi: destination register */
2011 { "GRkhi", FRV_OPERAND_GRKHI
, HW_H_GR_HI
, 30, 6,
2012 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_GRK
] } },
2013 { 0, { (1<<MACH_BASE
) } } },
2014 /* GRklo: destination register */
2015 { "GRklo", FRV_OPERAND_GRKLO
, HW_H_GR_LO
, 30, 6,
2016 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_GRK
] } },
2017 { 0, { (1<<MACH_BASE
) } } },
2018 /* GRdoublek: destination register */
2019 { "GRdoublek", FRV_OPERAND_GRDOUBLEK
, HW_H_GR_DOUBLE
, 30, 6,
2020 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_GRK
] } },
2021 { 0, { (1<<MACH_BASE
) } } },
2022 /* ACC40Si: signed accumulator */
2023 { "ACC40Si", FRV_OPERAND_ACC40SI
, HW_H_ACC40S
, 17, 6,
2024 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ACC40SI
] } },
2025 { 0, { (1<<MACH_BASE
) } } },
2026 /* ACC40Ui: unsigned accumulator */
2027 { "ACC40Ui", FRV_OPERAND_ACC40UI
, HW_H_ACC40U
, 17, 6,
2028 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ACC40UI
] } },
2029 { 0, { (1<<MACH_BASE
) } } },
2030 /* ACC40Sk: target accumulator */
2031 { "ACC40Sk", FRV_OPERAND_ACC40SK
, HW_H_ACC40S
, 30, 6,
2032 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ACC40SK
] } },
2033 { 0, { (1<<MACH_BASE
) } } },
2034 /* ACC40Uk: target accumulator */
2035 { "ACC40Uk", FRV_OPERAND_ACC40UK
, HW_H_ACC40U
, 30, 6,
2036 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ACC40UK
] } },
2037 { 0, { (1<<MACH_BASE
) } } },
2038 /* ACCGi: source register */
2039 { "ACCGi", FRV_OPERAND_ACCGI
, HW_H_ACCG
, 17, 6,
2040 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ACCGI
] } },
2041 { 0, { (1<<MACH_BASE
) } } },
2042 /* ACCGk: target register */
2043 { "ACCGk", FRV_OPERAND_ACCGK
, HW_H_ACCG
, 30, 6,
2044 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ACCGK
] } },
2045 { 0, { (1<<MACH_BASE
) } } },
2046 /* CPRi: source register */
2047 { "CPRi", FRV_OPERAND_CPRI
, HW_H_CPR
, 17, 6,
2048 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CPRI
] } },
2049 { 0, { (1<<MACH_FRV
) } } },
2050 /* CPRj: source register */
2051 { "CPRj", FRV_OPERAND_CPRJ
, HW_H_CPR
, 5, 6,
2052 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CPRJ
] } },
2053 { 0, { (1<<MACH_FRV
) } } },
2054 /* CPRk: destination register */
2055 { "CPRk", FRV_OPERAND_CPRK
, HW_H_CPR
, 30, 6,
2056 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CPRK
] } },
2057 { 0, { (1<<MACH_FRV
) } } },
2058 /* CPRdoublek: destination register */
2059 { "CPRdoublek", FRV_OPERAND_CPRDOUBLEK
, HW_H_CPR_DOUBLE
, 30, 6,
2060 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CPRK
] } },
2061 { 0, { (1<<MACH_FRV
) } } },
2062 /* FRinti: source register 1 */
2063 { "FRinti", FRV_OPERAND_FRINTI
, HW_H_FR_INT
, 17, 6,
2064 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRI
] } },
2065 { 0, { (1<<MACH_BASE
) } } },
2066 /* FRintj: source register 2 */
2067 { "FRintj", FRV_OPERAND_FRINTJ
, HW_H_FR_INT
, 5, 6,
2068 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRJ
] } },
2069 { 0, { (1<<MACH_BASE
) } } },
2070 /* FRintk: target register */
2071 { "FRintk", FRV_OPERAND_FRINTK
, HW_H_FR_INT
, 30, 6,
2072 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRK
] } },
2073 { 0, { (1<<MACH_BASE
) } } },
2074 /* FRi: source register 1 */
2075 { "FRi", FRV_OPERAND_FRI
, HW_H_FR
, 17, 6,
2076 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRI
] } },
2077 { 0, { (1<<MACH_BASE
) } } },
2078 /* FRj: source register 2 */
2079 { "FRj", FRV_OPERAND_FRJ
, HW_H_FR
, 5, 6,
2080 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRJ
] } },
2081 { 0, { (1<<MACH_BASE
) } } },
2082 /* FRk: destination register */
2083 { "FRk", FRV_OPERAND_FRK
, HW_H_FR
, 30, 6,
2084 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRK
] } },
2085 { 0, { (1<<MACH_BASE
) } } },
2086 /* FRkhi: destination register */
2087 { "FRkhi", FRV_OPERAND_FRKHI
, HW_H_FR_HI
, 30, 6,
2088 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRK
] } },
2089 { 0, { (1<<MACH_BASE
) } } },
2090 /* FRklo: destination register */
2091 { "FRklo", FRV_OPERAND_FRKLO
, HW_H_FR_LO
, 30, 6,
2092 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRK
] } },
2093 { 0, { (1<<MACH_BASE
) } } },
2094 /* FRdoublei: source register 1 */
2095 { "FRdoublei", FRV_OPERAND_FRDOUBLEI
, HW_H_FR_DOUBLE
, 17, 6,
2096 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRI
] } },
2097 { 0, { (1<<MACH_BASE
) } } },
2098 /* FRdoublej: source register 2 */
2099 { "FRdoublej", FRV_OPERAND_FRDOUBLEJ
, HW_H_FR_DOUBLE
, 5, 6,
2100 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRJ
] } },
2101 { 0, { (1<<MACH_BASE
) } } },
2102 /* FRdoublek: target register */
2103 { "FRdoublek", FRV_OPERAND_FRDOUBLEK
, HW_H_FR_DOUBLE
, 30, 6,
2104 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRK
] } },
2105 { 0, { (1<<MACH_BASE
) } } },
2106 /* CRi: source register 1 */
2107 { "CRi", FRV_OPERAND_CRI
, HW_H_CCCR
, 14, 3,
2108 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CRI
] } },
2109 { 0, { (1<<MACH_BASE
) } } },
2110 /* CRj: source register 2 */
2111 { "CRj", FRV_OPERAND_CRJ
, HW_H_CCCR
, 2, 3,
2112 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CRJ
] } },
2113 { 0, { (1<<MACH_BASE
) } } },
2114 /* CRj_int: destination register */
2115 { "CRj_int", FRV_OPERAND_CRJ_INT
, HW_H_CCCR
, 26, 2,
2116 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CRJ_INT
] } },
2117 { 0, { (1<<MACH_BASE
) } } },
2118 /* CRj_float: destination register */
2119 { "CRj_float", FRV_OPERAND_CRJ_FLOAT
, HW_H_CCCR
, 26, 2,
2120 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CRJ_FLOAT
] } },
2121 { 0, { (1<<MACH_BASE
) } } },
2122 /* CRk: destination register */
2123 { "CRk", FRV_OPERAND_CRK
, HW_H_CCCR
, 27, 3,
2124 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CRK
] } },
2125 { 0, { (1<<MACH_BASE
) } } },
2126 /* CCi: condition register */
2127 { "CCi", FRV_OPERAND_CCI
, HW_H_CCCR
, 11, 3,
2128 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CCI
] } },
2129 { 0, { (1<<MACH_BASE
) } } },
2130 /* ICCi_1: condition register */
2131 { "ICCi_1", FRV_OPERAND_ICCI_1
, HW_H_ICCR
, 11, 2,
2132 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ICCI_1
] } },
2133 { 0, { (1<<MACH_BASE
) } } },
2134 /* ICCi_2: condition register */
2135 { "ICCi_2", FRV_OPERAND_ICCI_2
, HW_H_ICCR
, 26, 2,
2136 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ICCI_2
] } },
2137 { 0, { (1<<MACH_BASE
) } } },
2138 /* ICCi_3: condition register */
2139 { "ICCi_3", FRV_OPERAND_ICCI_3
, HW_H_ICCR
, 1, 2,
2140 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_ICCI_3
] } },
2141 { 0, { (1<<MACH_BASE
) } } },
2142 /* FCCi_1: condition register */
2143 { "FCCi_1", FRV_OPERAND_FCCI_1
, HW_H_FCCR
, 11, 2,
2144 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FCCI_1
] } },
2145 { 0, { (1<<MACH_BASE
) } } },
2146 /* FCCi_2: condition register */
2147 { "FCCi_2", FRV_OPERAND_FCCI_2
, HW_H_FCCR
, 26, 2,
2148 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FCCI_2
] } },
2149 { 0, { (1<<MACH_BASE
) } } },
2150 /* FCCi_3: condition register */
2151 { "FCCi_3", FRV_OPERAND_FCCI_3
, HW_H_FCCR
, 1, 2,
2152 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FCCI_3
] } },
2153 { 0, { (1<<MACH_BASE
) } } },
2154 /* FCCk: condition register */
2155 { "FCCk", FRV_OPERAND_FCCK
, HW_H_FCCR
, 26, 2,
2156 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FCCK
] } },
2157 { 0, { (1<<MACH_BASE
) } } },
2158 /* eir: exception insn reg */
2159 { "eir", FRV_OPERAND_EIR
, HW_H_UINT
, 17, 6,
2160 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_EIR
] } },
2161 { 0, { (1<<MACH_BASE
) } } },
2162 /* s10: 10 bit signed immediate */
2163 { "s10", FRV_OPERAND_S10
, HW_H_SINT
, 9, 10,
2164 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_S10
] } },
2165 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2166 /* u16: 16 bit unsigned immediate */
2167 { "u16", FRV_OPERAND_U16
, HW_H_UINT
, 15, 16,
2168 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_U16
] } },
2169 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2170 /* s16: 16 bit signed immediate */
2171 { "s16", FRV_OPERAND_S16
, HW_H_SINT
, 15, 16,
2172 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_S16
] } },
2173 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2174 /* s6: 6 bit signed immediate */
2175 { "s6", FRV_OPERAND_S6
, HW_H_SINT
, 5, 6,
2176 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_S6
] } },
2177 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2178 /* s6_1: 6 bit signed immediate */
2179 { "s6_1", FRV_OPERAND_S6_1
, HW_H_SINT
, 11, 6,
2180 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_S6_1
] } },
2181 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2182 /* u6: 6 bit unsigned immediate */
2183 { "u6", FRV_OPERAND_U6
, HW_H_UINT
, 5, 6,
2184 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_U6
] } },
2185 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2186 /* s5: 5 bit signed immediate */
2187 { "s5", FRV_OPERAND_S5
, HW_H_SINT
, 4, 5,
2188 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_S5
] } },
2189 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2190 /* cond: conditional arithmetic */
2191 { "cond", FRV_OPERAND_COND
, HW_H_UINT
, 8, 1,
2192 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_COND
] } },
2193 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2194 /* ccond: lr branch condition */
2195 { "ccond", FRV_OPERAND_CCOND
, HW_H_UINT
, 12, 1,
2196 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_CCOND
] } },
2197 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2198 /* hint: 2 bit branch predictor */
2199 { "hint", FRV_OPERAND_HINT
, HW_H_UINT
, 17, 2,
2200 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_HINT
] } },
2201 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2202 /* hint_taken: 2 bit branch predictor */
2203 { "hint_taken", FRV_OPERAND_HINT_TAKEN
, HW_H_HINT_TAKEN
, 17, 2,
2204 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_HINT
] } },
2205 { 0, { (1<<MACH_BASE
) } } },
2206 /* hint_not_taken: 2 bit branch predictor */
2207 { "hint_not_taken", FRV_OPERAND_HINT_NOT_TAKEN
, HW_H_HINT_NOT_TAKEN
, 17, 2,
2208 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_HINT
] } },
2209 { 0, { (1<<MACH_BASE
) } } },
2210 /* LI: link indicator */
2211 { "LI", FRV_OPERAND_LI
, HW_H_UINT
, 25, 1,
2212 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_LI
] } },
2213 { 0, { (1<<MACH_BASE
) } } },
2214 /* lock: cache lock indicator */
2215 { "lock", FRV_OPERAND_LOCK
, HW_H_UINT
, 25, 1,
2216 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_LOCK
] } },
2217 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2218 /* debug: debug mode indicator */
2219 { "debug", FRV_OPERAND_DEBUG
, HW_H_UINT
, 25, 1,
2220 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_DEBUG
] } },
2221 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2222 /* ae: all entries indicator */
2223 { "ae", FRV_OPERAND_AE
, HW_H_UINT
, 25, 1,
2224 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_AE
] } },
2225 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2226 /* label16: 18 bit pc relative address */
2227 { "label16", FRV_OPERAND_LABEL16
, HW_H_IADDR
, 15, 16,
2228 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_LABEL16
] } },
2229 { 0|A(PCREL_ADDR
), { (1<<MACH_BASE
) } } },
2230 /* label24: 26 bit pc relative address */
2231 { "label24", FRV_OPERAND_LABEL24
, HW_H_IADDR
, 17, 24,
2232 { 2, { (const PTR
) &FRV_F_LABEL24_MULTI_IFIELD
[0] } },
2233 { 0|A(PCREL_ADDR
)|A(VIRTUAL
), { (1<<MACH_BASE
) } } },
2234 /* A0: A==0 operand of mclracc */
2235 { "A0", FRV_OPERAND_A0
, HW_H_UINT
, 17, 1,
2236 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_A
] } },
2237 { 0, { (1<<MACH_BASE
) } } },
2238 /* A1: A==1 operand of mclracc */
2239 { "A1", FRV_OPERAND_A1
, HW_H_UINT
, 17, 1,
2240 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_A
] } },
2241 { 0, { (1<<MACH_BASE
) } } },
2242 /* FRintieven: (even) source register 1 */
2243 { "FRintieven", FRV_OPERAND_FRINTIEVEN
, HW_H_FR_INT
, 17, 6,
2244 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRI
] } },
2245 { 0, { (1<<MACH_BASE
) } } },
2246 /* FRintjeven: (even) source register 2 */
2247 { "FRintjeven", FRV_OPERAND_FRINTJEVEN
, HW_H_FR_INT
, 5, 6,
2248 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRJ
] } },
2249 { 0, { (1<<MACH_BASE
) } } },
2250 /* FRintkeven: (even) target register */
2251 { "FRintkeven", FRV_OPERAND_FRINTKEVEN
, HW_H_FR_INT
, 30, 6,
2252 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_FRK
] } },
2253 { 0, { (1<<MACH_BASE
) } } },
2254 /* d12: 12 bit signed immediate */
2255 { "d12", FRV_OPERAND_D12
, HW_H_SINT
, 11, 12,
2256 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_D12
] } },
2257 { 0, { (1<<MACH_BASE
) } } },
2258 /* s12: 12 bit signed immediate */
2259 { "s12", FRV_OPERAND_S12
, HW_H_SINT
, 11, 12,
2260 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_D12
] } },
2261 { 0|A(HASH_PREFIX
), { (1<<MACH_BASE
) } } },
2262 /* u12: 12 bit signed immediate */
2263 { "u12", FRV_OPERAND_U12
, HW_H_SINT
, 5, 12,
2264 { 2, { (const PTR
) &FRV_F_U12_MULTI_IFIELD
[0] } },
2265 { 0|A(HASH_PREFIX
)|A(VIRTUAL
), { (1<<MACH_BASE
) } } },
2266 /* spr: special purpose register */
2267 { "spr", FRV_OPERAND_SPR
, HW_H_SPR
, 17, 12,
2268 { 2, { (const PTR
) &FRV_F_SPR_MULTI_IFIELD
[0] } },
2269 { 0|A(VIRTUAL
), { (1<<MACH_BASE
) } } },
2270 /* ulo16: 16 bit unsigned immediate, for #lo() */
2271 { "ulo16", FRV_OPERAND_ULO16
, HW_H_UINT
, 15, 16,
2272 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_U16
] } },
2273 { 0, { (1<<MACH_BASE
) } } },
2274 /* slo16: 16 bit unsigned immediate, for #lo() */
2275 { "slo16", FRV_OPERAND_SLO16
, HW_H_SINT
, 15, 16,
2276 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_S16
] } },
2277 { 0, { (1<<MACH_BASE
) } } },
2278 /* uhi16: 16 bit unsigned immediate, for #hi() */
2279 { "uhi16", FRV_OPERAND_UHI16
, HW_H_UINT
, 15, 16,
2280 { 0, { (const PTR
) &frv_cgen_ifld_table
[FRV_F_U16
] } },
2281 { 0, { (1<<MACH_BASE
) } } },
2282 /* psr_esr: PSR.ESR bit */
2283 { "psr_esr", FRV_OPERAND_PSR_ESR
, HW_H_PSR_ESR
, 0, 0,
2284 { 0, { (const PTR
) 0 } },
2285 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2286 /* psr_s: PSR.S bit */
2287 { "psr_s", FRV_OPERAND_PSR_S
, HW_H_PSR_S
, 0, 0,
2288 { 0, { (const PTR
) 0 } },
2289 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2290 /* psr_ps: PSR.PS bit */
2291 { "psr_ps", FRV_OPERAND_PSR_PS
, HW_H_PSR_PS
, 0, 0,
2292 { 0, { (const PTR
) 0 } },
2293 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2294 /* psr_et: PSR.ET bit */
2295 { "psr_et", FRV_OPERAND_PSR_ET
, HW_H_PSR_ET
, 0, 0,
2296 { 0, { (const PTR
) 0 } },
2297 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2298 /* bpsr_bs: BPSR.BS bit */
2299 { "bpsr_bs", FRV_OPERAND_BPSR_BS
, HW_H_BPSR_BS
, 0, 0,
2300 { 0, { (const PTR
) 0 } },
2301 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2302 /* bpsr_bet: BPSR.BET bit */
2303 { "bpsr_bet", FRV_OPERAND_BPSR_BET
, HW_H_BPSR_BET
, 0, 0,
2304 { 0, { (const PTR
) 0 } },
2305 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2306 /* tbr_tba: TBR.TBA */
2307 { "tbr_tba", FRV_OPERAND_TBR_TBA
, HW_H_TBR_TBA
, 0, 0,
2308 { 0, { (const PTR
) 0 } },
2309 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2310 /* tbr_tt: TBR.TT */
2311 { "tbr_tt", FRV_OPERAND_TBR_TT
, HW_H_TBR_TT
, 0, 0,
2312 { 0, { (const PTR
) 0 } },
2313 { 0|A(SEM_ONLY
), { (1<<MACH_BASE
) } } },
2316 { 0, { (const PTR
) 0 } },
2323 /* The instruction table. */
2325 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
2326 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
2327 #define A(a) (1 << CGEN_INSN_##a)
2329 #define A(a) (1 << CGEN_INSN_/**/a)
2332 static const CGEN_IBASE frv_cgen_insn_table
[MAX_INSNS
] =
2334 /* Special null first entry.
2335 A `num' value of zero is thus invalid.
2336 Also, the special `invalid' insn resides here. */
2337 { 0, 0, 0, 0, {0, {0}} },
2338 /* add$pack $GRi,$GRj,$GRk */
2340 FRV_INSN_ADD
, "add", "add", 32,
2341 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2343 /* sub$pack $GRi,$GRj,$GRk */
2345 FRV_INSN_SUB
, "sub", "sub", 32,
2346 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2348 /* and$pack $GRi,$GRj,$GRk */
2350 FRV_INSN_AND
, "and", "and", 32,
2351 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2353 /* or$pack $GRi,$GRj,$GRk */
2355 FRV_INSN_OR
, "or", "or", 32,
2356 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2358 /* xor$pack $GRi,$GRj,$GRk */
2360 FRV_INSN_XOR
, "xor", "xor", 32,
2361 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2363 /* not$pack $GRj,$GRk */
2365 FRV_INSN_NOT
, "not", "not", 32,
2366 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2368 /* sdiv$pack $GRi,$GRj,$GRk */
2370 FRV_INSN_SDIV
, "sdiv", "sdiv", 32,
2371 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2373 /* nsdiv$pack $GRi,$GRj,$GRk */
2375 FRV_INSN_NSDIV
, "nsdiv", "nsdiv", 32,
2376 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_MULT_DIV
, FR400_MAJOR_NONE
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2378 /* udiv$pack $GRi,$GRj,$GRk */
2380 FRV_INSN_UDIV
, "udiv", "udiv", 32,
2381 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2383 /* nudiv$pack $GRi,$GRj,$GRk */
2385 FRV_INSN_NUDIV
, "nudiv", "nudiv", 32,
2386 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_MULT_DIV
, FR400_MAJOR_NONE
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2388 /* smul$pack $GRi,$GRj,$GRdoublek */
2390 FRV_INSN_SMUL
, "smul", "smul", 32,
2391 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2393 /* umul$pack $GRi,$GRj,$GRdoublek */
2395 FRV_INSN_UMUL
, "umul", "umul", 32,
2396 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2398 /* smu$pack $GRi,$GRj */
2400 FRV_INSN_SMU
, "smu", "smu", 32,
2401 { 0, { (1<<MACH_FR400
), UNIT_IACC
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_NONE
} }
2403 /* smass$pack $GRi,$GRj */
2405 FRV_INSN_SMASS
, "smass", "smass", 32,
2406 { 0, { (1<<MACH_FR400
), UNIT_IACC
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_NONE
} }
2408 /* smsss$pack $GRi,$GRj */
2410 FRV_INSN_SMSSS
, "smsss", "smsss", 32,
2411 { 0, { (1<<MACH_FR400
), UNIT_IACC
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_NONE
} }
2413 /* sll$pack $GRi,$GRj,$GRk */
2415 FRV_INSN_SLL
, "sll", "sll", 32,
2416 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2418 /* srl$pack $GRi,$GRj,$GRk */
2420 FRV_INSN_SRL
, "srl", "srl", 32,
2421 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2423 /* sra$pack $GRi,$GRj,$GRk */
2425 FRV_INSN_SRA
, "sra", "sra", 32,
2426 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2428 /* slass$pack $GRi,$GRj,$GRk */
2430 FRV_INSN_SLASS
, "slass", "slass", 32,
2431 { 0, { (1<<MACH_FR400
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_NONE
} }
2433 /* scutss$pack $GRj,$GRk */
2435 FRV_INSN_SCUTSS
, "scutss", "scutss", 32,
2436 { 0, { (1<<MACH_FR400
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_NONE
} }
2438 /* scan$pack $GRi,$GRj,$GRk */
2440 FRV_INSN_SCAN
, "scan", "scan", 32,
2441 { 0, { (1<<MACH_BASE
), UNIT_SCAN
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2443 /* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */
2445 FRV_INSN_CADD
, "cadd", "cadd", 32,
2446 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2448 /* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */
2450 FRV_INSN_CSUB
, "csub", "csub", 32,
2451 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2453 /* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */
2455 FRV_INSN_CAND
, "cand", "cand", 32,
2456 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2458 /* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */
2460 FRV_INSN_COR
, "cor", "cor", 32,
2461 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2463 /* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */
2465 FRV_INSN_CXOR
, "cxor", "cxor", 32,
2466 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2468 /* cnot$pack $GRj,$GRk,$CCi,$cond */
2470 FRV_INSN_CNOT
, "cnot", "cnot", 32,
2471 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2473 /* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
2475 FRV_INSN_CSMUL
, "csmul", "csmul", 32,
2476 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2478 /* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
2480 FRV_INSN_CSDIV
, "csdiv", "csdiv", 32,
2481 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2483 /* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
2485 FRV_INSN_CUDIV
, "cudiv", "cudiv", 32,
2486 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2488 /* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */
2490 FRV_INSN_CSLL
, "csll", "csll", 32,
2491 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2493 /* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */
2495 FRV_INSN_CSRL
, "csrl", "csrl", 32,
2496 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2498 /* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */
2500 FRV_INSN_CSRA
, "csra", "csra", 32,
2501 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2503 /* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */
2505 FRV_INSN_CSCAN
, "cscan", "cscan", 32,
2506 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_SCAN
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2508 /* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2510 FRV_INSN_ADDCC
, "addcc", "addcc", 32,
2511 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2513 /* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2515 FRV_INSN_SUBCC
, "subcc", "subcc", 32,
2516 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2518 /* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2520 FRV_INSN_ANDCC
, "andcc", "andcc", 32,
2521 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2523 /* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2525 FRV_INSN_ORCC
, "orcc", "orcc", 32,
2526 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2528 /* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2530 FRV_INSN_XORCC
, "xorcc", "xorcc", 32,
2531 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2533 /* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2535 FRV_INSN_SLLCC
, "sllcc", "sllcc", 32,
2536 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2538 /* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2540 FRV_INSN_SRLCC
, "srlcc", "srlcc", 32,
2541 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2543 /* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2545 FRV_INSN_SRACC
, "sracc", "sracc", 32,
2546 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2548 /* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
2550 FRV_INSN_SMULCC
, "smulcc", "smulcc", 32,
2551 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2553 /* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
2555 FRV_INSN_UMULCC
, "umulcc", "umulcc", 32,
2556 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2558 /* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2560 FRV_INSN_CADDCC
, "caddcc", "caddcc", 32,
2561 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2563 /* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2565 FRV_INSN_CSUBCC
, "csubcc", "csubcc", 32,
2566 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2568 /* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
2570 FRV_INSN_CSMULCC
, "csmulcc", "csmulcc", 32,
2571 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2573 /* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2575 FRV_INSN_CANDCC
, "candcc", "candcc", 32,
2576 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2578 /* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2580 FRV_INSN_CORCC
, "corcc", "corcc", 32,
2581 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2583 /* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2585 FRV_INSN_CXORCC
, "cxorcc", "cxorcc", 32,
2586 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2588 /* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2590 FRV_INSN_CSLLCC
, "csllcc", "csllcc", 32,
2591 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2593 /* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2595 FRV_INSN_CSRLCC
, "csrlcc", "csrlcc", 32,
2596 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2598 /* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2600 FRV_INSN_CSRACC
, "csracc", "csracc", 32,
2601 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2603 /* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */
2605 FRV_INSN_ADDX
, "addx", "addx", 32,
2606 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2608 /* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */
2610 FRV_INSN_SUBX
, "subx", "subx", 32,
2611 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2613 /* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2615 FRV_INSN_ADDXCC
, "addxcc", "addxcc", 32,
2616 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2618 /* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2620 FRV_INSN_SUBXCC
, "subxcc", "subxcc", 32,
2621 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2623 /* addss$pack $GRi,$GRj,$GRk */
2625 FRV_INSN_ADDSS
, "addss", "addss", 32,
2626 { 0, { (1<<MACH_FR400
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_NONE
} }
2628 /* subss$pack $GRi,$GRj,$GRk */
2630 FRV_INSN_SUBSS
, "subss", "subss", 32,
2631 { 0, { (1<<MACH_FR400
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_NONE
} }
2633 /* addi$pack $GRi,$s12,$GRk */
2635 FRV_INSN_ADDI
, "addi", "addi", 32,
2636 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2638 /* subi$pack $GRi,$s12,$GRk */
2640 FRV_INSN_SUBI
, "subi", "subi", 32,
2641 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2643 /* andi$pack $GRi,$s12,$GRk */
2645 FRV_INSN_ANDI
, "andi", "andi", 32,
2646 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2648 /* ori$pack $GRi,$s12,$GRk */
2650 FRV_INSN_ORI
, "ori", "ori", 32,
2651 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2653 /* xori$pack $GRi,$s12,$GRk */
2655 FRV_INSN_XORI
, "xori", "xori", 32,
2656 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2658 /* sdivi$pack $GRi,$s12,$GRk */
2660 FRV_INSN_SDIVI
, "sdivi", "sdivi", 32,
2661 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2663 /* nsdivi$pack $GRi,$s12,$GRk */
2665 FRV_INSN_NSDIVI
, "nsdivi", "nsdivi", 32,
2666 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_MULT_DIV
, FR400_MAJOR_NONE
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2668 /* udivi$pack $GRi,$s12,$GRk */
2670 FRV_INSN_UDIVI
, "udivi", "udivi", 32,
2671 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2673 /* nudivi$pack $GRi,$s12,$GRk */
2675 FRV_INSN_NUDIVI
, "nudivi", "nudivi", 32,
2676 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_MULT_DIV
, FR400_MAJOR_NONE
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2678 /* smuli$pack $GRi,$s12,$GRdoublek */
2680 FRV_INSN_SMULI
, "smuli", "smuli", 32,
2681 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2683 /* umuli$pack $GRi,$s12,$GRdoublek */
2685 FRV_INSN_UMULI
, "umuli", "umuli", 32,
2686 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2688 /* slli$pack $GRi,$s12,$GRk */
2690 FRV_INSN_SLLI
, "slli", "slli", 32,
2691 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2693 /* srli$pack $GRi,$s12,$GRk */
2695 FRV_INSN_SRLI
, "srli", "srli", 32,
2696 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2698 /* srai$pack $GRi,$s12,$GRk */
2700 FRV_INSN_SRAI
, "srai", "srai", 32,
2701 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2703 /* scani$pack $GRi,$s12,$GRk */
2705 FRV_INSN_SCANI
, "scani", "scani", 32,
2706 { 0, { (1<<MACH_BASE
), UNIT_SCAN
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2708 /* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2710 FRV_INSN_ADDICC
, "addicc", "addicc", 32,
2711 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2713 /* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2715 FRV_INSN_SUBICC
, "subicc", "subicc", 32,
2716 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2718 /* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2720 FRV_INSN_ANDICC
, "andicc", "andicc", 32,
2721 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2723 /* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */
2725 FRV_INSN_ORICC
, "oricc", "oricc", 32,
2726 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2728 /* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */
2730 FRV_INSN_XORICC
, "xoricc", "xoricc", 32,
2731 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2733 /* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
2735 FRV_INSN_SMULICC
, "smulicc", "smulicc", 32,
2736 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2738 /* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
2740 FRV_INSN_UMULICC
, "umulicc", "umulicc", 32,
2741 { 0, { (1<<MACH_BASE
), UNIT_MULT_DIV
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_2
} }
2743 /* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2745 FRV_INSN_SLLICC
, "sllicc", "sllicc", 32,
2746 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2748 /* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2750 FRV_INSN_SRLICC
, "srlicc", "srlicc", 32,
2751 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2753 /* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2755 FRV_INSN_SRAICC
, "sraicc", "sraicc", 32,
2756 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2758 /* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */
2760 FRV_INSN_ADDXI
, "addxi", "addxi", 32,
2761 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2763 /* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */
2765 FRV_INSN_SUBXI
, "subxi", "subxi", 32,
2766 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2768 /* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2770 FRV_INSN_ADDXICC
, "addxicc", "addxicc", 32,
2771 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2773 /* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2775 FRV_INSN_SUBXICC
, "subxicc", "subxicc", 32,
2776 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2778 /* cmpb$pack $GRi,$GRj,$ICCi_1 */
2780 FRV_INSN_CMPB
, "cmpb", "cmpb", 32,
2781 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_I_1
} }
2783 /* cmpba$pack $GRi,$GRj,$ICCi_1 */
2785 FRV_INSN_CMPBA
, "cmpba", "cmpba", 32,
2786 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_NONE
, FR550_MAJOR_I_1
} }
2788 /* setlo$pack $ulo16,$GRklo */
2790 FRV_INSN_SETLO
, "setlo", "setlo", 32,
2791 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2793 /* sethi$pack $uhi16,$GRkhi */
2795 FRV_INSN_SETHI
, "sethi", "sethi", 32,
2796 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2798 /* setlos$pack $slo16,$GRk */
2800 FRV_INSN_SETLOS
, "setlos", "setlos", 32,
2801 { 0, { (1<<MACH_BASE
), UNIT_IALL
, FR400_MAJOR_I_1
, FR500_MAJOR_I_1
, FR550_MAJOR_I_1
} }
2803 /* ldsb$pack @($GRi,$GRj),$GRk */
2805 FRV_INSN_LDSB
, "ldsb", "ldsb", 32,
2806 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2808 /* ldub$pack @($GRi,$GRj),$GRk */
2810 FRV_INSN_LDUB
, "ldub", "ldub", 32,
2811 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2813 /* ldsh$pack @($GRi,$GRj),$GRk */
2815 FRV_INSN_LDSH
, "ldsh", "ldsh", 32,
2816 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2818 /* lduh$pack @($GRi,$GRj),$GRk */
2820 FRV_INSN_LDUH
, "lduh", "lduh", 32,
2821 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2823 /* ld$pack @($GRi,$GRj),$GRk */
2825 FRV_INSN_LD
, "ld", "ld", 32,
2826 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2828 /* ldbf$pack @($GRi,$GRj),$FRintk */
2830 FRV_INSN_LDBF
, "ldbf", "ldbf", 32,
2831 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2833 /* ldhf$pack @($GRi,$GRj),$FRintk */
2835 FRV_INSN_LDHF
, "ldhf", "ldhf", 32,
2836 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2838 /* ldf$pack @($GRi,$GRj),$FRintk */
2840 FRV_INSN_LDF
, "ldf", "ldf", 32,
2841 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2843 /* ldc$pack @($GRi,$GRj),$CPRk */
2845 FRV_INSN_LDC
, "ldc", "ldc", 32,
2846 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
2848 /* nldsb$pack @($GRi,$GRj),$GRk */
2850 FRV_INSN_NLDSB
, "nldsb", "nldsb", 32,
2851 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2853 /* nldub$pack @($GRi,$GRj),$GRk */
2855 FRV_INSN_NLDUB
, "nldub", "nldub", 32,
2856 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2858 /* nldsh$pack @($GRi,$GRj),$GRk */
2860 FRV_INSN_NLDSH
, "nldsh", "nldsh", 32,
2861 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2863 /* nlduh$pack @($GRi,$GRj),$GRk */
2865 FRV_INSN_NLDUH
, "nlduh", "nlduh", 32,
2866 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2868 /* nld$pack @($GRi,$GRj),$GRk */
2870 FRV_INSN_NLD
, "nld", "nld", 32,
2871 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2873 /* nldbf$pack @($GRi,$GRj),$FRintk */
2875 FRV_INSN_NLDBF
, "nldbf", "nldbf", 32,
2876 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2878 /* nldhf$pack @($GRi,$GRj),$FRintk */
2880 FRV_INSN_NLDHF
, "nldhf", "nldhf", 32,
2881 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2883 /* nldf$pack @($GRi,$GRj),$FRintk */
2885 FRV_INSN_NLDF
, "nldf", "nldf", 32,
2886 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2888 /* ldd$pack @($GRi,$GRj),$GRdoublek */
2890 FRV_INSN_LDD
, "ldd", "ldd", 32,
2891 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2893 /* lddf$pack @($GRi,$GRj),$FRdoublek */
2895 FRV_INSN_LDDF
, "lddf", "lddf", 32,
2896 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2898 /* lddc$pack @($GRi,$GRj),$CPRdoublek */
2900 FRV_INSN_LDDC
, "lddc", "lddc", 32,
2901 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2903 /* nldd$pack @($GRi,$GRj),$GRdoublek */
2905 FRV_INSN_NLDD
, "nldd", "nldd", 32,
2906 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2908 /* nlddf$pack @($GRi,$GRj),$FRdoublek */
2910 FRV_INSN_NLDDF
, "nlddf", "nlddf", 32,
2911 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2913 /* ldq$pack @($GRi,$GRj),$GRk */
2915 FRV_INSN_LDQ
, "ldq", "ldq", 32,
2916 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
2918 /* ldqf$pack @($GRi,$GRj),$FRintk */
2920 FRV_INSN_LDQF
, "ldqf", "ldqf", 32,
2921 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
2923 /* ldqc$pack @($GRi,$GRj),$CPRk */
2925 FRV_INSN_LDQC
, "ldqc", "ldqc", 32,
2926 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
2928 /* nldq$pack @($GRi,$GRj),$GRk */
2930 FRV_INSN_NLDQ
, "nldq", "nldq", 32,
2931 { 0|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
2933 /* nldqf$pack @($GRi,$GRj),$FRintk */
2935 FRV_INSN_NLDQF
, "nldqf", "nldqf", 32,
2936 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
2938 /* ldsbu$pack @($GRi,$GRj),$GRk */
2940 FRV_INSN_LDSBU
, "ldsbu", "ldsbu", 32,
2941 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2943 /* ldubu$pack @($GRi,$GRj),$GRk */
2945 FRV_INSN_LDUBU
, "ldubu", "ldubu", 32,
2946 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2948 /* ldshu$pack @($GRi,$GRj),$GRk */
2950 FRV_INSN_LDSHU
, "ldshu", "ldshu", 32,
2951 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2953 /* lduhu$pack @($GRi,$GRj),$GRk */
2955 FRV_INSN_LDUHU
, "lduhu", "lduhu", 32,
2956 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2958 /* ldu$pack @($GRi,$GRj),$GRk */
2960 FRV_INSN_LDU
, "ldu", "ldu", 32,
2961 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2963 /* nldsbu$pack @($GRi,$GRj),$GRk */
2965 FRV_INSN_NLDSBU
, "nldsbu", "nldsbu", 32,
2966 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2968 /* nldubu$pack @($GRi,$GRj),$GRk */
2970 FRV_INSN_NLDUBU
, "nldubu", "nldubu", 32,
2971 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2973 /* nldshu$pack @($GRi,$GRj),$GRk */
2975 FRV_INSN_NLDSHU
, "nldshu", "nldshu", 32,
2976 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2978 /* nlduhu$pack @($GRi,$GRj),$GRk */
2980 FRV_INSN_NLDUHU
, "nlduhu", "nlduhu", 32,
2981 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2983 /* nldu$pack @($GRi,$GRj),$GRk */
2985 FRV_INSN_NLDU
, "nldu", "nldu", 32,
2986 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2988 /* ldbfu$pack @($GRi,$GRj),$FRintk */
2990 FRV_INSN_LDBFU
, "ldbfu", "ldbfu", 32,
2991 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2993 /* ldhfu$pack @($GRi,$GRj),$FRintk */
2995 FRV_INSN_LDHFU
, "ldhfu", "ldhfu", 32,
2996 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
2998 /* ldfu$pack @($GRi,$GRj),$FRintk */
3000 FRV_INSN_LDFU
, "ldfu", "ldfu", 32,
3001 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3003 /* ldcu$pack @($GRi,$GRj),$CPRk */
3005 FRV_INSN_LDCU
, "ldcu", "ldcu", 32,
3006 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3008 /* nldbfu$pack @($GRi,$GRj),$FRintk */
3010 FRV_INSN_NLDBFU
, "nldbfu", "nldbfu", 32,
3011 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3013 /* nldhfu$pack @($GRi,$GRj),$FRintk */
3015 FRV_INSN_NLDHFU
, "nldhfu", "nldhfu", 32,
3016 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3018 /* nldfu$pack @($GRi,$GRj),$FRintk */
3020 FRV_INSN_NLDFU
, "nldfu", "nldfu", 32,
3021 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3023 /* lddu$pack @($GRi,$GRj),$GRdoublek */
3025 FRV_INSN_LDDU
, "lddu", "lddu", 32,
3026 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3028 /* nlddu$pack @($GRi,$GRj),$GRdoublek */
3030 FRV_INSN_NLDDU
, "nlddu", "nlddu", 32,
3031 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3033 /* lddfu$pack @($GRi,$GRj),$FRdoublek */
3035 FRV_INSN_LDDFU
, "lddfu", "lddfu", 32,
3036 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3038 /* lddcu$pack @($GRi,$GRj),$CPRdoublek */
3040 FRV_INSN_LDDCU
, "lddcu", "lddcu", 32,
3041 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3043 /* nlddfu$pack @($GRi,$GRj),$FRdoublek */
3045 FRV_INSN_NLDDFU
, "nlddfu", "nlddfu", 32,
3046 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3048 /* ldqu$pack @($GRi,$GRj),$GRk */
3050 FRV_INSN_LDQU
, "ldqu", "ldqu", 32,
3051 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3053 /* nldqu$pack @($GRi,$GRj),$GRk */
3055 FRV_INSN_NLDQU
, "nldqu", "nldqu", 32,
3056 { 0|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3058 /* ldqfu$pack @($GRi,$GRj),$FRintk */
3060 FRV_INSN_LDQFU
, "ldqfu", "ldqfu", 32,
3061 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3063 /* ldqcu$pack @($GRi,$GRj),$CPRk */
3065 FRV_INSN_LDQCU
, "ldqcu", "ldqcu", 32,
3066 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3068 /* nldqfu$pack @($GRi,$GRj),$FRintk */
3070 FRV_INSN_NLDQFU
, "nldqfu", "nldqfu", 32,
3071 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3073 /* ldsbi$pack @($GRi,$d12),$GRk */
3075 FRV_INSN_LDSBI
, "ldsbi", "ldsbi", 32,
3076 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3078 /* ldshi$pack @($GRi,$d12),$GRk */
3080 FRV_INSN_LDSHI
, "ldshi", "ldshi", 32,
3081 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3083 /* ldi$pack @($GRi,$d12),$GRk */
3085 FRV_INSN_LDI
, "ldi", "ldi", 32,
3086 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3088 /* ldubi$pack @($GRi,$d12),$GRk */
3090 FRV_INSN_LDUBI
, "ldubi", "ldubi", 32,
3091 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3093 /* lduhi$pack @($GRi,$d12),$GRk */
3095 FRV_INSN_LDUHI
, "lduhi", "lduhi", 32,
3096 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3098 /* ldbfi$pack @($GRi,$d12),$FRintk */
3100 FRV_INSN_LDBFI
, "ldbfi", "ldbfi", 32,
3101 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3103 /* ldhfi$pack @($GRi,$d12),$FRintk */
3105 FRV_INSN_LDHFI
, "ldhfi", "ldhfi", 32,
3106 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3108 /* ldfi$pack @($GRi,$d12),$FRintk */
3110 FRV_INSN_LDFI
, "ldfi", "ldfi", 32,
3111 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3113 /* nldsbi$pack @($GRi,$d12),$GRk */
3115 FRV_INSN_NLDSBI
, "nldsbi", "nldsbi", 32,
3116 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3118 /* nldubi$pack @($GRi,$d12),$GRk */
3120 FRV_INSN_NLDUBI
, "nldubi", "nldubi", 32,
3121 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3123 /* nldshi$pack @($GRi,$d12),$GRk */
3125 FRV_INSN_NLDSHI
, "nldshi", "nldshi", 32,
3126 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3128 /* nlduhi$pack @($GRi,$d12),$GRk */
3130 FRV_INSN_NLDUHI
, "nlduhi", "nlduhi", 32,
3131 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3133 /* nldi$pack @($GRi,$d12),$GRk */
3135 FRV_INSN_NLDI
, "nldi", "nldi", 32,
3136 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3138 /* nldbfi$pack @($GRi,$d12),$FRintk */
3140 FRV_INSN_NLDBFI
, "nldbfi", "nldbfi", 32,
3141 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3143 /* nldhfi$pack @($GRi,$d12),$FRintk */
3145 FRV_INSN_NLDHFI
, "nldhfi", "nldhfi", 32,
3146 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3148 /* nldfi$pack @($GRi,$d12),$FRintk */
3150 FRV_INSN_NLDFI
, "nldfi", "nldfi", 32,
3151 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3153 /* lddi$pack @($GRi,$d12),$GRdoublek */
3155 FRV_INSN_LDDI
, "lddi", "lddi", 32,
3156 { 0, { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3158 /* lddfi$pack @($GRi,$d12),$FRdoublek */
3160 FRV_INSN_LDDFI
, "lddfi", "lddfi", 32,
3161 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3163 /* nlddi$pack @($GRi,$d12),$GRdoublek */
3165 FRV_INSN_NLDDI
, "nlddi", "nlddi", 32,
3166 { 0|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3168 /* nlddfi$pack @($GRi,$d12),$FRdoublek */
3170 FRV_INSN_NLDDFI
, "nlddfi", "nlddfi", 32,
3171 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3173 /* ldqi$pack @($GRi,$d12),$GRk */
3175 FRV_INSN_LDQI
, "ldqi", "ldqi", 32,
3176 { 0, { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3178 /* ldqfi$pack @($GRi,$d12),$FRintk */
3180 FRV_INSN_LDQFI
, "ldqfi", "ldqfi", 32,
3181 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3183 /* nldqfi$pack @($GRi,$d12),$FRintk */
3185 FRV_INSN_NLDQFI
, "nldqfi", "nldqfi", 32,
3186 { 0|A(FR_ACCESS
)|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3188 /* stb$pack $GRk,@($GRi,$GRj) */
3190 FRV_INSN_STB
, "stb", "stb", 32,
3191 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3193 /* sth$pack $GRk,@($GRi,$GRj) */
3195 FRV_INSN_STH
, "sth", "sth", 32,
3196 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3198 /* st$pack $GRk,@($GRi,$GRj) */
3200 FRV_INSN_ST
, "st", "st", 32,
3201 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3203 /* stbf$pack $FRintk,@($GRi,$GRj) */
3205 FRV_INSN_STBF
, "stbf", "stbf", 32,
3206 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3208 /* sthf$pack $FRintk,@($GRi,$GRj) */
3210 FRV_INSN_STHF
, "sthf", "sthf", 32,
3211 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3213 /* stf$pack $FRintk,@($GRi,$GRj) */
3215 FRV_INSN_STF
, "stf", "stf", 32,
3216 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3218 /* stc$pack $CPRk,@($GRi,$GRj) */
3220 FRV_INSN_STC
, "stc", "stc", 32,
3221 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3223 /* rstb$pack $GRk,@($GRi,$GRj) */
3225 FRV_INSN_RSTB
, "rstb", "rstb", 32,
3226 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3228 /* rsth$pack $GRk,@($GRi,$GRj) */
3230 FRV_INSN_RSTH
, "rsth", "rsth", 32,
3231 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3233 /* rst$pack $GRk,@($GRi,$GRj) */
3235 FRV_INSN_RST
, "rst", "rst", 32,
3236 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3238 /* rstbf$pack $FRintk,@($GRi,$GRj) */
3240 FRV_INSN_RSTBF
, "rstbf", "rstbf", 32,
3241 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3243 /* rsthf$pack $FRintk,@($GRi,$GRj) */
3245 FRV_INSN_RSTHF
, "rsthf", "rsthf", 32,
3246 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3248 /* rstf$pack $FRintk,@($GRi,$GRj) */
3250 FRV_INSN_RSTF
, "rstf", "rstf", 32,
3251 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3253 /* std$pack $GRdoublek,@($GRi,$GRj) */
3255 FRV_INSN_STD
, "std", "std", 32,
3256 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3258 /* stdf$pack $FRdoublek,@($GRi,$GRj) */
3260 FRV_INSN_STDF
, "stdf", "stdf", 32,
3261 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3263 /* stdc$pack $CPRdoublek,@($GRi,$GRj) */
3265 FRV_INSN_STDC
, "stdc", "stdc", 32,
3266 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3268 /* rstd$pack $GRdoublek,@($GRi,$GRj) */
3270 FRV_INSN_RSTD
, "rstd", "rstd", 32,
3271 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3273 /* rstdf$pack $FRdoublek,@($GRi,$GRj) */
3275 FRV_INSN_RSTDF
, "rstdf", "rstdf", 32,
3276 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3278 /* stq$pack $GRk,@($GRi,$GRj) */
3280 FRV_INSN_STQ
, "stq", "stq", 32,
3281 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3283 /* stqf$pack $FRintk,@($GRi,$GRj) */
3285 FRV_INSN_STQF
, "stqf", "stqf", 32,
3286 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3288 /* stqc$pack $CPRk,@($GRi,$GRj) */
3290 FRV_INSN_STQC
, "stqc", "stqc", 32,
3291 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3293 /* rstq$pack $GRk,@($GRi,$GRj) */
3295 FRV_INSN_RSTQ
, "rstq", "rstq", 32,
3296 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3298 /* rstqf$pack $FRintk,@($GRi,$GRj) */
3300 FRV_INSN_RSTQF
, "rstqf", "rstqf", 32,
3301 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3303 /* stbu$pack $GRk,@($GRi,$GRj) */
3305 FRV_INSN_STBU
, "stbu", "stbu", 32,
3306 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3308 /* sthu$pack $GRk,@($GRi,$GRj) */
3310 FRV_INSN_STHU
, "sthu", "sthu", 32,
3311 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3313 /* stu$pack $GRk,@($GRi,$GRj) */
3315 FRV_INSN_STU
, "stu", "stu", 32,
3316 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3318 /* stbfu$pack $FRintk,@($GRi,$GRj) */
3320 FRV_INSN_STBFU
, "stbfu", "stbfu", 32,
3321 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3323 /* sthfu$pack $FRintk,@($GRi,$GRj) */
3325 FRV_INSN_STHFU
, "sthfu", "sthfu", 32,
3326 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3328 /* stfu$pack $FRintk,@($GRi,$GRj) */
3330 FRV_INSN_STFU
, "stfu", "stfu", 32,
3331 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3333 /* stcu$pack $CPRk,@($GRi,$GRj) */
3335 FRV_INSN_STCU
, "stcu", "stcu", 32,
3336 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3338 /* stdu$pack $GRdoublek,@($GRi,$GRj) */
3340 FRV_INSN_STDU
, "stdu", "stdu", 32,
3341 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3343 /* stdfu$pack $FRdoublek,@($GRi,$GRj) */
3345 FRV_INSN_STDFU
, "stdfu", "stdfu", 32,
3346 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3348 /* stdcu$pack $CPRdoublek,@($GRi,$GRj) */
3350 FRV_INSN_STDCU
, "stdcu", "stdcu", 32,
3351 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3353 /* stqu$pack $GRk,@($GRi,$GRj) */
3355 FRV_INSN_STQU
, "stqu", "stqu", 32,
3356 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3358 /* stqfu$pack $FRintk,@($GRi,$GRj) */
3360 FRV_INSN_STQFU
, "stqfu", "stqfu", 32,
3361 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3363 /* stqcu$pack $CPRk,@($GRi,$GRj) */
3365 FRV_INSN_STQCU
, "stqcu", "stqcu", 32,
3366 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3368 /* cldsb$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3370 FRV_INSN_CLDSB
, "cldsb", "cldsb", 32,
3371 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3373 /* cldub$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3375 FRV_INSN_CLDUB
, "cldub", "cldub", 32,
3376 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3378 /* cldsh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3380 FRV_INSN_CLDSH
, "cldsh", "cldsh", 32,
3381 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3383 /* clduh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3385 FRV_INSN_CLDUH
, "clduh", "clduh", 32,
3386 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3388 /* cld$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3390 FRV_INSN_CLD
, "cld", "cld", 32,
3391 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3393 /* cldbf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3395 FRV_INSN_CLDBF
, "cldbf", "cldbf", 32,
3396 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3398 /* cldhf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3400 FRV_INSN_CLDHF
, "cldhf", "cldhf", 32,
3401 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3403 /* cldf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3405 FRV_INSN_CLDF
, "cldf", "cldf", 32,
3406 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3408 /* cldd$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
3410 FRV_INSN_CLDD
, "cldd", "cldd", 32,
3411 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3413 /* clddf$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
3415 FRV_INSN_CLDDF
, "clddf", "clddf", 32,
3416 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3418 /* cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3420 FRV_INSN_CLDQ
, "cldq", "cldq", 32,
3421 { 0|A(CONDITIONAL
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3423 /* cldsbu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3425 FRV_INSN_CLDSBU
, "cldsbu", "cldsbu", 32,
3426 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3428 /* cldubu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3430 FRV_INSN_CLDUBU
, "cldubu", "cldubu", 32,
3431 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3433 /* cldshu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3435 FRV_INSN_CLDSHU
, "cldshu", "cldshu", 32,
3436 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3438 /* clduhu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3440 FRV_INSN_CLDUHU
, "clduhu", "clduhu", 32,
3441 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3443 /* cldu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3445 FRV_INSN_CLDU
, "cldu", "cldu", 32,
3446 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3448 /* cldbfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3450 FRV_INSN_CLDBFU
, "cldbfu", "cldbfu", 32,
3451 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3453 /* cldhfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3455 FRV_INSN_CLDHFU
, "cldhfu", "cldhfu", 32,
3456 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3458 /* cldfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3460 FRV_INSN_CLDFU
, "cldfu", "cldfu", 32,
3461 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3463 /* clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
3465 FRV_INSN_CLDDU
, "clddu", "clddu", 32,
3466 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3468 /* clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
3470 FRV_INSN_CLDDFU
, "clddfu", "clddfu", 32,
3471 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_LOAD
, FR400_MAJOR_I_2
, FR500_MAJOR_I_2
, FR550_MAJOR_I_3
} }
3473 /* cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3475 FRV_INSN_CLDQU
, "cldqu", "cldqu", 32,
3476 { 0|A(CONDITIONAL
), { (1<<MACH_FRV
), UNIT_LOAD
, FR400_MAJOR_NONE
, FR500_MAJOR_I_2
, FR550_MAJOR_NONE
} }
3478 /* cstb$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3480 FRV_INSN_CSTB
, "cstb", "cstb", 32,
3481 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3483 /* csth$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3485 FRV_INSN_CSTH
, "csth", "csth", 32,
3486 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3488 /* cst$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3490 FRV_INSN_CST
, "cst", "cst", 32,
3491 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3493 /* cstbf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3495 FRV_INSN_CSTBF
, "cstbf", "cstbf", 32,
3496 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3498 /* csthf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3500 FRV_INSN_CSTHF
, "csthf", "csthf", 32,
3501 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3503 /* cstf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3505 FRV_INSN_CSTF
, "cstf", "cstf", 32,
3506 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3508 /* cstd$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
3510 FRV_INSN_CSTD
, "cstd", "cstd", 32,
3511 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3513 /* cstdf$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
3515 FRV_INSN_CSTDF
, "cstdf", "cstdf", 32,
3516 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3518 /* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3520 FRV_INSN_CSTQ
, "cstq", "cstq", 32,
3521 { 0|A(CONDITIONAL
), { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3523 /* cstbu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3525 FRV_INSN_CSTBU
, "cstbu", "cstbu", 32,
3526 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3528 /* csthu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3530 FRV_INSN_CSTHU
, "csthu", "csthu", 32,
3531 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3533 /* cstu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3535 FRV_INSN_CSTU
, "cstu", "cstu", 32,
3536 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3538 /* cstbfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3540 FRV_INSN_CSTBFU
, "cstbfu", "cstbfu", 32,
3541 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3543 /* csthfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3545 FRV_INSN_CSTHFU
, "csthfu", "csthfu", 32,
3546 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3548 /* cstfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3550 FRV_INSN_CSTFU
, "cstfu", "cstfu", 32,
3551 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3553 /* cstdu$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
3555 FRV_INSN_CSTDU
, "cstdu", "cstdu", 32,
3556 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3558 /* cstdfu$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
3560 FRV_INSN_CSTDFU
, "cstdfu", "cstdfu", 32,
3561 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3563 /* stbi$pack $GRk,@($GRi,$d12) */
3565 FRV_INSN_STBI
, "stbi", "stbi", 32,
3566 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3568 /* sthi$pack $GRk,@($GRi,$d12) */
3570 FRV_INSN_STHI
, "sthi", "sthi", 32,
3571 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3573 /* sti$pack $GRk,@($GRi,$d12) */
3575 FRV_INSN_STI
, "sti", "sti", 32,
3576 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3578 /* stbfi$pack $FRintk,@($GRi,$d12) */
3580 FRV_INSN_STBFI
, "stbfi", "stbfi", 32,
3581 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3583 /* sthfi$pack $FRintk,@($GRi,$d12) */
3585 FRV_INSN_STHFI
, "sthfi", "sthfi", 32,
3586 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3588 /* stfi$pack $FRintk,@($GRi,$d12) */
3590 FRV_INSN_STFI
, "stfi", "stfi", 32,
3591 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3593 /* stdi$pack $GRdoublek,@($GRi,$d12) */
3595 FRV_INSN_STDI
, "stdi", "stdi", 32,
3596 { 0, { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3598 /* stdfi$pack $FRdoublek,@($GRi,$d12) */
3600 FRV_INSN_STDFI
, "stdfi", "stdfi", 32,
3601 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_STORE
, FR400_MAJOR_I_3
, FR500_MAJOR_I_3
, FR550_MAJOR_I_4
} }
3603 /* stqi$pack $GRk,@($GRi,$d12) */
3605 FRV_INSN_STQI
, "stqi", "stqi", 32,
3606 { 0, { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3608 /* stqfi$pack $FRintk,@($GRi,$d12) */
3610 FRV_INSN_STQFI
, "stqfi", "stqfi", 32,
3611 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_STORE
, FR400_MAJOR_NONE
, FR500_MAJOR_I_3
, FR550_MAJOR_NONE
} }
3613 /* swap$pack @($GRi,$GRj),$GRk */
3615 FRV_INSN_SWAP
, "swap", "swap", 32,
3616 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
3618 /* swapi$pack @($GRi,$d12),$GRk */
3620 FRV_INSN_SWAPI
, "swapi", "swapi", 32,
3621 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
3623 /* cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3625 FRV_INSN_CSWAP
, "cswap", "cswap", 32,
3626 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
3628 /* movgf$pack $GRj,$FRintk */
3630 FRV_INSN_MOVGF
, "movgf", "movgf", 32,
3631 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3633 /* movfg$pack $FRintk,$GRj */
3635 FRV_INSN_MOVFG
, "movfg", "movfg", 32,
3636 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3638 /* movgfd$pack $GRj,$FRintk */
3640 FRV_INSN_MOVGFD
, "movgfd", "movgfd", 32,
3641 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3643 /* movfgd$pack $FRintk,$GRj */
3645 FRV_INSN_MOVFGD
, "movfgd", "movfgd", 32,
3646 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3648 /* movgfq$pack $GRj,$FRintk */
3650 FRV_INSN_MOVGFQ
, "movgfq", "movgfq", 32,
3651 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_I0
, FR400_MAJOR_NONE
, FR500_MAJOR_I_4
, FR550_MAJOR_NONE
} }
3653 /* movfgq$pack $FRintk,$GRj */
3655 FRV_INSN_MOVFGQ
, "movfgq", "movfgq", 32,
3656 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
), UNIT_I0
, FR400_MAJOR_NONE
, FR500_MAJOR_I_4
, FR550_MAJOR_NONE
} }
3658 /* cmovgf$pack $GRj,$FRintk,$CCi,$cond */
3660 FRV_INSN_CMOVGF
, "cmovgf", "cmovgf", 32,
3661 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3663 /* cmovfg$pack $FRintk,$GRj,$CCi,$cond */
3665 FRV_INSN_CMOVFG
, "cmovfg", "cmovfg", 32,
3666 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3668 /* cmovgfd$pack $GRj,$FRintk,$CCi,$cond */
3670 FRV_INSN_CMOVGFD
, "cmovgfd", "cmovgfd", 32,
3671 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3673 /* cmovfgd$pack $FRintk,$GRj,$CCi,$cond */
3675 FRV_INSN_CMOVFGD
, "cmovfgd", "cmovfgd", 32,
3676 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_4
, FR500_MAJOR_I_4
, FR550_MAJOR_I_5
} }
3678 /* movgs$pack $GRj,$spr */
3680 FRV_INSN_MOVGS
, "movgs", "movgs", 32,
3681 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
3683 /* movsg$pack $spr,$GRj */
3685 FRV_INSN_MOVSG
, "movsg", "movsg", 32,
3686 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
3688 /* bra$pack $hint_taken$label16 */
3690 FRV_INSN_BRA
, "bra", "bra", 32,
3691 { 0|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3693 /* bno$pack$hint_not_taken */
3695 FRV_INSN_BNO
, "bno", "bno", 32,
3696 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3698 /* beq$pack $ICCi_2,$hint,$label16 */
3700 FRV_INSN_BEQ
, "beq", "beq", 32,
3701 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3703 /* bne$pack $ICCi_2,$hint,$label16 */
3705 FRV_INSN_BNE
, "bne", "bne", 32,
3706 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3708 /* ble$pack $ICCi_2,$hint,$label16 */
3710 FRV_INSN_BLE
, "ble", "ble", 32,
3711 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3713 /* bgt$pack $ICCi_2,$hint,$label16 */
3715 FRV_INSN_BGT
, "bgt", "bgt", 32,
3716 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3718 /* blt$pack $ICCi_2,$hint,$label16 */
3720 FRV_INSN_BLT
, "blt", "blt", 32,
3721 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3723 /* bge$pack $ICCi_2,$hint,$label16 */
3725 FRV_INSN_BGE
, "bge", "bge", 32,
3726 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3728 /* bls$pack $ICCi_2,$hint,$label16 */
3730 FRV_INSN_BLS
, "bls", "bls", 32,
3731 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3733 /* bhi$pack $ICCi_2,$hint,$label16 */
3735 FRV_INSN_BHI
, "bhi", "bhi", 32,
3736 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3738 /* bc$pack $ICCi_2,$hint,$label16 */
3740 FRV_INSN_BC
, "bc", "bc", 32,
3741 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3743 /* bnc$pack $ICCi_2,$hint,$label16 */
3745 FRV_INSN_BNC
, "bnc", "bnc", 32,
3746 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3748 /* bn$pack $ICCi_2,$hint,$label16 */
3750 FRV_INSN_BN
, "bn", "bn", 32,
3751 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3753 /* bp$pack $ICCi_2,$hint,$label16 */
3755 FRV_INSN_BP
, "bp", "bp", 32,
3756 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3758 /* bv$pack $ICCi_2,$hint,$label16 */
3760 FRV_INSN_BV
, "bv", "bv", 32,
3761 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3763 /* bnv$pack $ICCi_2,$hint,$label16 */
3765 FRV_INSN_BNV
, "bnv", "bnv", 32,
3766 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3768 /* fbra$pack $hint_taken$label16 */
3770 FRV_INSN_FBRA
, "fbra", "fbra", 32,
3771 { 0|A(FR_ACCESS
)|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3773 /* fbno$pack$hint_not_taken */
3775 FRV_INSN_FBNO
, "fbno", "fbno", 32,
3776 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3778 /* fbne$pack $FCCi_2,$hint,$label16 */
3780 FRV_INSN_FBNE
, "fbne", "fbne", 32,
3781 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3783 /* fbeq$pack $FCCi_2,$hint,$label16 */
3785 FRV_INSN_FBEQ
, "fbeq", "fbeq", 32,
3786 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3788 /* fblg$pack $FCCi_2,$hint,$label16 */
3790 FRV_INSN_FBLG
, "fblg", "fblg", 32,
3791 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3793 /* fbue$pack $FCCi_2,$hint,$label16 */
3795 FRV_INSN_FBUE
, "fbue", "fbue", 32,
3796 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3798 /* fbul$pack $FCCi_2,$hint,$label16 */
3800 FRV_INSN_FBUL
, "fbul", "fbul", 32,
3801 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3803 /* fbge$pack $FCCi_2,$hint,$label16 */
3805 FRV_INSN_FBGE
, "fbge", "fbge", 32,
3806 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3808 /* fblt$pack $FCCi_2,$hint,$label16 */
3810 FRV_INSN_FBLT
, "fblt", "fblt", 32,
3811 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3813 /* fbuge$pack $FCCi_2,$hint,$label16 */
3815 FRV_INSN_FBUGE
, "fbuge", "fbuge", 32,
3816 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3818 /* fbug$pack $FCCi_2,$hint,$label16 */
3820 FRV_INSN_FBUG
, "fbug", "fbug", 32,
3821 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3823 /* fble$pack $FCCi_2,$hint,$label16 */
3825 FRV_INSN_FBLE
, "fble", "fble", 32,
3826 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3828 /* fbgt$pack $FCCi_2,$hint,$label16 */
3830 FRV_INSN_FBGT
, "fbgt", "fbgt", 32,
3831 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3833 /* fbule$pack $FCCi_2,$hint,$label16 */
3835 FRV_INSN_FBULE
, "fbule", "fbule", 32,
3836 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3838 /* fbu$pack $FCCi_2,$hint,$label16 */
3840 FRV_INSN_FBU
, "fbu", "fbu", 32,
3841 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3843 /* fbo$pack $FCCi_2,$hint,$label16 */
3845 FRV_INSN_FBO
, "fbo", "fbo", 32,
3846 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_1
, FR500_MAJOR_B_1
, FR550_MAJOR_B_1
} }
3848 /* bctrlr$pack $ccond,$hint */
3850 FRV_INSN_BCTRLR
, "bctrlr", "bctrlr", 32,
3851 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
3853 /* bralr$pack$hint_taken */
3855 FRV_INSN_BRALR
, "bralr", "bralr", 32,
3856 { 0|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3858 /* bnolr$pack$hint_not_taken */
3860 FRV_INSN_BNOLR
, "bnolr", "bnolr", 32,
3861 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3863 /* beqlr$pack $ICCi_2,$hint */
3865 FRV_INSN_BEQLR
, "beqlr", "beqlr", 32,
3866 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3868 /* bnelr$pack $ICCi_2,$hint */
3870 FRV_INSN_BNELR
, "bnelr", "bnelr", 32,
3871 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3873 /* blelr$pack $ICCi_2,$hint */
3875 FRV_INSN_BLELR
, "blelr", "blelr", 32,
3876 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3878 /* bgtlr$pack $ICCi_2,$hint */
3880 FRV_INSN_BGTLR
, "bgtlr", "bgtlr", 32,
3881 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3883 /* bltlr$pack $ICCi_2,$hint */
3885 FRV_INSN_BLTLR
, "bltlr", "bltlr", 32,
3886 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3888 /* bgelr$pack $ICCi_2,$hint */
3890 FRV_INSN_BGELR
, "bgelr", "bgelr", 32,
3891 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3893 /* blslr$pack $ICCi_2,$hint */
3895 FRV_INSN_BLSLR
, "blslr", "blslr", 32,
3896 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3898 /* bhilr$pack $ICCi_2,$hint */
3900 FRV_INSN_BHILR
, "bhilr", "bhilr", 32,
3901 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3903 /* bclr$pack $ICCi_2,$hint */
3905 FRV_INSN_BCLR
, "bclr", "bclr", 32,
3906 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3908 /* bnclr$pack $ICCi_2,$hint */
3910 FRV_INSN_BNCLR
, "bnclr", "bnclr", 32,
3911 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3913 /* bnlr$pack $ICCi_2,$hint */
3915 FRV_INSN_BNLR
, "bnlr", "bnlr", 32,
3916 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3918 /* bplr$pack $ICCi_2,$hint */
3920 FRV_INSN_BPLR
, "bplr", "bplr", 32,
3921 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3923 /* bvlr$pack $ICCi_2,$hint */
3925 FRV_INSN_BVLR
, "bvlr", "bvlr", 32,
3926 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3928 /* bnvlr$pack $ICCi_2,$hint */
3930 FRV_INSN_BNVLR
, "bnvlr", "bnvlr", 32,
3931 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3933 /* fbralr$pack$hint_taken */
3935 FRV_INSN_FBRALR
, "fbralr", "fbralr", 32,
3936 { 0|A(FR_ACCESS
)|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3938 /* fbnolr$pack$hint_not_taken */
3940 FRV_INSN_FBNOLR
, "fbnolr", "fbnolr", 32,
3941 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3943 /* fbeqlr$pack $FCCi_2,$hint */
3945 FRV_INSN_FBEQLR
, "fbeqlr", "fbeqlr", 32,
3946 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3948 /* fbnelr$pack $FCCi_2,$hint */
3950 FRV_INSN_FBNELR
, "fbnelr", "fbnelr", 32,
3951 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3953 /* fblglr$pack $FCCi_2,$hint */
3955 FRV_INSN_FBLGLR
, "fblglr", "fblglr", 32,
3956 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3958 /* fbuelr$pack $FCCi_2,$hint */
3960 FRV_INSN_FBUELR
, "fbuelr", "fbuelr", 32,
3961 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3963 /* fbullr$pack $FCCi_2,$hint */
3965 FRV_INSN_FBULLR
, "fbullr", "fbullr", 32,
3966 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3968 /* fbgelr$pack $FCCi_2,$hint */
3970 FRV_INSN_FBGELR
, "fbgelr", "fbgelr", 32,
3971 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3973 /* fbltlr$pack $FCCi_2,$hint */
3975 FRV_INSN_FBLTLR
, "fbltlr", "fbltlr", 32,
3976 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3978 /* fbugelr$pack $FCCi_2,$hint */
3980 FRV_INSN_FBUGELR
, "fbugelr", "fbugelr", 32,
3981 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3983 /* fbuglr$pack $FCCi_2,$hint */
3985 FRV_INSN_FBUGLR
, "fbuglr", "fbuglr", 32,
3986 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3988 /* fblelr$pack $FCCi_2,$hint */
3990 FRV_INSN_FBLELR
, "fblelr", "fblelr", 32,
3991 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3993 /* fbgtlr$pack $FCCi_2,$hint */
3995 FRV_INSN_FBGTLR
, "fbgtlr", "fbgtlr", 32,
3996 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
3998 /* fbulelr$pack $FCCi_2,$hint */
4000 FRV_INSN_FBULELR
, "fbulelr", "fbulelr", 32,
4001 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
4003 /* fbulr$pack $FCCi_2,$hint */
4005 FRV_INSN_FBULR
, "fbulr", "fbulr", 32,
4006 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
4008 /* fbolr$pack $FCCi_2,$hint */
4010 FRV_INSN_FBOLR
, "fbolr", "fbolr", 32,
4011 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_3
, FR500_MAJOR_B_3
, FR550_MAJOR_B_3
} }
4013 /* bcralr$pack $ccond$hint_taken */
4015 FRV_INSN_BCRALR
, "bcralr", "bcralr", 32,
4016 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4018 /* bcnolr$pack$hint_not_taken */
4020 FRV_INSN_BCNOLR
, "bcnolr", "bcnolr", 32,
4021 { 0, { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4023 /* bceqlr$pack $ICCi_2,$ccond,$hint */
4025 FRV_INSN_BCEQLR
, "bceqlr", "bceqlr", 32,
4026 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4028 /* bcnelr$pack $ICCi_2,$ccond,$hint */
4030 FRV_INSN_BCNELR
, "bcnelr", "bcnelr", 32,
4031 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4033 /* bclelr$pack $ICCi_2,$ccond,$hint */
4035 FRV_INSN_BCLELR
, "bclelr", "bclelr", 32,
4036 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4038 /* bcgtlr$pack $ICCi_2,$ccond,$hint */
4040 FRV_INSN_BCGTLR
, "bcgtlr", "bcgtlr", 32,
4041 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4043 /* bcltlr$pack $ICCi_2,$ccond,$hint */
4045 FRV_INSN_BCLTLR
, "bcltlr", "bcltlr", 32,
4046 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4048 /* bcgelr$pack $ICCi_2,$ccond,$hint */
4050 FRV_INSN_BCGELR
, "bcgelr", "bcgelr", 32,
4051 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4053 /* bclslr$pack $ICCi_2,$ccond,$hint */
4055 FRV_INSN_BCLSLR
, "bclslr", "bclslr", 32,
4056 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4058 /* bchilr$pack $ICCi_2,$ccond,$hint */
4060 FRV_INSN_BCHILR
, "bchilr", "bchilr", 32,
4061 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4063 /* bcclr$pack $ICCi_2,$ccond,$hint */
4065 FRV_INSN_BCCLR
, "bcclr", "bcclr", 32,
4066 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4068 /* bcnclr$pack $ICCi_2,$ccond,$hint */
4070 FRV_INSN_BCNCLR
, "bcnclr", "bcnclr", 32,
4071 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4073 /* bcnlr$pack $ICCi_2,$ccond,$hint */
4075 FRV_INSN_BCNLR
, "bcnlr", "bcnlr", 32,
4076 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4078 /* bcplr$pack $ICCi_2,$ccond,$hint */
4080 FRV_INSN_BCPLR
, "bcplr", "bcplr", 32,
4081 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4083 /* bcvlr$pack $ICCi_2,$ccond,$hint */
4085 FRV_INSN_BCVLR
, "bcvlr", "bcvlr", 32,
4086 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4088 /* bcnvlr$pack $ICCi_2,$ccond,$hint */
4090 FRV_INSN_BCNVLR
, "bcnvlr", "bcnvlr", 32,
4091 { 0|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4093 /* fcbralr$pack $ccond$hint_taken */
4095 FRV_INSN_FCBRALR
, "fcbralr", "fcbralr", 32,
4096 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4098 /* fcbnolr$pack$hint_not_taken */
4100 FRV_INSN_FCBNOLR
, "fcbnolr", "fcbnolr", 32,
4101 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4103 /* fcbeqlr$pack $FCCi_2,$ccond,$hint */
4105 FRV_INSN_FCBEQLR
, "fcbeqlr", "fcbeqlr", 32,
4106 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4108 /* fcbnelr$pack $FCCi_2,$ccond,$hint */
4110 FRV_INSN_FCBNELR
, "fcbnelr", "fcbnelr", 32,
4111 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4113 /* fcblglr$pack $FCCi_2,$ccond,$hint */
4115 FRV_INSN_FCBLGLR
, "fcblglr", "fcblglr", 32,
4116 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4118 /* fcbuelr$pack $FCCi_2,$ccond,$hint */
4120 FRV_INSN_FCBUELR
, "fcbuelr", "fcbuelr", 32,
4121 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4123 /* fcbullr$pack $FCCi_2,$ccond,$hint */
4125 FRV_INSN_FCBULLR
, "fcbullr", "fcbullr", 32,
4126 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4128 /* fcbgelr$pack $FCCi_2,$ccond,$hint */
4130 FRV_INSN_FCBGELR
, "fcbgelr", "fcbgelr", 32,
4131 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4133 /* fcbltlr$pack $FCCi_2,$ccond,$hint */
4135 FRV_INSN_FCBLTLR
, "fcbltlr", "fcbltlr", 32,
4136 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4138 /* fcbugelr$pack $FCCi_2,$ccond,$hint */
4140 FRV_INSN_FCBUGELR
, "fcbugelr", "fcbugelr", 32,
4141 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4143 /* fcbuglr$pack $FCCi_2,$ccond,$hint */
4145 FRV_INSN_FCBUGLR
, "fcbuglr", "fcbuglr", 32,
4146 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4148 /* fcblelr$pack $FCCi_2,$ccond,$hint */
4150 FRV_INSN_FCBLELR
, "fcblelr", "fcblelr", 32,
4151 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4153 /* fcbgtlr$pack $FCCi_2,$ccond,$hint */
4155 FRV_INSN_FCBGTLR
, "fcbgtlr", "fcbgtlr", 32,
4156 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4158 /* fcbulelr$pack $FCCi_2,$ccond,$hint */
4160 FRV_INSN_FCBULELR
, "fcbulelr", "fcbulelr", 32,
4161 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4163 /* fcbulr$pack $FCCi_2,$ccond,$hint */
4165 FRV_INSN_FCBULR
, "fcbulr", "fcbulr", 32,
4166 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4168 /* fcbolr$pack $FCCi_2,$ccond,$hint */
4170 FRV_INSN_FCBOLR
, "fcbolr", "fcbolr", 32,
4171 { 0|A(FR_ACCESS
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_2
, FR500_MAJOR_B_2
, FR550_MAJOR_B_2
} }
4173 /* jmpl$pack @($GRi,$GRj) */
4175 FRV_INSN_JMPL
, "jmpl", "jmpl", 32,
4176 { 0|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_5
, FR500_MAJOR_I_5
, FR550_MAJOR_I_6
} }
4178 /* calll$pack @($GRi,$GRj) */
4180 FRV_INSN_CALLL
, "calll", "calll", 32,
4181 { 0|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_5
, FR500_MAJOR_I_5
, FR550_MAJOR_NONE
} }
4183 /* jmpil$pack @($GRi,$s12) */
4185 FRV_INSN_JMPIL
, "jmpil", "jmpil", 32,
4186 { 0|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_5
, FR500_MAJOR_I_5
, FR550_MAJOR_I_6
} }
4188 /* callil$pack @($GRi,$s12) */
4190 FRV_INSN_CALLIL
, "callil", "callil", 32,
4191 { 0|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_5
, FR500_MAJOR_I_5
, FR550_MAJOR_NONE
} }
4193 /* call$pack $label24 */
4195 FRV_INSN_CALL
, "call", "call", 32,
4196 { 0|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_B0
, FR400_MAJOR_B_4
, FR500_MAJOR_B_4
, FR550_MAJOR_B_4
} }
4198 /* rett$pack $debug */
4200 FRV_INSN_RETT
, "rett", "rett", 32,
4201 { 0|A(PRIVILEGED
)|A(UNCOND_CTI
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4205 FRV_INSN_REI
, "rei", "rei", 32,
4206 { 0|A(PRIVILEGED
), { (1<<MACH_FRV
), UNIT_C
, FR400_MAJOR_NONE
, FR500_MAJOR_C_1
, FR550_MAJOR_NONE
} }
4208 /* tra$pack $GRi,$GRj */
4210 FRV_INSN_TRA
, "tra", "tra", 32,
4211 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4215 FRV_INSN_TNO
, "tno", "tno", 32,
4216 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4218 /* teq$pack $ICCi_2,$GRi,$GRj */
4220 FRV_INSN_TEQ
, "teq", "teq", 32,
4221 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4223 /* tne$pack $ICCi_2,$GRi,$GRj */
4225 FRV_INSN_TNE
, "tne", "tne", 32,
4226 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4228 /* tle$pack $ICCi_2,$GRi,$GRj */
4230 FRV_INSN_TLE
, "tle", "tle", 32,
4231 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4233 /* tgt$pack $ICCi_2,$GRi,$GRj */
4235 FRV_INSN_TGT
, "tgt", "tgt", 32,
4236 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4238 /* tlt$pack $ICCi_2,$GRi,$GRj */
4240 FRV_INSN_TLT
, "tlt", "tlt", 32,
4241 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4243 /* tge$pack $ICCi_2,$GRi,$GRj */
4245 FRV_INSN_TGE
, "tge", "tge", 32,
4246 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4248 /* tls$pack $ICCi_2,$GRi,$GRj */
4250 FRV_INSN_TLS
, "tls", "tls", 32,
4251 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4253 /* thi$pack $ICCi_2,$GRi,$GRj */
4255 FRV_INSN_THI
, "thi", "thi", 32,
4256 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4258 /* tc$pack $ICCi_2,$GRi,$GRj */
4260 FRV_INSN_TC
, "tc", "tc", 32,
4261 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4263 /* tnc$pack $ICCi_2,$GRi,$GRj */
4265 FRV_INSN_TNC
, "tnc", "tnc", 32,
4266 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4268 /* tn$pack $ICCi_2,$GRi,$GRj */
4270 FRV_INSN_TN
, "tn", "tn", 32,
4271 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4273 /* tp$pack $ICCi_2,$GRi,$GRj */
4275 FRV_INSN_TP
, "tp", "tp", 32,
4276 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4278 /* tv$pack $ICCi_2,$GRi,$GRj */
4280 FRV_INSN_TV
, "tv", "tv", 32,
4281 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4283 /* tnv$pack $ICCi_2,$GRi,$GRj */
4285 FRV_INSN_TNV
, "tnv", "tnv", 32,
4286 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4288 /* ftra$pack $GRi,$GRj */
4290 FRV_INSN_FTRA
, "ftra", "ftra", 32,
4291 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4295 FRV_INSN_FTNO
, "ftno", "ftno", 32,
4296 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4298 /* ftne$pack $FCCi_2,$GRi,$GRj */
4300 FRV_INSN_FTNE
, "ftne", "ftne", 32,
4301 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4303 /* fteq$pack $FCCi_2,$GRi,$GRj */
4305 FRV_INSN_FTEQ
, "fteq", "fteq", 32,
4306 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4308 /* ftlg$pack $FCCi_2,$GRi,$GRj */
4310 FRV_INSN_FTLG
, "ftlg", "ftlg", 32,
4311 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4313 /* ftue$pack $FCCi_2,$GRi,$GRj */
4315 FRV_INSN_FTUE
, "ftue", "ftue", 32,
4316 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4318 /* ftul$pack $FCCi_2,$GRi,$GRj */
4320 FRV_INSN_FTUL
, "ftul", "ftul", 32,
4321 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4323 /* ftge$pack $FCCi_2,$GRi,$GRj */
4325 FRV_INSN_FTGE
, "ftge", "ftge", 32,
4326 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4328 /* ftlt$pack $FCCi_2,$GRi,$GRj */
4330 FRV_INSN_FTLT
, "ftlt", "ftlt", 32,
4331 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4333 /* ftuge$pack $FCCi_2,$GRi,$GRj */
4335 FRV_INSN_FTUGE
, "ftuge", "ftuge", 32,
4336 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4338 /* ftug$pack $FCCi_2,$GRi,$GRj */
4340 FRV_INSN_FTUG
, "ftug", "ftug", 32,
4341 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4343 /* ftle$pack $FCCi_2,$GRi,$GRj */
4345 FRV_INSN_FTLE
, "ftle", "ftle", 32,
4346 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4348 /* ftgt$pack $FCCi_2,$GRi,$GRj */
4350 FRV_INSN_FTGT
, "ftgt", "ftgt", 32,
4351 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4353 /* ftule$pack $FCCi_2,$GRi,$GRj */
4355 FRV_INSN_FTULE
, "ftule", "ftule", 32,
4356 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4358 /* ftu$pack $FCCi_2,$GRi,$GRj */
4360 FRV_INSN_FTU
, "ftu", "ftu", 32,
4361 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4363 /* fto$pack $FCCi_2,$GRi,$GRj */
4365 FRV_INSN_FTO
, "fto", "fto", 32,
4366 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4368 /* tira$pack $GRi,$s12 */
4370 FRV_INSN_TIRA
, "tira", "tira", 32,
4371 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4375 FRV_INSN_TINO
, "tino", "tino", 32,
4376 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4378 /* tieq$pack $ICCi_2,$GRi,$s12 */
4380 FRV_INSN_TIEQ
, "tieq", "tieq", 32,
4381 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4383 /* tine$pack $ICCi_2,$GRi,$s12 */
4385 FRV_INSN_TINE
, "tine", "tine", 32,
4386 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4388 /* tile$pack $ICCi_2,$GRi,$s12 */
4390 FRV_INSN_TILE
, "tile", "tile", 32,
4391 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4393 /* tigt$pack $ICCi_2,$GRi,$s12 */
4395 FRV_INSN_TIGT
, "tigt", "tigt", 32,
4396 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4398 /* tilt$pack $ICCi_2,$GRi,$s12 */
4400 FRV_INSN_TILT
, "tilt", "tilt", 32,
4401 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4403 /* tige$pack $ICCi_2,$GRi,$s12 */
4405 FRV_INSN_TIGE
, "tige", "tige", 32,
4406 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4408 /* tils$pack $ICCi_2,$GRi,$s12 */
4410 FRV_INSN_TILS
, "tils", "tils", 32,
4411 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4413 /* tihi$pack $ICCi_2,$GRi,$s12 */
4415 FRV_INSN_TIHI
, "tihi", "tihi", 32,
4416 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4418 /* tic$pack $ICCi_2,$GRi,$s12 */
4420 FRV_INSN_TIC
, "tic", "tic", 32,
4421 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4423 /* tinc$pack $ICCi_2,$GRi,$s12 */
4425 FRV_INSN_TINC
, "tinc", "tinc", 32,
4426 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4428 /* tin$pack $ICCi_2,$GRi,$s12 */
4430 FRV_INSN_TIN
, "tin", "tin", 32,
4431 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4433 /* tip$pack $ICCi_2,$GRi,$s12 */
4435 FRV_INSN_TIP
, "tip", "tip", 32,
4436 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4438 /* tiv$pack $ICCi_2,$GRi,$s12 */
4440 FRV_INSN_TIV
, "tiv", "tiv", 32,
4441 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4443 /* tinv$pack $ICCi_2,$GRi,$s12 */
4445 FRV_INSN_TINV
, "tinv", "tinv", 32,
4446 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4448 /* ftira$pack $GRi,$s12 */
4450 FRV_INSN_FTIRA
, "ftira", "ftira", 32,
4451 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4455 FRV_INSN_FTINO
, "ftino", "ftino", 32,
4456 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4458 /* ftine$pack $FCCi_2,$GRi,$s12 */
4460 FRV_INSN_FTINE
, "ftine", "ftine", 32,
4461 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4463 /* ftieq$pack $FCCi_2,$GRi,$s12 */
4465 FRV_INSN_FTIEQ
, "ftieq", "ftieq", 32,
4466 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4468 /* ftilg$pack $FCCi_2,$GRi,$s12 */
4470 FRV_INSN_FTILG
, "ftilg", "ftilg", 32,
4471 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4473 /* ftiue$pack $FCCi_2,$GRi,$s12 */
4475 FRV_INSN_FTIUE
, "ftiue", "ftiue", 32,
4476 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4478 /* ftiul$pack $FCCi_2,$GRi,$s12 */
4480 FRV_INSN_FTIUL
, "ftiul", "ftiul", 32,
4481 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4483 /* ftige$pack $FCCi_2,$GRi,$s12 */
4485 FRV_INSN_FTIGE
, "ftige", "ftige", 32,
4486 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4488 /* ftilt$pack $FCCi_2,$GRi,$s12 */
4490 FRV_INSN_FTILT
, "ftilt", "ftilt", 32,
4491 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4493 /* ftiuge$pack $FCCi_2,$GRi,$s12 */
4495 FRV_INSN_FTIUGE
, "ftiuge", "ftiuge", 32,
4496 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4498 /* ftiug$pack $FCCi_2,$GRi,$s12 */
4500 FRV_INSN_FTIUG
, "ftiug", "ftiug", 32,
4501 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4503 /* ftile$pack $FCCi_2,$GRi,$s12 */
4505 FRV_INSN_FTILE
, "ftile", "ftile", 32,
4506 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4508 /* ftigt$pack $FCCi_2,$GRi,$s12 */
4510 FRV_INSN_FTIGT
, "ftigt", "ftigt", 32,
4511 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4513 /* ftiule$pack $FCCi_2,$GRi,$s12 */
4515 FRV_INSN_FTIULE
, "ftiule", "ftiule", 32,
4516 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4518 /* ftiu$pack $FCCi_2,$GRi,$s12 */
4520 FRV_INSN_FTIU
, "ftiu", "ftiu", 32,
4521 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4523 /* ftio$pack $FCCi_2,$GRi,$s12 */
4525 FRV_INSN_FTIO
, "ftio", "ftio", 32,
4526 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4530 FRV_INSN_BREAK
, "break", "break", 32,
4531 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4535 FRV_INSN_MTRAP
, "mtrap", "mtrap", 32,
4536 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_1
, FR500_MAJOR_C_1
, FR550_MAJOR_C_1
} }
4538 /* andcr$pack $CRi,$CRj,$CRk */
4540 FRV_INSN_ANDCR
, "andcr", "andcr", 32,
4541 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4543 /* orcr$pack $CRi,$CRj,$CRk */
4545 FRV_INSN_ORCR
, "orcr", "orcr", 32,
4546 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4548 /* xorcr$pack $CRi,$CRj,$CRk */
4550 FRV_INSN_XORCR
, "xorcr", "xorcr", 32,
4551 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4553 /* nandcr$pack $CRi,$CRj,$CRk */
4555 FRV_INSN_NANDCR
, "nandcr", "nandcr", 32,
4556 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4558 /* norcr$pack $CRi,$CRj,$CRk */
4560 FRV_INSN_NORCR
, "norcr", "norcr", 32,
4561 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4563 /* andncr$pack $CRi,$CRj,$CRk */
4565 FRV_INSN_ANDNCR
, "andncr", "andncr", 32,
4566 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4568 /* orncr$pack $CRi,$CRj,$CRk */
4570 FRV_INSN_ORNCR
, "orncr", "orncr", 32,
4571 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4573 /* nandncr$pack $CRi,$CRj,$CRk */
4575 FRV_INSN_NANDNCR
, "nandncr", "nandncr", 32,
4576 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4578 /* norncr$pack $CRi,$CRj,$CRk */
4580 FRV_INSN_NORNCR
, "norncr", "norncr", 32,
4581 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4583 /* notcr$pack $CRj,$CRk */
4585 FRV_INSN_NOTCR
, "notcr", "notcr", 32,
4586 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_6
, FR500_MAJOR_B_6
, FR550_MAJOR_B_6
} }
4588 /* ckra$pack $CRj_int */
4590 FRV_INSN_CKRA
, "ckra", "ckra", 32,
4591 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4593 /* ckno$pack $CRj_int */
4595 FRV_INSN_CKNO
, "ckno", "ckno", 32,
4596 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4598 /* ckeq$pack $ICCi_3,$CRj_int */
4600 FRV_INSN_CKEQ
, "ckeq", "ckeq", 32,
4601 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4603 /* ckne$pack $ICCi_3,$CRj_int */
4605 FRV_INSN_CKNE
, "ckne", "ckne", 32,
4606 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4608 /* ckle$pack $ICCi_3,$CRj_int */
4610 FRV_INSN_CKLE
, "ckle", "ckle", 32,
4611 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4613 /* ckgt$pack $ICCi_3,$CRj_int */
4615 FRV_INSN_CKGT
, "ckgt", "ckgt", 32,
4616 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4618 /* cklt$pack $ICCi_3,$CRj_int */
4620 FRV_INSN_CKLT
, "cklt", "cklt", 32,
4621 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4623 /* ckge$pack $ICCi_3,$CRj_int */
4625 FRV_INSN_CKGE
, "ckge", "ckge", 32,
4626 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4628 /* ckls$pack $ICCi_3,$CRj_int */
4630 FRV_INSN_CKLS
, "ckls", "ckls", 32,
4631 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4633 /* ckhi$pack $ICCi_3,$CRj_int */
4635 FRV_INSN_CKHI
, "ckhi", "ckhi", 32,
4636 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4638 /* ckc$pack $ICCi_3,$CRj_int */
4640 FRV_INSN_CKC
, "ckc", "ckc", 32,
4641 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4643 /* cknc$pack $ICCi_3,$CRj_int */
4645 FRV_INSN_CKNC
, "cknc", "cknc", 32,
4646 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4648 /* ckn$pack $ICCi_3,$CRj_int */
4650 FRV_INSN_CKN
, "ckn", "ckn", 32,
4651 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4653 /* ckp$pack $ICCi_3,$CRj_int */
4655 FRV_INSN_CKP
, "ckp", "ckp", 32,
4656 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4658 /* ckv$pack $ICCi_3,$CRj_int */
4660 FRV_INSN_CKV
, "ckv", "ckv", 32,
4661 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4663 /* cknv$pack $ICCi_3,$CRj_int */
4665 FRV_INSN_CKNV
, "cknv", "cknv", 32,
4666 { 0, { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4668 /* fckra$pack $CRj_float */
4670 FRV_INSN_FCKRA
, "fckra", "fckra", 32,
4671 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4673 /* fckno$pack $CRj_float */
4675 FRV_INSN_FCKNO
, "fckno", "fckno", 32,
4676 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4678 /* fckne$pack $FCCi_3,$CRj_float */
4680 FRV_INSN_FCKNE
, "fckne", "fckne", 32,
4681 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4683 /* fckeq$pack $FCCi_3,$CRj_float */
4685 FRV_INSN_FCKEQ
, "fckeq", "fckeq", 32,
4686 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4688 /* fcklg$pack $FCCi_3,$CRj_float */
4690 FRV_INSN_FCKLG
, "fcklg", "fcklg", 32,
4691 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4693 /* fckue$pack $FCCi_3,$CRj_float */
4695 FRV_INSN_FCKUE
, "fckue", "fckue", 32,
4696 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4698 /* fckul$pack $FCCi_3,$CRj_float */
4700 FRV_INSN_FCKUL
, "fckul", "fckul", 32,
4701 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4703 /* fckge$pack $FCCi_3,$CRj_float */
4705 FRV_INSN_FCKGE
, "fckge", "fckge", 32,
4706 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4708 /* fcklt$pack $FCCi_3,$CRj_float */
4710 FRV_INSN_FCKLT
, "fcklt", "fcklt", 32,
4711 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4713 /* fckuge$pack $FCCi_3,$CRj_float */
4715 FRV_INSN_FCKUGE
, "fckuge", "fckuge", 32,
4716 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4718 /* fckug$pack $FCCi_3,$CRj_float */
4720 FRV_INSN_FCKUG
, "fckug", "fckug", 32,
4721 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4723 /* fckle$pack $FCCi_3,$CRj_float */
4725 FRV_INSN_FCKLE
, "fckle", "fckle", 32,
4726 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4728 /* fckgt$pack $FCCi_3,$CRj_float */
4730 FRV_INSN_FCKGT
, "fckgt", "fckgt", 32,
4731 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4733 /* fckule$pack $FCCi_3,$CRj_float */
4735 FRV_INSN_FCKULE
, "fckule", "fckule", 32,
4736 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4738 /* fcku$pack $FCCi_3,$CRj_float */
4740 FRV_INSN_FCKU
, "fcku", "fcku", 32,
4741 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4743 /* fcko$pack $FCCi_3,$CRj_float */
4745 FRV_INSN_FCKO
, "fcko", "fcko", 32,
4746 { 0|A(FR_ACCESS
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4748 /* cckra$pack $CRj_int,$CCi,$cond */
4750 FRV_INSN_CCKRA
, "cckra", "cckra", 32,
4751 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4753 /* cckno$pack $CRj_int,$CCi,$cond */
4755 FRV_INSN_CCKNO
, "cckno", "cckno", 32,
4756 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4758 /* cckeq$pack $ICCi_3,$CRj_int,$CCi,$cond */
4760 FRV_INSN_CCKEQ
, "cckeq", "cckeq", 32,
4761 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4763 /* cckne$pack $ICCi_3,$CRj_int,$CCi,$cond */
4765 FRV_INSN_CCKNE
, "cckne", "cckne", 32,
4766 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4768 /* cckle$pack $ICCi_3,$CRj_int,$CCi,$cond */
4770 FRV_INSN_CCKLE
, "cckle", "cckle", 32,
4771 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4773 /* cckgt$pack $ICCi_3,$CRj_int,$CCi,$cond */
4775 FRV_INSN_CCKGT
, "cckgt", "cckgt", 32,
4776 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4778 /* ccklt$pack $ICCi_3,$CRj_int,$CCi,$cond */
4780 FRV_INSN_CCKLT
, "ccklt", "ccklt", 32,
4781 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4783 /* cckge$pack $ICCi_3,$CRj_int,$CCi,$cond */
4785 FRV_INSN_CCKGE
, "cckge", "cckge", 32,
4786 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4788 /* cckls$pack $ICCi_3,$CRj_int,$CCi,$cond */
4790 FRV_INSN_CCKLS
, "cckls", "cckls", 32,
4791 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4793 /* cckhi$pack $ICCi_3,$CRj_int,$CCi,$cond */
4795 FRV_INSN_CCKHI
, "cckhi", "cckhi", 32,
4796 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4798 /* cckc$pack $ICCi_3,$CRj_int,$CCi,$cond */
4800 FRV_INSN_CCKC
, "cckc", "cckc", 32,
4801 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4803 /* ccknc$pack $ICCi_3,$CRj_int,$CCi,$cond */
4805 FRV_INSN_CCKNC
, "ccknc", "ccknc", 32,
4806 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4808 /* cckn$pack $ICCi_3,$CRj_int,$CCi,$cond */
4810 FRV_INSN_CCKN
, "cckn", "cckn", 32,
4811 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4813 /* cckp$pack $ICCi_3,$CRj_int,$CCi,$cond */
4815 FRV_INSN_CCKP
, "cckp", "cckp", 32,
4816 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4818 /* cckv$pack $ICCi_3,$CRj_int,$CCi,$cond */
4820 FRV_INSN_CCKV
, "cckv", "cckv", 32,
4821 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4823 /* ccknv$pack $ICCi_3,$CRj_int,$CCi,$cond */
4825 FRV_INSN_CCKNV
, "ccknv", "ccknv", 32,
4826 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4828 /* cfckra$pack $CRj_float,$CCi,$cond */
4830 FRV_INSN_CFCKRA
, "cfckra", "cfckra", 32,
4831 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4833 /* cfckno$pack $CRj_float,$CCi,$cond */
4835 FRV_INSN_CFCKNO
, "cfckno", "cfckno", 32,
4836 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4838 /* cfckne$pack $FCCi_3,$CRj_float,$CCi,$cond */
4840 FRV_INSN_CFCKNE
, "cfckne", "cfckne", 32,
4841 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4843 /* cfckeq$pack $FCCi_3,$CRj_float,$CCi,$cond */
4845 FRV_INSN_CFCKEQ
, "cfckeq", "cfckeq", 32,
4846 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4848 /* cfcklg$pack $FCCi_3,$CRj_float,$CCi,$cond */
4850 FRV_INSN_CFCKLG
, "cfcklg", "cfcklg", 32,
4851 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4853 /* cfckue$pack $FCCi_3,$CRj_float,$CCi,$cond */
4855 FRV_INSN_CFCKUE
, "cfckue", "cfckue", 32,
4856 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4858 /* cfckul$pack $FCCi_3,$CRj_float,$CCi,$cond */
4860 FRV_INSN_CFCKUL
, "cfckul", "cfckul", 32,
4861 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4863 /* cfckge$pack $FCCi_3,$CRj_float,$CCi,$cond */
4865 FRV_INSN_CFCKGE
, "cfckge", "cfckge", 32,
4866 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4868 /* cfcklt$pack $FCCi_3,$CRj_float,$CCi,$cond */
4870 FRV_INSN_CFCKLT
, "cfcklt", "cfcklt", 32,
4871 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4873 /* cfckuge$pack $FCCi_3,$CRj_float,$CCi,$cond */
4875 FRV_INSN_CFCKUGE
, "cfckuge", "cfckuge", 32,
4876 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4878 /* cfckug$pack $FCCi_3,$CRj_float,$CCi,$cond */
4880 FRV_INSN_CFCKUG
, "cfckug", "cfckug", 32,
4881 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4883 /* cfckle$pack $FCCi_3,$CRj_float,$CCi,$cond */
4885 FRV_INSN_CFCKLE
, "cfckle", "cfckle", 32,
4886 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4888 /* cfckgt$pack $FCCi_3,$CRj_float,$CCi,$cond */
4890 FRV_INSN_CFCKGT
, "cfckgt", "cfckgt", 32,
4891 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4893 /* cfckule$pack $FCCi_3,$CRj_float,$CCi,$cond */
4895 FRV_INSN_CFCKULE
, "cfckule", "cfckule", 32,
4896 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4898 /* cfcku$pack $FCCi_3,$CRj_float,$CCi,$cond */
4900 FRV_INSN_CFCKU
, "cfcku", "cfcku", 32,
4901 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4903 /* cfcko$pack $FCCi_3,$CRj_float,$CCi,$cond */
4905 FRV_INSN_CFCKO
, "cfcko", "cfcko", 32,
4906 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_B01
, FR400_MAJOR_B_5
, FR500_MAJOR_B_5
, FR550_MAJOR_B_5
} }
4908 /* cjmpl$pack @($GRi,$GRj),$CCi,$cond */
4910 FRV_INSN_CJMPL
, "cjmpl", "cjmpl", 32,
4911 { 0|A(CONDITIONAL
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_5
, FR500_MAJOR_I_5
, FR550_MAJOR_I_6
} }
4913 /* ccalll$pack @($GRi,$GRj),$CCi,$cond */
4915 FRV_INSN_CCALLL
, "ccalll", "ccalll", 32,
4916 { 0|A(CONDITIONAL
)|A(COND_CTI
), { (1<<MACH_BASE
), UNIT_I0
, FR400_MAJOR_I_5
, FR500_MAJOR_I_5
, FR550_MAJOR_NONE
} }
4918 /* ici$pack @($GRi,$GRj) */
4920 FRV_INSN_ICI
, "ici", "ici", 32,
4921 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4923 /* dci$pack @($GRi,$GRj) */
4925 FRV_INSN_DCI
, "dci", "dci", 32,
4926 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4928 /* icei$pack @($GRi,$GRj),$ae */
4930 FRV_INSN_ICEI
, "icei", "icei", 32,
4931 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_NONE
, FR550_MAJOR_C_2
} }
4933 /* dcei$pack @($GRi,$GRj),$ae */
4935 FRV_INSN_DCEI
, "dcei", "dcei", 32,
4936 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_NONE
, FR550_MAJOR_C_2
} }
4938 /* dcf$pack @($GRi,$GRj) */
4940 FRV_INSN_DCF
, "dcf", "dcf", 32,
4941 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4943 /* dcef$pack @($GRi,$GRj),$ae */
4945 FRV_INSN_DCEF
, "dcef", "dcef", 32,
4946 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_NONE
, FR550_MAJOR_C_2
} }
4948 /* witlb$pack $GRk,@($GRi,$GRj) */
4950 FRV_INSN_WITLB
, "witlb", "witlb", 32,
4951 { 0|A(PRIVILEGED
), { (1<<MACH_FRV
), UNIT_C
, FR400_MAJOR_NONE
, FR500_MAJOR_C_2
, FR550_MAJOR_NONE
} }
4953 /* wdtlb$pack $GRk,@($GRi,$GRj) */
4955 FRV_INSN_WDTLB
, "wdtlb", "wdtlb", 32,
4956 { 0|A(PRIVILEGED
), { (1<<MACH_FRV
), UNIT_C
, FR400_MAJOR_NONE
, FR500_MAJOR_C_2
, FR550_MAJOR_NONE
} }
4958 /* itlbi$pack @($GRi,$GRj) */
4960 FRV_INSN_ITLBI
, "itlbi", "itlbi", 32,
4961 { 0|A(PRIVILEGED
), { (1<<MACH_FRV
), UNIT_C
, FR400_MAJOR_NONE
, FR500_MAJOR_C_2
, FR550_MAJOR_NONE
} }
4963 /* dtlbi$pack @($GRi,$GRj) */
4965 FRV_INSN_DTLBI
, "dtlbi", "dtlbi", 32,
4966 { 0|A(PRIVILEGED
), { (1<<MACH_FRV
), UNIT_C
, FR400_MAJOR_NONE
, FR500_MAJOR_C_2
, FR550_MAJOR_NONE
} }
4968 /* icpl$pack $GRi,$GRj,$lock */
4970 FRV_INSN_ICPL
, "icpl", "icpl", 32,
4971 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4973 /* dcpl$pack $GRi,$GRj,$lock */
4975 FRV_INSN_DCPL
, "dcpl", "dcpl", 32,
4976 { 0, { (1<<MACH_BASE
), UNIT_DCPL
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_I_8
} }
4978 /* icul$pack $GRi */
4980 FRV_INSN_ICUL
, "icul", "icul", 32,
4981 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4983 /* dcul$pack $GRi */
4985 FRV_INSN_DCUL
, "dcul", "dcul", 32,
4986 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4990 FRV_INSN_BAR
, "bar", "bar", 32,
4991 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4995 FRV_INSN_MEMBAR
, "membar", "membar", 32,
4996 { 0, { (1<<MACH_BASE
), UNIT_C
, FR400_MAJOR_C_2
, FR500_MAJOR_C_2
, FR550_MAJOR_C_2
} }
4998 /* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */
5000 FRV_INSN_COP1
, "cop1", "cop1", 32,
5001 { 0, { (1<<MACH_FRV
), UNIT_C
, FR400_MAJOR_NONE
, FR500_MAJOR_C_2
, FR550_MAJOR_NONE
} }
5003 /* cop2$pack $s6_1,$CPRi,$CPRj,$CPRk */
5005 FRV_INSN_COP2
, "cop2", "cop2", 32,
5006 { 0, { (1<<MACH_FRV
), UNIT_C
, FR400_MAJOR_NONE
, FR500_MAJOR_C_2
, FR550_MAJOR_NONE
} }
5008 /* clrgr$pack $GRk */
5010 FRV_INSN_CLRGR
, "clrgr", "clrgr", 32,
5011 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5013 /* clrfr$pack $FRk */
5015 FRV_INSN_CLRFR
, "clrfr", "clrfr", 32,
5016 { 0|A(FR_ACCESS
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5020 FRV_INSN_CLRGA
, "clrga", "clrga", 32,
5021 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5025 FRV_INSN_CLRFA
, "clrfa", "clrfa", 32,
5026 { 0|A(FR_ACCESS
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5028 /* commitgr$pack $GRk */
5030 FRV_INSN_COMMITGR
, "commitgr", "commitgr", 32,
5031 { 0, { (1<<MACH_FRV
)|(1<<MACH_FR500
)|(1<<MACH_FR550
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5033 /* commitfr$pack $FRk */
5035 FRV_INSN_COMMITFR
, "commitfr", "commitfr", 32,
5036 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
)|(1<<MACH_FR500
)|(1<<MACH_FR550
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5040 FRV_INSN_COMMITGA
, "commitga", "commitga", 32,
5041 { 0, { (1<<MACH_FRV
)|(1<<MACH_FR500
)|(1<<MACH_FR550
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5045 FRV_INSN_COMMITFA
, "commitfa", "commitfa", 32,
5046 { 0|A(FR_ACCESS
), { (1<<MACH_FRV
)|(1<<MACH_FR500
)|(1<<MACH_FR550
), UNIT_I01
, FR400_MAJOR_NONE
, FR500_MAJOR_I_6
, FR550_MAJOR_I_7
} }
5048 /* fitos$pack $FRintj,$FRk */
5050 FRV_INSN_FITOS
, "fitos", "fitos", 32,
5051 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5053 /* fstoi$pack $FRj,$FRintk */
5055 FRV_INSN_FSTOI
, "fstoi", "fstoi", 32,
5056 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5058 /* fitod$pack $FRintj,$FRdoublek */
5060 FRV_INSN_FITOD
, "fitod", "fitod", 32,
5061 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5063 /* fdtoi$pack $FRdoublej,$FRintk */
5065 FRV_INSN_FDTOI
, "fdtoi", "fdtoi", 32,
5066 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5068 /* fditos$pack $FRintj,$FRk */
5070 FRV_INSN_FDITOS
, "fditos", "fditos", 32,
5071 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5073 /* fdstoi$pack $FRj,$FRintk */
5075 FRV_INSN_FDSTOI
, "fdstoi", "fdstoi", 32,
5076 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5078 /* nfditos$pack $FRintj,$FRk */
5080 FRV_INSN_NFDITOS
, "nfditos", "nfditos", 32,
5081 { 0|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5083 /* nfdstoi$pack $FRj,$FRintk */
5085 FRV_INSN_NFDSTOI
, "nfdstoi", "nfdstoi", 32,
5086 { 0|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5088 /* cfitos$pack $FRintj,$FRk,$CCi,$cond */
5090 FRV_INSN_CFITOS
, "cfitos", "cfitos", 32,
5091 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5093 /* cfstoi$pack $FRj,$FRintk,$CCi,$cond */
5095 FRV_INSN_CFSTOI
, "cfstoi", "cfstoi", 32,
5096 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5098 /* nfitos$pack $FRintj,$FRk */
5100 FRV_INSN_NFITOS
, "nfitos", "nfitos", 32,
5101 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5103 /* nfstoi$pack $FRj,$FRintk */
5105 FRV_INSN_NFSTOI
, "nfstoi", "nfstoi", 32,
5106 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5108 /* fmovs$pack $FRj,$FRk */
5110 FRV_INSN_FMOVS
, "fmovs", "fmovs", 32,
5111 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5113 /* fmovd$pack $FRdoublej,$FRdoublek */
5115 FRV_INSN_FMOVD
, "fmovd", "fmovd", 32,
5116 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5118 /* fdmovs$pack $FRj,$FRk */
5120 FRV_INSN_FDMOVS
, "fdmovs", "fdmovs", 32,
5121 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5123 /* cfmovs$pack $FRj,$FRk,$CCi,$cond */
5125 FRV_INSN_CFMOVS
, "cfmovs", "cfmovs", 32,
5126 { 0|A(FR_ACCESS
)|A(CONDITIONAL
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5128 /* fnegs$pack $FRj,$FRk */
5130 FRV_INSN_FNEGS
, "fnegs", "fnegs", 32,
5131 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5133 /* fnegd$pack $FRdoublej,$FRdoublek */
5135 FRV_INSN_FNEGD
, "fnegd", "fnegd", 32,
5136 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5138 /* fdnegs$pack $FRj,$FRk */
5140 FRV_INSN_FDNEGS
, "fdnegs", "fdnegs", 32,
5141 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5143 /* cfnegs$pack $FRj,$FRk,$CCi,$cond */
5145 FRV_INSN_CFNEGS
, "cfnegs", "cfnegs", 32,
5146 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5148 /* fabss$pack $FRj,$FRk */
5150 FRV_INSN_FABSS
, "fabss", "fabss", 32,
5151 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5153 /* fabsd$pack $FRdoublej,$FRdoublek */
5155 FRV_INSN_FABSD
, "fabsd", "fabsd", 32,
5156 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5158 /* fdabss$pack $FRj,$FRk */
5160 FRV_INSN_FDABSS
, "fdabss", "fdabss", 32,
5161 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_NONE
} }
5163 /* cfabss$pack $FRj,$FRk,$CCi,$cond */
5165 FRV_INSN_CFABSS
, "cfabss", "cfabss", 32,
5166 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_1
, FR550_MAJOR_F_2
} }
5168 /* fsqrts$pack $FRj,$FRk */
5170 FRV_INSN_FSQRTS
, "fsqrts", "fsqrts", 32,
5171 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_F_3
} }
5173 /* fdsqrts$pack $FRj,$FRk */
5175 FRV_INSN_FDSQRTS
, "fdsqrts", "fdsqrts", 32,
5176 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_NONE
} }
5178 /* nfdsqrts$pack $FRj,$FRk */
5180 FRV_INSN_NFDSQRTS
, "nfdsqrts", "nfdsqrts", 32,
5181 { 0|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_NONE
} }
5183 /* fsqrtd$pack $FRdoublej,$FRdoublek */
5185 FRV_INSN_FSQRTD
, "fsqrtd", "fsqrtd", 32,
5186 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_NONE
} }
5188 /* cfsqrts$pack $FRj,$FRk,$CCi,$cond */
5190 FRV_INSN_CFSQRTS
, "cfsqrts", "cfsqrts", 32,
5191 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_F_3
} }
5193 /* nfsqrts$pack $FRj,$FRk */
5195 FRV_INSN_NFSQRTS
, "nfsqrts", "nfsqrts", 32,
5196 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_F_3
} }
5198 /* fadds$pack $FRi,$FRj,$FRk */
5200 FRV_INSN_FADDS
, "fadds", "fadds", 32,
5201 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5203 /* fsubs$pack $FRi,$FRj,$FRk */
5205 FRV_INSN_FSUBS
, "fsubs", "fsubs", 32,
5206 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5208 /* fmuls$pack $FRi,$FRj,$FRk */
5210 FRV_INSN_FMULS
, "fmuls", "fmuls", 32,
5211 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_3
, FR550_MAJOR_F_3
} }
5213 /* fdivs$pack $FRi,$FRj,$FRk */
5215 FRV_INSN_FDIVS
, "fdivs", "fdivs", 32,
5216 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_F_3
} }
5218 /* faddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5220 FRV_INSN_FADDD
, "faddd", "faddd", 32,
5221 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_NONE
} }
5223 /* fsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5225 FRV_INSN_FSUBD
, "fsubd", "fsubd", 32,
5226 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_NONE
} }
5228 /* fmuld$pack $FRdoublei,$FRdoublej,$FRdoublek */
5230 FRV_INSN_FMULD
, "fmuld", "fmuld", 32,
5231 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_3
, FR550_MAJOR_NONE
} }
5233 /* fdivd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5235 FRV_INSN_FDIVD
, "fdivd", "fdivd", 32,
5236 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_NONE
} }
5238 /* cfadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
5240 FRV_INSN_CFADDS
, "cfadds", "cfadds", 32,
5241 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5243 /* cfsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5245 FRV_INSN_CFSUBS
, "cfsubs", "cfsubs", 32,
5246 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5248 /* cfmuls$pack $FRi,$FRj,$FRk,$CCi,$cond */
5250 FRV_INSN_CFMULS
, "cfmuls", "cfmuls", 32,
5251 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_3
, FR550_MAJOR_F_3
} }
5253 /* cfdivs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5255 FRV_INSN_CFDIVS
, "cfdivs", "cfdivs", 32,
5256 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_F_3
} }
5258 /* nfadds$pack $FRi,$FRj,$FRk */
5260 FRV_INSN_NFADDS
, "nfadds", "nfadds", 32,
5261 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5263 /* nfsubs$pack $FRi,$FRj,$FRk */
5265 FRV_INSN_NFSUBS
, "nfsubs", "nfsubs", 32,
5266 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5268 /* nfmuls$pack $FRi,$FRj,$FRk */
5270 FRV_INSN_NFMULS
, "nfmuls", "nfmuls", 32,
5271 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_3
, FR550_MAJOR_F_3
} }
5273 /* nfdivs$pack $FRi,$FRj,$FRk */
5275 FRV_INSN_NFDIVS
, "nfdivs", "nfdivs", 32,
5276 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_4
, FR550_MAJOR_F_3
} }
5278 /* fcmps$pack $FRi,$FRj,$FCCi_2 */
5280 FRV_INSN_FCMPS
, "fcmps", "fcmps", 32,
5281 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5283 /* fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2 */
5285 FRV_INSN_FCMPD
, "fcmpd", "fcmpd", 32,
5286 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_NONE
} }
5288 /* cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond */
5290 FRV_INSN_CFCMPS
, "cfcmps", "cfcmps", 32,
5291 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_2
, FR550_MAJOR_F_2
} }
5293 /* fdcmps$pack $FRi,$FRj,$FCCi_2 */
5295 FRV_INSN_FDCMPS
, "fdcmps", "fdcmps", 32,
5296 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_F_4
} }
5298 /* fmadds$pack $FRi,$FRj,$FRk */
5300 FRV_INSN_FMADDS
, "fmadds", "fmadds", 32,
5301 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5303 /* fmsubs$pack $FRi,$FRj,$FRk */
5305 FRV_INSN_FMSUBS
, "fmsubs", "fmsubs", 32,
5306 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5308 /* fmaddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5310 FRV_INSN_FMADDD
, "fmaddd", "fmaddd", 32,
5311 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5313 /* fmsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5315 FRV_INSN_FMSUBD
, "fmsubd", "fmsubd", 32,
5316 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5318 /* fdmadds$pack $FRi,$FRj,$FRk */
5320 FRV_INSN_FDMADDS
, "fdmadds", "fdmadds", 32,
5321 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5323 /* nfdmadds$pack $FRi,$FRj,$FRk */
5325 FRV_INSN_NFDMADDS
, "nfdmadds", "nfdmadds", 32,
5326 { 0, { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5328 /* cfmadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
5330 FRV_INSN_CFMADDS
, "cfmadds", "cfmadds", 32,
5331 { 0|A(CONDITIONAL
), { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5333 /* cfmsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5335 FRV_INSN_CFMSUBS
, "cfmsubs", "cfmsubs", 32,
5336 { 0|A(CONDITIONAL
), { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5338 /* nfmadds$pack $FRi,$FRj,$FRk */
5340 FRV_INSN_NFMADDS
, "nfmadds", "nfmadds", 32,
5341 { 0|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5343 /* nfmsubs$pack $FRi,$FRj,$FRk */
5345 FRV_INSN_NFMSUBS
, "nfmsubs", "nfmsubs", 32,
5346 { 0|A(NON_EXCEPTING
), { (1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5348 /* fmas$pack $FRi,$FRj,$FRk */
5350 FRV_INSN_FMAS
, "fmas", "fmas", 32,
5351 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_F_4
} }
5353 /* fmss$pack $FRi,$FRj,$FRk */
5355 FRV_INSN_FMSS
, "fmss", "fmss", 32,
5356 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_F_4
} }
5358 /* fdmas$pack $FRi,$FRj,$FRk */
5360 FRV_INSN_FDMAS
, "fdmas", "fdmas", 32,
5361 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5363 /* fdmss$pack $FRi,$FRj,$FRk */
5365 FRV_INSN_FDMSS
, "fdmss", "fdmss", 32,
5366 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5368 /* nfdmas$pack $FRi,$FRj,$FRk */
5370 FRV_INSN_NFDMAS
, "nfdmas", "nfdmas", 32,
5371 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5373 /* nfdmss$pack $FRi,$FRj,$FRk */
5375 FRV_INSN_NFDMSS
, "nfdmss", "nfdmss", 32,
5376 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5378 /* cfmas$pack $FRi,$FRj,$FRk,$CCi,$cond */
5380 FRV_INSN_CFMAS
, "cfmas", "cfmas", 32,
5381 { 0|A(CONDITIONAL
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_F_4
} }
5383 /* cfmss$pack $FRi,$FRj,$FRk,$CCi,$cond */
5385 FRV_INSN_CFMSS
, "cfmss", "cfmss", 32,
5386 { 0|A(CONDITIONAL
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_F_4
} }
5388 /* fmad$pack $FRi,$FRj,$FRk */
5390 FRV_INSN_FMAD
, "fmad", "fmad", 32,
5391 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5393 /* fmsd$pack $FRi,$FRj,$FRk */
5395 FRV_INSN_FMSD
, "fmsd", "fmsd", 32,
5396 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_NONE
} }
5398 /* nfmas$pack $FRi,$FRj,$FRk */
5400 FRV_INSN_NFMAS
, "nfmas", "nfmas", 32,
5401 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_F_4
} }
5403 /* nfmss$pack $FRi,$FRj,$FRk */
5405 FRV_INSN_NFMSS
, "nfmss", "nfmss", 32,
5406 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_5
, FR550_MAJOR_F_4
} }
5408 /* fdadds$pack $FRi,$FRj,$FRk */
5410 FRV_INSN_FDADDS
, "fdadds", "fdadds", 32,
5411 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_F_4
} }
5413 /* fdsubs$pack $FRi,$FRj,$FRk */
5415 FRV_INSN_FDSUBS
, "fdsubs", "fdsubs", 32,
5416 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_F_4
} }
5418 /* fdmuls$pack $FRi,$FRj,$FRk */
5420 FRV_INSN_FDMULS
, "fdmuls", "fdmuls", 32,
5421 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_7
, FR550_MAJOR_F_4
} }
5423 /* fddivs$pack $FRi,$FRj,$FRk */
5425 FRV_INSN_FDDIVS
, "fddivs", "fddivs", 32,
5426 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_7
, FR550_MAJOR_NONE
} }
5428 /* fdsads$pack $FRi,$FRj,$FRk */
5430 FRV_INSN_FDSADS
, "fdsads", "fdsads", 32,
5431 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_F_4
} }
5433 /* fdmulcs$pack $FRi,$FRj,$FRk */
5435 FRV_INSN_FDMULCS
, "fdmulcs", "fdmulcs", 32,
5436 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_7
, FR550_MAJOR_F_4
} }
5438 /* nfdmulcs$pack $FRi,$FRj,$FRk */
5440 FRV_INSN_NFDMULCS
, "nfdmulcs", "nfdmulcs", 32,
5441 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_7
, FR550_MAJOR_F_4
} }
5443 /* nfdadds$pack $FRi,$FRj,$FRk */
5445 FRV_INSN_NFDADDS
, "nfdadds", "nfdadds", 32,
5446 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_F_4
} }
5448 /* nfdsubs$pack $FRi,$FRj,$FRk */
5450 FRV_INSN_NFDSUBS
, "nfdsubs", "nfdsubs", 32,
5451 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_F_4
} }
5453 /* nfdmuls$pack $FRi,$FRj,$FRk */
5455 FRV_INSN_NFDMULS
, "nfdmuls", "nfdmuls", 32,
5456 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_7
, FR550_MAJOR_F_4
} }
5458 /* nfddivs$pack $FRi,$FRj,$FRk */
5460 FRV_INSN_NFDDIVS
, "nfddivs", "nfddivs", 32,
5461 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_7
, FR550_MAJOR_NONE
} }
5463 /* nfdsads$pack $FRi,$FRj,$FRk */
5465 FRV_INSN_NFDSADS
, "nfdsads", "nfdsads", 32,
5466 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_F_4
} }
5468 /* nfdcmps$pack $FRi,$FRj,$FCCi_2 */
5470 FRV_INSN_NFDCMPS
, "nfdcmps", "nfdcmps", 32,
5471 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_F_6
, FR550_MAJOR_NONE
} }
5473 /* mhsetlos$pack $u12,$FRklo */
5475 FRV_INSN_MHSETLOS
, "mhsetlos", "mhsetlos", 32,
5476 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_5
} }
5478 /* mhsethis$pack $u12,$FRkhi */
5480 FRV_INSN_MHSETHIS
, "mhsethis", "mhsethis", 32,
5481 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_5
} }
5483 /* mhdsets$pack $u12,$FRintk */
5485 FRV_INSN_MHDSETS
, "mhdsets", "mhdsets", 32,
5486 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_5
} }
5488 /* mhsetloh$pack $s5,$FRklo */
5490 FRV_INSN_MHSETLOH
, "mhsetloh", "mhsetloh", 32,
5491 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_5
} }
5493 /* mhsethih$pack $s5,$FRkhi */
5495 FRV_INSN_MHSETHIH
, "mhsethih", "mhsethih", 32,
5496 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_5
} }
5498 /* mhdseth$pack $s5,$FRintk */
5500 FRV_INSN_MHDSETH
, "mhdseth", "mhdseth", 32,
5501 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_5
} }
5503 /* mand$pack $FRinti,$FRintj,$FRintk */
5505 FRV_INSN_MAND
, "mand", "mand", 32,
5506 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5508 /* mor$pack $FRinti,$FRintj,$FRintk */
5510 FRV_INSN_MOR
, "mor", "mor", 32,
5511 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5513 /* mxor$pack $FRinti,$FRintj,$FRintk */
5515 FRV_INSN_MXOR
, "mxor", "mxor", 32,
5516 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5518 /* cmand$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5520 FRV_INSN_CMAND
, "cmand", "cmand", 32,
5521 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5523 /* cmor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5525 FRV_INSN_CMOR
, "cmor", "cmor", 32,
5526 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5528 /* cmxor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5530 FRV_INSN_CMXOR
, "cmxor", "cmxor", 32,
5531 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5533 /* mnot$pack $FRintj,$FRintk */
5535 FRV_INSN_MNOT
, "mnot", "mnot", 32,
5536 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5538 /* cmnot$pack $FRintj,$FRintk,$CCi,$cond */
5540 FRV_INSN_CMNOT
, "cmnot", "cmnot", 32,
5541 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5543 /* mrotli$pack $FRinti,$u6,$FRintk */
5545 FRV_INSN_MROTLI
, "mrotli", "mrotli", 32,
5546 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5548 /* mrotri$pack $FRinti,$u6,$FRintk */
5550 FRV_INSN_MROTRI
, "mrotri", "mrotri", 32,
5551 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5553 /* mwcut$pack $FRinti,$FRintj,$FRintk */
5555 FRV_INSN_MWCUT
, "mwcut", "mwcut", 32,
5556 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5558 /* mwcuti$pack $FRinti,$u6,$FRintk */
5560 FRV_INSN_MWCUTI
, "mwcuti", "mwcuti", 32,
5561 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5563 /* mcut$pack $ACC40Si,$FRintj,$FRintk */
5565 FRV_INSN_MCUT
, "mcut", "mcut", 32,
5566 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5568 /* mcuti$pack $ACC40Si,$s6,$FRintk */
5570 FRV_INSN_MCUTI
, "mcuti", "mcuti", 32,
5571 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5573 /* mcutss$pack $ACC40Si,$FRintj,$FRintk */
5575 FRV_INSN_MCUTSS
, "mcutss", "mcutss", 32,
5576 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5578 /* mcutssi$pack $ACC40Si,$s6,$FRintk */
5580 FRV_INSN_MCUTSSI
, "mcutssi", "mcutssi", 32,
5581 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5583 /* mdcutssi$pack $ACC40Si,$s6,$FRintkeven */
5585 FRV_INSN_MDCUTSSI
, "mdcutssi", "mdcutssi", 32,
5586 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMLOW
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_3
} }
5588 /* maveh$pack $FRinti,$FRintj,$FRintk */
5590 FRV_INSN_MAVEH
, "maveh", "maveh", 32,
5591 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5593 /* msllhi$pack $FRinti,$u6,$FRintk */
5595 FRV_INSN_MSLLHI
, "msllhi", "msllhi", 32,
5596 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5598 /* msrlhi$pack $FRinti,$u6,$FRintk */
5600 FRV_INSN_MSRLHI
, "msrlhi", "msrlhi", 32,
5601 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5603 /* msrahi$pack $FRinti,$u6,$FRintk */
5605 FRV_INSN_MSRAHI
, "msrahi", "msrahi", 32,
5606 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5608 /* mdrotli$pack $FRintieven,$s6,$FRintkeven */
5610 FRV_INSN_MDROTLI
, "mdrotli", "mdrotli", 32,
5611 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMLOW
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_3
} }
5613 /* mcplhi$pack $FRinti,$u6,$FRintk */
5615 FRV_INSN_MCPLHI
, "mcplhi", "mcplhi", 32,
5616 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMLOW
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_3
} }
5618 /* mcpli$pack $FRinti,$u6,$FRintk */
5620 FRV_INSN_MCPLI
, "mcpli", "mcpli", 32,
5621 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMLOW
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_3
} }
5623 /* msaths$pack $FRinti,$FRintj,$FRintk */
5625 FRV_INSN_MSATHS
, "msaths", "msaths", 32,
5626 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5628 /* mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven */
5630 FRV_INSN_MQSATHS
, "mqsaths", "mqsaths", 32,
5631 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_2
} }
5633 /* msathu$pack $FRinti,$FRintj,$FRintk */
5635 FRV_INSN_MSATHU
, "msathu", "msathu", 32,
5636 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5638 /* mcmpsh$pack $FRinti,$FRintj,$FCCk */
5640 FRV_INSN_MCMPSH
, "mcmpsh", "mcmpsh", 32,
5641 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5643 /* mcmpuh$pack $FRinti,$FRintj,$FCCk */
5645 FRV_INSN_MCMPUH
, "mcmpuh", "mcmpuh", 32,
5646 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5648 /* mabshs$pack $FRintj,$FRintk */
5650 FRV_INSN_MABSHS
, "mabshs", "mabshs", 32,
5651 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_2
} }
5653 /* maddhss$pack $FRinti,$FRintj,$FRintk */
5655 FRV_INSN_MADDHSS
, "maddhss", "maddhss", 32,
5656 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5658 /* maddhus$pack $FRinti,$FRintj,$FRintk */
5660 FRV_INSN_MADDHUS
, "maddhus", "maddhus", 32,
5661 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5663 /* msubhss$pack $FRinti,$FRintj,$FRintk */
5665 FRV_INSN_MSUBHSS
, "msubhss", "msubhss", 32,
5666 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5668 /* msubhus$pack $FRinti,$FRintj,$FRintk */
5670 FRV_INSN_MSUBHUS
, "msubhus", "msubhus", 32,
5671 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5673 /* cmaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5675 FRV_INSN_CMADDHSS
, "cmaddhss", "cmaddhss", 32,
5676 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5678 /* cmaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5680 FRV_INSN_CMADDHUS
, "cmaddhus", "cmaddhus", 32,
5681 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5683 /* cmsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5685 FRV_INSN_CMSUBHSS
, "cmsubhss", "cmsubhss", 32,
5686 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5688 /* cmsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5690 FRV_INSN_CMSUBHUS
, "cmsubhus", "cmsubhus", 32,
5691 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5693 /* mqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven */
5695 FRV_INSN_MQADDHSS
, "mqaddhss", "mqaddhss", 32,
5696 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5698 /* mqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven */
5700 FRV_INSN_MQADDHUS
, "mqaddhus", "mqaddhus", 32,
5701 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5703 /* mqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven */
5705 FRV_INSN_MQSUBHSS
, "mqsubhss", "mqsubhss", 32,
5706 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5708 /* mqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven */
5710 FRV_INSN_MQSUBHUS
, "mqsubhus", "mqsubhus", 32,
5711 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5713 /* cmqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5715 FRV_INSN_CMQADDHSS
, "cmqaddhss", "cmqaddhss", 32,
5716 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5718 /* cmqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5720 FRV_INSN_CMQADDHUS
, "cmqaddhus", "cmqaddhus", 32,
5721 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5723 /* cmqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5725 FRV_INSN_CMQSUBHSS
, "cmqsubhss", "cmqsubhss", 32,
5726 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5728 /* cmqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5730 FRV_INSN_CMQSUBHUS
, "cmqsubhus", "cmqsubhus", 32,
5731 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_1
, FR550_MAJOR_M_2
} }
5733 /* maddaccs$pack $ACC40Si,$ACC40Sk */
5735 FRV_INSN_MADDACCS
, "maddaccs", "maddaccs", 32,
5736 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5738 /* msubaccs$pack $ACC40Si,$ACC40Sk */
5740 FRV_INSN_MSUBACCS
, "msubaccs", "msubaccs", 32,
5741 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5743 /* mdaddaccs$pack $ACC40Si,$ACC40Sk */
5745 FRV_INSN_MDADDACCS
, "mdaddaccs", "mdaddaccs", 32,
5746 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_MDUALACC
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5748 /* mdsubaccs$pack $ACC40Si,$ACC40Sk */
5750 FRV_INSN_MDSUBACCS
, "mdsubaccs", "mdsubaccs", 32,
5751 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_MDUALACC
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5753 /* masaccs$pack $ACC40Si,$ACC40Sk */
5755 FRV_INSN_MASACCS
, "masaccs", "masaccs", 32,
5756 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5758 /* mdasaccs$pack $ACC40Si,$ACC40Sk */
5760 FRV_INSN_MDASACCS
, "mdasaccs", "mdasaccs", 32,
5761 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_MDUALACC
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5763 /* mmulhs$pack $FRinti,$FRintj,$ACC40Sk */
5765 FRV_INSN_MMULHS
, "mmulhs", "mmulhs", 32,
5766 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5768 /* mmulhu$pack $FRinti,$FRintj,$ACC40Sk */
5770 FRV_INSN_MMULHU
, "mmulhu", "mmulhu", 32,
5771 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5773 /* mmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
5775 FRV_INSN_MMULXHS
, "mmulxhs", "mmulxhs", 32,
5776 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5778 /* mmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
5780 FRV_INSN_MMULXHU
, "mmulxhu", "mmulxhu", 32,
5781 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5783 /* cmmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5785 FRV_INSN_CMMULHS
, "cmmulhs", "cmmulhs", 32,
5786 { 0|A(CONDITIONAL
)|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5788 /* cmmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5790 FRV_INSN_CMMULHU
, "cmmulhu", "cmmulhu", 32,
5791 { 0|A(CONDITIONAL
)|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5793 /* mqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5795 FRV_INSN_MQMULHS
, "mqmulhs", "mqmulhs", 32,
5796 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5798 /* mqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
5800 FRV_INSN_MQMULHU
, "mqmulhu", "mqmulhu", 32,
5801 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5803 /* mqmulxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5805 FRV_INSN_MQMULXHS
, "mqmulxhs", "mqmulxhs", 32,
5806 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5808 /* mqmulxhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
5810 FRV_INSN_MQMULXHU
, "mqmulxhu", "mqmulxhu", 32,
5811 { 0|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5813 /* cmqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
5815 FRV_INSN_CMQMULHS
, "cmqmulhs", "cmqmulhs", 32,
5816 { 0|A(CONDITIONAL
)|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5818 /* cmqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
5820 FRV_INSN_CMQMULHU
, "cmqmulhu", "cmqmulhu", 32,
5821 { 0|A(CONDITIONAL
)|A(PRESERVE_OVF
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5823 /* mmachs$pack $FRinti,$FRintj,$ACC40Sk */
5825 FRV_INSN_MMACHS
, "mmachs", "mmachs", 32,
5826 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5828 /* mmachu$pack $FRinti,$FRintj,$ACC40Uk */
5830 FRV_INSN_MMACHU
, "mmachu", "mmachu", 32,
5831 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5833 /* mmrdhs$pack $FRinti,$FRintj,$ACC40Sk */
5835 FRV_INSN_MMRDHS
, "mmrdhs", "mmrdhs", 32,
5836 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5838 /* mmrdhu$pack $FRinti,$FRintj,$ACC40Uk */
5840 FRV_INSN_MMRDHU
, "mmrdhu", "mmrdhu", 32,
5841 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5843 /* cmmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5845 FRV_INSN_CMMACHS
, "cmmachs", "cmmachs", 32,
5846 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5848 /* cmmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
5850 FRV_INSN_CMMACHU
, "cmmachu", "cmmachu", 32,
5851 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5853 /* mqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5855 FRV_INSN_MQMACHS
, "mqmachs", "mqmachs", 32,
5856 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5858 /* mqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk */
5860 FRV_INSN_MQMACHU
, "mqmachu", "mqmachu", 32,
5861 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5863 /* cmqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
5865 FRV_INSN_CMQMACHS
, "cmqmachs", "cmqmachs", 32,
5866 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5868 /* cmqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk,$CCi,$cond */
5870 FRV_INSN_CMQMACHU
, "cmqmachu", "cmqmachu", 32,
5871 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5873 /* mqxmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5875 FRV_INSN_MQXMACHS
, "mqxmachs", "mqxmachs", 32,
5876 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_MDUALACC
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5878 /* mqxmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5880 FRV_INSN_MQXMACXHS
, "mqxmacxhs", "mqxmacxhs", 32,
5881 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_MDUALACC
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5883 /* mqmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5885 FRV_INSN_MQMACXHS
, "mqmacxhs", "mqmacxhs", 32,
5886 { 0, { (1<<MACH_FR400
)|(1<<MACH_FR550
), UNIT_MDUALACC
, FR400_MAJOR_M_2
, FR500_MAJOR_NONE
, FR550_MAJOR_M_4
} }
5888 /* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
5890 FRV_INSN_MCPXRS
, "mcpxrs", "mcpxrs", 32,
5891 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5893 /* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
5895 FRV_INSN_MCPXRU
, "mcpxru", "mcpxru", 32,
5896 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5898 /* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
5900 FRV_INSN_MCPXIS
, "mcpxis", "mcpxis", 32,
5901 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5903 /* mcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
5905 FRV_INSN_MCPXIU
, "mcpxiu", "mcpxiu", 32,
5906 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5908 /* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5910 FRV_INSN_CMCPXRS
, "cmcpxrs", "cmcpxrs", 32,
5911 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5913 /* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5915 FRV_INSN_CMCPXRU
, "cmcpxru", "cmcpxru", 32,
5916 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5918 /* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5920 FRV_INSN_CMCPXIS
, "cmcpxis", "cmcpxis", 32,
5921 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5923 /* cmcpxiu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5925 FRV_INSN_CMCPXIU
, "cmcpxiu", "cmcpxiu", 32,
5926 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5928 /* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5930 FRV_INSN_MQCPXRS
, "mqcpxrs", "mqcpxrs", 32,
5931 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5933 /* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
5935 FRV_INSN_MQCPXRU
, "mqcpxru", "mqcpxru", 32,
5936 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5938 /* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
5940 FRV_INSN_MQCPXIS
, "mqcpxis", "mqcpxis", 32,
5941 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5943 /* mqcpxiu$pack $FRintieven,$FRintjeven,$ACC40Sk */
5945 FRV_INSN_MQCPXIU
, "mqcpxiu", "mqcpxiu", 32,
5946 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_2
, FR500_MAJOR_M_4
, FR550_MAJOR_M_4
} }
5948 /* mexpdhw$pack $FRinti,$u6,$FRintk */
5950 FRV_INSN_MEXPDHW
, "mexpdhw", "mexpdhw", 32,
5951 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5953 /* cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond */
5955 FRV_INSN_CMEXPDHW
, "cmexpdhw", "cmexpdhw", 32,
5956 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5958 /* mexpdhd$pack $FRinti,$u6,$FRintkeven */
5960 FRV_INSN_MEXPDHD
, "mexpdhd", "mexpdhd", 32,
5961 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5963 /* cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond */
5965 FRV_INSN_CMEXPDHD
, "cmexpdhd", "cmexpdhd", 32,
5966 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5968 /* mpackh$pack $FRinti,$FRintj,$FRintk */
5970 FRV_INSN_MPACKH
, "mpackh", "mpackh", 32,
5971 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5973 /* mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven */
5975 FRV_INSN_MDPACKH
, "mdpackh", "mdpackh", 32,
5976 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_5
, FR550_MAJOR_M_3
} }
5978 /* munpackh$pack $FRinti,$FRintkeven */
5980 FRV_INSN_MUNPACKH
, "munpackh", "munpackh", 32,
5981 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5983 /* mdunpackh$pack $FRintieven,$FRintk */
5985 FRV_INSN_MDUNPACKH
, "mdunpackh", "mdunpackh", 32,
5986 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_M_7
, FR550_MAJOR_NONE
} }
5988 /* mbtoh$pack $FRintj,$FRintkeven */
5990 FRV_INSN_MBTOH
, "mbtoh", "mbtoh", 32,
5991 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5993 /* cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond */
5995 FRV_INSN_CMBTOH
, "cmbtoh", "cmbtoh", 32,
5996 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
5998 /* mhtob$pack $FRintjeven,$FRintk */
6000 FRV_INSN_MHTOB
, "mhtob", "mhtob", 32,
6001 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
6003 /* cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond */
6005 FRV_INSN_CMHTOB
, "cmhtob", "cmhtob", 32,
6006 { 0|A(CONDITIONAL
), { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_2
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
6008 /* mbtohe$pack $FRintj,$FRintk */
6010 FRV_INSN_MBTOHE
, "mbtohe", "mbtohe", 32,
6011 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_M_7
, FR550_MAJOR_NONE
} }
6013 /* cmbtohe$pack $FRintj,$FRintk,$CCi,$cond */
6015 FRV_INSN_CMBTOHE
, "cmbtohe", "cmbtohe", 32,
6016 { 0|A(CONDITIONAL
), { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_M_7
, FR550_MAJOR_NONE
} }
6020 FRV_INSN_MNOP
, "mnop", "mnop", 32,
6021 { 0, { (1<<MACH_BASE
), UNIT_FMALL
, FR400_MAJOR_M_1
, FR500_MAJOR_M_1
, FR550_MAJOR_M_1
} }
6023 /* mclracc$pack $ACC40Sk,$A0 */
6025 FRV_INSN_MCLRACC_0
, "mclracc-0", "mclracc", 32,
6026 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_3
, FR550_MAJOR_M_3
} }
6028 /* mclracc$pack $ACC40Sk,$A1 */
6030 FRV_INSN_MCLRACC_1
, "mclracc-1", "mclracc", 32,
6031 { 0, { (1<<MACH_BASE
), UNIT_MCLRACC_1
, FR400_MAJOR_M_2
, FR500_MAJOR_M_6
, FR550_MAJOR_M_3
} }
6033 /* mrdacc$pack $ACC40Si,$FRintk */
6035 FRV_INSN_MRDACC
, "mrdacc", "mrdacc", 32,
6036 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
6038 /* mrdaccg$pack $ACCGi,$FRintk */
6040 FRV_INSN_MRDACCG
, "mrdaccg", "mrdaccg", 32,
6041 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_2
, FR550_MAJOR_M_3
} }
6043 /* mwtacc$pack $FRinti,$ACC40Sk */
6045 FRV_INSN_MWTACC
, "mwtacc", "mwtacc", 32,
6046 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_3
, FR550_MAJOR_M_3
} }
6048 /* mwtaccg$pack $FRinti,$ACCGk */
6050 FRV_INSN_MWTACCG
, "mwtaccg", "mwtaccg", 32,
6051 { 0, { (1<<MACH_BASE
), UNIT_FM01
, FR400_MAJOR_M_1
, FR500_MAJOR_M_3
, FR550_MAJOR_M_3
} }
6053 /* mcop1$pack $FRi,$FRj,$FRk */
6055 FRV_INSN_MCOP1
, "mcop1", "mcop1", 32,
6056 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_M_1
, FR550_MAJOR_NONE
} }
6058 /* mcop2$pack $FRi,$FRj,$FRk */
6060 FRV_INSN_MCOP2
, "mcop2", "mcop2", 32,
6061 { 0, { (1<<MACH_FRV
), UNIT_FM01
, FR400_MAJOR_NONE
, FR500_MAJOR_M_1
, FR550_MAJOR_NONE
} }
6065 FRV_INSN_FNOP
, "fnop", "fnop", 32,
6066 { 0, { (1<<MACH_SIMPLE
)|(1<<MACH_TOMCAT
)|(1<<MACH_FR500
)|(1<<MACH_FR550
)|(1<<MACH_FRV
), UNIT_FMALL
, FR400_MAJOR_NONE
, FR500_MAJOR_F_8
, FR550_MAJOR_F_1
} }
6073 /* Initialize anything needed to be done once, before any cpu_open call. */
6074 static void init_tables
PARAMS ((void));
6081 static const CGEN_MACH
* lookup_mach_via_bfd_name
6082 PARAMS ((const CGEN_MACH
*, const char *));
6083 static void build_hw_table
PARAMS ((CGEN_CPU_TABLE
*));
6084 static void build_ifield_table
PARAMS ((CGEN_CPU_TABLE
*));
6085 static void build_operand_table
PARAMS ((CGEN_CPU_TABLE
*));
6086 static void build_insn_table
PARAMS ((CGEN_CPU_TABLE
*));
6087 static void frv_cgen_rebuild_tables
PARAMS ((CGEN_CPU_TABLE
*));
6089 /* Subroutine of frv_cgen_cpu_open to look up a mach via its bfd name. */
6091 static const CGEN_MACH
*
6092 lookup_mach_via_bfd_name (table
, name
)
6093 const CGEN_MACH
*table
;
6098 if (strcmp (name
, table
->bfd_name
) == 0)
6105 /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6112 int machs
= cd
->machs
;
6113 const CGEN_HW_ENTRY
*init
= & frv_cgen_hw_table
[0];
6114 /* MAX_HW is only an upper bound on the number of selected entries.
6115 However each entry is indexed by it's enum so there can be holes in
6117 const CGEN_HW_ENTRY
**selected
=
6118 (const CGEN_HW_ENTRY
**) xmalloc (MAX_HW
* sizeof (CGEN_HW_ENTRY
*));
6120 cd
->hw_table
.init_entries
= init
;
6121 cd
->hw_table
.entry_size
= sizeof (CGEN_HW_ENTRY
);
6122 memset (selected
, 0, MAX_HW
* sizeof (CGEN_HW_ENTRY
*));
6123 /* ??? For now we just use machs to determine which ones we want. */
6124 for (i
= 0; init
[i
].name
!= NULL
; ++i
)
6125 if (CGEN_HW_ATTR_VALUE (&init
[i
], CGEN_HW_MACH
)
6127 selected
[init
[i
].type
] = &init
[i
];
6128 cd
->hw_table
.entries
= selected
;
6129 cd
->hw_table
.num_entries
= MAX_HW
;
6132 /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6135 build_ifield_table (cd
)
6138 cd
->ifld_table
= & frv_cgen_ifld_table
[0];
6141 /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6144 build_operand_table (cd
)
6148 int machs
= cd
->machs
;
6149 const CGEN_OPERAND
*init
= & frv_cgen_operand_table
[0];
6150 /* MAX_OPERANDS is only an upper bound on the number of selected entries.
6151 However each entry is indexed by it's enum so there can be holes in
6153 const CGEN_OPERAND
**selected
=
6154 (const CGEN_OPERAND
**) xmalloc (MAX_OPERANDS
* sizeof (CGEN_OPERAND
*));
6156 cd
->operand_table
.init_entries
= init
;
6157 cd
->operand_table
.entry_size
= sizeof (CGEN_OPERAND
);
6158 memset (selected
, 0, MAX_OPERANDS
* sizeof (CGEN_OPERAND
*));
6159 /* ??? For now we just use mach to determine which ones we want. */
6160 for (i
= 0; init
[i
].name
!= NULL
; ++i
)
6161 if (CGEN_OPERAND_ATTR_VALUE (&init
[i
], CGEN_OPERAND_MACH
)
6163 selected
[init
[i
].type
] = &init
[i
];
6164 cd
->operand_table
.entries
= selected
;
6165 cd
->operand_table
.num_entries
= MAX_OPERANDS
;
6168 /* Subroutine of frv_cgen_cpu_open to build the hardware table.
6169 ??? This could leave out insns not supported by the specified mach/isa,
6170 but that would cause errors like "foo only supported by bar" to become
6171 "unknown insn", so for now we include all insns and require the app to
6172 do the checking later.
6173 ??? On the other hand, parsing of such insns may require their hardware or
6174 operand elements to be in the table [which they mightn't be]. */
6177 build_insn_table (cd
)
6181 const CGEN_IBASE
*ib
= & frv_cgen_insn_table
[0];
6182 CGEN_INSN
*insns
= (CGEN_INSN
*) xmalloc (MAX_INSNS
* sizeof (CGEN_INSN
));
6184 memset (insns
, 0, MAX_INSNS
* sizeof (CGEN_INSN
));
6185 for (i
= 0; i
< MAX_INSNS
; ++i
)
6186 insns
[i
].base
= &ib
[i
];
6187 cd
->insn_table
.init_entries
= insns
;
6188 cd
->insn_table
.entry_size
= sizeof (CGEN_IBASE
);
6189 cd
->insn_table
.num_init_entries
= MAX_INSNS
;
6192 /* Subroutine of frv_cgen_cpu_open to rebuild the tables. */
6195 frv_cgen_rebuild_tables (cd
)
6199 unsigned int isas
= cd
->isas
;
6200 unsigned int machs
= cd
->machs
;
6202 cd
->int_insn_p
= CGEN_INT_INSN_P
;
6204 /* Data derived from the isa spec. */
6205 #define UNSET (CGEN_SIZE_UNKNOWN + 1)
6206 cd
->default_insn_bitsize
= UNSET
;
6207 cd
->base_insn_bitsize
= UNSET
;
6208 cd
->min_insn_bitsize
= 65535; /* some ridiculously big number */
6209 cd
->max_insn_bitsize
= 0;
6210 for (i
= 0; i
< MAX_ISAS
; ++i
)
6211 if (((1 << i
) & isas
) != 0)
6213 const CGEN_ISA
*isa
= & frv_cgen_isa_table
[i
];
6215 /* Default insn sizes of all selected isas must be
6216 equal or we set the result to 0, meaning "unknown". */
6217 if (cd
->default_insn_bitsize
== UNSET
)
6218 cd
->default_insn_bitsize
= isa
->default_insn_bitsize
;
6219 else if (isa
->default_insn_bitsize
== cd
->default_insn_bitsize
)
6222 cd
->default_insn_bitsize
= CGEN_SIZE_UNKNOWN
;
6224 /* Base insn sizes of all selected isas must be equal
6225 or we set the result to 0, meaning "unknown". */
6226 if (cd
->base_insn_bitsize
== UNSET
)
6227 cd
->base_insn_bitsize
= isa
->base_insn_bitsize
;
6228 else if (isa
->base_insn_bitsize
== cd
->base_insn_bitsize
)
6231 cd
->base_insn_bitsize
= CGEN_SIZE_UNKNOWN
;
6233 /* Set min,max insn sizes. */
6234 if (isa
->min_insn_bitsize
< cd
->min_insn_bitsize
)
6235 cd
->min_insn_bitsize
= isa
->min_insn_bitsize
;
6236 if (isa
->max_insn_bitsize
> cd
->max_insn_bitsize
)
6237 cd
->max_insn_bitsize
= isa
->max_insn_bitsize
;
6240 /* Data derived from the mach spec. */
6241 for (i
= 0; i
< MAX_MACHS
; ++i
)
6242 if (((1 << i
) & machs
) != 0)
6244 const CGEN_MACH
*mach
= & frv_cgen_mach_table
[i
];
6246 if (mach
->insn_chunk_bitsize
!= 0)
6248 if (cd
->insn_chunk_bitsize
!= 0 && cd
->insn_chunk_bitsize
!= mach
->insn_chunk_bitsize
)
6250 fprintf (stderr
, "frv_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
6251 cd
->insn_chunk_bitsize
, mach
->insn_chunk_bitsize
);
6255 cd
->insn_chunk_bitsize
= mach
->insn_chunk_bitsize
;
6259 /* Determine which hw elements are used by MACH. */
6260 build_hw_table (cd
);
6262 /* Build the ifield table. */
6263 build_ifield_table (cd
);
6265 /* Determine which operands are used by MACH/ISA. */
6266 build_operand_table (cd
);
6268 /* Build the instruction table. */
6269 build_insn_table (cd
);
6272 /* Initialize a cpu table and return a descriptor.
6273 It's much like opening a file, and must be the first function called.
6274 The arguments are a set of (type/value) pairs, terminated with
6277 Currently supported values:
6278 CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
6279 CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
6280 CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
6281 CGEN_CPU_OPEN_ENDIAN: specify endian choice
6282 CGEN_CPU_OPEN_END: terminates arguments
6284 ??? Simultaneous multiple isas might not make sense, but it's not (yet)
6287 ??? We only support ISO C stdargs here, not K&R.
6288 Laziness, plus experiment to see if anything requires K&R - eventually
6289 K&R will no longer be supported - e.g. GDB is currently trying this. */
6292 frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type
, ...)
6294 CGEN_CPU_TABLE
*cd
= (CGEN_CPU_TABLE
*) xmalloc (sizeof (CGEN_CPU_TABLE
));
6296 unsigned int isas
= 0; /* 0 = "unspecified" */
6297 unsigned int machs
= 0; /* 0 = "unspecified" */
6298 enum cgen_endian endian
= CGEN_ENDIAN_UNKNOWN
;
6307 memset (cd
, 0, sizeof (*cd
));
6309 va_start (ap
, arg_type
);
6310 while (arg_type
!= CGEN_CPU_OPEN_END
)
6314 case CGEN_CPU_OPEN_ISAS
:
6315 isas
= va_arg (ap
, unsigned int);
6317 case CGEN_CPU_OPEN_MACHS
:
6318 machs
= va_arg (ap
, unsigned int);
6320 case CGEN_CPU_OPEN_BFDMACH
:
6322 const char *name
= va_arg (ap
, const char *);
6323 const CGEN_MACH
*mach
=
6324 lookup_mach_via_bfd_name (frv_cgen_mach_table
, name
);
6326 machs
|= 1 << mach
->num
;
6329 case CGEN_CPU_OPEN_ENDIAN
:
6330 endian
= va_arg (ap
, enum cgen_endian
);
6333 fprintf (stderr
, "frv_cgen_cpu_open: unsupported argument `%d'\n",
6335 abort (); /* ??? return NULL? */
6337 arg_type
= va_arg (ap
, enum cgen_cpu_open_arg
);
6341 /* mach unspecified means "all" */
6343 machs
= (1 << MAX_MACHS
) - 1;
6344 /* base mach is always selected */
6346 /* isa unspecified means "all" */
6348 isas
= (1 << MAX_ISAS
) - 1;
6349 if (endian
== CGEN_ENDIAN_UNKNOWN
)
6351 /* ??? If target has only one, could have a default. */
6352 fprintf (stderr
, "frv_cgen_cpu_open: no endianness specified\n");
6358 cd
->endian
= endian
;
6359 /* FIXME: for the sparc case we can determine insn-endianness statically.
6360 The worry here is where both data and insn endian can be independently
6361 chosen, in which case this function will need another argument.
6362 Actually, will want to allow for more arguments in the future anyway. */
6363 cd
->insn_endian
= endian
;
6365 /* Table (re)builder. */
6366 cd
->rebuild_tables
= frv_cgen_rebuild_tables
;
6367 frv_cgen_rebuild_tables (cd
);
6369 /* Default to not allowing signed overflow. */
6370 cd
->signed_overflow_ok_p
= 0;
6372 return (CGEN_CPU_DESC
) cd
;
6375 /* Cover fn to frv_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
6376 MACH_NAME is the bfd name of the mach. */
6379 frv_cgen_cpu_open_1 (mach_name
, endian
)
6380 const char *mach_name
;
6381 enum cgen_endian endian
;
6383 return frv_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH
, mach_name
,
6384 CGEN_CPU_OPEN_ENDIAN
, endian
,
6388 /* Close a cpu table.
6389 ??? This can live in a machine independent file, but there's currently
6390 no place to put this file (there's no libcgen). libopcodes is the wrong
6391 place as some simulator ports use this but they don't use libopcodes. */
6394 frv_cgen_cpu_close (cd
)
6398 const CGEN_INSN
*insns
;
6400 if (cd
->macro_insn_table
.init_entries
)
6402 insns
= cd
->macro_insn_table
.init_entries
;
6403 for (i
= 0; i
< cd
->macro_insn_table
.num_init_entries
; ++i
, ++insns
)
6405 if (CGEN_INSN_RX ((insns
)))
6406 regfree (CGEN_INSN_RX (insns
));
6410 if (cd
->insn_table
.init_entries
)
6412 insns
= cd
->insn_table
.init_entries
;
6413 for (i
= 0; i
< cd
->insn_table
.num_init_entries
; ++i
, ++insns
)
6415 if (CGEN_INSN_RX (insns
))
6416 regfree (CGEN_INSN_RX (insns
));
6422 if (cd
->macro_insn_table
.init_entries
)
6423 free ((CGEN_INSN
*) cd
->macro_insn_table
.init_entries
);
6425 if (cd
->insn_table
.init_entries
)
6426 free ((CGEN_INSN
*) cd
->insn_table
.init_entries
);
6428 if (cd
->hw_table
.entries
)
6429 free ((CGEN_HW_ENTRY
*) cd
->hw_table
.entries
);
6431 if (cd
->operand_table
.entries
)
6432 free ((CGEN_HW_ENTRY
*) cd
->operand_table
.entries
);