toolchain/gcc/newlib/libc/machine/hppa/pcc_prefix.s

   1 ;
   2 ;  (c) Copyright 1986 HEWLETT-PACKARD COMPANY
   3 ;
   4 ;  To anyone who acknowledges that this file is provided "AS IS"
   5 ;  without any express or implied warranty:
   6 ;      permission to use, copy, modify, and distribute this file
   7 ;  for any purpose is hereby granted without fee, provided that
   8 ;  the above copyright notice and this notice appears in all
   9 ;  copies, and that the name of Hewlett-Packard Company not be
  10 ;  used in advertising or publicity pertaining to distribution
  11 ;  of the software without specific, written prior permission.
  12 ;  Hewlett-Packard Company makes no representations about the
  13 ;  suitability of this software for any purpose.
  14 ;
  15
  16 ; Standard Hardware Register Definitions for Use with Assembler
  17 ; version A.08.06
  18 ;       - fr16-31 added at Utah
  19 ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  20 ; Hardware General Registers
  21 r0: .equ        0
  22
  23 r1: .equ        1
  24
  25 r2: .equ        2
  26
  27 r3: .equ        3
  28
  29 r4: .equ        4
  30
  31 r5: .equ        5
  32
  33 r6: .equ        6
  34
  35 r7: .equ        7
  36
  37 r8: .equ        8
  38
  39 r9: .equ        9
  40
  41 r10: .equ       10
  42
  43 r11: .equ       11
  44
  45 r12: .equ       12
  46
  47 r13: .equ       13
  48
  49 r14: .equ       14
  50
  51 r15: .equ       15
  52
  53 r16: .equ       16
  54
  55 r17: .equ       17
  56
  57 r18: .equ       18
  58
  59 r19: .equ       19
  60
  61 r20: .equ       20
  62
  63 r21: .equ       21
  64
  65 r22: .equ       22
  66
  67 r23: .equ       23
  68
  69 r24: .equ       24
  70
  71 r25: .equ       25
  72
  73 r26: .equ       26
  74
  75 r27: .equ       27
  76
  77 r28: .equ       28
  78
  79 r29: .equ       29
  80
  81 r30: .equ       30
  82
  83 r31: .equ       31
  84
  85 ; Hardware Space Registers
  86 sr0: .equ       0
  87
  88 sr1: .equ       1
  89
  90 sr2: .equ       2
  91
  92 sr3: .equ       3
  93
  94 sr4: .equ       4
  95
  96 sr5: .equ       5
  97
  98 sr6: .equ       6
  99
 100 sr7: .equ       7
 101
 102 ; Hardware Floating Point Registers
 103 fr0: .equ       0
 104
 105 fr1: .equ       1
 106
 107 fr2: .equ       2
 108
 109 fr3: .equ       3
 110
 111 fr4: .equ       4
 112
 113 fr5: .equ       5
 114
 115 fr6: .equ       6
 116
 117 fr7: .equ       7
 118
 119 fr8: .equ       8
 120
 121 fr9: .equ       9
 122
 123 fr10: .equ      10
 124
 125 fr11: .equ      11
 126
 127 fr12: .equ      12
 128
 129 fr13: .equ      13
 130
 131 fr14: .equ      14
 132
 133 fr15: .equ      15
 134
 135 fr16: .equ      16
 136
 137 fr17: .equ      17
 138
 139 fr18: .equ      18
 140
 141 fr19: .equ      19
 142
 143 fr20: .equ      20
 144
 145 fr21: .equ      21
 146
 147 fr22: .equ      22
 148
 149 fr23: .equ      23
 150
 151 fr24: .equ      24
 152
 153 fr25: .equ      25
 154
 155 fr26: .equ      26
 156
 157 fr27: .equ      27
 158
 159 fr28: .equ      28
 160
 161 fr29: .equ      29
 162
 163 fr30: .equ      30
 164
 165 fr31: .equ      31
 166
 167 ; Hardware Control Registers
 168 cr0: .equ       0
 169
 170 rctr: .equ      0                       ; Recovery Counter Register
 171
 172
 173 cr8: .equ       8                       ; Protection ID 1
 174
 175 pidr1: .equ     8
 176
 177
 178 cr9: .equ       9                       ; Protection ID 2
 179
 180 pidr2: .equ     9
 181
 182
 183 cr10: .equ      10
 184
 185 ccr: .equ       10                      ; Coprocessor Confiquration Register
 186
 187
 188 cr11: .equ      11
 189
 190 sar: .equ       11                      ; Shift Amount Register
 191
 192
 193 cr12: .equ      12
 194
 195 pidr3: .equ     12                      ; Protection ID 3
 196
 197
 198 cr13: .equ      13
 199
 200 pidr4: .equ     13                      ; Protection ID 4
 201
 202
 203 cr14: .equ      14
 204
 205 iva: .equ       14                      ; Interrupt Vector Address
 206
 207
 208 cr15: .equ      15
 209
 210 eiem: .equ      15                      ; External Interrupt Enable Mask
 211
 212
 213 cr16: .equ      16
 214
 215 itmr: .equ      16                      ; Interval Timer
 216
 217
 218 cr17: .equ      17
 219
 220 pcsq: .equ      17                      ; Program Counter Space queue
 221
 222
 223 cr18: .equ      18
 224
 225 pcoq: .equ      18                      ; Program Counter Offset queue
 226
 227
 228 cr19: .equ      19
 229
 230 iir: .equ       19                      ; Interruption Instruction Register
 231
 232
 233 cr20: .equ      20
 234
 235 isr: .equ       20                      ; Interruption Space Register
 236
 237
 238 cr21: .equ      21
 239
 240 ior: .equ       21                      ; Interruption Offset Register
 241
 242
 243 cr22: .equ      22
 244
 245 ipsw: .equ      22                      ; Interrpution Processor Status Word
 246
 247
 248 cr23: .equ      23
 249
 250 eirr: .equ      23                      ; External Interrupt Request
 251
 252
 253 cr24: .equ      24
 254
 255 ppda: .equ      24                      ; Physcial Page Directory Address
 256
 257 tr0: .equ       24                      ; Temporary register 0
 258
 259
 260 cr25: .equ      25
 261
 262 hta: .equ       25                      ; Hash Table Address
 263
 264 tr1: .equ       25                      ; Temporary register 1
 265
 266
 267 cr26: .equ      26
 268
 269 tr2: .equ       26                      ; Temporary register 2
 270
 271
 272 cr27: .equ      27
 273
 274 tr3: .equ       27                      ; Temporary register 3
 275
 276
 277 cr28: .equ      28
 278
 279 tr4: .equ       28                      ; Temporary register 4
 280
 281
 282 cr29: .equ      29
 283
 284 tr5: .equ       29                      ; Temporary register 5
 285
 286
 287 cr30: .equ      30
 288
 289 tr6: .equ       30                      ; Temporary register 6
 290
 291
 292 cr31: .equ      31
 293
 294 tr7: .equ       31                      ; Temporary register 7
 295
 296 ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 297 ; Procedure Call Convention                                                  ~
 298 ; Register Definitions for Use with Assembler                                ~
 299 ; version A.08.06
 300 ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 301 ; Software Architecture General Registers
 302 rp: .equ    r2  ; return pointer
 303
 304 mrp: .equ       r31     ; millicode return pointer
 305
 306 ret0: .equ    r28       ; return value
 307
 308 ret1: .equ    r29       ; return value (high part of double)
 309
 310 sl: .equ    r29 ; static link
 311
 312 sp: .equ        r30     ; stack pointer
 313
 314 dp: .equ        r27     ; data pointer
 315
 316 arg0: .equ      r26     ; argument
 317
 318 arg1: .equ      r25     ; argument or high part of double argument
 319
 320 arg2: .equ      r24     ; argument
 321
 322 arg3: .equ      r23     ; argument or high part of double argument
 323
 324 ;_____________________________________________________________________________
 325 ; Software Architecture Space Registers
 326 ;               sr0     ; return link form BLE
 327 sret: .equ      sr1     ; return value
 328
 329 sarg: .equ      sr1     ; argument
 330
 331 ;               sr4     ; PC SPACE tracker
 332 ;               sr5     ; process private data
 333 ;_____________________________________________________________________________
 334 ; Software Architecture Pseudo Registers
 335 previous_sp: .equ       64      ; old stack pointer (locates previous frame)
 336
 337 #if 0
 338 ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 339 ;~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 340 ; Standard space and subspace definitions.  version A.08.06
 341 ; These are generally suitable for programs on HP_UX and HPE.
 342 ; Statements commented out are used when building such things as operating
 343 ; system kernels.
 344 ;;;;;;;;;;;;;;;;
 345         .SPACE  $TEXT$,         SPNUM=0,SORT=8
 346 ;       .subspa $FIRST$,        QUAD=0,ALIGN=2048,ACCESS=0x2c,SORT=4,FIRST
 347 ;       .subspa $REAL$,         QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=4,FIRST,LOCK
 348         .subspa $MILLICODE$,    QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=8
 349         .subspa $LIT$,          QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=16
 350         .subspa $CODE$,         QUAD=0,ALIGN=8,ACCESS=0x2c,SORT=24
 351 ;       .subspa $UNWIND$,       QUAD=0,ALIGN=4,ACCESS=0x2c,SORT=64
 352 ;       .subspa $RECOVER$,      QUAD=0,ALIGN=4,ACCESS=0x2c,SORT=80
 353 ;       .subspa $RESERVED$,     QUAD=0,ALIGN=8,ACCESS=0x73,SORT=82
 354 ;       .subspa $GATE$,         QUAD=0,ALIGN=8,ACCESS=0x4c,SORT=84,CODE_ONLY
 355 ; Additional code subspaces should have ALIGN=8 for an interspace BV
 356 ; and should have SORT=24.
 357 ;
 358 ; For an incomplete executable (program bound to shared libraries),
 359 ; sort keys $GLOBAL$ -1 and $GLOBAL$ -2 are reserved for the $DLT$
 360 ; and $PLT$ subspaces respectively.
 361 ;;;;;;;;;;;;;;;
 362         .SPACE $PRIVATE$,       SPNUM=1,PRIVATE,SORT=16
 363         .subspa $GLOBAL$,       QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=40
 364         .import $global$
 365         .subspa $SHORTDATA$,    QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=24
 366         .subspa $DATA$,         QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=16
 367         .subspa $PFA_COUNTER$,  QUAD=1,ALIGN=4,ACCESS=0x1f,SORT=8
 368         .subspa $SHORTBSS$,     QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=80,ZERO
 369         .subspa $BSS$,          QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=82,ZERO
 370 ;       .subspa $PCB$,          QUAD=1,ALIGN=8,ACCESS=0x10,SORT=82
 371 ;       .subspa $STACK$,        QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=82
 372 ;       .subspa $HEAP$,         QUAD=1,ALIGN=8,ACCESS=0x1f,SORT=82
 373 ;;;;;;;;;;;;;;;;
 374 ;       .SPACE  $PFA$,          SPNUM=0,PRIVATE,UNLOADABLE,SORT=64
 375 ;       .subspa $PFA_ADDRESS$,  ALIGN=4,ACCESS=0x2c,UNLOADABLE
 376 ;;;;;;;;;;;;;;;;
 377 ;       .SPACE  $DEBUG$,        SPNUM=2,PRIVATE,UNLOADABLE,SORT=80
 378 ;       .subspa $HEADER$,       ALIGN=4,ACCESS=0,UNLOADABLE,FIRST
 379 ;       .subspa $GNTT$,         ALIGN=4,ACCESS=0,UNLOADABLE
 380 ;       .subspa $LNTT$,         ALIGN=4,ACCESS=0,UNLOADABLE
 381 ;       .subspa $SLT$,          ALIGN=4,ACCESS=0,UNLOADABLE
 382 ;       .subspa $VT$,           ALIGN=4,ACCESS=0,UNLOADABLE
 383
 384 ; To satisfy the copyright terms each .o will have a reference
 385 ; the the actual copyright.  This will force the actual copyright
 386 ; message to be brought in from libgloss/hp-milli.s
 387         .space $PRIVATE$
 388         .subspa $DATA$
 389 #else
 390         .data
 391 #endif
 392         .import ___hp_free_copyright,data
 393 L$copyright .word ___hp_free_copyright