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fixed more binutils issues (newer gcc/libc)
[zpugcc/jano.git] / toolchain / gcc / boehm-gc / mach_dep.c
blob2c321fa978d731de57a347a7590b2f71687b8c2a
1 /*
2 * Copyright 1988, 1989 Hans-J. Boehm, Alan J. Demers
3 * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
4 *
5 * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
6 * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
7 *
8 * Permission is hereby granted to use or copy this program
9 * for any purpose, provided the above notices are retained on all copies.
10 * Permission to modify the code and to distribute modified code is granted,
11 * provided the above notices are retained, and a notice that the code was
12 * modified is included with the above copyright notice.
13 */
14 /* Boehm, November 17, 1995 12:13 pm PST */
15 # include "private/gc_priv.h"
16 # include <stdio.h>
17 # include <setjmp.h>
18 # if defined(OS2) || defined(CX_UX)
19 # define _setjmp(b) setjmp(b)
20 # define _longjmp(b,v) longjmp(b,v)
21 # endif
22 # ifdef AMIGA
23 # ifndef __GNUC__
24 # include <dos.h>
25 # else
26 # include <machine/reg.h>
27 # endif
28 # endif
29
30 #if defined(__MWERKS__) && !defined(POWERPC)
31
32 asm static void PushMacRegisters()
33 {
34 sub.w #4,sp // reserve space for one parameter.
35 move.l a2,(sp)
36 jsr GC_push_one
37 move.l a3,(sp)
38 jsr GC_push_one
39 move.l a4,(sp)
40 jsr GC_push_one
41 # if !__option(a6frames)
42 // <pcb> perhaps a6 should be pushed if stack frames are not being used.
43 move.l a6,(sp)
44 jsr GC_push_one
45 # endif
46 // skip a5 (globals), a6 (frame pointer), and a7 (stack pointer)
47 move.l d2,(sp)
48 jsr GC_push_one
49 move.l d3,(sp)
50 jsr GC_push_one
51 move.l d4,(sp)
52 jsr GC_push_one
53 move.l d5,(sp)
54 jsr GC_push_one
55 move.l d6,(sp)
56 jsr GC_push_one
57 move.l d7,(sp)
58 jsr GC_push_one
59 add.w #4,sp // fix stack.
60 rts
61 }
62
63 #endif /* __MWERKS__ */
64
65 # if defined(SPARC) || defined(IA64)
66 /* Value returned from register flushing routine; either sp (SPARC) */
67 /* or ar.bsp (IA64) */
68 word GC_save_regs_ret_val;
69 # endif
70
71 /* Routine to mark from registers that are preserved by the C compiler. */
72 /* This must be ported to every new architecture. There is a generic */
73 /* version at the end, that is likely, but not guaranteed to work */
74 /* on your architecture. Run the test_setjmp program to see whether */
75 /* there is any chance it will work. */
76
77 #if !defined(USE_GENERIC_PUSH_REGS) && !defined(USE_ASM_PUSH_REGS)
78 #undef HAVE_PUSH_REGS
79 void GC_push_regs()
80 {
81 # ifdef RT
82 register long TMP_SP; /* must be bound to r11 */
83 # endif
84
85 # ifdef VAX
86 /* VAX - generic code below does not work under 4.2 */
87 /* r1 through r5 are caller save, and therefore */
88 /* on the stack or dead. */
89 asm("pushl r11"); asm("calls $1,_GC_push_one");
90 asm("pushl r10"); asm("calls $1,_GC_push_one");
91 asm("pushl r9"); asm("calls $1,_GC_push_one");
92 asm("pushl r8"); asm("calls $1,_GC_push_one");
93 asm("pushl r7"); asm("calls $1,_GC_push_one");
94 asm("pushl r6"); asm("calls $1,_GC_push_one");
95 # define HAVE_PUSH_REGS
96 # endif
97 # if defined(M68K) && (defined(SUNOS4) || defined(NEXT))
98 /* M68K SUNOS - could be replaced by generic code */
99 /* a0, a1 and d1 are caller save */
100 /* and therefore are on stack or dead. */
101
102 asm("subqw #0x4,sp"); /* allocate word on top of stack */
103
104 asm("movl a2,sp@"); asm("jbsr _GC_push_one");
105 asm("movl a3,sp@"); asm("jbsr _GC_push_one");
106 asm("movl a4,sp@"); asm("jbsr _GC_push_one");
107 asm("movl a5,sp@"); asm("jbsr _GC_push_one");
108 /* Skip frame pointer and stack pointer */
109 asm("movl d1,sp@"); asm("jbsr _GC_push_one");
110 asm("movl d2,sp@"); asm("jbsr _GC_push_one");
111 asm("movl d3,sp@"); asm("jbsr _GC_push_one");
112 asm("movl d4,sp@"); asm("jbsr _GC_push_one");
113 asm("movl d5,sp@"); asm("jbsr _GC_push_one");
114 asm("movl d6,sp@"); asm("jbsr _GC_push_one");
115 asm("movl d7,sp@"); asm("jbsr _GC_push_one");
116
117 asm("addqw #0x4,sp"); /* put stack back where it was */
118 # define HAVE_PUSH_REGS
119 # endif
120
121 # if defined(M68K) && defined(HP)
122 /* M68K HP - could be replaced by generic code */
123 /* a0, a1 and d1 are caller save. */
124
125 asm("subq.w &0x4,%sp"); /* allocate word on top of stack */
126
127 asm("mov.l %a2,(%sp)"); asm("jsr _GC_push_one");
128 asm("mov.l %a3,(%sp)"); asm("jsr _GC_push_one");
129 asm("mov.l %a4,(%sp)"); asm("jsr _GC_push_one");
130 asm("mov.l %a5,(%sp)"); asm("jsr _GC_push_one");
131 /* Skip frame pointer and stack pointer */
132 asm("mov.l %d1,(%sp)"); asm("jsr _GC_push_one");
133 asm("mov.l %d2,(%sp)"); asm("jsr _GC_push_one");
134 asm("mov.l %d3,(%sp)"); asm("jsr _GC_push_one");
135 asm("mov.l %d4,(%sp)"); asm("jsr _GC_push_one");
136 asm("mov.l %d5,(%sp)"); asm("jsr _GC_push_one");
137 asm("mov.l %d6,(%sp)"); asm("jsr _GC_push_one");
138 asm("mov.l %d7,(%sp)"); asm("jsr _GC_push_one");
139
140 asm("addq.w &0x4,%sp"); /* put stack back where it was */
141 # define HAVE_PUSH_REGS
142 # endif /* M68K HP */
143
144 # if defined(M68K) && defined(AMIGA)
145 /* AMIGA - could be replaced by generic code */
146 /* a0, a1, d0 and d1 are caller save */
147
148 # ifdef __GNUC__
149 asm("subq.w &0x4,%sp"); /* allocate word on top of stack */
150
151 asm("mov.l %a2,(%sp)"); asm("jsr _GC_push_one");
152 asm("mov.l %a3,(%sp)"); asm("jsr _GC_push_one");
153 asm("mov.l %a4,(%sp)"); asm("jsr _GC_push_one");
154 asm("mov.l %a5,(%sp)"); asm("jsr _GC_push_one");
155 asm("mov.l %a6,(%sp)"); asm("jsr _GC_push_one");
156 /* Skip frame pointer and stack pointer */
157 asm("mov.l %d2,(%sp)"); asm("jsr _GC_push_one");
158 asm("mov.l %d3,(%sp)"); asm("jsr _GC_push_one");
159 asm("mov.l %d4,(%sp)"); asm("jsr _GC_push_one");
160 asm("mov.l %d5,(%sp)"); asm("jsr _GC_push_one");
161 asm("mov.l %d6,(%sp)"); asm("jsr _GC_push_one");
162 asm("mov.l %d7,(%sp)"); asm("jsr _GC_push_one");
163
164 asm("addq.w &0x4,%sp"); /* put stack back where it was */
165 # define HAVE_PUSH_REGS
166 # else /* !__GNUC__ */
167 GC_push_one(getreg(REG_A2));
168 GC_push_one(getreg(REG_A3));
169 # ifndef __SASC
170 /* Can probably be changed to #if 0 -Kjetil M. (a4=globals)*/
171 GC_push_one(getreg(REG_A4));
172 # endif
173 GC_push_one(getreg(REG_A5));
174 GC_push_one(getreg(REG_A6));
175 /* Skip stack pointer */
176 GC_push_one(getreg(REG_D2));
177 GC_push_one(getreg(REG_D3));
178 GC_push_one(getreg(REG_D4));
179 GC_push_one(getreg(REG_D5));
180 GC_push_one(getreg(REG_D6));
181 GC_push_one(getreg(REG_D7));
182 # define HAVE_PUSH_REGS
183 # endif /* !__GNUC__ */
184 # endif /* AMIGA */
185
186 # if defined(M68K) && defined(MACOS)
187 # if defined(THINK_C)
188 # define PushMacReg(reg) \
189 move.l reg,(sp) \
190 jsr GC_push_one
191 asm {
192 sub.w #4,sp ; reserve space for one parameter.
193 PushMacReg(a2);
194 PushMacReg(a3);
195 PushMacReg(a4);
196 ; skip a5 (globals), a6 (frame pointer), and a7 (stack pointer)
197 PushMacReg(d2);
198 PushMacReg(d3);
199 PushMacReg(d4);
200 PushMacReg(d5);
201 PushMacReg(d6);
202 PushMacReg(d7);
203 add.w #4,sp ; fix stack.
204 }
205 # define HAVE_PUSH_REGS
206 # undef PushMacReg
207 # endif /* THINK_C */
208 # if defined(__MWERKS__)
209 PushMacRegisters();
210 # define HAVE_PUSH_REGS
211 # endif /* __MWERKS__ */
212 # endif /* MACOS */
213
214 # if defined(I386) &&!defined(OS2) &&!defined(SVR4) \
215 && (defined(__MINGW32__) || !defined(MSWIN32)) \
216 && !defined(SCO) && !defined(SCO_ELF) \
217 && !(defined(LINUX) && defined(__ELF__)) \
218 && !(defined(FREEBSD) && defined(__ELF__)) \
219 && !(defined(NETBSD) && defined(__ELF__)) \
220 && !(defined(OPENBSD) && defined(__ELF__)) \
221 && !(defined(BEOS) && defined(__ELF__)) \
222 && !defined(DOS4GW) && !defined(HURD)
223 /* I386 code, generic code does not appear to work */
224 /* It does appear to work under OS2, and asms dont */
225 /* This is used for some 38g UNIX variants and for CYGWIN32 */
226 asm("pushl %eax"); asm("call _GC_push_one"); asm("addl $4,%esp");
227 asm("pushl %ecx"); asm("call _GC_push_one"); asm("addl $4,%esp");
228 asm("pushl %edx"); asm("call _GC_push_one"); asm("addl $4,%esp");
229 asm("pushl %ebp"); asm("call _GC_push_one"); asm("addl $4,%esp");
230 asm("pushl %esi"); asm("call _GC_push_one"); asm("addl $4,%esp");
231 asm("pushl %edi"); asm("call _GC_push_one"); asm("addl $4,%esp");
232 asm("pushl %ebx"); asm("call _GC_push_one"); asm("addl $4,%esp");
233 # define HAVE_PUSH_REGS
234 # endif
235
236 # if ( defined(I386) && defined(LINUX) && defined(__ELF__) ) \
237 || ( defined(I386) && defined(FREEBSD) && defined(__ELF__) ) \
238 || ( defined(I386) && defined(NETBSD) && defined(__ELF__) ) \
239 || ( defined(I386) && defined(OPENBSD) && defined(__ELF__) ) \
240 || ( defined(I386) && defined(HURD) && defined(__ELF__) ) \
241 || ( defined(I386) && defined(DGUX) )
242
243 /* This is modified for Linux with ELF (Note: _ELF_ only) */
244 /* This section handles FreeBSD with ELF. */
245 /* Eax is caller-save and dead here. Other caller-save */
246 /* registers could also be skipped. We assume there are no */
247 /* pointers in MMX registers, etc. */
248 /* We combine instructions in a single asm to prevent gcc from */
249 /* inserting code in the middle. */
250 asm("pushl %ecx; call GC_push_one; addl $4,%esp");
251 asm("pushl %edx; call GC_push_one; addl $4,%esp");
252 asm("pushl %ebp; call GC_push_one; addl $4,%esp");
253 asm("pushl %esi; call GC_push_one; addl $4,%esp");
254 asm("pushl %edi; call GC_push_one; addl $4,%esp");
255 asm("pushl %ebx; call GC_push_one; addl $4,%esp");
256 # define HAVE_PUSH_REGS
257 # endif
258
259 # if ( defined(I386) && defined(BEOS) && defined(__ELF__) )
260 /* As far as I can understand from */
261 /* http://www.beunited.org/articles/jbq/nasm.shtml, */
262 /* only ebp, esi, edi and ebx are not scratch. How MMX */
263 /* etc. registers should be treated, I have no idea. */
264 asm("pushl %ebp; call GC_push_one; addl $4,%esp");
265 asm("pushl %esi; call GC_push_one; addl $4,%esp");
266 asm("pushl %edi; call GC_push_one; addl $4,%esp");
267 asm("pushl %ebx; call GC_push_one; addl $4,%esp");
268 # define HAVE_PUSH_REGS
269 # endif
270
271 # if defined(I386) && defined(MSWIN32) && !defined(__MINGW32__) \
272 && !defined(USE_GENERIC)
273 /* I386 code, Microsoft variant */
274 __asm push eax
275 __asm call GC_push_one
276 __asm add esp,4
277 __asm push ebx
278 __asm call GC_push_one
279 __asm add esp,4
280 __asm push ecx
281 __asm call GC_push_one
282 __asm add esp,4
283 __asm push edx
284 __asm call GC_push_one
285 __asm add esp,4
286 __asm push ebp
287 __asm call GC_push_one
288 __asm add esp,4
289 __asm push esi
290 __asm call GC_push_one
291 __asm add esp,4
292 __asm push edi
293 __asm call GC_push_one
294 __asm add esp,4
295 # define HAVE_PUSH_REGS
296 # endif
297
298 # if defined(I386) && (defined(SVR4) || defined(SCO) || defined(SCO_ELF))
299 /* I386 code, SVR4 variant, generic code does not appear to work */
300 asm("pushl %eax"); asm("call GC_push_one"); asm("addl $4,%esp");
301 asm("pushl %ebx"); asm("call GC_push_one"); asm("addl $4,%esp");
302 asm("pushl %ecx"); asm("call GC_push_one"); asm("addl $4,%esp");
303 asm("pushl %edx"); asm("call GC_push_one"); asm("addl $4,%esp");
304 asm("pushl %ebp"); asm("call GC_push_one"); asm("addl $4,%esp");
305 asm("pushl %esi"); asm("call GC_push_one"); asm("addl $4,%esp");
306 asm("pushl %edi"); asm("call GC_push_one"); asm("addl $4,%esp");
307 # define HAVE_PUSH_REGS
308 # endif
309
310 # ifdef NS32K
311 asm ("movd r3, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
312 asm ("movd r4, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
313 asm ("movd r5, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
314 asm ("movd r6, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
315 asm ("movd r7, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4");
316 # define HAVE_PUSH_REGS
317 # endif
318
319 # if defined(SPARC)
320 GC_save_regs_ret_val = GC_save_regs_in_stack();
321 # define HAVE_PUSH_REGS
322 # endif
323
324 # ifdef RT
325 GC_push_one(TMP_SP); /* GC_push_one from r11 */
326
327 asm("cas r11, r6, r0"); GC_push_one(TMP_SP); /* r6 */
328 asm("cas r11, r7, r0"); GC_push_one(TMP_SP); /* through */
329 asm("cas r11, r8, r0"); GC_push_one(TMP_SP); /* r10 */
330 asm("cas r11, r9, r0"); GC_push_one(TMP_SP);
331 asm("cas r11, r10, r0"); GC_push_one(TMP_SP);
332
333 asm("cas r11, r12, r0"); GC_push_one(TMP_SP); /* r12 */
334 asm("cas r11, r13, r0"); GC_push_one(TMP_SP); /* through */
335 asm("cas r11, r14, r0"); GC_push_one(TMP_SP); /* r15 */
336 asm("cas r11, r15, r0"); GC_push_one(TMP_SP);
337 # define HAVE_PUSH_REGS
338 # endif
339
340 # if defined(M68K) && defined(SYSV)
341 /* Once again similar to SUN and HP, though setjmp appears to work.
342 --Parag
343 */
344 # ifdef __GNUC__
345 asm("subqw #0x4,%sp"); /* allocate word on top of stack */
346
347 asm("movl %a2,%sp@"); asm("jbsr GC_push_one");
348 asm("movl %a3,%sp@"); asm("jbsr GC_push_one");
349 asm("movl %a4,%sp@"); asm("jbsr GC_push_one");
350 asm("movl %a5,%sp@"); asm("jbsr GC_push_one");
351 /* Skip frame pointer and stack pointer */
352 asm("movl %d1,%sp@"); asm("jbsr GC_push_one");
353 asm("movl %d2,%sp@"); asm("jbsr GC_push_one");
354 asm("movl %d3,%sp@"); asm("jbsr GC_push_one");
355 asm("movl %d4,%sp@"); asm("jbsr GC_push_one");
356 asm("movl %d5,%sp@"); asm("jbsr GC_push_one");
357 asm("movl %d6,%sp@"); asm("jbsr GC_push_one");
358 asm("movl %d7,%sp@"); asm("jbsr GC_push_one");
359
360 asm("addqw #0x4,%sp"); /* put stack back where it was */
361 # define HAVE_PUSH_REGS
362 # else /* !__GNUC__*/
363 asm("subq.w &0x4,%sp"); /* allocate word on top of stack */
364
365 asm("mov.l %a2,(%sp)"); asm("jsr GC_push_one");
366 asm("mov.l %a3,(%sp)"); asm("jsr GC_push_one");
367 asm("mov.l %a4,(%sp)"); asm("jsr GC_push_one");
368 asm("mov.l %a5,(%sp)"); asm("jsr GC_push_one");
369 /* Skip frame pointer and stack pointer */
370 asm("mov.l %d1,(%sp)"); asm("jsr GC_push_one");
371 asm("mov.l %d2,(%sp)"); asm("jsr GC_push_one");
372 asm("mov.l %d3,(%sp)"); asm("jsr GC_push_one");
373 asm("mov.l %d4,(%sp)"); asm("jsr GC_push_one");
374 asm("mov.l %d5,(%sp)"); asm("jsr GC_push_one");
375 asm("mov.l %d6,(%sp)"); asm("jsr GC_push_one");
376 asm("mov.l %d7,(%sp)"); asm("jsr GC_push_one");
377
378 asm("addq.w &0x4,%sp"); /* put stack back where it was */
379 # define HAVE_PUSH_REGS
380 # endif /* !__GNUC__ */
381 # endif /* M68K/SYSV */
382
383 # if defined(PJ)
384 {
385 register int * sp asm ("optop");
386 extern int *__libc_stack_end;
387
388 GC_push_all_stack (sp, __libc_stack_end);
389 # define HAVE_PUSH_REGS
390 /* Isn't this redundant with the code to push the stack? */
391 }
392 # endif
393
394 /* other machines... */
395 # if !defined(HAVE_PUSH_REGS)
396 --> We just generated an empty GC_push_regs, which
397 --> is almost certainly broken. Try defining
398 --> USE_GENERIC_PUSH_REGS instead.
399 # endif
400 }
401 #endif /* !USE_GENERIC_PUSH_REGS && !USE_ASM_PUSH_REGS */
402
403 #if defined(USE_GENERIC_PUSH_REGS)
404 void GC_generic_push_regs(cold_gc_frame)
405 ptr_t cold_gc_frame;
406 {
407 {
408 word dummy;
409
410 # ifdef HAVE_BUILTIN_UNWIND_INIT
411 /* This was suggested by Richard Henderson as the way to */
412 /* force callee-save registers and register windows onto */
413 /* the stack. */
414 __builtin_unwind_init();
415 # else /* !HAVE_BUILTIN_UNWIND_INIT */
416 /* Generic code */
417 /* The idea is due to Parag Patel at HP. */
418 /* We're not sure whether he would like */
419 /* to be he acknowledged for it or not. */
420 jmp_buf regs;
421 register word * i = (word *) regs;
422 register ptr_t lim = (ptr_t)(regs) + (sizeof regs);
423
424 /* Setjmp doesn't always clear all of the buffer. */
425 /* That tends to preserve garbage. Clear it. */
426 for (; (char *)i < lim; i++) {
427 *i = 0;
428 }
429 # if defined(POWERPC) || defined(MSWIN32) || defined(MSWINCE) \
430 || defined(UTS4) || defined(LINUX) || defined(EWS4800)
431 (void) setjmp(regs);
432 # else
433 (void) _setjmp(regs);
434 # endif
435 # endif /* !HAVE_BUILTIN_UNWIND_INIT */
436 # if (defined(SPARC) && !defined(HAVE_BUILTIN_UNWIND_INIT)) \
437 || defined(IA64)
438 /* On a register window machine, we need to save register */
439 /* contents on the stack for this to work. The setjmp */
440 /* is probably not needed on SPARC, since pointers are */
441 /* only stored in windowed or scratch registers. It is */
442 /* needed on IA64, since some non-windowed registers are */
443 /* preserved. */
444 {
445 GC_save_regs_ret_val = GC_save_regs_in_stack();
446 /* On IA64 gcc, could use __builtin_ia64_flushrs() and */
447 /* __builtin_ia64_flushrs(). The latter will be done */
448 /* implicitly by __builtin_unwind_init() for gcc3.0.1 */
449 /* and later. */
450 }
451 # endif
452 GC_push_current_stack(cold_gc_frame);
453 /* Strongly discourage the compiler from treating the above */
454 /* as a tail-call, since that would pop the register */
455 /* contents before we get a chance to look at them. */
456 GC_noop1((word)(&dummy));
457 }
458 }
459 #endif /* USE_GENERIC_PUSH_REGS */
460
461 /* On register window machines, we need a way to force registers into */
462 /* the stack. Return sp. */
463 # ifdef SPARC
464 asm(" .seg \"text\"");
465 # if defined(SVR4) || defined(NETBSD)
466 asm(" .globl GC_save_regs_in_stack");
467 asm("GC_save_regs_in_stack:");
468 asm(" .type GC_save_regs_in_stack,#function");
469 # else
470 asm(" .globl _GC_save_regs_in_stack");
471 asm("_GC_save_regs_in_stack:");
472 # endif
473 # if defined(__arch64__) || defined(__sparcv9)
474 asm(" save %sp,-128,%sp");
475 asm(" flushw");
476 asm(" ret");
477 asm(" restore %sp,2047+128,%o0");
478 # else
479 asm(" ta 0x3 ! ST_FLUSH_WINDOWS");
480 asm(" retl");
481 asm(" mov %sp,%o0");
482 # endif
483 # ifdef SVR4
484 asm(" .GC_save_regs_in_stack_end:");
485 asm(" .size GC_save_regs_in_stack,.GC_save_regs_in_stack_end-GC_save_regs_in_stack");
486 # endif
487 # ifdef LINT
488 word GC_save_regs_in_stack() { return(0 /* sp really */);}
489 # endif
490 # endif
491
492 /* On IA64, we also need to flush register windows. But they end */
493 /* up on the other side of the stack segment. */
494 /* Returns the backing store pointer for the register stack. */
495 /* We now implement this as a separate assembly file, since inline */
496 /* assembly code here doesn't work with either the Intel or HP */
497 /* compilers. */
498 # if 0
499 # ifdef LINUX
500 asm(" .text");
501 asm(" .psr abi64");
502 asm(" .psr lsb");
503 asm(" .lsb");
504 asm("");
505 asm(" .text");
506 asm(" .align 16");
507 asm(" .global GC_save_regs_in_stack");
508 asm(" .proc GC_save_regs_in_stack");
509 asm("GC_save_regs_in_stack:");
510 asm(" .body");
511 asm(" flushrs");
512 asm(" ;;");
513 asm(" mov r8=ar.bsp");
514 asm(" br.ret.sptk.few rp");
515 asm(" .endp GC_save_regs_in_stack");
516 # endif /* LINUX */
517 # if 0 /* Other alternatives that don't work on HP/UX */
518 word GC_save_regs_in_stack() {
519 # if USE_BUILTINS
520 __builtin_ia64_flushrs();
521 return __builtin_ia64_bsp();
522 # else
523 # ifdef HPUX
524 _asm(" flushrs");
525 _asm(" ;;");
526 _asm(" mov r8=ar.bsp");
527 _asm(" br.ret.sptk.few rp");
528 # else
529 asm(" flushrs");
530 asm(" ;;");
531 asm(" mov r8=ar.bsp");
532 asm(" br.ret.sptk.few rp");
533 # endif
534 # endif
535 }
536 # endif
537 # endif
538
539 /* GC_clear_stack_inner(arg, limit) clears stack area up to limit and */
540 /* returns arg. Stack clearing is crucial on SPARC, so we supply */
541 /* an assembly version that's more careful. Assumes limit is hotter */
542 /* than sp, and limit is 8 byte aligned. */
543 #if defined(ASM_CLEAR_CODE)
544 #ifndef SPARC
545 --> fix it
546 #endif
547 # ifdef SUNOS4
548 asm(".globl _GC_clear_stack_inner");
549 asm("_GC_clear_stack_inner:");
550 # else
551 asm(".globl GC_clear_stack_inner");
552 asm("GC_clear_stack_inner:");
553 asm(".type GC_save_regs_in_stack,#function");
554 # endif
555 #if defined(__arch64__) || defined(__sparcv9)
556 asm("mov %sp,%o2"); /* Save sp */
557 asm("add %sp,2047-8,%o3"); /* p = sp+bias-8 */
558 asm("add %o1,-2047-192,%sp"); /* Move sp out of the way, */
559 /* so that traps still work. */
560 /* Includes some extra words */
561 /* so we can be sloppy below. */
562 asm("loop:");
563 asm("stx %g0,[%o3]"); /* *(long *)p = 0 */
564 asm("cmp %o3,%o1");
565 asm("bgu,pt %xcc, loop"); /* if (p > limit) goto loop */
566 asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */
567 asm("retl");
568 asm("mov %o2,%sp"); /* Restore sp., delay slot */
569 #else
570 asm("mov %sp,%o2"); /* Save sp */
571 asm("add %sp,-8,%o3"); /* p = sp-8 */
572 asm("clr %g1"); /* [g0,g1] = 0 */
573 asm("add %o1,-0x60,%sp"); /* Move sp out of the way, */
574 /* so that traps still work. */
575 /* Includes some extra words */
576 /* so we can be sloppy below. */
577 asm("loop:");
578 asm("std %g0,[%o3]"); /* *(long long *)p = 0 */
579 asm("cmp %o3,%o1");
580 asm("bgu loop "); /* if (p > limit) goto loop */
581 asm("add %o3,-8,%o3"); /* p -= 8 (delay slot) */
582 asm("retl");
583 asm("mov %o2,%sp"); /* Restore sp., delay slot */
584 #endif /* old SPARC */
585 /* First argument = %o0 = return value */
586 # ifdef SVR4
587 asm(" .GC_clear_stack_inner_end:");
588 asm(" .size GC_clear_stack_inner,.GC_clear_stack_inner_end-GC_clear_stack_inner");
589 # endif
590
591 # ifdef LINT
592 /*ARGSUSED*/
593 ptr_t GC_clear_stack_inner(arg, limit)
594 ptr_t arg; word limit;
595 { return(arg); }
596 # endif
597 #endif
my patches to zpugcc